diff options
Diffstat (limited to 'drivers/infiniband/hw')
-rw-r--r-- | drivers/infiniband/hw/cxgb4/cq.c | 8 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/device.c | 16 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/provider.c | 4 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/qp.c | 35 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb4/t4.h | 2 |
5 files changed, 32 insertions, 33 deletions
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index de9bcf2e6d30..0f773e78e080 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c | |||
@@ -913,14 +913,8 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries, | |||
913 | /* | 913 | /* |
914 | * memsize must be a multiple of the page size if its a user cq. | 914 | * memsize must be a multiple of the page size if its a user cq. |
915 | */ | 915 | */ |
916 | if (ucontext) { | 916 | if (ucontext) |
917 | memsize = roundup(memsize, PAGE_SIZE); | 917 | memsize = roundup(memsize, PAGE_SIZE); |
918 | hwentries = memsize / sizeof *chp->cq.queue; | ||
919 | while (hwentries > rhp->rdev.hw_queue.t4_max_iq_size) { | ||
920 | memsize -= PAGE_SIZE; | ||
921 | hwentries = memsize / sizeof *chp->cq.queue; | ||
922 | } | ||
923 | } | ||
924 | chp->cq.size = hwentries; | 918 | chp->cq.size = hwentries; |
925 | chp->cq.memsize = memsize; | 919 | chp->cq.memsize = memsize; |
926 | chp->cq.vector = vector; | 920 | chp->cq.vector = vector; |
diff --git a/drivers/infiniband/hw/cxgb4/device.c b/drivers/infiniband/hw/cxgb4/device.c index 03b6fa1291bf..bda949223637 100644 --- a/drivers/infiniband/hw/cxgb4/device.c +++ b/drivers/infiniband/hw/cxgb4/device.c | |||
@@ -934,17 +934,17 @@ static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop) | |||
934 | 934 | ||
935 | devp->rdev.hw_queue.t4_eq_status_entries = | 935 | devp->rdev.hw_queue.t4_eq_status_entries = |
936 | devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1; | 936 | devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1; |
937 | devp->rdev.hw_queue.t4_max_eq_size = | 937 | devp->rdev.hw_queue.t4_max_eq_size = 65520; |
938 | 65520 - devp->rdev.hw_queue.t4_eq_status_entries; | 938 | devp->rdev.hw_queue.t4_max_iq_size = 65520; |
939 | devp->rdev.hw_queue.t4_max_iq_size = 65520 - 1; | 939 | devp->rdev.hw_queue.t4_max_rq_size = 8192 - |
940 | devp->rdev.hw_queue.t4_max_rq_size = | 940 | devp->rdev.hw_queue.t4_eq_status_entries - 1; |
941 | 8192 - devp->rdev.hw_queue.t4_eq_status_entries; | ||
942 | devp->rdev.hw_queue.t4_max_sq_size = | 941 | devp->rdev.hw_queue.t4_max_sq_size = |
943 | devp->rdev.hw_queue.t4_max_eq_size - 1; | 942 | devp->rdev.hw_queue.t4_max_eq_size - |
943 | devp->rdev.hw_queue.t4_eq_status_entries - 1; | ||
944 | devp->rdev.hw_queue.t4_max_qp_depth = | 944 | devp->rdev.hw_queue.t4_max_qp_depth = |
945 | devp->rdev.hw_queue.t4_max_rq_size - 1; | 945 | devp->rdev.hw_queue.t4_max_rq_size; |
946 | devp->rdev.hw_queue.t4_max_cq_depth = | 946 | devp->rdev.hw_queue.t4_max_cq_depth = |
947 | devp->rdev.hw_queue.t4_max_iq_size - 1; | 947 | devp->rdev.hw_queue.t4_max_iq_size - 2; |
948 | devp->rdev.hw_queue.t4_stat_len = | 948 | devp->rdev.hw_queue.t4_stat_len = |
949 | devp->rdev.lldi.sge_egrstatuspagesize; | 949 | devp->rdev.lldi.sge_egrstatuspagesize; |
950 | 950 | ||
diff --git a/drivers/infiniband/hw/cxgb4/provider.c b/drivers/infiniband/hw/cxgb4/provider.c index 67c4a6908021..72e3b69d1b76 100644 --- a/drivers/infiniband/hw/cxgb4/provider.c +++ b/drivers/infiniband/hw/cxgb4/provider.c | |||
@@ -318,7 +318,7 @@ static int c4iw_query_device(struct ib_device *ibdev, | |||
318 | props->vendor_id = (u32)dev->rdev.lldi.pdev->vendor; | 318 | props->vendor_id = (u32)dev->rdev.lldi.pdev->vendor; |
319 | props->vendor_part_id = (u32)dev->rdev.lldi.pdev->device; | 319 | props->vendor_part_id = (u32)dev->rdev.lldi.pdev->device; |
320 | props->max_mr_size = T4_MAX_MR_SIZE; | 320 | props->max_mr_size = T4_MAX_MR_SIZE; |
321 | props->max_qp = T4_MAX_NUM_QP; | 321 | props->max_qp = dev->rdev.lldi.vr->qp.size / 2; |
322 | props->max_qp_wr = dev->rdev.hw_queue.t4_max_qp_depth; | 322 | props->max_qp_wr = dev->rdev.hw_queue.t4_max_qp_depth; |
323 | props->max_sge = T4_MAX_RECV_SGE; | 323 | props->max_sge = T4_MAX_RECV_SGE; |
324 | props->max_sge_rd = 1; | 324 | props->max_sge_rd = 1; |
@@ -326,7 +326,7 @@ static int c4iw_query_device(struct ib_device *ibdev, | |||
326 | props->max_qp_rd_atom = min(dev->rdev.lldi.max_ordird_qp, | 326 | props->max_qp_rd_atom = min(dev->rdev.lldi.max_ordird_qp, |
327 | c4iw_max_read_depth); | 327 | c4iw_max_read_depth); |
328 | props->max_qp_init_rd_atom = props->max_qp_rd_atom; | 328 | props->max_qp_init_rd_atom = props->max_qp_rd_atom; |
329 | props->max_cq = T4_MAX_NUM_CQ; | 329 | props->max_cq = dev->rdev.lldi.vr->qp.size; |
330 | props->max_cqe = dev->rdev.hw_queue.t4_max_cq_depth; | 330 | props->max_cqe = dev->rdev.hw_queue.t4_max_cq_depth; |
331 | props->max_mr = c4iw_num_stags(&dev->rdev); | 331 | props->max_mr = c4iw_num_stags(&dev->rdev); |
332 | props->max_pd = T4_MAX_NUM_PD; | 332 | props->max_pd = T4_MAX_NUM_PD; |
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 0e7e0e30fba4..c158fcc02bca 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c | |||
@@ -205,9 +205,9 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, | |||
205 | } | 205 | } |
206 | 206 | ||
207 | /* | 207 | /* |
208 | * RQT must be a power of 2. | 208 | * RQT must be a power of 2 and at least 16 deep. |
209 | */ | 209 | */ |
210 | wq->rq.rqt_size = roundup_pow_of_two(wq->rq.size); | 210 | wq->rq.rqt_size = roundup_pow_of_two(max_t(u16, wq->rq.size, 16)); |
211 | wq->rq.rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rq.rqt_size); | 211 | wq->rq.rqt_hwaddr = c4iw_rqtpool_alloc(rdev, wq->rq.rqt_size); |
212 | if (!wq->rq.rqt_hwaddr) { | 212 | if (!wq->rq.rqt_hwaddr) { |
213 | ret = -ENOMEM; | 213 | ret = -ENOMEM; |
@@ -1621,13 +1621,17 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1621 | if (attrs->cap.max_inline_data > T4_MAX_SEND_INLINE) | 1621 | if (attrs->cap.max_inline_data > T4_MAX_SEND_INLINE) |
1622 | return ERR_PTR(-EINVAL); | 1622 | return ERR_PTR(-EINVAL); |
1623 | 1623 | ||
1624 | rqsize = roundup(attrs->cap.max_recv_wr + 1, 16); | 1624 | if (attrs->cap.max_recv_wr > rhp->rdev.hw_queue.t4_max_rq_size) |
1625 | if (rqsize > rhp->rdev.hw_queue.t4_max_rq_size) | ||
1626 | return ERR_PTR(-E2BIG); | 1625 | return ERR_PTR(-E2BIG); |
1626 | rqsize = attrs->cap.max_recv_wr + 1; | ||
1627 | if (rqsize < 8) | ||
1628 | rqsize = 8; | ||
1627 | 1629 | ||
1628 | sqsize = roundup(attrs->cap.max_send_wr + 1, 16); | 1630 | if (attrs->cap.max_send_wr > rhp->rdev.hw_queue.t4_max_sq_size) |
1629 | if (sqsize > rhp->rdev.hw_queue.t4_max_sq_size) | ||
1630 | return ERR_PTR(-E2BIG); | 1631 | return ERR_PTR(-E2BIG); |
1632 | sqsize = attrs->cap.max_send_wr + 1; | ||
1633 | if (sqsize < 8) | ||
1634 | sqsize = 8; | ||
1631 | 1635 | ||
1632 | ucontext = pd->uobject ? to_c4iw_ucontext(pd->uobject->context) : NULL; | 1636 | ucontext = pd->uobject ? to_c4iw_ucontext(pd->uobject->context) : NULL; |
1633 | 1637 | ||
@@ -1635,19 +1639,20 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1635 | if (!qhp) | 1639 | if (!qhp) |
1636 | return ERR_PTR(-ENOMEM); | 1640 | return ERR_PTR(-ENOMEM); |
1637 | qhp->wq.sq.size = sqsize; | 1641 | qhp->wq.sq.size = sqsize; |
1638 | qhp->wq.sq.memsize = (sqsize + 1) * sizeof *qhp->wq.sq.queue; | 1642 | qhp->wq.sq.memsize = |
1643 | (sqsize + rhp->rdev.hw_queue.t4_eq_status_entries) * | ||
1644 | sizeof(*qhp->wq.sq.queue) + 16 * sizeof(__be64); | ||
1639 | qhp->wq.sq.flush_cidx = -1; | 1645 | qhp->wq.sq.flush_cidx = -1; |
1640 | qhp->wq.rq.size = rqsize; | 1646 | qhp->wq.rq.size = rqsize; |
1641 | qhp->wq.rq.memsize = (rqsize + 1) * sizeof *qhp->wq.rq.queue; | 1647 | qhp->wq.rq.memsize = |
1648 | (rqsize + rhp->rdev.hw_queue.t4_eq_status_entries) * | ||
1649 | sizeof(*qhp->wq.rq.queue); | ||
1642 | 1650 | ||
1643 | if (ucontext) { | 1651 | if (ucontext) { |
1644 | qhp->wq.sq.memsize = roundup(qhp->wq.sq.memsize, PAGE_SIZE); | 1652 | qhp->wq.sq.memsize = roundup(qhp->wq.sq.memsize, PAGE_SIZE); |
1645 | qhp->wq.rq.memsize = roundup(qhp->wq.rq.memsize, PAGE_SIZE); | 1653 | qhp->wq.rq.memsize = roundup(qhp->wq.rq.memsize, PAGE_SIZE); |
1646 | } | 1654 | } |
1647 | 1655 | ||
1648 | PDBG("%s sqsize %u sqmemsize %zu rqsize %u rqmemsize %zu\n", | ||
1649 | __func__, sqsize, qhp->wq.sq.memsize, rqsize, qhp->wq.rq.memsize); | ||
1650 | |||
1651 | ret = create_qp(&rhp->rdev, &qhp->wq, &schp->cq, &rchp->cq, | 1656 | ret = create_qp(&rhp->rdev, &qhp->wq, &schp->cq, &rchp->cq, |
1652 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx); | 1657 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx); |
1653 | if (ret) | 1658 | if (ret) |
@@ -1766,9 +1771,11 @@ struct ib_qp *c4iw_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attrs, | |||
1766 | qhp->ibqp.qp_num = qhp->wq.sq.qid; | 1771 | qhp->ibqp.qp_num = qhp->wq.sq.qid; |
1767 | init_timer(&(qhp->timer)); | 1772 | init_timer(&(qhp->timer)); |
1768 | INIT_LIST_HEAD(&qhp->db_fc_entry); | 1773 | INIT_LIST_HEAD(&qhp->db_fc_entry); |
1769 | PDBG("%s qhp %p sq_num_entries %d, rq_num_entries %d qpid 0x%0x\n", | 1774 | PDBG("%s sq id %u size %u memsize %zu num_entries %u " |
1770 | __func__, qhp, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | 1775 | "rq id %u size %u memsize %zu num_entries %u\n", __func__, |
1771 | qhp->wq.sq.qid); | 1776 | qhp->wq.sq.qid, qhp->wq.sq.size, qhp->wq.sq.memsize, |
1777 | attrs->cap.max_send_wr, qhp->wq.rq.qid, qhp->wq.rq.size, | ||
1778 | qhp->wq.rq.memsize, attrs->cap.max_recv_wr); | ||
1772 | return &qhp->ibqp; | 1779 | return &qhp->ibqp; |
1773 | err8: | 1780 | err8: |
1774 | kfree(mm5); | 1781 | kfree(mm5); |
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h index c9f7034e6647..641ab55b1d55 100644 --- a/drivers/infiniband/hw/cxgb4/t4.h +++ b/drivers/infiniband/hw/cxgb4/t4.h | |||
@@ -36,8 +36,6 @@ | |||
36 | #include "t4_msg.h" | 36 | #include "t4_msg.h" |
37 | #include "t4fw_ri_api.h" | 37 | #include "t4fw_ri_api.h" |
38 | 38 | ||
39 | #define T4_MAX_NUM_QP 65536 | ||
40 | #define T4_MAX_NUM_CQ 65536 | ||
41 | #define T4_MAX_NUM_PD 65536 | 39 | #define T4_MAX_NUM_PD 65536 |
42 | #define T4_MAX_NUM_STAG (1<<15) | 40 | #define T4_MAX_NUM_STAG (1<<15) |
43 | #define T4_MAX_MR_SIZE (~0ULL) | 41 | #define T4_MAX_MR_SIZE (~0ULL) |