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Diffstat (limited to 'drivers/infiniband/hw/qib/qib_rc.c')
-rw-r--r--drivers/infiniband/hw/qib/qib_rc.c2288
1 files changed, 2288 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c
new file mode 100644
index 000000000000..40c0a373719c
--- /dev/null
+++ b/drivers/infiniband/hw/qib/qib_rc.c
@@ -0,0 +1,2288 @@
1/*
2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#include <linux/io.h>
35
36#include "qib.h"
37
38/* cut down ridiculously long IB macro names */
39#define OP(x) IB_OPCODE_RC_##x
40
41static void rc_timeout(unsigned long arg);
42
43static u32 restart_sge(struct qib_sge_state *ss, struct qib_swqe *wqe,
44 u32 psn, u32 pmtu)
45{
46 u32 len;
47
48 len = ((psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
49 ss->sge = wqe->sg_list[0];
50 ss->sg_list = wqe->sg_list + 1;
51 ss->num_sge = wqe->wr.num_sge;
52 ss->total_len = wqe->length;
53 qib_skip_sge(ss, len, 0);
54 return wqe->length - len;
55}
56
57static void start_timer(struct qib_qp *qp)
58{
59 qp->s_flags |= QIB_S_TIMER;
60 qp->s_timer.function = rc_timeout;
61 /* 4.096 usec. * (1 << qp->timeout) */
62 qp->s_timer.expires = jiffies +
63 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) / 1000UL);
64 add_timer(&qp->s_timer);
65}
66
67/**
68 * qib_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
69 * @dev: the device for this QP
70 * @qp: a pointer to the QP
71 * @ohdr: a pointer to the IB header being constructed
72 * @pmtu: the path MTU
73 *
74 * Return 1 if constructed; otherwise, return 0.
75 * Note that we are in the responder's side of the QP context.
76 * Note the QP s_lock must be held.
77 */
78static int qib_make_rc_ack(struct qib_ibdev *dev, struct qib_qp *qp,
79 struct qib_other_headers *ohdr, u32 pmtu)
80{
81 struct qib_ack_entry *e;
82 u32 hwords;
83 u32 len;
84 u32 bth0;
85 u32 bth2;
86
87 /* Don't send an ACK if we aren't supposed to. */
88 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
89 goto bail;
90
91 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
92 hwords = 5;
93
94 switch (qp->s_ack_state) {
95 case OP(RDMA_READ_RESPONSE_LAST):
96 case OP(RDMA_READ_RESPONSE_ONLY):
97 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
98 if (e->rdma_sge.mr) {
99 atomic_dec(&e->rdma_sge.mr->refcount);
100 e->rdma_sge.mr = NULL;
101 }
102 /* FALLTHROUGH */
103 case OP(ATOMIC_ACKNOWLEDGE):
104 /*
105 * We can increment the tail pointer now that the last
106 * response has been sent instead of only being
107 * constructed.
108 */
109 if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
110 qp->s_tail_ack_queue = 0;
111 /* FALLTHROUGH */
112 case OP(SEND_ONLY):
113 case OP(ACKNOWLEDGE):
114 /* Check for no next entry in the queue. */
115 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
116 if (qp->s_flags & QIB_S_ACK_PENDING)
117 goto normal;
118 goto bail;
119 }
120
121 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
122 if (e->opcode == OP(RDMA_READ_REQUEST)) {
123 /*
124 * If a RDMA read response is being resent and
125 * we haven't seen the duplicate request yet,
126 * then stop sending the remaining responses the
127 * responder has seen until the requester resends it.
128 */
129 len = e->rdma_sge.sge_length;
130 if (len && !e->rdma_sge.mr) {
131 qp->s_tail_ack_queue = qp->r_head_ack_queue;
132 goto bail;
133 }
134 /* Copy SGE state in case we need to resend */
135 qp->s_rdma_mr = e->rdma_sge.mr;
136 if (qp->s_rdma_mr)
137 atomic_inc(&qp->s_rdma_mr->refcount);
138 qp->s_ack_rdma_sge.sge = e->rdma_sge;
139 qp->s_ack_rdma_sge.num_sge = 1;
140 qp->s_cur_sge = &qp->s_ack_rdma_sge;
141 if (len > pmtu) {
142 len = pmtu;
143 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
144 } else {
145 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
146 e->sent = 1;
147 }
148 ohdr->u.aeth = qib_compute_aeth(qp);
149 hwords++;
150 qp->s_ack_rdma_psn = e->psn;
151 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
152 } else {
153 /* COMPARE_SWAP or FETCH_ADD */
154 qp->s_cur_sge = NULL;
155 len = 0;
156 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
157 ohdr->u.at.aeth = qib_compute_aeth(qp);
158 ohdr->u.at.atomic_ack_eth[0] =
159 cpu_to_be32(e->atomic_data >> 32);
160 ohdr->u.at.atomic_ack_eth[1] =
161 cpu_to_be32(e->atomic_data);
162 hwords += sizeof(ohdr->u.at) / sizeof(u32);
163 bth2 = e->psn & QIB_PSN_MASK;
164 e->sent = 1;
165 }
166 bth0 = qp->s_ack_state << 24;
167 break;
168
169 case OP(RDMA_READ_RESPONSE_FIRST):
170 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
171 /* FALLTHROUGH */
172 case OP(RDMA_READ_RESPONSE_MIDDLE):
173 qp->s_cur_sge = &qp->s_ack_rdma_sge;
174 qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
175 if (qp->s_rdma_mr)
176 atomic_inc(&qp->s_rdma_mr->refcount);
177 len = qp->s_ack_rdma_sge.sge.sge_length;
178 if (len > pmtu)
179 len = pmtu;
180 else {
181 ohdr->u.aeth = qib_compute_aeth(qp);
182 hwords++;
183 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
184 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
185 e->sent = 1;
186 }
187 bth0 = qp->s_ack_state << 24;
188 bth2 = qp->s_ack_rdma_psn++ & QIB_PSN_MASK;
189 break;
190
191 default:
192normal:
193 /*
194 * Send a regular ACK.
195 * Set the s_ack_state so we wait until after sending
196 * the ACK before setting s_ack_state to ACKNOWLEDGE
197 * (see above).
198 */
199 qp->s_ack_state = OP(SEND_ONLY);
200 qp->s_flags &= ~QIB_S_ACK_PENDING;
201 qp->s_cur_sge = NULL;
202 if (qp->s_nak_state)
203 ohdr->u.aeth =
204 cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
205 (qp->s_nak_state <<
206 QIB_AETH_CREDIT_SHIFT));
207 else
208 ohdr->u.aeth = qib_compute_aeth(qp);
209 hwords++;
210 len = 0;
211 bth0 = OP(ACKNOWLEDGE) << 24;
212 bth2 = qp->s_ack_psn & QIB_PSN_MASK;
213 }
214 qp->s_rdma_ack_cnt++;
215 qp->s_hdrwords = hwords;
216 qp->s_cur_size = len;
217 qib_make_ruc_header(qp, ohdr, bth0, bth2);
218 return 1;
219
220bail:
221 qp->s_ack_state = OP(ACKNOWLEDGE);
222 qp->s_flags &= ~(QIB_S_RESP_PENDING | QIB_S_ACK_PENDING);
223 return 0;
224}
225
226/**
227 * qib_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
228 * @qp: a pointer to the QP
229 *
230 * Return 1 if constructed; otherwise, return 0.
231 */
232int qib_make_rc_req(struct qib_qp *qp)
233{
234 struct qib_ibdev *dev = to_idev(qp->ibqp.device);
235 struct qib_other_headers *ohdr;
236 struct qib_sge_state *ss;
237 struct qib_swqe *wqe;
238 u32 hwords;
239 u32 len;
240 u32 bth0;
241 u32 bth2;
242 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
243 char newreq;
244 unsigned long flags;
245 int ret = 0;
246 int delta;
247
248 ohdr = &qp->s_hdr.u.oth;
249 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
250 ohdr = &qp->s_hdr.u.l.oth;
251
252 /*
253 * The lock is needed to synchronize between the sending tasklet,
254 * the receive interrupt handler, and timeout resends.
255 */
256 spin_lock_irqsave(&qp->s_lock, flags);
257
258 /* Sending responses has higher priority over sending requests. */
259 if ((qp->s_flags & QIB_S_RESP_PENDING) &&
260 qib_make_rc_ack(dev, qp, ohdr, pmtu))
261 goto done;
262
263 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_SEND_OK)) {
264 if (!(ib_qib_state_ops[qp->state] & QIB_FLUSH_SEND))
265 goto bail;
266 /* We are in the error state, flush the work request. */
267 if (qp->s_last == qp->s_head)
268 goto bail;
269 /* If DMAs are in progress, we can't flush immediately. */
270 if (atomic_read(&qp->s_dma_busy)) {
271 qp->s_flags |= QIB_S_WAIT_DMA;
272 goto bail;
273 }
274 wqe = get_swqe_ptr(qp, qp->s_last);
275 while (qp->s_last != qp->s_acked) {
276 qib_send_complete(qp, wqe, IB_WC_SUCCESS);
277 if (++qp->s_last >= qp->s_size)
278 qp->s_last = 0;
279 wqe = get_swqe_ptr(qp, qp->s_last);
280 }
281 qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
282 goto done;
283 }
284
285 if (qp->s_flags & (QIB_S_WAIT_RNR | QIB_S_WAIT_ACK))
286 goto bail;
287
288 if (qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) {
289 if (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
290 qp->s_flags |= QIB_S_WAIT_PSN;
291 goto bail;
292 }
293 qp->s_sending_psn = qp->s_psn;
294 qp->s_sending_hpsn = qp->s_psn - 1;
295 }
296
297 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
298 hwords = 5;
299 bth0 = 0;
300
301 /* Send a request. */
302 wqe = get_swqe_ptr(qp, qp->s_cur);
303 switch (qp->s_state) {
304 default:
305 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_NEXT_SEND_OK))
306 goto bail;
307 /*
308 * Resend an old request or start a new one.
309 *
310 * We keep track of the current SWQE so that
311 * we don't reset the "furthest progress" state
312 * if we need to back up.
313 */
314 newreq = 0;
315 if (qp->s_cur == qp->s_tail) {
316 /* Check if send work queue is empty. */
317 if (qp->s_tail == qp->s_head)
318 goto bail;
319 /*
320 * If a fence is requested, wait for previous
321 * RDMA read and atomic operations to finish.
322 */
323 if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
324 qp->s_num_rd_atomic) {
325 qp->s_flags |= QIB_S_WAIT_FENCE;
326 goto bail;
327 }
328 wqe->psn = qp->s_next_psn;
329 newreq = 1;
330 }
331 /*
332 * Note that we have to be careful not to modify the
333 * original work request since we may need to resend
334 * it.
335 */
336 len = wqe->length;
337 ss = &qp->s_sge;
338 bth2 = qp->s_psn & QIB_PSN_MASK;
339 switch (wqe->wr.opcode) {
340 case IB_WR_SEND:
341 case IB_WR_SEND_WITH_IMM:
342 /* If no credit, return. */
343 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
344 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
345 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
346 goto bail;
347 }
348 wqe->lpsn = wqe->psn;
349 if (len > pmtu) {
350 wqe->lpsn += (len - 1) / pmtu;
351 qp->s_state = OP(SEND_FIRST);
352 len = pmtu;
353 break;
354 }
355 if (wqe->wr.opcode == IB_WR_SEND)
356 qp->s_state = OP(SEND_ONLY);
357 else {
358 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
359 /* Immediate data comes after the BTH */
360 ohdr->u.imm_data = wqe->wr.ex.imm_data;
361 hwords += 1;
362 }
363 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
364 bth0 |= IB_BTH_SOLICITED;
365 bth2 |= IB_BTH_REQ_ACK;
366 if (++qp->s_cur == qp->s_size)
367 qp->s_cur = 0;
368 break;
369
370 case IB_WR_RDMA_WRITE:
371 if (newreq && !(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
372 qp->s_lsn++;
373 /* FALLTHROUGH */
374 case IB_WR_RDMA_WRITE_WITH_IMM:
375 /* If no credit, return. */
376 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT) &&
377 qib_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
378 qp->s_flags |= QIB_S_WAIT_SSN_CREDIT;
379 goto bail;
380 }
381 ohdr->u.rc.reth.vaddr =
382 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
383 ohdr->u.rc.reth.rkey =
384 cpu_to_be32(wqe->wr.wr.rdma.rkey);
385 ohdr->u.rc.reth.length = cpu_to_be32(len);
386 hwords += sizeof(struct ib_reth) / sizeof(u32);
387 wqe->lpsn = wqe->psn;
388 if (len > pmtu) {
389 wqe->lpsn += (len - 1) / pmtu;
390 qp->s_state = OP(RDMA_WRITE_FIRST);
391 len = pmtu;
392 break;
393 }
394 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
395 qp->s_state = OP(RDMA_WRITE_ONLY);
396 else {
397 qp->s_state =
398 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
399 /* Immediate data comes after RETH */
400 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
401 hwords += 1;
402 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
403 bth0 |= IB_BTH_SOLICITED;
404 }
405 bth2 |= IB_BTH_REQ_ACK;
406 if (++qp->s_cur == qp->s_size)
407 qp->s_cur = 0;
408 break;
409
410 case IB_WR_RDMA_READ:
411 /*
412 * Don't allow more operations to be started
413 * than the QP limits allow.
414 */
415 if (newreq) {
416 if (qp->s_num_rd_atomic >=
417 qp->s_max_rd_atomic) {
418 qp->s_flags |= QIB_S_WAIT_RDMAR;
419 goto bail;
420 }
421 qp->s_num_rd_atomic++;
422 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
423 qp->s_lsn++;
424 /*
425 * Adjust s_next_psn to count the
426 * expected number of responses.
427 */
428 if (len > pmtu)
429 qp->s_next_psn += (len - 1) / pmtu;
430 wqe->lpsn = qp->s_next_psn++;
431 }
432 ohdr->u.rc.reth.vaddr =
433 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
434 ohdr->u.rc.reth.rkey =
435 cpu_to_be32(wqe->wr.wr.rdma.rkey);
436 ohdr->u.rc.reth.length = cpu_to_be32(len);
437 qp->s_state = OP(RDMA_READ_REQUEST);
438 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
439 ss = NULL;
440 len = 0;
441 bth2 |= IB_BTH_REQ_ACK;
442 if (++qp->s_cur == qp->s_size)
443 qp->s_cur = 0;
444 break;
445
446 case IB_WR_ATOMIC_CMP_AND_SWP:
447 case IB_WR_ATOMIC_FETCH_AND_ADD:
448 /*
449 * Don't allow more operations to be started
450 * than the QP limits allow.
451 */
452 if (newreq) {
453 if (qp->s_num_rd_atomic >=
454 qp->s_max_rd_atomic) {
455 qp->s_flags |= QIB_S_WAIT_RDMAR;
456 goto bail;
457 }
458 qp->s_num_rd_atomic++;
459 if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT))
460 qp->s_lsn++;
461 wqe->lpsn = wqe->psn;
462 }
463 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
464 qp->s_state = OP(COMPARE_SWAP);
465 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
466 wqe->wr.wr.atomic.swap);
467 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
468 wqe->wr.wr.atomic.compare_add);
469 } else {
470 qp->s_state = OP(FETCH_ADD);
471 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
472 wqe->wr.wr.atomic.compare_add);
473 ohdr->u.atomic_eth.compare_data = 0;
474 }
475 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
476 wqe->wr.wr.atomic.remote_addr >> 32);
477 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
478 wqe->wr.wr.atomic.remote_addr);
479 ohdr->u.atomic_eth.rkey = cpu_to_be32(
480 wqe->wr.wr.atomic.rkey);
481 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
482 ss = NULL;
483 len = 0;
484 bth2 |= IB_BTH_REQ_ACK;
485 if (++qp->s_cur == qp->s_size)
486 qp->s_cur = 0;
487 break;
488
489 default:
490 goto bail;
491 }
492 qp->s_sge.sge = wqe->sg_list[0];
493 qp->s_sge.sg_list = wqe->sg_list + 1;
494 qp->s_sge.num_sge = wqe->wr.num_sge;
495 qp->s_sge.total_len = wqe->length;
496 qp->s_len = wqe->length;
497 if (newreq) {
498 qp->s_tail++;
499 if (qp->s_tail >= qp->s_size)
500 qp->s_tail = 0;
501 }
502 if (wqe->wr.opcode == IB_WR_RDMA_READ)
503 qp->s_psn = wqe->lpsn + 1;
504 else {
505 qp->s_psn++;
506 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
507 qp->s_next_psn = qp->s_psn;
508 }
509 break;
510
511 case OP(RDMA_READ_RESPONSE_FIRST):
512 /*
513 * qp->s_state is normally set to the opcode of the
514 * last packet constructed for new requests and therefore
515 * is never set to RDMA read response.
516 * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
517 * thread to indicate a SEND needs to be restarted from an
518 * earlier PSN without interferring with the sending thread.
519 * See qib_restart_rc().
520 */
521 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
522 /* FALLTHROUGH */
523 case OP(SEND_FIRST):
524 qp->s_state = OP(SEND_MIDDLE);
525 /* FALLTHROUGH */
526 case OP(SEND_MIDDLE):
527 bth2 = qp->s_psn++ & QIB_PSN_MASK;
528 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
529 qp->s_next_psn = qp->s_psn;
530 ss = &qp->s_sge;
531 len = qp->s_len;
532 if (len > pmtu) {
533 len = pmtu;
534 break;
535 }
536 if (wqe->wr.opcode == IB_WR_SEND)
537 qp->s_state = OP(SEND_LAST);
538 else {
539 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
540 /* Immediate data comes after the BTH */
541 ohdr->u.imm_data = wqe->wr.ex.imm_data;
542 hwords += 1;
543 }
544 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
545 bth0 |= IB_BTH_SOLICITED;
546 bth2 |= IB_BTH_REQ_ACK;
547 qp->s_cur++;
548 if (qp->s_cur >= qp->s_size)
549 qp->s_cur = 0;
550 break;
551
552 case OP(RDMA_READ_RESPONSE_LAST):
553 /*
554 * qp->s_state is normally set to the opcode of the
555 * last packet constructed for new requests and therefore
556 * is never set to RDMA read response.
557 * RDMA_READ_RESPONSE_LAST is used by the ACK processing
558 * thread to indicate a RDMA write needs to be restarted from
559 * an earlier PSN without interferring with the sending thread.
560 * See qib_restart_rc().
561 */
562 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
563 /* FALLTHROUGH */
564 case OP(RDMA_WRITE_FIRST):
565 qp->s_state = OP(RDMA_WRITE_MIDDLE);
566 /* FALLTHROUGH */
567 case OP(RDMA_WRITE_MIDDLE):
568 bth2 = qp->s_psn++ & QIB_PSN_MASK;
569 if (qib_cmp24(qp->s_psn, qp->s_next_psn) > 0)
570 qp->s_next_psn = qp->s_psn;
571 ss = &qp->s_sge;
572 len = qp->s_len;
573 if (len > pmtu) {
574 len = pmtu;
575 break;
576 }
577 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
578 qp->s_state = OP(RDMA_WRITE_LAST);
579 else {
580 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
581 /* Immediate data comes after the BTH */
582 ohdr->u.imm_data = wqe->wr.ex.imm_data;
583 hwords += 1;
584 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
585 bth0 |= IB_BTH_SOLICITED;
586 }
587 bth2 |= IB_BTH_REQ_ACK;
588 qp->s_cur++;
589 if (qp->s_cur >= qp->s_size)
590 qp->s_cur = 0;
591 break;
592
593 case OP(RDMA_READ_RESPONSE_MIDDLE):
594 /*
595 * qp->s_state is normally set to the opcode of the
596 * last packet constructed for new requests and therefore
597 * is never set to RDMA read response.
598 * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
599 * thread to indicate a RDMA read needs to be restarted from
600 * an earlier PSN without interferring with the sending thread.
601 * See qib_restart_rc().
602 */
603 len = ((qp->s_psn - wqe->psn) & QIB_PSN_MASK) * pmtu;
604 ohdr->u.rc.reth.vaddr =
605 cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
606 ohdr->u.rc.reth.rkey =
607 cpu_to_be32(wqe->wr.wr.rdma.rkey);
608 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
609 qp->s_state = OP(RDMA_READ_REQUEST);
610 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
611 bth2 = (qp->s_psn & QIB_PSN_MASK) | IB_BTH_REQ_ACK;
612 qp->s_psn = wqe->lpsn + 1;
613 ss = NULL;
614 len = 0;
615 qp->s_cur++;
616 if (qp->s_cur == qp->s_size)
617 qp->s_cur = 0;
618 break;
619 }
620 qp->s_sending_hpsn = bth2;
621 delta = (((int) bth2 - (int) wqe->psn) << 8) >> 8;
622 if (delta && delta % QIB_PSN_CREDIT == 0)
623 bth2 |= IB_BTH_REQ_ACK;
624 if (qp->s_flags & QIB_S_SEND_ONE) {
625 qp->s_flags &= ~QIB_S_SEND_ONE;
626 qp->s_flags |= QIB_S_WAIT_ACK;
627 bth2 |= IB_BTH_REQ_ACK;
628 }
629 qp->s_len -= len;
630 qp->s_hdrwords = hwords;
631 qp->s_cur_sge = ss;
632 qp->s_cur_size = len;
633 qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), bth2);
634done:
635 ret = 1;
636 goto unlock;
637
638bail:
639 qp->s_flags &= ~QIB_S_BUSY;
640unlock:
641 spin_unlock_irqrestore(&qp->s_lock, flags);
642 return ret;
643}
644
645/**
646 * qib_send_rc_ack - Construct an ACK packet and send it
647 * @qp: a pointer to the QP
648 *
649 * This is called from qib_rc_rcv() and qib_kreceive().
650 * Note that RDMA reads and atomics are handled in the
651 * send side QP state and tasklet.
652 */
653void qib_send_rc_ack(struct qib_qp *qp)
654{
655 struct qib_devdata *dd = dd_from_ibdev(qp->ibqp.device);
656 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
657 struct qib_pportdata *ppd = ppd_from_ibp(ibp);
658 u64 pbc;
659 u16 lrh0;
660 u32 bth0;
661 u32 hwords;
662 u32 pbufn;
663 u32 __iomem *piobuf;
664 struct qib_ib_header hdr;
665 struct qib_other_headers *ohdr;
666 u32 control;
667 unsigned long flags;
668
669 spin_lock_irqsave(&qp->s_lock, flags);
670
671 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
672 goto unlock;
673
674 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
675 if ((qp->s_flags & QIB_S_RESP_PENDING) || qp->s_rdma_ack_cnt)
676 goto queue_ack;
677
678 /* Construct the header with s_lock held so APM doesn't change it. */
679 ohdr = &hdr.u.oth;
680 lrh0 = QIB_LRH_BTH;
681 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
682 hwords = 6;
683 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
684 hwords += qib_make_grh(ibp, &hdr.u.l.grh,
685 &qp->remote_ah_attr.grh, hwords, 0);
686 ohdr = &hdr.u.l.oth;
687 lrh0 = QIB_LRH_GRH;
688 }
689 /* read pkey_index w/o lock (its atomic) */
690 bth0 = qib_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
691 if (qp->s_mig_state == IB_MIG_MIGRATED)
692 bth0 |= IB_BTH_MIG_REQ;
693 if (qp->r_nak_state)
694 ohdr->u.aeth = cpu_to_be32((qp->r_msn & QIB_MSN_MASK) |
695 (qp->r_nak_state <<
696 QIB_AETH_CREDIT_SHIFT));
697 else
698 ohdr->u.aeth = qib_compute_aeth(qp);
699 lrh0 |= ibp->sl_to_vl[qp->remote_ah_attr.sl] << 12 |
700 qp->remote_ah_attr.sl << 4;
701 hdr.lrh[0] = cpu_to_be16(lrh0);
702 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
703 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
704 hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
705 ohdr->bth[0] = cpu_to_be32(bth0);
706 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
707 ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & QIB_PSN_MASK);
708
709 spin_unlock_irqrestore(&qp->s_lock, flags);
710
711 /* Don't try to send ACKs if the link isn't ACTIVE */
712 if (!(ppd->lflags & QIBL_LINKACTIVE))
713 goto done;
714
715 control = dd->f_setpbc_control(ppd, hwords + SIZE_OF_CRC,
716 qp->s_srate, lrh0 >> 12);
717 /* length is + 1 for the control dword */
718 pbc = ((u64) control << 32) | (hwords + 1);
719
720 piobuf = dd->f_getsendbuf(ppd, pbc, &pbufn);
721 if (!piobuf) {
722 /*
723 * We are out of PIO buffers at the moment.
724 * Pass responsibility for sending the ACK to the
725 * send tasklet so that when a PIO buffer becomes
726 * available, the ACK is sent ahead of other outgoing
727 * packets.
728 */
729 spin_lock_irqsave(&qp->s_lock, flags);
730 goto queue_ack;
731 }
732
733 /*
734 * Write the pbc.
735 * We have to flush after the PBC for correctness
736 * on some cpus or WC buffer can be written out of order.
737 */
738 writeq(pbc, piobuf);
739
740 if (dd->flags & QIB_PIO_FLUSH_WC) {
741 u32 *hdrp = (u32 *) &hdr;
742
743 qib_flush_wc();
744 qib_pio_copy(piobuf + 2, hdrp, hwords - 1);
745 qib_flush_wc();
746 __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
747 } else
748 qib_pio_copy(piobuf + 2, (u32 *) &hdr, hwords);
749
750 if (dd->flags & QIB_USE_SPCL_TRIG) {
751 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
752
753 qib_flush_wc();
754 __raw_writel(0xaebecede, piobuf + spcl_off);
755 }
756
757 qib_flush_wc();
758 qib_sendbuf_done(dd, pbufn);
759
760 ibp->n_unicast_xmit++;
761 goto done;
762
763queue_ack:
764 if (ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK) {
765 ibp->n_rc_qacks++;
766 qp->s_flags |= QIB_S_ACK_PENDING | QIB_S_RESP_PENDING;
767 qp->s_nak_state = qp->r_nak_state;
768 qp->s_ack_psn = qp->r_ack_psn;
769
770 /* Schedule the send tasklet. */
771 qib_schedule_send(qp);
772 }
773unlock:
774 spin_unlock_irqrestore(&qp->s_lock, flags);
775done:
776 return;
777}
778
779/**
780 * reset_psn - reset the QP state to send starting from PSN
781 * @qp: the QP
782 * @psn: the packet sequence number to restart at
783 *
784 * This is called from qib_rc_rcv() to process an incoming RC ACK
785 * for the given QP.
786 * Called at interrupt level with the QP s_lock held.
787 */
788static void reset_psn(struct qib_qp *qp, u32 psn)
789{
790 u32 n = qp->s_acked;
791 struct qib_swqe *wqe = get_swqe_ptr(qp, n);
792 u32 opcode;
793
794 qp->s_cur = n;
795
796 /*
797 * If we are starting the request from the beginning,
798 * let the normal send code handle initialization.
799 */
800 if (qib_cmp24(psn, wqe->psn) <= 0) {
801 qp->s_state = OP(SEND_LAST);
802 goto done;
803 }
804
805 /* Find the work request opcode corresponding to the given PSN. */
806 opcode = wqe->wr.opcode;
807 for (;;) {
808 int diff;
809
810 if (++n == qp->s_size)
811 n = 0;
812 if (n == qp->s_tail)
813 break;
814 wqe = get_swqe_ptr(qp, n);
815 diff = qib_cmp24(psn, wqe->psn);
816 if (diff < 0)
817 break;
818 qp->s_cur = n;
819 /*
820 * If we are starting the request from the beginning,
821 * let the normal send code handle initialization.
822 */
823 if (diff == 0) {
824 qp->s_state = OP(SEND_LAST);
825 goto done;
826 }
827 opcode = wqe->wr.opcode;
828 }
829
830 /*
831 * Set the state to restart in the middle of a request.
832 * Don't change the s_sge, s_cur_sge, or s_cur_size.
833 * See qib_make_rc_req().
834 */
835 switch (opcode) {
836 case IB_WR_SEND:
837 case IB_WR_SEND_WITH_IMM:
838 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
839 break;
840
841 case IB_WR_RDMA_WRITE:
842 case IB_WR_RDMA_WRITE_WITH_IMM:
843 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
844 break;
845
846 case IB_WR_RDMA_READ:
847 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
848 break;
849
850 default:
851 /*
852 * This case shouldn't happen since its only
853 * one PSN per req.
854 */
855 qp->s_state = OP(SEND_LAST);
856 }
857done:
858 qp->s_psn = psn;
859 /*
860 * Set QIB_S_WAIT_PSN as qib_rc_complete() may start the timer
861 * asynchronously before the send tasklet can get scheduled.
862 * Doing it in qib_make_rc_req() is too late.
863 */
864 if ((qib_cmp24(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
865 (qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
866 qp->s_flags |= QIB_S_WAIT_PSN;
867}
868
869/*
870 * Back up requester to resend the last un-ACKed request.
871 * The QP s_lock should be held and interrupts disabled.
872 */
873static void qib_restart_rc(struct qib_qp *qp, u32 psn, int wait)
874{
875 struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_acked);
876 struct qib_ibport *ibp;
877
878 if (qp->s_retry == 0) {
879 if (qp->s_mig_state == IB_MIG_ARMED) {
880 qib_migrate_qp(qp);
881 qp->s_retry = qp->s_retry_cnt;
882 } else if (qp->s_last == qp->s_acked) {
883 qib_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
884 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
885 return;
886 } else /* XXX need to handle delayed completion */
887 return;
888 } else
889 qp->s_retry--;
890
891 ibp = to_iport(qp->ibqp.device, qp->port_num);
892 if (wqe->wr.opcode == IB_WR_RDMA_READ)
893 ibp->n_rc_resends++;
894 else
895 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
896
897 qp->s_flags &= ~(QIB_S_WAIT_FENCE | QIB_S_WAIT_RDMAR |
898 QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_PSN |
899 QIB_S_WAIT_ACK);
900 if (wait)
901 qp->s_flags |= QIB_S_SEND_ONE;
902 reset_psn(qp, psn);
903}
904
905/*
906 * This is called from s_timer for missing responses.
907 */
908static void rc_timeout(unsigned long arg)
909{
910 struct qib_qp *qp = (struct qib_qp *)arg;
911 struct qib_ibport *ibp;
912 unsigned long flags;
913
914 spin_lock_irqsave(&qp->s_lock, flags);
915 if (qp->s_flags & QIB_S_TIMER) {
916 ibp = to_iport(qp->ibqp.device, qp->port_num);
917 ibp->n_rc_timeouts++;
918 qp->s_flags &= ~QIB_S_TIMER;
919 del_timer(&qp->s_timer);
920 qib_restart_rc(qp, qp->s_last_psn + 1, 1);
921 qib_schedule_send(qp);
922 }
923 spin_unlock_irqrestore(&qp->s_lock, flags);
924}
925
926/*
927 * This is called from s_timer for RNR timeouts.
928 */
929void qib_rc_rnr_retry(unsigned long arg)
930{
931 struct qib_qp *qp = (struct qib_qp *)arg;
932 unsigned long flags;
933
934 spin_lock_irqsave(&qp->s_lock, flags);
935 if (qp->s_flags & QIB_S_WAIT_RNR) {
936 qp->s_flags &= ~QIB_S_WAIT_RNR;
937 del_timer(&qp->s_timer);
938 qib_schedule_send(qp);
939 }
940 spin_unlock_irqrestore(&qp->s_lock, flags);
941}
942
943/*
944 * Set qp->s_sending_psn to the next PSN after the given one.
945 * This would be psn+1 except when RDMA reads are present.
946 */
947static void reset_sending_psn(struct qib_qp *qp, u32 psn)
948{
949 struct qib_swqe *wqe;
950 u32 n = qp->s_last;
951
952 /* Find the work request corresponding to the given PSN. */
953 for (;;) {
954 wqe = get_swqe_ptr(qp, n);
955 if (qib_cmp24(psn, wqe->lpsn) <= 0) {
956 if (wqe->wr.opcode == IB_WR_RDMA_READ)
957 qp->s_sending_psn = wqe->lpsn + 1;
958 else
959 qp->s_sending_psn = psn + 1;
960 break;
961 }
962 if (++n == qp->s_size)
963 n = 0;
964 if (n == qp->s_tail)
965 break;
966 }
967}
968
969/*
970 * This should be called with the QP s_lock held and interrupts disabled.
971 */
972void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr)
973{
974 struct qib_other_headers *ohdr;
975 struct qib_swqe *wqe;
976 struct ib_wc wc;
977 unsigned i;
978 u32 opcode;
979 u32 psn;
980
981 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_OR_FLUSH_SEND))
982 return;
983
984 /* Find out where the BTH is */
985 if ((be16_to_cpu(hdr->lrh[0]) & 3) == QIB_LRH_BTH)
986 ohdr = &hdr->u.oth;
987 else
988 ohdr = &hdr->u.l.oth;
989
990 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
991 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
992 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
993 WARN_ON(!qp->s_rdma_ack_cnt);
994 qp->s_rdma_ack_cnt--;
995 return;
996 }
997
998 psn = be32_to_cpu(ohdr->bth[2]);
999 reset_sending_psn(qp, psn);
1000
1001 /*
1002 * Start timer after a packet requesting an ACK has been sent and
1003 * there are still requests that haven't been acked.
1004 */
1005 if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1006 !(qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR | QIB_S_WAIT_PSN)))
1007 start_timer(qp);
1008
1009 while (qp->s_last != qp->s_acked) {
1010 wqe = get_swqe_ptr(qp, qp->s_last);
1011 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1012 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1013 break;
1014 for (i = 0; i < wqe->wr.num_sge; i++) {
1015 struct qib_sge *sge = &wqe->sg_list[i];
1016
1017 atomic_dec(&sge->mr->refcount);
1018 }
1019 /* Post a send completion queue entry if requested. */
1020 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1021 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1022 memset(&wc, 0, sizeof wc);
1023 wc.wr_id = wqe->wr.wr_id;
1024 wc.status = IB_WC_SUCCESS;
1025 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
1026 wc.byte_len = wqe->length;
1027 wc.qp = &qp->ibqp;
1028 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1029 }
1030 if (++qp->s_last >= qp->s_size)
1031 qp->s_last = 0;
1032 }
1033 /*
1034 * If we were waiting for sends to complete before resending,
1035 * and they are now complete, restart sending.
1036 */
1037 if (qp->s_flags & QIB_S_WAIT_PSN &&
1038 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1039 qp->s_flags &= ~QIB_S_WAIT_PSN;
1040 qp->s_sending_psn = qp->s_psn;
1041 qp->s_sending_hpsn = qp->s_psn - 1;
1042 qib_schedule_send(qp);
1043 }
1044}
1045
1046static inline void update_last_psn(struct qib_qp *qp, u32 psn)
1047{
1048 qp->s_last_psn = psn;
1049}
1050
1051/*
1052 * Generate a SWQE completion.
1053 * This is similar to qib_send_complete but has to check to be sure
1054 * that the SGEs are not being referenced if the SWQE is being resent.
1055 */
1056static struct qib_swqe *do_rc_completion(struct qib_qp *qp,
1057 struct qib_swqe *wqe,
1058 struct qib_ibport *ibp)
1059{
1060 struct ib_wc wc;
1061 unsigned i;
1062
1063 /*
1064 * Don't decrement refcount and don't generate a
1065 * completion if the SWQE is being resent until the send
1066 * is finished.
1067 */
1068 if (qib_cmp24(wqe->lpsn, qp->s_sending_psn) < 0 ||
1069 qib_cmp24(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1070 for (i = 0; i < wqe->wr.num_sge; i++) {
1071 struct qib_sge *sge = &wqe->sg_list[i];
1072
1073 atomic_dec(&sge->mr->refcount);
1074 }
1075 /* Post a send completion queue entry if requested. */
1076 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1077 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1078 memset(&wc, 0, sizeof wc);
1079 wc.wr_id = wqe->wr.wr_id;
1080 wc.status = IB_WC_SUCCESS;
1081 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
1082 wc.byte_len = wqe->length;
1083 wc.qp = &qp->ibqp;
1084 qib_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1085 }
1086 if (++qp->s_last >= qp->s_size)
1087 qp->s_last = 0;
1088 } else
1089 ibp->n_rc_delayed_comp++;
1090
1091 qp->s_retry = qp->s_retry_cnt;
1092 update_last_psn(qp, wqe->lpsn);
1093
1094 /*
1095 * If we are completing a request which is in the process of
1096 * being resent, we can stop resending it since we know the
1097 * responder has already seen it.
1098 */
1099 if (qp->s_acked == qp->s_cur) {
1100 if (++qp->s_cur >= qp->s_size)
1101 qp->s_cur = 0;
1102 qp->s_acked = qp->s_cur;
1103 wqe = get_swqe_ptr(qp, qp->s_cur);
1104 if (qp->s_acked != qp->s_tail) {
1105 qp->s_state = OP(SEND_LAST);
1106 qp->s_psn = wqe->psn;
1107 }
1108 } else {
1109 if (++qp->s_acked >= qp->s_size)
1110 qp->s_acked = 0;
1111 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1112 qp->s_draining = 0;
1113 wqe = get_swqe_ptr(qp, qp->s_acked);
1114 }
1115 return wqe;
1116}
1117
1118/**
1119 * do_rc_ack - process an incoming RC ACK
1120 * @qp: the QP the ACK came in on
1121 * @psn: the packet sequence number of the ACK
1122 * @opcode: the opcode of the request that resulted in the ACK
1123 *
1124 * This is called from qib_rc_rcv_resp() to process an incoming RC ACK
1125 * for the given QP.
1126 * Called at interrupt level with the QP s_lock held.
1127 * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1128 */
1129static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode,
1130 u64 val, struct qib_ctxtdata *rcd)
1131{
1132 struct qib_ibport *ibp;
1133 enum ib_wc_status status;
1134 struct qib_swqe *wqe;
1135 int ret = 0;
1136 u32 ack_psn;
1137 int diff;
1138
1139 /* Remove QP from retry timer */
1140 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
1141 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
1142 del_timer(&qp->s_timer);
1143 }
1144
1145 /*
1146 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1147 * requests and implicitly NAK RDMA read and atomic requests issued
1148 * before the NAK'ed request. The MSN won't include the NAK'ed
1149 * request but will include an ACK'ed request(s).
1150 */
1151 ack_psn = psn;
1152 if (aeth >> 29)
1153 ack_psn--;
1154 wqe = get_swqe_ptr(qp, qp->s_acked);
1155 ibp = to_iport(qp->ibqp.device, qp->port_num);
1156
1157 /*
1158 * The MSN might be for a later WQE than the PSN indicates so
1159 * only complete WQEs that the PSN finishes.
1160 */
1161 while ((diff = qib_cmp24(ack_psn, wqe->lpsn)) >= 0) {
1162 /*
1163 * RDMA_READ_RESPONSE_ONLY is a special case since
1164 * we want to generate completion events for everything
1165 * before the RDMA read, copy the data, then generate
1166 * the completion for the read.
1167 */
1168 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1169 opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1170 diff == 0) {
1171 ret = 1;
1172 goto bail;
1173 }
1174 /*
1175 * If this request is a RDMA read or atomic, and the ACK is
1176 * for a later operation, this ACK NAKs the RDMA read or
1177 * atomic. In other words, only a RDMA_READ_LAST or ONLY
1178 * can ACK a RDMA read and likewise for atomic ops. Note
1179 * that the NAK case can only happen if relaxed ordering is
1180 * used and requests are sent after an RDMA read or atomic
1181 * is sent but before the response is received.
1182 */
1183 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1184 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
1185 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1186 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1187 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1188 /* Retry this request. */
1189 if (!(qp->r_flags & QIB_R_RDMAR_SEQ)) {
1190 qp->r_flags |= QIB_R_RDMAR_SEQ;
1191 qib_restart_rc(qp, qp->s_last_psn + 1, 0);
1192 if (list_empty(&qp->rspwait)) {
1193 qp->r_flags |= QIB_R_RSP_SEND;
1194 atomic_inc(&qp->refcount);
1195 list_add_tail(&qp->rspwait,
1196 &rcd->qp_wait_list);
1197 }
1198 }
1199 /*
1200 * No need to process the ACK/NAK since we are
1201 * restarting an earlier request.
1202 */
1203 goto bail;
1204 }
1205 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1206 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1207 u64 *vaddr = wqe->sg_list[0].vaddr;
1208 *vaddr = val;
1209 }
1210 if (qp->s_num_rd_atomic &&
1211 (wqe->wr.opcode == IB_WR_RDMA_READ ||
1212 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1213 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1214 qp->s_num_rd_atomic--;
1215 /* Restart sending task if fence is complete */
1216 if ((qp->s_flags & QIB_S_WAIT_FENCE) &&
1217 !qp->s_num_rd_atomic) {
1218 qp->s_flags &= ~(QIB_S_WAIT_FENCE |
1219 QIB_S_WAIT_ACK);
1220 qib_schedule_send(qp);
1221 } else if (qp->s_flags & QIB_S_WAIT_RDMAR) {
1222 qp->s_flags &= ~(QIB_S_WAIT_RDMAR |
1223 QIB_S_WAIT_ACK);
1224 qib_schedule_send(qp);
1225 }
1226 }
1227 wqe = do_rc_completion(qp, wqe, ibp);
1228 if (qp->s_acked == qp->s_tail)
1229 break;
1230 }
1231
1232 switch (aeth >> 29) {
1233 case 0: /* ACK */
1234 ibp->n_rc_acks++;
1235 if (qp->s_acked != qp->s_tail) {
1236 /*
1237 * We are expecting more ACKs so
1238 * reset the retransmit timer.
1239 */
1240 start_timer(qp);
1241 /*
1242 * We can stop resending the earlier packets and
1243 * continue with the next packet the receiver wants.
1244 */
1245 if (qib_cmp24(qp->s_psn, psn) <= 0)
1246 reset_psn(qp, psn + 1);
1247 } else if (qib_cmp24(qp->s_psn, psn) <= 0) {
1248 qp->s_state = OP(SEND_LAST);
1249 qp->s_psn = psn + 1;
1250 }
1251 if (qp->s_flags & QIB_S_WAIT_ACK) {
1252 qp->s_flags &= ~QIB_S_WAIT_ACK;
1253 qib_schedule_send(qp);
1254 }
1255 qib_get_credit(qp, aeth);
1256 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1257 qp->s_retry = qp->s_retry_cnt;
1258 update_last_psn(qp, psn);
1259 ret = 1;
1260 goto bail;
1261
1262 case 1: /* RNR NAK */
1263 ibp->n_rnr_naks++;
1264 if (qp->s_acked == qp->s_tail)
1265 goto bail;
1266 if (qp->s_flags & QIB_S_WAIT_RNR)
1267 goto bail;
1268 if (qp->s_rnr_retry == 0) {
1269 status = IB_WC_RNR_RETRY_EXC_ERR;
1270 goto class_b;
1271 }
1272 if (qp->s_rnr_retry_cnt < 7)
1273 qp->s_rnr_retry--;
1274
1275 /* The last valid PSN is the previous PSN. */
1276 update_last_psn(qp, psn - 1);
1277
1278 ibp->n_rc_resends += (qp->s_psn - psn) & QIB_PSN_MASK;
1279
1280 reset_psn(qp, psn);
1281
1282 qp->s_flags &= ~(QIB_S_WAIT_SSN_CREDIT | QIB_S_WAIT_ACK);
1283 qp->s_flags |= QIB_S_WAIT_RNR;
1284 qp->s_timer.function = qib_rc_rnr_retry;
1285 qp->s_timer.expires = jiffies + usecs_to_jiffies(
1286 ib_qib_rnr_table[(aeth >> QIB_AETH_CREDIT_SHIFT) &
1287 QIB_AETH_CREDIT_MASK]);
1288 add_timer(&qp->s_timer);
1289 goto bail;
1290
1291 case 3: /* NAK */
1292 if (qp->s_acked == qp->s_tail)
1293 goto bail;
1294 /* The last valid PSN is the previous PSN. */
1295 update_last_psn(qp, psn - 1);
1296 switch ((aeth >> QIB_AETH_CREDIT_SHIFT) &
1297 QIB_AETH_CREDIT_MASK) {
1298 case 0: /* PSN sequence error */
1299 ibp->n_seq_naks++;
1300 /*
1301 * Back up to the responder's expected PSN.
1302 * Note that we might get a NAK in the middle of an
1303 * RDMA READ response which terminates the RDMA
1304 * READ.
1305 */
1306 qib_restart_rc(qp, psn, 0);
1307 qib_schedule_send(qp);
1308 break;
1309
1310 case 1: /* Invalid Request */
1311 status = IB_WC_REM_INV_REQ_ERR;
1312 ibp->n_other_naks++;
1313 goto class_b;
1314
1315 case 2: /* Remote Access Error */
1316 status = IB_WC_REM_ACCESS_ERR;
1317 ibp->n_other_naks++;
1318 goto class_b;
1319
1320 case 3: /* Remote Operation Error */
1321 status = IB_WC_REM_OP_ERR;
1322 ibp->n_other_naks++;
1323class_b:
1324 if (qp->s_last == qp->s_acked) {
1325 qib_send_complete(qp, wqe, status);
1326 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1327 }
1328 break;
1329
1330 default:
1331 /* Ignore other reserved NAK error codes */
1332 goto reserved;
1333 }
1334 qp->s_retry = qp->s_retry_cnt;
1335 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1336 goto bail;
1337
1338 default: /* 2: reserved */
1339reserved:
1340 /* Ignore reserved NAK codes. */
1341 goto bail;
1342 }
1343
1344bail:
1345 return ret;
1346}
1347
1348/*
1349 * We have seen an out of sequence RDMA read middle or last packet.
1350 * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1351 */
1352static void rdma_seq_err(struct qib_qp *qp, struct qib_ibport *ibp, u32 psn,
1353 struct qib_ctxtdata *rcd)
1354{
1355 struct qib_swqe *wqe;
1356
1357 /* Remove QP from retry timer */
1358 if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
1359 qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
1360 del_timer(&qp->s_timer);
1361 }
1362
1363 wqe = get_swqe_ptr(qp, qp->s_acked);
1364
1365 while (qib_cmp24(psn, wqe->lpsn) > 0) {
1366 if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1367 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1368 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1369 break;
1370 wqe = do_rc_completion(qp, wqe, ibp);
1371 }
1372
1373 ibp->n_rdma_seq++;
1374 qp->r_flags |= QIB_R_RDMAR_SEQ;
1375 qib_restart_rc(qp, qp->s_last_psn + 1, 0);
1376 if (list_empty(&qp->rspwait)) {
1377 qp->r_flags |= QIB_R_RSP_SEND;
1378 atomic_inc(&qp->refcount);
1379 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1380 }
1381}
1382
1383/**
1384 * qib_rc_rcv_resp - process an incoming RC response packet
1385 * @ibp: the port this packet came in on
1386 * @ohdr: the other headers for this packet
1387 * @data: the packet data
1388 * @tlen: the packet length
1389 * @qp: the QP for this packet
1390 * @opcode: the opcode for this packet
1391 * @psn: the packet sequence number for this packet
1392 * @hdrsize: the header length
1393 * @pmtu: the path MTU
1394 *
1395 * This is called from qib_rc_rcv() to process an incoming RC response
1396 * packet for the given QP.
1397 * Called at interrupt level.
1398 */
1399static void qib_rc_rcv_resp(struct qib_ibport *ibp,
1400 struct qib_other_headers *ohdr,
1401 void *data, u32 tlen,
1402 struct qib_qp *qp,
1403 u32 opcode,
1404 u32 psn, u32 hdrsize, u32 pmtu,
1405 struct qib_ctxtdata *rcd)
1406{
1407 struct qib_swqe *wqe;
1408 enum ib_wc_status status;
1409 unsigned long flags;
1410 int diff;
1411 u32 pad;
1412 u32 aeth;
1413 u64 val;
1414
1415 spin_lock_irqsave(&qp->s_lock, flags);
1416
1417 /* Double check we can process this now that we hold the s_lock. */
1418 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
1419 goto ack_done;
1420
1421 /* Ignore invalid responses. */
1422 if (qib_cmp24(psn, qp->s_next_psn) >= 0)
1423 goto ack_done;
1424
1425 /* Ignore duplicate responses. */
1426 diff = qib_cmp24(psn, qp->s_last_psn);
1427 if (unlikely(diff <= 0)) {
1428 /* Update credits for "ghost" ACKs */
1429 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1430 aeth = be32_to_cpu(ohdr->u.aeth);
1431 if ((aeth >> 29) == 0)
1432 qib_get_credit(qp, aeth);
1433 }
1434 goto ack_done;
1435 }
1436
1437 /*
1438 * Skip everything other than the PSN we expect, if we are waiting
1439 * for a reply to a restarted RDMA read or atomic op.
1440 */
1441 if (qp->r_flags & QIB_R_RDMAR_SEQ) {
1442 if (qib_cmp24(psn, qp->s_last_psn + 1) != 0)
1443 goto ack_done;
1444 qp->r_flags &= ~QIB_R_RDMAR_SEQ;
1445 }
1446
1447 if (unlikely(qp->s_acked == qp->s_tail))
1448 goto ack_done;
1449 wqe = get_swqe_ptr(qp, qp->s_acked);
1450 status = IB_WC_SUCCESS;
1451
1452 switch (opcode) {
1453 case OP(ACKNOWLEDGE):
1454 case OP(ATOMIC_ACKNOWLEDGE):
1455 case OP(RDMA_READ_RESPONSE_FIRST):
1456 aeth = be32_to_cpu(ohdr->u.aeth);
1457 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
1458 __be32 *p = ohdr->u.at.atomic_ack_eth;
1459
1460 val = ((u64) be32_to_cpu(p[0]) << 32) |
1461 be32_to_cpu(p[1]);
1462 } else
1463 val = 0;
1464 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
1465 opcode != OP(RDMA_READ_RESPONSE_FIRST))
1466 goto ack_done;
1467 hdrsize += 4;
1468 wqe = get_swqe_ptr(qp, qp->s_acked);
1469 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1470 goto ack_op_err;
1471 /*
1472 * If this is a response to a resent RDMA read, we
1473 * have to be careful to copy the data to the right
1474 * location.
1475 */
1476 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1477 wqe, psn, pmtu);
1478 goto read_middle;
1479
1480 case OP(RDMA_READ_RESPONSE_MIDDLE):
1481 /* no AETH, no ACK */
1482 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
1483 goto ack_seq_err;
1484 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1485 goto ack_op_err;
1486read_middle:
1487 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1488 goto ack_len_err;
1489 if (unlikely(pmtu >= qp->s_rdma_read_len))
1490 goto ack_len_err;
1491
1492 /*
1493 * We got a response so update the timeout.
1494 * 4.096 usec. * (1 << qp->timeout)
1495 */
1496 qp->s_flags |= QIB_S_TIMER;
1497 mod_timer(&qp->s_timer, jiffies +
1498 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
1499 1000UL));
1500 if (qp->s_flags & QIB_S_WAIT_ACK) {
1501 qp->s_flags &= ~QIB_S_WAIT_ACK;
1502 qib_schedule_send(qp);
1503 }
1504
1505 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1506 qp->s_retry = qp->s_retry_cnt;
1507
1508 /*
1509 * Update the RDMA receive state but do the copy w/o
1510 * holding the locks and blocking interrupts.
1511 */
1512 qp->s_rdma_read_len -= pmtu;
1513 update_last_psn(qp, psn);
1514 spin_unlock_irqrestore(&qp->s_lock, flags);
1515 qib_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
1516 goto bail;
1517
1518 case OP(RDMA_READ_RESPONSE_ONLY):
1519 aeth = be32_to_cpu(ohdr->u.aeth);
1520 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
1521 goto ack_done;
1522 /* Get the number of bytes the message was padded by. */
1523 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1524 /*
1525 * Check that the data size is >= 0 && <= pmtu.
1526 * Remember to account for the AETH header (4) and
1527 * ICRC (4).
1528 */
1529 if (unlikely(tlen < (hdrsize + pad + 8)))
1530 goto ack_len_err;
1531 /*
1532 * If this is a response to a resent RDMA read, we
1533 * have to be careful to copy the data to the right
1534 * location.
1535 */
1536 wqe = get_swqe_ptr(qp, qp->s_acked);
1537 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1538 wqe, psn, pmtu);
1539 goto read_last;
1540
1541 case OP(RDMA_READ_RESPONSE_LAST):
1542 /* ACKs READ req. */
1543 if (unlikely(qib_cmp24(psn, qp->s_last_psn + 1)))
1544 goto ack_seq_err;
1545 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1546 goto ack_op_err;
1547 /* Get the number of bytes the message was padded by. */
1548 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1549 /*
1550 * Check that the data size is >= 1 && <= pmtu.
1551 * Remember to account for the AETH header (4) and
1552 * ICRC (4).
1553 */
1554 if (unlikely(tlen <= (hdrsize + pad + 8)))
1555 goto ack_len_err;
1556read_last:
1557 tlen -= hdrsize + pad + 8;
1558 if (unlikely(tlen != qp->s_rdma_read_len))
1559 goto ack_len_err;
1560 aeth = be32_to_cpu(ohdr->u.aeth);
1561 qib_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
1562 WARN_ON(qp->s_rdma_read_sge.num_sge);
1563 (void) do_rc_ack(qp, aeth, psn,
1564 OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
1565 goto ack_done;
1566 }
1567
1568ack_op_err:
1569 status = IB_WC_LOC_QP_OP_ERR;
1570 goto ack_err;
1571
1572ack_seq_err:
1573 rdma_seq_err(qp, ibp, psn, rcd);
1574 goto ack_done;
1575
1576ack_len_err:
1577 status = IB_WC_LOC_LEN_ERR;
1578ack_err:
1579 if (qp->s_last == qp->s_acked) {
1580 qib_send_complete(qp, wqe, status);
1581 qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1582 }
1583ack_done:
1584 spin_unlock_irqrestore(&qp->s_lock, flags);
1585bail:
1586 return;
1587}
1588
1589/**
1590 * qib_rc_rcv_error - process an incoming duplicate or error RC packet
1591 * @ohdr: the other headers for this packet
1592 * @data: the packet data
1593 * @qp: the QP for this packet
1594 * @opcode: the opcode for this packet
1595 * @psn: the packet sequence number for this packet
1596 * @diff: the difference between the PSN and the expected PSN
1597 *
1598 * This is called from qib_rc_rcv() to process an unexpected
1599 * incoming RC packet for the given QP.
1600 * Called at interrupt level.
1601 * Return 1 if no more processing is needed; otherwise return 0 to
1602 * schedule a response to be sent.
1603 */
1604static int qib_rc_rcv_error(struct qib_other_headers *ohdr,
1605 void *data,
1606 struct qib_qp *qp,
1607 u32 opcode,
1608 u32 psn,
1609 int diff,
1610 struct qib_ctxtdata *rcd)
1611{
1612 struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1613 struct qib_ack_entry *e;
1614 unsigned long flags;
1615 u8 i, prev;
1616 int old_req;
1617
1618 if (diff > 0) {
1619 /*
1620 * Packet sequence error.
1621 * A NAK will ACK earlier sends and RDMA writes.
1622 * Don't queue the NAK if we already sent one.
1623 */
1624 if (!qp->r_nak_state) {
1625 ibp->n_rc_seqnak++;
1626 qp->r_nak_state = IB_NAK_PSN_ERROR;
1627 /* Use the expected PSN. */
1628 qp->r_ack_psn = qp->r_psn;
1629 /*
1630 * Wait to send the sequence NAK until all packets
1631 * in the receive queue have been processed.
1632 * Otherwise, we end up propagating congestion.
1633 */
1634 if (list_empty(&qp->rspwait)) {
1635 qp->r_flags |= QIB_R_RSP_NAK;
1636 atomic_inc(&qp->refcount);
1637 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1638 }
1639 }
1640 goto done;
1641 }
1642
1643 /*
1644 * Handle a duplicate request. Don't re-execute SEND, RDMA
1645 * write or atomic op. Don't NAK errors, just silently drop
1646 * the duplicate request. Note that r_sge, r_len, and
1647 * r_rcv_len may be in use so don't modify them.
1648 *
1649 * We are supposed to ACK the earliest duplicate PSN but we
1650 * can coalesce an outstanding duplicate ACK. We have to
1651 * send the earliest so that RDMA reads can be restarted at
1652 * the requester's expected PSN.
1653 *
1654 * First, find where this duplicate PSN falls within the
1655 * ACKs previously sent.
1656 * old_req is true if there is an older response that is scheduled
1657 * to be sent before sending this one.
1658 */
1659 e = NULL;
1660 old_req = 1;
1661 ibp->n_rc_dupreq++;
1662
1663 spin_lock_irqsave(&qp->s_lock, flags);
1664 /* Double check we can process this now that we hold the s_lock. */
1665 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
1666 goto unlock_done;
1667
1668 for (i = qp->r_head_ack_queue; ; i = prev) {
1669 if (i == qp->s_tail_ack_queue)
1670 old_req = 0;
1671 if (i)
1672 prev = i - 1;
1673 else
1674 prev = QIB_MAX_RDMA_ATOMIC;
1675 if (prev == qp->r_head_ack_queue) {
1676 e = NULL;
1677 break;
1678 }
1679 e = &qp->s_ack_queue[prev];
1680 if (!e->opcode) {
1681 e = NULL;
1682 break;
1683 }
1684 if (qib_cmp24(psn, e->psn) >= 0) {
1685 if (prev == qp->s_tail_ack_queue &&
1686 qib_cmp24(psn, e->lpsn) <= 0)
1687 old_req = 0;
1688 break;
1689 }
1690 }
1691 switch (opcode) {
1692 case OP(RDMA_READ_REQUEST): {
1693 struct ib_reth *reth;
1694 u32 offset;
1695 u32 len;
1696
1697 /*
1698 * If we didn't find the RDMA read request in the ack queue,
1699 * we can ignore this request.
1700 */
1701 if (!e || e->opcode != OP(RDMA_READ_REQUEST))
1702 goto unlock_done;
1703 /* RETH comes after BTH */
1704 reth = &ohdr->u.rc.reth;
1705 /*
1706 * Address range must be a subset of the original
1707 * request and start on pmtu boundaries.
1708 * We reuse the old ack_queue slot since the requester
1709 * should not back up and request an earlier PSN for the
1710 * same request.
1711 */
1712 offset = ((psn - e->psn) & QIB_PSN_MASK) *
1713 ib_mtu_enum_to_int(qp->path_mtu);
1714 len = be32_to_cpu(reth->length);
1715 if (unlikely(offset + len != e->rdma_sge.sge_length))
1716 goto unlock_done;
1717 if (e->rdma_sge.mr) {
1718 atomic_dec(&e->rdma_sge.mr->refcount);
1719 e->rdma_sge.mr = NULL;
1720 }
1721 if (len != 0) {
1722 u32 rkey = be32_to_cpu(reth->rkey);
1723 u64 vaddr = be64_to_cpu(reth->vaddr);
1724 int ok;
1725
1726 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
1727 IB_ACCESS_REMOTE_READ);
1728 if (unlikely(!ok))
1729 goto unlock_done;
1730 } else {
1731 e->rdma_sge.vaddr = NULL;
1732 e->rdma_sge.length = 0;
1733 e->rdma_sge.sge_length = 0;
1734 }
1735 e->psn = psn;
1736 if (old_req)
1737 goto unlock_done;
1738 qp->s_tail_ack_queue = prev;
1739 break;
1740 }
1741
1742 case OP(COMPARE_SWAP):
1743 case OP(FETCH_ADD): {
1744 /*
1745 * If we didn't find the atomic request in the ack queue
1746 * or the send tasklet is already backed up to send an
1747 * earlier entry, we can ignore this request.
1748 */
1749 if (!e || e->opcode != (u8) opcode || old_req)
1750 goto unlock_done;
1751 qp->s_tail_ack_queue = prev;
1752 break;
1753 }
1754
1755 default:
1756 /*
1757 * Ignore this operation if it doesn't request an ACK
1758 * or an earlier RDMA read or atomic is going to be resent.
1759 */
1760 if (!(psn & IB_BTH_REQ_ACK) || old_req)
1761 goto unlock_done;
1762 /*
1763 * Resend the most recent ACK if this request is
1764 * after all the previous RDMA reads and atomics.
1765 */
1766 if (i == qp->r_head_ack_queue) {
1767 spin_unlock_irqrestore(&qp->s_lock, flags);
1768 qp->r_nak_state = 0;
1769 qp->r_ack_psn = qp->r_psn - 1;
1770 goto send_ack;
1771 }
1772 /*
1773 * Try to send a simple ACK to work around a Mellanox bug
1774 * which doesn't accept a RDMA read response or atomic
1775 * response as an ACK for earlier SENDs or RDMA writes.
1776 */
1777 if (!(qp->s_flags & QIB_S_RESP_PENDING)) {
1778 spin_unlock_irqrestore(&qp->s_lock, flags);
1779 qp->r_nak_state = 0;
1780 qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
1781 goto send_ack;
1782 }
1783 /*
1784 * Resend the RDMA read or atomic op which
1785 * ACKs this duplicate request.
1786 */
1787 qp->s_tail_ack_queue = i;
1788 break;
1789 }
1790 qp->s_ack_state = OP(ACKNOWLEDGE);
1791 qp->s_flags |= QIB_S_RESP_PENDING;
1792 qp->r_nak_state = 0;
1793 qib_schedule_send(qp);
1794
1795unlock_done:
1796 spin_unlock_irqrestore(&qp->s_lock, flags);
1797done:
1798 return 1;
1799
1800send_ack:
1801 return 0;
1802}
1803
1804void qib_rc_error(struct qib_qp *qp, enum ib_wc_status err)
1805{
1806 unsigned long flags;
1807 int lastwqe;
1808
1809 spin_lock_irqsave(&qp->s_lock, flags);
1810 lastwqe = qib_error_qp(qp, err);
1811 spin_unlock_irqrestore(&qp->s_lock, flags);
1812
1813 if (lastwqe) {
1814 struct ib_event ev;
1815
1816 ev.device = qp->ibqp.device;
1817 ev.element.qp = &qp->ibqp;
1818 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1819 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1820 }
1821}
1822
1823static inline void qib_update_ack_queue(struct qib_qp *qp, unsigned n)
1824{
1825 unsigned next;
1826
1827 next = n + 1;
1828 if (next > QIB_MAX_RDMA_ATOMIC)
1829 next = 0;
1830 qp->s_tail_ack_queue = next;
1831 qp->s_ack_state = OP(ACKNOWLEDGE);
1832}
1833
1834/**
1835 * qib_rc_rcv - process an incoming RC packet
1836 * @rcd: the context pointer
1837 * @hdr: the header of this packet
1838 * @has_grh: true if the header has a GRH
1839 * @data: the packet data
1840 * @tlen: the packet length
1841 * @qp: the QP for this packet
1842 *
1843 * This is called from qib_qp_rcv() to process an incoming RC packet
1844 * for the given QP.
1845 * Called at interrupt level.
1846 */
1847void qib_rc_rcv(struct qib_ctxtdata *rcd, struct qib_ib_header *hdr,
1848 int has_grh, void *data, u32 tlen, struct qib_qp *qp)
1849{
1850 struct qib_ibport *ibp = &rcd->ppd->ibport_data;
1851 struct qib_other_headers *ohdr;
1852 u32 opcode;
1853 u32 hdrsize;
1854 u32 psn;
1855 u32 pad;
1856 struct ib_wc wc;
1857 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
1858 int diff;
1859 struct ib_reth *reth;
1860 unsigned long flags;
1861 int ret;
1862
1863 /* Check for GRH */
1864 if (!has_grh) {
1865 ohdr = &hdr->u.oth;
1866 hdrsize = 8 + 12; /* LRH + BTH */
1867 } else {
1868 ohdr = &hdr->u.l.oth;
1869 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
1870 }
1871
1872 opcode = be32_to_cpu(ohdr->bth[0]);
1873 spin_lock_irqsave(&qp->s_lock, flags);
1874 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
1875 goto sunlock;
1876 spin_unlock_irqrestore(&qp->s_lock, flags);
1877
1878 psn = be32_to_cpu(ohdr->bth[2]);
1879 opcode >>= 24;
1880
1881 /* Prevent simultaneous processing after APM on different CPUs */
1882 spin_lock(&qp->r_lock);
1883
1884 /*
1885 * Process responses (ACKs) before anything else. Note that the
1886 * packet sequence number will be for something in the send work
1887 * queue rather than the expected receive packet sequence number.
1888 * In other words, this QP is the requester.
1889 */
1890 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1891 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1892 qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
1893 hdrsize, pmtu, rcd);
1894 goto runlock;
1895 }
1896
1897 /* Compute 24 bits worth of difference. */
1898 diff = qib_cmp24(psn, qp->r_psn);
1899 if (unlikely(diff)) {
1900 if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
1901 goto runlock;
1902 goto send_ack;
1903 }
1904
1905 /* Check for opcode sequence errors. */
1906 switch (qp->r_state) {
1907 case OP(SEND_FIRST):
1908 case OP(SEND_MIDDLE):
1909 if (opcode == OP(SEND_MIDDLE) ||
1910 opcode == OP(SEND_LAST) ||
1911 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
1912 break;
1913 goto nack_inv;
1914
1915 case OP(RDMA_WRITE_FIRST):
1916 case OP(RDMA_WRITE_MIDDLE):
1917 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
1918 opcode == OP(RDMA_WRITE_LAST) ||
1919 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1920 break;
1921 goto nack_inv;
1922
1923 default:
1924 if (opcode == OP(SEND_MIDDLE) ||
1925 opcode == OP(SEND_LAST) ||
1926 opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1927 opcode == OP(RDMA_WRITE_MIDDLE) ||
1928 opcode == OP(RDMA_WRITE_LAST) ||
1929 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1930 goto nack_inv;
1931 /*
1932 * Note that it is up to the requester to not send a new
1933 * RDMA read or atomic operation before receiving an ACK
1934 * for the previous operation.
1935 */
1936 break;
1937 }
1938
1939 memset(&wc, 0, sizeof wc);
1940
1941 if (qp->state == IB_QPS_RTR && !(qp->r_flags & QIB_R_COMM_EST)) {
1942 qp->r_flags |= QIB_R_COMM_EST;
1943 if (qp->ibqp.event_handler) {
1944 struct ib_event ev;
1945
1946 ev.device = qp->ibqp.device;
1947 ev.element.qp = &qp->ibqp;
1948 ev.event = IB_EVENT_COMM_EST;
1949 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1950 }
1951 }
1952
1953 /* OK, process the packet. */
1954 switch (opcode) {
1955 case OP(SEND_FIRST):
1956 ret = qib_get_rwqe(qp, 0);
1957 if (ret < 0)
1958 goto nack_op_err;
1959 if (!ret)
1960 goto rnr_nak;
1961 qp->r_rcv_len = 0;
1962 /* FALLTHROUGH */
1963 case OP(SEND_MIDDLE):
1964 case OP(RDMA_WRITE_MIDDLE):
1965send_middle:
1966 /* Check for invalid length PMTU or posted rwqe len. */
1967 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1968 goto nack_inv;
1969 qp->r_rcv_len += pmtu;
1970 if (unlikely(qp->r_rcv_len > qp->r_len))
1971 goto nack_inv;
1972 qib_copy_sge(&qp->r_sge, data, pmtu, 1);
1973 break;
1974
1975 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
1976 /* consume RWQE */
1977 ret = qib_get_rwqe(qp, 1);
1978 if (ret < 0)
1979 goto nack_op_err;
1980 if (!ret)
1981 goto rnr_nak;
1982 goto send_last_imm;
1983
1984 case OP(SEND_ONLY):
1985 case OP(SEND_ONLY_WITH_IMMEDIATE):
1986 ret = qib_get_rwqe(qp, 0);
1987 if (ret < 0)
1988 goto nack_op_err;
1989 if (!ret)
1990 goto rnr_nak;
1991 qp->r_rcv_len = 0;
1992 if (opcode == OP(SEND_ONLY))
1993 goto send_last;
1994 /* FALLTHROUGH */
1995 case OP(SEND_LAST_WITH_IMMEDIATE):
1996send_last_imm:
1997 wc.ex.imm_data = ohdr->u.imm_data;
1998 hdrsize += 4;
1999 wc.wc_flags = IB_WC_WITH_IMM;
2000 /* FALLTHROUGH */
2001 case OP(SEND_LAST):
2002 case OP(RDMA_WRITE_LAST):
2003send_last:
2004 /* Get the number of bytes the message was padded by. */
2005 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
2006 /* Check for invalid length. */
2007 /* XXX LAST len should be >= 1 */
2008 if (unlikely(tlen < (hdrsize + pad + 4)))
2009 goto nack_inv;
2010 /* Don't count the CRC. */
2011 tlen -= (hdrsize + pad + 4);
2012 wc.byte_len = tlen + qp->r_rcv_len;
2013 if (unlikely(wc.byte_len > qp->r_len))
2014 goto nack_inv;
2015 qib_copy_sge(&qp->r_sge, data, tlen, 1);
2016 while (qp->r_sge.num_sge) {
2017 atomic_dec(&qp->r_sge.sge.mr->refcount);
2018 if (--qp->r_sge.num_sge)
2019 qp->r_sge.sge = *qp->r_sge.sg_list++;
2020 }
2021 qp->r_msn++;
2022 if (!test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags))
2023 break;
2024 wc.wr_id = qp->r_wr_id;
2025 wc.status = IB_WC_SUCCESS;
2026 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2027 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2028 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2029 else
2030 wc.opcode = IB_WC_RECV;
2031 wc.qp = &qp->ibqp;
2032 wc.src_qp = qp->remote_qpn;
2033 wc.slid = qp->remote_ah_attr.dlid;
2034 wc.sl = qp->remote_ah_attr.sl;
2035 /* Signal completion event if the solicited bit is set. */
2036 qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
2037 (ohdr->bth[0] &
2038 cpu_to_be32(IB_BTH_SOLICITED)) != 0);
2039 break;
2040
2041 case OP(RDMA_WRITE_FIRST):
2042 case OP(RDMA_WRITE_ONLY):
2043 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2044 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2045 goto nack_inv;
2046 /* consume RWQE */
2047 reth = &ohdr->u.rc.reth;
2048 hdrsize += sizeof(*reth);
2049 qp->r_len = be32_to_cpu(reth->length);
2050 qp->r_rcv_len = 0;
2051 qp->r_sge.sg_list = NULL;
2052 if (qp->r_len != 0) {
2053 u32 rkey = be32_to_cpu(reth->rkey);
2054 u64 vaddr = be64_to_cpu(reth->vaddr);
2055 int ok;
2056
2057 /* Check rkey & NAK */
2058 ok = qib_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2059 rkey, IB_ACCESS_REMOTE_WRITE);
2060 if (unlikely(!ok))
2061 goto nack_acc;
2062 qp->r_sge.num_sge = 1;
2063 } else {
2064 qp->r_sge.num_sge = 0;
2065 qp->r_sge.sge.mr = NULL;
2066 qp->r_sge.sge.vaddr = NULL;
2067 qp->r_sge.sge.length = 0;
2068 qp->r_sge.sge.sge_length = 0;
2069 }
2070 if (opcode == OP(RDMA_WRITE_FIRST))
2071 goto send_middle;
2072 else if (opcode == OP(RDMA_WRITE_ONLY))
2073 goto send_last;
2074 ret = qib_get_rwqe(qp, 1);
2075 if (ret < 0)
2076 goto nack_op_err;
2077 if (!ret)
2078 goto rnr_nak;
2079 goto send_last_imm;
2080
2081 case OP(RDMA_READ_REQUEST): {
2082 struct qib_ack_entry *e;
2083 u32 len;
2084 u8 next;
2085
2086 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2087 goto nack_inv;
2088 next = qp->r_head_ack_queue + 1;
2089 /* s_ack_queue is size QIB_MAX_RDMA_ATOMIC+1 so use > not >= */
2090 if (next > QIB_MAX_RDMA_ATOMIC)
2091 next = 0;
2092 spin_lock_irqsave(&qp->s_lock, flags);
2093 /* Double check we can process this while holding the s_lock. */
2094 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
2095 goto srunlock;
2096 if (unlikely(next == qp->s_tail_ack_queue)) {
2097 if (!qp->s_ack_queue[next].sent)
2098 goto nack_inv_unlck;
2099 qib_update_ack_queue(qp, next);
2100 }
2101 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2102 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2103 atomic_dec(&e->rdma_sge.mr->refcount);
2104 e->rdma_sge.mr = NULL;
2105 }
2106 reth = &ohdr->u.rc.reth;
2107 len = be32_to_cpu(reth->length);
2108 if (len) {
2109 u32 rkey = be32_to_cpu(reth->rkey);
2110 u64 vaddr = be64_to_cpu(reth->vaddr);
2111 int ok;
2112
2113 /* Check rkey & NAK */
2114 ok = qib_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2115 rkey, IB_ACCESS_REMOTE_READ);
2116 if (unlikely(!ok))
2117 goto nack_acc_unlck;
2118 /*
2119 * Update the next expected PSN. We add 1 later
2120 * below, so only add the remainder here.
2121 */
2122 if (len > pmtu)
2123 qp->r_psn += (len - 1) / pmtu;
2124 } else {
2125 e->rdma_sge.mr = NULL;
2126 e->rdma_sge.vaddr = NULL;
2127 e->rdma_sge.length = 0;
2128 e->rdma_sge.sge_length = 0;
2129 }
2130 e->opcode = opcode;
2131 e->sent = 0;
2132 e->psn = psn;
2133 e->lpsn = qp->r_psn;
2134 /*
2135 * We need to increment the MSN here instead of when we
2136 * finish sending the result since a duplicate request would
2137 * increment it more than once.
2138 */
2139 qp->r_msn++;
2140 qp->r_psn++;
2141 qp->r_state = opcode;
2142 qp->r_nak_state = 0;
2143 qp->r_head_ack_queue = next;
2144
2145 /* Schedule the send tasklet. */
2146 qp->s_flags |= QIB_S_RESP_PENDING;
2147 qib_schedule_send(qp);
2148
2149 goto srunlock;
2150 }
2151
2152 case OP(COMPARE_SWAP):
2153 case OP(FETCH_ADD): {
2154 struct ib_atomic_eth *ateth;
2155 struct qib_ack_entry *e;
2156 u64 vaddr;
2157 atomic64_t *maddr;
2158 u64 sdata;
2159 u32 rkey;
2160 u8 next;
2161
2162 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
2163 goto nack_inv;
2164 next = qp->r_head_ack_queue + 1;
2165 if (next > QIB_MAX_RDMA_ATOMIC)
2166 next = 0;
2167 spin_lock_irqsave(&qp->s_lock, flags);
2168 /* Double check we can process this while holding the s_lock. */
2169 if (!(ib_qib_state_ops[qp->state] & QIB_PROCESS_RECV_OK))
2170 goto srunlock;
2171 if (unlikely(next == qp->s_tail_ack_queue)) {
2172 if (!qp->s_ack_queue[next].sent)
2173 goto nack_inv_unlck;
2174 qib_update_ack_queue(qp, next);
2175 }
2176 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2177 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2178 atomic_dec(&e->rdma_sge.mr->refcount);
2179 e->rdma_sge.mr = NULL;
2180 }
2181 ateth = &ohdr->u.atomic_eth;
2182 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
2183 be32_to_cpu(ateth->vaddr[1]);
2184 if (unlikely(vaddr & (sizeof(u64) - 1)))
2185 goto nack_inv_unlck;
2186 rkey = be32_to_cpu(ateth->rkey);
2187 /* Check rkey & NAK */
2188 if (unlikely(!qib_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2189 vaddr, rkey,
2190 IB_ACCESS_REMOTE_ATOMIC)))
2191 goto nack_acc_unlck;
2192 /* Perform atomic OP and save result. */
2193 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
2194 sdata = be64_to_cpu(ateth->swap_data);
2195 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2196 (u64) atomic64_add_return(sdata, maddr) - sdata :
2197 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
2198 be64_to_cpu(ateth->compare_data),
2199 sdata);
2200 atomic_dec(&qp->r_sge.sge.mr->refcount);
2201 qp->r_sge.num_sge = 0;
2202 e->opcode = opcode;
2203 e->sent = 0;
2204 e->psn = psn;
2205 e->lpsn = psn;
2206 qp->r_msn++;
2207 qp->r_psn++;
2208 qp->r_state = opcode;
2209 qp->r_nak_state = 0;
2210 qp->r_head_ack_queue = next;
2211
2212 /* Schedule the send tasklet. */
2213 qp->s_flags |= QIB_S_RESP_PENDING;
2214 qib_schedule_send(qp);
2215
2216 goto srunlock;
2217 }
2218
2219 default:
2220 /* NAK unknown opcodes. */
2221 goto nack_inv;
2222 }
2223 qp->r_psn++;
2224 qp->r_state = opcode;
2225 qp->r_ack_psn = psn;
2226 qp->r_nak_state = 0;
2227 /* Send an ACK if requested or required. */
2228 if (psn & (1 << 31))
2229 goto send_ack;
2230 goto runlock;
2231
2232rnr_nak:
2233 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
2234 qp->r_ack_psn = qp->r_psn;
2235 /* Queue RNR NAK for later */
2236 if (list_empty(&qp->rspwait)) {
2237 qp->r_flags |= QIB_R_RSP_NAK;
2238 atomic_inc(&qp->refcount);
2239 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2240 }
2241 goto runlock;
2242
2243nack_op_err:
2244 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2245 qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2246 qp->r_ack_psn = qp->r_psn;
2247 /* Queue NAK for later */
2248 if (list_empty(&qp->rspwait)) {
2249 qp->r_flags |= QIB_R_RSP_NAK;
2250 atomic_inc(&qp->refcount);
2251 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2252 }
2253 goto runlock;
2254
2255nack_inv_unlck:
2256 spin_unlock_irqrestore(&qp->s_lock, flags);
2257nack_inv:
2258 qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2259 qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2260 qp->r_ack_psn = qp->r_psn;
2261 /* Queue NAK for later */
2262 if (list_empty(&qp->rspwait)) {
2263 qp->r_flags |= QIB_R_RSP_NAK;
2264 atomic_inc(&qp->refcount);
2265 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2266 }
2267 goto runlock;
2268
2269nack_acc_unlck:
2270 spin_unlock_irqrestore(&qp->s_lock, flags);
2271nack_acc:
2272 qib_rc_error(qp, IB_WC_LOC_PROT_ERR);
2273 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2274 qp->r_ack_psn = qp->r_psn;
2275send_ack:
2276 qib_send_rc_ack(qp);
2277runlock:
2278 spin_unlock(&qp->r_lock);
2279 return;
2280
2281srunlock:
2282 spin_unlock_irqrestore(&qp->s_lock, flags);
2283 spin_unlock(&qp->r_lock);
2284 return;
2285
2286sunlock:
2287 spin_unlock_irqrestore(&qp->s_lock, flags);
2288}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-11 09:56:38 -0500