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path: root/drivers/infiniband/hw/qib/qib_iba7322.c
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Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba7322.c')
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c52
1 files changed, 36 insertions, 16 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index a7eb32517a04..ef97b71c8f7d 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -117,7 +117,7 @@ MODULE_PARM_DESC(chase, "Enable state chase handling");
117 117
118static ushort qib_long_atten = 10; /* 10 dB ~= 5m length */ 118static ushort qib_long_atten = 10; /* 10 dB ~= 5m length */
119module_param_named(long_attenuation, qib_long_atten, ushort, S_IRUGO); 119module_param_named(long_attenuation, qib_long_atten, ushort, S_IRUGO);
120MODULE_PARM_DESC(long_attenuation, \ 120MODULE_PARM_DESC(long_attenuation,
121 "attenuation cutoff (dB) for long copper cable setup"); 121 "attenuation cutoff (dB) for long copper cable setup");
122 122
123static ushort qib_singleport; 123static ushort qib_singleport;
@@ -153,11 +153,12 @@ static struct kparam_string kp_txselect = {
153static int setup_txselect(const char *, struct kernel_param *); 153static int setup_txselect(const char *, struct kernel_param *);
154module_param_call(txselect, setup_txselect, param_get_string, 154module_param_call(txselect, setup_txselect, param_get_string,
155 &kp_txselect, S_IWUSR | S_IRUGO); 155 &kp_txselect, S_IWUSR | S_IRUGO);
156MODULE_PARM_DESC(txselect, \ 156MODULE_PARM_DESC(txselect,
157 "Tx serdes indices (for no QSFP or invalid QSFP data)"); 157 "Tx serdes indices (for no QSFP or invalid QSFP data)");
158 158
159#define BOARD_QME7342 5 159#define BOARD_QME7342 5
160#define BOARD_QMH7342 6 160#define BOARD_QMH7342 6
161#define BOARD_QMH7360 9
161#define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ 162#define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \
162 BOARD_QMH7342) 163 BOARD_QMH7342)
163#define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ 164#define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \
@@ -817,6 +818,7 @@ static inline void qib_write_ureg(const struct qib_devdata *dd,
817 enum qib_ureg regno, u64 value, int ctxt) 818 enum qib_ureg regno, u64 value, int ctxt)
818{ 819{
819 u64 __iomem *ubase; 820 u64 __iomem *ubase;
821
820 if (dd->userbase) 822 if (dd->userbase)
821 ubase = (u64 __iomem *) 823 ubase = (u64 __iomem *)
822 ((char __iomem *) dd->userbase + 824 ((char __iomem *) dd->userbase +
@@ -1677,7 +1679,7 @@ static noinline void handle_7322_errors(struct qib_devdata *dd)
1677 /* do these first, they are most important */ 1679 /* do these first, they are most important */
1678 if (errs & QIB_E_HARDWARE) { 1680 if (errs & QIB_E_HARDWARE) {
1679 *msg = '\0'; 1681 *msg = '\0';
1680 qib_7322_handle_hwerrors(dd, msg, sizeof dd->cspec->emsgbuf); 1682 qib_7322_handle_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf));
1681 } else 1683 } else
1682 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx) 1684 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx)
1683 if (errs & dd->eep_st_masks[log_idx].errs_to_log) 1685 if (errs & dd->eep_st_masks[log_idx].errs_to_log)
@@ -1702,7 +1704,7 @@ static noinline void handle_7322_errors(struct qib_devdata *dd)
1702 mask = QIB_E_HARDWARE; 1704 mask = QIB_E_HARDWARE;
1703 *msg = '\0'; 1705 *msg = '\0';
1704 1706
1705 err_decode(msg, sizeof dd->cspec->emsgbuf, errs & ~mask, 1707 err_decode(msg, sizeof(dd->cspec->emsgbuf), errs & ~mask,
1706 qib_7322error_msgs); 1708 qib_7322error_msgs);
1707 1709
1708 /* 1710 /*
@@ -1889,10 +1891,10 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1889 *msg = '\0'; 1891 *msg = '\0';
1890 1892
1891 if (errs & ~QIB_E_P_BITSEXTANT) { 1893 if (errs & ~QIB_E_P_BITSEXTANT) {
1892 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, 1894 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf),
1893 errs & ~QIB_E_P_BITSEXTANT, qib_7322p_error_msgs); 1895 errs & ~QIB_E_P_BITSEXTANT, qib_7322p_error_msgs);
1894 if (!*msg) 1896 if (!*msg)
1895 snprintf(msg, sizeof ppd->cpspec->epmsgbuf, 1897 snprintf(msg, sizeof(ppd->cpspec->epmsgbuf),
1896 "no others"); 1898 "no others");
1897 qib_dev_porterr(dd, ppd->port, 1899 qib_dev_porterr(dd, ppd->port,
1898 "error interrupt with unknown errors 0x%016Lx set (and %s)\n", 1900 "error interrupt with unknown errors 0x%016Lx set (and %s)\n",
@@ -1906,7 +1908,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1906 /* determine cause, then write to clear */ 1908 /* determine cause, then write to clear */
1907 symptom = qib_read_kreg_port(ppd, krp_sendhdrsymptom); 1909 symptom = qib_read_kreg_port(ppd, krp_sendhdrsymptom);
1908 qib_write_kreg_port(ppd, krp_sendhdrsymptom, 0); 1910 qib_write_kreg_port(ppd, krp_sendhdrsymptom, 0);
1909 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, symptom, 1911 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf), symptom,
1910 hdrchk_msgs); 1912 hdrchk_msgs);
1911 *msg = '\0'; 1913 *msg = '\0';
1912 /* senderrbuf cleared in SPKTERRS below */ 1914 /* senderrbuf cleared in SPKTERRS below */
@@ -1922,7 +1924,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1922 * isn't valid. We don't want to confuse people, so 1924 * isn't valid. We don't want to confuse people, so
1923 * we just don't print them, except at debug 1925 * we just don't print them, except at debug
1924 */ 1926 */
1925 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, 1927 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf),
1926 (errs & QIB_E_P_LINK_PKTERRS), 1928 (errs & QIB_E_P_LINK_PKTERRS),
1927 qib_7322p_error_msgs); 1929 qib_7322p_error_msgs);
1928 *msg = '\0'; 1930 *msg = '\0';
@@ -1938,7 +1940,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1938 * valid. We don't want to confuse people, so we just 1940 * valid. We don't want to confuse people, so we just
1939 * don't print them, except at debug 1941 * don't print them, except at debug
1940 */ 1942 */
1941 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, errs, 1943 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf), errs,
1942 qib_7322p_error_msgs); 1944 qib_7322p_error_msgs);
1943 ignore_this_time = errs & QIB_E_P_LINK_PKTERRS; 1945 ignore_this_time = errs & QIB_E_P_LINK_PKTERRS;
1944 *msg = '\0'; 1946 *msg = '\0';
@@ -2031,6 +2033,7 @@ static void qib_7322_set_intr_state(struct qib_devdata *dd, u32 enable)
2031 if (dd->cspec->num_msix_entries) { 2033 if (dd->cspec->num_msix_entries) {
2032 /* and same for MSIx */ 2034 /* and same for MSIx */
2033 u64 val = qib_read_kreg64(dd, kr_intgranted); 2035 u64 val = qib_read_kreg64(dd, kr_intgranted);
2036
2034 if (val) 2037 if (val)
2035 qib_write_kreg(dd, kr_intgranted, val); 2038 qib_write_kreg(dd, kr_intgranted, val);
2036 } 2039 }
@@ -2176,6 +2179,7 @@ static void qib_7322_handle_hwerrors(struct qib_devdata *dd, char *msg,
2176 int err; 2179 int err;
2177 unsigned long flags; 2180 unsigned long flags;
2178 struct qib_pportdata *ppd = dd->pport; 2181 struct qib_pportdata *ppd = dd->pport;
2182
2179 for (; pidx < dd->num_pports; ++pidx, ppd++) { 2183 for (; pidx < dd->num_pports; ++pidx, ppd++) {
2180 err = 0; 2184 err = 0;
2181 if (pidx == 0 && (hwerrs & 2185 if (pidx == 0 && (hwerrs &
@@ -2801,9 +2805,11 @@ static void qib_irq_notifier_notify(struct irq_affinity_notify *notify,
2801 2805
2802 if (n->rcv) { 2806 if (n->rcv) {
2803 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg; 2807 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
2808
2804 qib_update_rhdrq_dca(rcd, cpu); 2809 qib_update_rhdrq_dca(rcd, cpu);
2805 } else { 2810 } else {
2806 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg; 2811 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
2812
2807 qib_update_sdma_dca(ppd, cpu); 2813 qib_update_sdma_dca(ppd, cpu);
2808 } 2814 }
2809} 2815}
@@ -2816,9 +2822,11 @@ static void qib_irq_notifier_release(struct kref *ref)
2816 2822
2817 if (n->rcv) { 2823 if (n->rcv) {
2818 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg; 2824 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
2825
2819 dd = rcd->dd; 2826 dd = rcd->dd;
2820 } else { 2827 } else {
2821 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg; 2828 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
2829
2822 dd = ppd->dd; 2830 dd = ppd->dd;
2823 } 2831 }
2824 qib_devinfo(dd->pcidev, 2832 qib_devinfo(dd->pcidev,
@@ -2994,6 +3002,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
2994 struct qib_pportdata *ppd; 3002 struct qib_pportdata *ppd;
2995 struct qib_qsfp_data *qd; 3003 struct qib_qsfp_data *qd;
2996 u32 mask; 3004 u32 mask;
3005
2997 if (!dd->pport[pidx].link_speed_supported) 3006 if (!dd->pport[pidx].link_speed_supported)
2998 continue; 3007 continue;
2999 mask = QSFP_GPIO_MOD_PRS_N; 3008 mask = QSFP_GPIO_MOD_PRS_N;
@@ -3001,6 +3010,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
3001 mask <<= (QSFP_GPIO_PORT2_SHIFT * ppd->hw_pidx); 3010 mask <<= (QSFP_GPIO_PORT2_SHIFT * ppd->hw_pidx);
3002 if (gpiostatus & dd->cspec->gpio_mask & mask) { 3011 if (gpiostatus & dd->cspec->gpio_mask & mask) {
3003 u64 pins; 3012 u64 pins;
3013
3004 qd = &ppd->cpspec->qsfp_data; 3014 qd = &ppd->cpspec->qsfp_data;
3005 gpiostatus &= ~mask; 3015 gpiostatus &= ~mask;
3006 pins = qib_read_kreg64(dd, kr_extstatus); 3016 pins = qib_read_kreg64(dd, kr_extstatus);
@@ -3442,7 +3452,7 @@ try_intx:
3442 } 3452 }
3443 3453
3444 /* Try to get MSIx interrupts */ 3454 /* Try to get MSIx interrupts */
3445 memset(redirect, 0, sizeof redirect); 3455 memset(redirect, 0, sizeof(redirect));
3446 mask = ~0ULL; 3456 mask = ~0ULL;
3447 msixnum = 0; 3457 msixnum = 0;
3448 local_mask = cpumask_of_pcibus(dd->pcidev->bus); 3458 local_mask = cpumask_of_pcibus(dd->pcidev->bus);
@@ -3617,6 +3627,10 @@ static unsigned qib_7322_boardname(struct qib_devdata *dd)
3617 n = "InfiniPath_QME7362"; 3627 n = "InfiniPath_QME7362";
3618 dd->flags |= QIB_HAS_QSFP; 3628 dd->flags |= QIB_HAS_QSFP;
3619 break; 3629 break;
3630 case BOARD_QMH7360:
3631 n = "Intel IB QDR 1P FLR-QSFP Adptr";
3632 dd->flags |= QIB_HAS_QSFP;
3633 break;
3620 case 15: 3634 case 15:
3621 n = "InfiniPath_QLE7342_TEST"; 3635 n = "InfiniPath_QLE7342_TEST";
3622 dd->flags |= QIB_HAS_QSFP; 3636 dd->flags |= QIB_HAS_QSFP;
@@ -3694,6 +3708,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
3694 */ 3708 */
3695 for (i = 0; i < msix_entries; i++) { 3709 for (i = 0; i < msix_entries; i++) {
3696 u64 vecaddr, vecdata; 3710 u64 vecaddr, vecdata;
3711
3697 vecaddr = qib_read_kreg64(dd, 2 * i + 3712 vecaddr = qib_read_kreg64(dd, 2 * i +
3698 (QIB_7322_MsixTable_OFFS / sizeof(u64))); 3713 (QIB_7322_MsixTable_OFFS / sizeof(u64)));
3699 vecdata = qib_read_kreg64(dd, 1 + 2 * i + 3714 vecdata = qib_read_kreg64(dd, 1 + 2 * i +
@@ -5178,8 +5193,6 @@ static void qib_get_7322_faststats(unsigned long opaque)
5178 spin_lock_irqsave(&ppd->dd->eep_st_lock, flags); 5193 spin_lock_irqsave(&ppd->dd->eep_st_lock, flags);
5179 traffic_wds -= ppd->dd->traffic_wds; 5194 traffic_wds -= ppd->dd->traffic_wds;
5180 ppd->dd->traffic_wds += traffic_wds; 5195 ppd->dd->traffic_wds += traffic_wds;
5181 if (traffic_wds >= QIB_TRAFFIC_ACTIVE_THRESHOLD)
5182 atomic_add(ACTIVITY_TIMER, &ppd->dd->active_time);
5183 spin_unlock_irqrestore(&ppd->dd->eep_st_lock, flags); 5196 spin_unlock_irqrestore(&ppd->dd->eep_st_lock, flags);
5184 if (ppd->cpspec->qdr_dfe_on && (ppd->link_speed_active & 5197 if (ppd->cpspec->qdr_dfe_on && (ppd->link_speed_active &
5185 QIB_IB_QDR) && 5198 QIB_IB_QDR) &&
@@ -5357,6 +5370,7 @@ static void qib_autoneg_7322_send(struct qib_pportdata *ppd, int which)
5357static void set_7322_ibspeed_fast(struct qib_pportdata *ppd, u32 speed) 5370static void set_7322_ibspeed_fast(struct qib_pportdata *ppd, u32 speed)
5358{ 5371{
5359 u64 newctrlb; 5372 u64 newctrlb;
5373
5360 newctrlb = ppd->cpspec->ibcctrl_b & ~(IBA7322_IBC_SPEED_MASK | 5374 newctrlb = ppd->cpspec->ibcctrl_b & ~(IBA7322_IBC_SPEED_MASK |
5361 IBA7322_IBC_IBTA_1_2_MASK | 5375 IBA7322_IBC_IBTA_1_2_MASK |
5362 IBA7322_IBC_MAX_SPEED_MASK); 5376 IBA7322_IBC_MAX_SPEED_MASK);
@@ -5843,6 +5857,7 @@ static void get_7322_chip_params(struct qib_devdata *dd)
5843static void qib_7322_set_baseaddrs(struct qib_devdata *dd) 5857static void qib_7322_set_baseaddrs(struct qib_devdata *dd)
5844{ 5858{
5845 u32 cregbase; 5859 u32 cregbase;
5860
5846 cregbase = qib_read_kreg32(dd, kr_counterregbase); 5861 cregbase = qib_read_kreg32(dd, kr_counterregbase);
5847 5862
5848 dd->cspec->cregbase = (u64 __iomem *)(cregbase + 5863 dd->cspec->cregbase = (u64 __iomem *)(cregbase +
@@ -6183,6 +6198,7 @@ static int setup_txselect(const char *str, struct kernel_param *kp)
6183 struct qib_devdata *dd; 6198 struct qib_devdata *dd;
6184 unsigned long val; 6199 unsigned long val;
6185 char *n; 6200 char *n;
6201
6186 if (strlen(str) >= MAX_ATTEN_LEN) { 6202 if (strlen(str) >= MAX_ATTEN_LEN) {
6187 pr_info("txselect_values string too long\n"); 6203 pr_info("txselect_values string too long\n");
6188 return -ENOSPC; 6204 return -ENOSPC;
@@ -6393,6 +6409,7 @@ static void write_7322_initregs(struct qib_devdata *dd)
6393 val = TIDFLOW_ERRBITS; /* these are W1C */ 6409 val = TIDFLOW_ERRBITS; /* these are W1C */
6394 for (i = 0; i < dd->cfgctxts; i++) { 6410 for (i = 0; i < dd->cfgctxts; i++) {
6395 int flow; 6411 int flow;
6412
6396 for (flow = 0; flow < NUM_TIDFLOWS_CTXT; flow++) 6413 for (flow = 0; flow < NUM_TIDFLOWS_CTXT; flow++)
6397 qib_write_ureg(dd, ur_rcvflowtable+flow, val, i); 6414 qib_write_ureg(dd, ur_rcvflowtable+flow, val, i);
6398 } 6415 }
@@ -6503,6 +6520,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6503 6520
6504 for (pidx = 0; pidx < NUM_IB_PORTS; ++pidx) { 6521 for (pidx = 0; pidx < NUM_IB_PORTS; ++pidx) {
6505 struct qib_chippport_specific *cp = ppd->cpspec; 6522 struct qib_chippport_specific *cp = ppd->cpspec;
6523
6506 ppd->link_speed_supported = features & PORT_SPD_CAP; 6524 ppd->link_speed_supported = features & PORT_SPD_CAP;
6507 features >>= PORT_SPD_CAP_SHIFT; 6525 features >>= PORT_SPD_CAP_SHIFT;
6508 if (!ppd->link_speed_supported) { 6526 if (!ppd->link_speed_supported) {
@@ -6581,8 +6599,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6581 ppd->vls_supported = IB_VL_VL0_7; 6599 ppd->vls_supported = IB_VL_VL0_7;
6582 else { 6600 else {
6583 qib_devinfo(dd->pcidev, 6601 qib_devinfo(dd->pcidev,
6584 "Invalid num_vls %u for MTU %d " 6602 "Invalid num_vls %u for MTU %d , using 4 VLs\n",
6585 ", using 4 VLs\n",
6586 qib_num_cfg_vls, mtu); 6603 qib_num_cfg_vls, mtu);
6587 ppd->vls_supported = IB_VL_VL0_3; 6604 ppd->vls_supported = IB_VL_VL0_3;
6588 qib_num_cfg_vls = 4; 6605 qib_num_cfg_vls = 4;
@@ -7890,6 +7907,7 @@ static void serdes_7322_los_enable(struct qib_pportdata *ppd, int enable)
7890static int serdes_7322_init(struct qib_pportdata *ppd) 7907static int serdes_7322_init(struct qib_pportdata *ppd)
7891{ 7908{
7892 int ret = 0; 7909 int ret = 0;
7910
7893 if (ppd->dd->cspec->r1) 7911 if (ppd->dd->cspec->r1)
7894 ret = serdes_7322_init_old(ppd); 7912 ret = serdes_7322_init_old(ppd);
7895 else 7913 else
@@ -8305,8 +8323,8 @@ static void force_h1(struct qib_pportdata *ppd)
8305 8323
8306static int qib_r_grab(struct qib_devdata *dd) 8324static int qib_r_grab(struct qib_devdata *dd)
8307{ 8325{
8308 u64 val; 8326 u64 val = SJA_EN;
8309 val = SJA_EN; 8327
8310 qib_write_kreg(dd, kr_r_access, val); 8328 qib_write_kreg(dd, kr_r_access, val);
8311 qib_read_kreg32(dd, kr_scratch); 8329 qib_read_kreg32(dd, kr_scratch);
8312 return 0; 8330 return 0;
@@ -8319,6 +8337,7 @@ static int qib_r_wait_for_rdy(struct qib_devdata *dd)
8319{ 8337{
8320 u64 val; 8338 u64 val;
8321 int timeout; 8339 int timeout;
8340
8322 for (timeout = 0; timeout < 100 ; ++timeout) { 8341 for (timeout = 0; timeout < 100 ; ++timeout) {
8323 val = qib_read_kreg32(dd, kr_r_access); 8342 val = qib_read_kreg32(dd, kr_r_access);
8324 if (val & R_RDY) 8343 if (val & R_RDY)
@@ -8346,6 +8365,7 @@ static int qib_r_shift(struct qib_devdata *dd, int bisten,
8346 } 8365 }
8347 if (inp) { 8366 if (inp) {
8348 int tdi = inp[pos >> 3] >> (pos & 7); 8367 int tdi = inp[pos >> 3] >> (pos & 7);
8368
8349 val |= ((tdi & 1) << R_TDI_LSB); 8369 val |= ((tdi & 1) << R_TDI_LSB);
8350 } 8370 }
8351 qib_write_kreg(dd, kr_r_access, val); 8371 qib_write_kreg(dd, kr_r_access, val);