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path: root/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
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Diffstat (limited to 'drivers/infiniband/hw/ocrdma/ocrdma_sli.h')
-rw-r--r--drivers/infiniband/hw/ocrdma/ocrdma_sli.h81
1 files changed, 80 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
index 96c9ee602ba4..4defae8f63df 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
@@ -422,7 +422,12 @@ struct ocrdma_ae_qp_mcqe {
422 422
423#define OCRDMA_ASYNC_RDMA_EVE_CODE 0x14 423#define OCRDMA_ASYNC_RDMA_EVE_CODE 0x14
424#define OCRDMA_ASYNC_GRP5_EVE_CODE 0x5 424#define OCRDMA_ASYNC_GRP5_EVE_CODE 0x5
425#define OCRDMA_ASYNC_EVENT_PVID_STATE 0x3 425
426enum ocrdma_async_grp5_events {
427 OCRDMA_ASYNC_EVENT_QOS_VALUE = 0x01,
428 OCRDMA_ASYNC_EVENT_COS_VALUE = 0x02,
429 OCRDMA_ASYNC_EVENT_PVID_STATE = 0x03
430};
426 431
427enum OCRDMA_ASYNC_EVENT_TYPE { 432enum OCRDMA_ASYNC_EVENT_TYPE {
428 OCRDMA_CQ_ERROR = 0x00, 433 OCRDMA_CQ_ERROR = 0x00,
@@ -1949,5 +1954,79 @@ struct ocrdma_get_ctrl_attribs_rsp {
1949 struct mgmt_controller_attrib ctrl_attribs; 1954 struct mgmt_controller_attrib ctrl_attribs;
1950}; 1955};
1951 1956
1957#define OCRDMA_SUBSYS_DCBX 0x10
1958
1959enum OCRDMA_DCBX_OPCODE {
1960 OCRDMA_CMD_GET_DCBX_CONFIG = 0x01
1961};
1962
1963enum OCRDMA_DCBX_PARAM_TYPE {
1964 OCRDMA_PARAMETER_TYPE_ADMIN = 0x00,
1965 OCRDMA_PARAMETER_TYPE_OPER = 0x01,
1966 OCRDMA_PARAMETER_TYPE_PEER = 0x02
1967};
1968
1969enum OCRDMA_DCBX_APP_PROTO {
1970 OCRDMA_APP_PROTO_ROCE = 0x8915
1971};
1972
1973enum OCRDMA_DCBX_PROTO {
1974 OCRDMA_PROTO_SELECT_L2 = 0x00,
1975 OCRDMA_PROTO_SELECT_L4 = 0x01
1976};
1977
1978enum OCRDMA_DCBX_APP_PARAM {
1979 OCRDMA_APP_PARAM_APP_PROTO_MASK = 0xFFFF,
1980 OCRDMA_APP_PARAM_PROTO_SEL_MASK = 0xFF,
1981 OCRDMA_APP_PARAM_PROTO_SEL_SHIFT = 0x10,
1982 OCRDMA_APP_PARAM_VALID_MASK = 0xFF,
1983 OCRDMA_APP_PARAM_VALID_SHIFT = 0x18
1984};
1985
1986enum OCRDMA_DCBX_STATE_FLAGS {
1987 OCRDMA_STATE_FLAG_ENABLED = 0x01,
1988 OCRDMA_STATE_FLAG_ADDVERTISED = 0x02,
1989 OCRDMA_STATE_FLAG_WILLING = 0x04,
1990 OCRDMA_STATE_FLAG_SYNC = 0x08,
1991 OCRDMA_STATE_FLAG_UNSUPPORTED = 0x40000000,
1992 OCRDMA_STATE_FLAG_NEG_FAILD = 0x80000000
1993};
1994
1995enum OCRDMA_TCV_AEV_OPV_ST {
1996 OCRDMA_DCBX_TC_SUPPORT_MASK = 0xFF,
1997 OCRDMA_DCBX_TC_SUPPORT_SHIFT = 0x18,
1998 OCRDMA_DCBX_APP_ENTRY_SHIFT = 0x10,
1999 OCRDMA_DCBX_OP_PARAM_SHIFT = 0x08,
2000 OCRDMA_DCBX_STATE_MASK = 0xFF
2001};
2002
2003struct ocrdma_app_parameter {
2004 u32 valid_proto_app;
2005 u32 oui;
2006 u32 app_prio[2];
2007};
2008
2009struct ocrdma_dcbx_cfg {
2010 u32 tcv_aev_opv_st;
2011 u32 tc_state;
2012 u32 pfc_state;
2013 u32 qcn_state;
2014 u32 appl_state;
2015 u32 ll_state;
2016 u32 tc_bw[2];
2017 u32 tc_prio[8];
2018 u32 pfc_prio[2];
2019 struct ocrdma_app_parameter app_param[15];
2020};
2021
2022struct ocrdma_get_dcbx_cfg_req {
2023 struct ocrdma_mbx_hdr hdr;
2024 u32 param_type;
2025} __packed;
2026
2027struct ocrdma_get_dcbx_cfg_rsp {
2028 struct ocrdma_mbx_rsp hdr;
2029 struct ocrdma_dcbx_cfg cfg;
2030} __packed;
1952 2031
1953#endif /* __OCRDMA_SLI_H__ */ 2032#endif /* __OCRDMA_SLI_H__ */