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path: root/drivers/infiniband/hw/mthca/mthca_qp.c
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Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_qp.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_qp.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c
index 79245717e98f..bdba39a8d9f9 100644
--- a/drivers/infiniband/hw/mthca/mthca_qp.c
+++ b/drivers/infiniband/hw/mthca/mthca_qp.c
@@ -2,7 +2,7 @@
2 * Copyright (c) 2004 Topspin Communications. All rights reserved. 2 * Copyright (c) 2004 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Cisco Systems. All rights reserved. 3 * Copyright (c) 2005 Cisco Systems. All rights reserved.
4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2004 Voltaire, Inc. All rights reserved. 5 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
6 * 6 *
7 * This software is available to you under a choice of one of two 7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU 8 * licenses. You may choose to be licensed under the terms of the GNU
@@ -559,9 +559,9 @@ static void mthca_path_set(struct ib_ah_attr *ah, struct mthca_qp_path *path)
559 path->g_mylmc |= 1 << 7; 559 path->g_mylmc |= 1 << 7;
560 path->mgid_index = ah->grh.sgid_index; 560 path->mgid_index = ah->grh.sgid_index;
561 path->hop_limit = ah->grh.hop_limit; 561 path->hop_limit = ah->grh.hop_limit;
562 path->sl_tclass_flowlabel = 562 path->sl_tclass_flowlabel =
563 cpu_to_be32((ah->sl << 28) | 563 cpu_to_be32((ah->sl << 28) |
564 (ah->grh.traffic_class << 20) | 564 (ah->grh.traffic_class << 20) |
565 (ah->grh.flow_label)); 565 (ah->grh.flow_label));
566 memcpy(path->rgid, ah->grh.dgid.raw, 16); 566 memcpy(path->rgid, ah->grh.dgid.raw, 16);
567 } else 567 } else
@@ -597,7 +597,7 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
597 } 597 }
598 598
599 if (attr_mask & IB_QP_STATE) { 599 if (attr_mask & IB_QP_STATE) {
600 if (attr->qp_state < 0 || attr->qp_state > IB_QPS_ERR) 600 if (attr->qp_state < 0 || attr->qp_state > IB_QPS_ERR)
601 return -EINVAL; 601 return -EINVAL;
602 new_state = attr->qp_state; 602 new_state = attr->qp_state;
603 } else 603 } else
@@ -630,10 +630,10 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
630 return -EINVAL; 630 return -EINVAL;
631 } 631 }
632 632
633 if ((attr_mask & IB_QP_PKEY_INDEX) && 633 if ((attr_mask & IB_QP_PKEY_INDEX) &&
634 attr->pkey_index >= dev->limits.pkey_table_len) { 634 attr->pkey_index >= dev->limits.pkey_table_len) {
635 mthca_dbg(dev, "PKey index (%u) too large. max is %d\n", 635 mthca_dbg(dev, "PKey index (%u) too large. max is %d\n",
636 attr->pkey_index,dev->limits.pkey_table_len-1); 636 attr->pkey_index,dev->limits.pkey_table_len-1);
637 return -EINVAL; 637 return -EINVAL;
638 } 638 }
639 639
@@ -733,7 +733,7 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
733 if (attr_mask & IB_QP_RNR_RETRY) { 733 if (attr_mask & IB_QP_RNR_RETRY) {
734 qp_context->alt_path.rnr_retry = qp_context->pri_path.rnr_retry = 734 qp_context->alt_path.rnr_retry = qp_context->pri_path.rnr_retry =
735 attr->rnr_retry << 5; 735 attr->rnr_retry << 5;
736 qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RNR_RETRY | 736 qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RNR_RETRY |
737 MTHCA_QP_OPTPAR_ALT_RNR_RETRY); 737 MTHCA_QP_OPTPAR_ALT_RNR_RETRY);
738 } 738 }
739 739
@@ -749,13 +749,13 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask)
749 749
750 if (attr_mask & IB_QP_ALT_PATH) { 750 if (attr_mask & IB_QP_ALT_PATH) {
751 if (attr->alt_port_num == 0 || attr->alt_port_num > dev->limits.num_ports) { 751 if (attr->alt_port_num == 0 || attr->alt_port_num > dev->limits.num_ports) {
752 mthca_dbg(dev, "Alternate port number (%u) is invalid\n", 752 mthca_dbg(dev, "Alternate port number (%u) is invalid\n",
753 attr->alt_port_num); 753 attr->alt_port_num);
754 return -EINVAL; 754 return -EINVAL;
755 } 755 }
756 756
757 mthca_path_set(&attr->alt_ah_attr, &qp_context->alt_path); 757 mthca_path_set(&attr->alt_ah_attr, &qp_context->alt_path);
758 qp_context->alt_path.port_pkey |= cpu_to_be32(attr->alt_pkey_index | 758 qp_context->alt_path.port_pkey |= cpu_to_be32(attr->alt_pkey_index |
759 attr->alt_port_num << 24); 759 attr->alt_port_num << 24);
760 qp_context->alt_path.ackto = attr->alt_timeout << 3; 760 qp_context->alt_path.ackto = attr->alt_timeout << 3;
761 qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_ALT_ADDR_PATH); 761 qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_ALT_ADDR_PATH);
@@ -1078,10 +1078,10 @@ static int mthca_map_memfree(struct mthca_dev *dev,
1078 if (ret) 1078 if (ret)
1079 goto err_qpc; 1079 goto err_qpc;
1080 1080
1081 ret = mthca_table_get(dev, dev->qp_table.rdb_table, 1081 ret = mthca_table_get(dev, dev->qp_table.rdb_table,
1082 qp->qpn << dev->qp_table.rdb_shift); 1082 qp->qpn << dev->qp_table.rdb_shift);
1083 if (ret) 1083 if (ret)
1084 goto err_eqpc; 1084 goto err_eqpc;
1085 1085
1086 } 1086 }
1087 1087
@@ -2115,7 +2115,7 @@ int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2115 int i; 2115 int i;
2116 void *wqe; 2116 void *wqe;
2117 2117
2118 spin_lock_irqsave(&qp->rq.lock, flags); 2118 spin_lock_irqsave(&qp->rq.lock, flags);
2119 2119
2120 /* XXX check that state is OK to post receive */ 2120 /* XXX check that state is OK to post receive */
2121 2121