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Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_eq.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_eq.c63
1 files changed, 32 insertions, 31 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index cbcf2b4722e4..18f0981eb0c1 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
3 * 4 *
4 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 6 * licenses. You may choose to be licensed under the terms of the GNU
@@ -51,18 +52,18 @@ enum {
51 * Must be packed because start is 64 bits but only aligned to 32 bits. 52 * Must be packed because start is 64 bits but only aligned to 32 bits.
52 */ 53 */
53struct mthca_eq_context { 54struct mthca_eq_context {
54 u32 flags; 55 __be32 flags;
55 u64 start; 56 __be64 start;
56 u32 logsize_usrpage; 57 __be32 logsize_usrpage;
57 u32 tavor_pd; /* reserved for Arbel */ 58 __be32 tavor_pd; /* reserved for Arbel */
58 u8 reserved1[3]; 59 u8 reserved1[3];
59 u8 intr; 60 u8 intr;
60 u32 arbel_pd; /* lost_count for Tavor */ 61 __be32 arbel_pd; /* lost_count for Tavor */
61 u32 lkey; 62 __be32 lkey;
62 u32 reserved2[2]; 63 u32 reserved2[2];
63 u32 consumer_index; 64 __be32 consumer_index;
64 u32 producer_index; 65 __be32 producer_index;
65 u32 reserved3[4]; 66 u32 reserved3[4];
66} __attribute__((packed)); 67} __attribute__((packed));
67 68
68#define MTHCA_EQ_STATUS_OK ( 0 << 28) 69#define MTHCA_EQ_STATUS_OK ( 0 << 28)
@@ -127,28 +128,28 @@ struct mthca_eqe {
127 union { 128 union {
128 u32 raw[6]; 129 u32 raw[6];
129 struct { 130 struct {
130 u32 cqn; 131 __be32 cqn;
131 } __attribute__((packed)) comp; 132 } __attribute__((packed)) comp;
132 struct { 133 struct {
133 u16 reserved1; 134 u16 reserved1;
134 u16 token; 135 __be16 token;
135 u32 reserved2; 136 u32 reserved2;
136 u8 reserved3[3]; 137 u8 reserved3[3];
137 u8 status; 138 u8 status;
138 u64 out_param; 139 __be64 out_param;
139 } __attribute__((packed)) cmd; 140 } __attribute__((packed)) cmd;
140 struct { 141 struct {
141 u32 qpn; 142 __be32 qpn;
142 } __attribute__((packed)) qp; 143 } __attribute__((packed)) qp;
143 struct { 144 struct {
144 u32 cqn; 145 __be32 cqn;
145 u32 reserved1; 146 u32 reserved1;
146 u8 reserved2[3]; 147 u8 reserved2[3];
147 u8 syndrome; 148 u8 syndrome;
148 } __attribute__((packed)) cq_err; 149 } __attribute__((packed)) cq_err;
149 struct { 150 struct {
150 u32 reserved1[2]; 151 u32 reserved1[2];
151 u32 port; 152 __be32 port;
152 } __attribute__((packed)) port_change; 153 } __attribute__((packed)) port_change;
153 } event; 154 } event;
154 u8 reserved3[3]; 155 u8 reserved3[3];
@@ -167,7 +168,7 @@ static inline u64 async_mask(struct mthca_dev *dev)
167 168
168static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) 169static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
169{ 170{
170 u32 doorbell[2]; 171 __be32 doorbell[2];
171 172
172 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_SET_CI | eq->eqn); 173 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_SET_CI | eq->eqn);
173 doorbell[1] = cpu_to_be32(ci & (eq->nent - 1)); 174 doorbell[1] = cpu_to_be32(ci & (eq->nent - 1));
@@ -190,8 +191,8 @@ static inline void arbel_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u
190{ 191{
191 /* See comment in tavor_set_eq_ci() above. */ 192 /* See comment in tavor_set_eq_ci() above. */
192 wmb(); 193 wmb();
193 __raw_writel(cpu_to_be32(ci), dev->eq_regs.arbel.eq_set_ci_base + 194 __raw_writel((__force u32) cpu_to_be32(ci),
194 eq->eqn * 8); 195 dev->eq_regs.arbel.eq_set_ci_base + eq->eqn * 8);
195 /* We still want ordering, just not swabbing, so add a barrier */ 196 /* We still want ordering, just not swabbing, so add a barrier */
196 mb(); 197 mb();
197} 198}
@@ -206,7 +207,7 @@ static inline void set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci)
206 207
207static inline void tavor_eq_req_not(struct mthca_dev *dev, int eqn) 208static inline void tavor_eq_req_not(struct mthca_dev *dev, int eqn)
208{ 209{
209 u32 doorbell[2]; 210 __be32 doorbell[2];
210 211
211 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_REQ_NOT | eqn); 212 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_REQ_NOT | eqn);
212 doorbell[1] = 0; 213 doorbell[1] = 0;
@@ -224,7 +225,7 @@ static inline void arbel_eq_req_not(struct mthca_dev *dev, u32 eqn_mask)
224static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn) 225static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn)
225{ 226{
226 if (!mthca_is_memfree(dev)) { 227 if (!mthca_is_memfree(dev)) {
227 u32 doorbell[2]; 228 __be32 doorbell[2];
228 229
229 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_DISARM_CQ | eqn); 230 doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_DISARM_CQ | eqn);
230 doorbell[1] = cpu_to_be32(cqn); 231 doorbell[1] = cpu_to_be32(cqn);