diff options
Diffstat (limited to 'drivers/infiniband/hw/ipath/ipath_driver.c')
-rw-r--r-- | drivers/infiniband/hw/ipath/ipath_driver.c | 404 |
1 files changed, 209 insertions, 195 deletions
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c index dddcdae736ac..823131d58b34 100644 --- a/drivers/infiniband/hw/ipath/ipath_driver.c +++ b/drivers/infiniband/hw/ipath/ipath_driver.c | |||
@@ -1,4 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2006 QLogic, Inc. All rights reserved. | ||
2 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. | 3 | * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. |
3 | * | 4 | * |
4 | * This software is available to you under a choice of one of two | 5 | * This software is available to you under a choice of one of two |
@@ -38,8 +39,8 @@ | |||
38 | #include <linux/vmalloc.h> | 39 | #include <linux/vmalloc.h> |
39 | 40 | ||
40 | #include "ipath_kernel.h" | 41 | #include "ipath_kernel.h" |
41 | #include "ips_common.h" | ||
42 | #include "ipath_layer.h" | 42 | #include "ipath_layer.h" |
43 | #include "ipath_common.h" | ||
43 | 44 | ||
44 | static void ipath_update_pio_bufs(struct ipath_devdata *); | 45 | static void ipath_update_pio_bufs(struct ipath_devdata *); |
45 | 46 | ||
@@ -52,7 +53,7 @@ const char *ipath_get_unit_name(int unit) | |||
52 | 53 | ||
53 | EXPORT_SYMBOL_GPL(ipath_get_unit_name); | 54 | EXPORT_SYMBOL_GPL(ipath_get_unit_name); |
54 | 55 | ||
55 | #define DRIVER_LOAD_MSG "PathScale " IPATH_DRV_NAME " loaded: " | 56 | #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: " |
56 | #define PFX IPATH_DRV_NAME ": " | 57 | #define PFX IPATH_DRV_NAME ": " |
57 | 58 | ||
58 | /* | 59 | /* |
@@ -74,8 +75,8 @@ MODULE_PARM_DESC(debug, "mask for debug prints"); | |||
74 | EXPORT_SYMBOL_GPL(ipath_debug); | 75 | EXPORT_SYMBOL_GPL(ipath_debug); |
75 | 76 | ||
76 | MODULE_LICENSE("GPL"); | 77 | MODULE_LICENSE("GPL"); |
77 | MODULE_AUTHOR("PathScale <support@pathscale.com>"); | 78 | MODULE_AUTHOR("QLogic <support@pathscale.com>"); |
78 | MODULE_DESCRIPTION("Pathscale InfiniPath driver"); | 79 | MODULE_DESCRIPTION("QLogic InfiniPath driver"); |
79 | 80 | ||
80 | const char *ipath_ibcstatus_str[] = { | 81 | const char *ipath_ibcstatus_str[] = { |
81 | "Disabled", | 82 | "Disabled", |
@@ -130,14 +131,6 @@ static struct pci_driver ipath_driver = { | |||
130 | .id_table = ipath_pci_tbl, | 131 | .id_table = ipath_pci_tbl, |
131 | }; | 132 | }; |
132 | 133 | ||
133 | /* | ||
134 | * This is where port 0's rcvhdrtail register is written back; we also | ||
135 | * want nothing else sharing the cache line, so make it a cache line | ||
136 | * in size. Used for all units. | ||
137 | */ | ||
138 | volatile __le64 *ipath_port0_rcvhdrtail; | ||
139 | dma_addr_t ipath_port0_rcvhdrtail_dma; | ||
140 | static int port0_rcvhdrtail_refs; | ||
141 | 134 | ||
142 | static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev, | 135 | static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev, |
143 | u32 *bar0, u32 *bar1) | 136 | u32 *bar0, u32 *bar1) |
@@ -170,14 +163,13 @@ static void ipath_free_devdata(struct pci_dev *pdev, | |||
170 | list_del(&dd->ipath_list); | 163 | list_del(&dd->ipath_list); |
171 | spin_unlock_irqrestore(&ipath_devs_lock, flags); | 164 | spin_unlock_irqrestore(&ipath_devs_lock, flags); |
172 | } | 165 | } |
173 | dma_free_coherent(&pdev->dev, sizeof(*dd), dd, dd->ipath_dma_addr); | 166 | vfree(dd); |
174 | } | 167 | } |
175 | 168 | ||
176 | static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev) | 169 | static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev) |
177 | { | 170 | { |
178 | unsigned long flags; | 171 | unsigned long flags; |
179 | struct ipath_devdata *dd; | 172 | struct ipath_devdata *dd; |
180 | dma_addr_t dma_addr; | ||
181 | int ret; | 173 | int ret; |
182 | 174 | ||
183 | if (!idr_pre_get(&unit_table, GFP_KERNEL)) { | 175 | if (!idr_pre_get(&unit_table, GFP_KERNEL)) { |
@@ -185,15 +177,12 @@ static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev) | |||
185 | goto bail; | 177 | goto bail; |
186 | } | 178 | } |
187 | 179 | ||
188 | dd = dma_alloc_coherent(&pdev->dev, sizeof(*dd), &dma_addr, | 180 | dd = vmalloc(sizeof(*dd)); |
189 | GFP_KERNEL); | ||
190 | |||
191 | if (!dd) { | 181 | if (!dd) { |
192 | dd = ERR_PTR(-ENOMEM); | 182 | dd = ERR_PTR(-ENOMEM); |
193 | goto bail; | 183 | goto bail; |
194 | } | 184 | } |
195 | 185 | memset(dd, 0, sizeof(*dd)); | |
196 | dd->ipath_dma_addr = dma_addr; | ||
197 | dd->ipath_unit = -1; | 186 | dd->ipath_unit = -1; |
198 | 187 | ||
199 | spin_lock_irqsave(&ipath_devs_lock, flags); | 188 | spin_lock_irqsave(&ipath_devs_lock, flags); |
@@ -271,47 +260,6 @@ int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp) | |||
271 | return nunits; | 260 | return nunits; |
272 | } | 261 | } |
273 | 262 | ||
274 | static int init_port0_rcvhdrtail(struct pci_dev *pdev) | ||
275 | { | ||
276 | int ret; | ||
277 | |||
278 | mutex_lock(&ipath_mutex); | ||
279 | |||
280 | if (!ipath_port0_rcvhdrtail) { | ||
281 | ipath_port0_rcvhdrtail = | ||
282 | dma_alloc_coherent(&pdev->dev, | ||
283 | IPATH_PORT0_RCVHDRTAIL_SIZE, | ||
284 | &ipath_port0_rcvhdrtail_dma, | ||
285 | GFP_KERNEL); | ||
286 | |||
287 | if (!ipath_port0_rcvhdrtail) { | ||
288 | ret = -ENOMEM; | ||
289 | goto bail; | ||
290 | } | ||
291 | } | ||
292 | port0_rcvhdrtail_refs++; | ||
293 | ret = 0; | ||
294 | |||
295 | bail: | ||
296 | mutex_unlock(&ipath_mutex); | ||
297 | |||
298 | return ret; | ||
299 | } | ||
300 | |||
301 | static void cleanup_port0_rcvhdrtail(struct pci_dev *pdev) | ||
302 | { | ||
303 | mutex_lock(&ipath_mutex); | ||
304 | |||
305 | if (!--port0_rcvhdrtail_refs) { | ||
306 | dma_free_coherent(&pdev->dev, IPATH_PORT0_RCVHDRTAIL_SIZE, | ||
307 | (void *) ipath_port0_rcvhdrtail, | ||
308 | ipath_port0_rcvhdrtail_dma); | ||
309 | ipath_port0_rcvhdrtail = NULL; | ||
310 | } | ||
311 | |||
312 | mutex_unlock(&ipath_mutex); | ||
313 | } | ||
314 | |||
315 | /* | 263 | /* |
316 | * These next two routines are placeholders in case we don't have per-arch | 264 | * These next two routines are placeholders in case we don't have per-arch |
317 | * code for controlling write combining. If explicit control of write | 265 | * code for controlling write combining. If explicit control of write |
@@ -336,20 +284,12 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
336 | u32 bar0 = 0, bar1 = 0; | 284 | u32 bar0 = 0, bar1 = 0; |
337 | u8 rev; | 285 | u8 rev; |
338 | 286 | ||
339 | ret = init_port0_rcvhdrtail(pdev); | ||
340 | if (ret < 0) { | ||
341 | printk(KERN_ERR IPATH_DRV_NAME | ||
342 | ": Could not allocate port0_rcvhdrtail: error %d\n", | ||
343 | -ret); | ||
344 | goto bail; | ||
345 | } | ||
346 | |||
347 | dd = ipath_alloc_devdata(pdev); | 287 | dd = ipath_alloc_devdata(pdev); |
348 | if (IS_ERR(dd)) { | 288 | if (IS_ERR(dd)) { |
349 | ret = PTR_ERR(dd); | 289 | ret = PTR_ERR(dd); |
350 | printk(KERN_ERR IPATH_DRV_NAME | 290 | printk(KERN_ERR IPATH_DRV_NAME |
351 | ": Could not allocate devdata: error %d\n", -ret); | 291 | ": Could not allocate devdata: error %d\n", -ret); |
352 | goto bail_rcvhdrtail; | 292 | goto bail; |
353 | } | 293 | } |
354 | 294 | ||
355 | ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit); | 295 | ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit); |
@@ -424,12 +364,29 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
424 | */ | 364 | */ |
425 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | 365 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
426 | if (ret) { | 366 | if (ret) { |
427 | dev_info(&pdev->dev, "pci_set_dma_mask unit %u " | 367 | dev_info(&pdev->dev, |
428 | "fails: %d\n", dd->ipath_unit, ret); | 368 | "Unable to set DMA mask for unit %u: %d\n", |
369 | dd->ipath_unit, ret); | ||
429 | goto bail_regions; | 370 | goto bail_regions; |
430 | } | 371 | } |
431 | else | 372 | else { |
432 | ipath_dbg("No 64bit DMA mask, used 32 bit mask\n"); | 373 | ipath_dbg("No 64bit DMA mask, used 32 bit mask\n"); |
374 | ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | ||
375 | if (ret) | ||
376 | dev_info(&pdev->dev, | ||
377 | "Unable to set DMA consistent mask " | ||
378 | "for unit %u: %d\n", | ||
379 | dd->ipath_unit, ret); | ||
380 | |||
381 | } | ||
382 | } | ||
383 | else { | ||
384 | ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); | ||
385 | if (ret) | ||
386 | dev_info(&pdev->dev, | ||
387 | "Unable to set DMA consistent mask " | ||
388 | "for unit %u: %d\n", | ||
389 | dd->ipath_unit, ret); | ||
433 | } | 390 | } |
434 | 391 | ||
435 | pci_set_master(pdev); | 392 | pci_set_master(pdev); |
@@ -452,7 +409,7 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
452 | ipath_init_pe800_funcs(dd); | 409 | ipath_init_pe800_funcs(dd); |
453 | break; | 410 | break; |
454 | default: | 411 | default: |
455 | ipath_dev_err(dd, "Found unknown PathScale deviceid 0x%x, " | 412 | ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, " |
456 | "failing\n", ent->device); | 413 | "failing\n", ent->device); |
457 | return -ENODEV; | 414 | return -ENODEV; |
458 | } | 415 | } |
@@ -460,10 +417,10 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
460 | for (j = 0; j < 6; j++) { | 417 | for (j = 0; j < 6; j++) { |
461 | if (!pdev->resource[j].start) | 418 | if (!pdev->resource[j].start) |
462 | continue; | 419 | continue; |
463 | ipath_cdbg(VERBOSE, "BAR %d start %lx, end %lx, len %lx\n", | 420 | ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n", |
464 | j, pdev->resource[j].start, | 421 | j, (unsigned long long)pdev->resource[j].start, |
465 | pdev->resource[j].end, | 422 | (unsigned long long)pdev->resource[j].end, |
466 | pci_resource_len(pdev, j)); | 423 | (unsigned long long)pci_resource_len(pdev, j)); |
467 | } | 424 | } |
468 | 425 | ||
469 | if (!addr) { | 426 | if (!addr) { |
@@ -495,23 +452,23 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
495 | ((void __iomem *)dd->ipath_kregbase + len); | 452 | ((void __iomem *)dd->ipath_kregbase + len); |
496 | dd->ipath_physaddr = addr; /* used for io_remap, etc. */ | 453 | dd->ipath_physaddr = addr; /* used for io_remap, etc. */ |
497 | /* for user mmap */ | 454 | /* for user mmap */ |
498 | dd->ipath_kregvirt = (u64 __iomem *) phys_to_virt(addr); | 455 | ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n", |
499 | ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p " | 456 | addr, dd->ipath_kregbase); |
500 | "kregvirt %p\n", addr, dd->ipath_kregbase, | ||
501 | dd->ipath_kregvirt); | ||
502 | 457 | ||
503 | /* | 458 | /* |
504 | * clear ipath_flags here instead of in ipath_init_chip as it is set | 459 | * clear ipath_flags here instead of in ipath_init_chip as it is set |
505 | * by ipath_setup_htconfig. | 460 | * by ipath_setup_htconfig. |
506 | */ | 461 | */ |
507 | dd->ipath_flags = 0; | 462 | dd->ipath_flags = 0; |
463 | dd->ipath_lli_counter = 0; | ||
464 | dd->ipath_lli_errors = 0; | ||
508 | 465 | ||
509 | if (dd->ipath_f_bus(dd, pdev)) | 466 | if (dd->ipath_f_bus(dd, pdev)) |
510 | ipath_dev_err(dd, "Failed to setup config space; " | 467 | ipath_dev_err(dd, "Failed to setup config space; " |
511 | "continuing anyway\n"); | 468 | "continuing anyway\n"); |
512 | 469 | ||
513 | /* | 470 | /* |
514 | * set up our interrupt handler; SA_SHIRQ probably not needed, | 471 | * set up our interrupt handler; IRQF_SHARED probably not needed, |
515 | * since MSI interrupts shouldn't be shared but won't hurt for now. | 472 | * since MSI interrupts shouldn't be shared but won't hurt for now. |
516 | * check 0 irq after we return from chip-specific bus setup, since | 473 | * check 0 irq after we return from chip-specific bus setup, since |
517 | * that can affect this due to setup | 474 | * that can affect this due to setup |
@@ -520,7 +477,7 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
520 | ipath_dev_err(dd, "irq is 0, BIOS error? Interrupts won't " | 477 | ipath_dev_err(dd, "irq is 0, BIOS error? Interrupts won't " |
521 | "work\n"); | 478 | "work\n"); |
522 | else { | 479 | else { |
523 | ret = request_irq(pdev->irq, ipath_intr, SA_SHIRQ, | 480 | ret = request_irq(pdev->irq, ipath_intr, IRQF_SHARED, |
524 | IPATH_DRV_NAME, dd); | 481 | IPATH_DRV_NAME, dd); |
525 | if (ret) { | 482 | if (ret) { |
526 | ipath_dev_err(dd, "Couldn't setup irq handler, " | 483 | ipath_dev_err(dd, "Couldn't setup irq handler, " |
@@ -545,6 +502,7 @@ static int __devinit ipath_init_one(struct pci_dev *pdev, | |||
545 | ipath_device_create_group(&pdev->dev, dd); | 502 | ipath_device_create_group(&pdev->dev, dd); |
546 | ipathfs_add_device(dd); | 503 | ipathfs_add_device(dd); |
547 | ipath_user_add(dd); | 504 | ipath_user_add(dd); |
505 | ipath_diag_add(dd); | ||
548 | ipath_layer_add(dd); | 506 | ipath_layer_add(dd); |
549 | 507 | ||
550 | goto bail; | 508 | goto bail; |
@@ -561,9 +519,6 @@ bail_disable: | |||
561 | bail_devdata: | 519 | bail_devdata: |
562 | ipath_free_devdata(pdev, dd); | 520 | ipath_free_devdata(pdev, dd); |
563 | 521 | ||
564 | bail_rcvhdrtail: | ||
565 | cleanup_port0_rcvhdrtail(pdev); | ||
566 | |||
567 | bail: | 522 | bail: |
568 | return ret; | 523 | return ret; |
569 | } | 524 | } |
@@ -577,8 +532,9 @@ static void __devexit ipath_remove_one(struct pci_dev *pdev) | |||
577 | return; | 532 | return; |
578 | 533 | ||
579 | dd = pci_get_drvdata(pdev); | 534 | dd = pci_get_drvdata(pdev); |
580 | ipath_layer_del(dd); | 535 | ipath_layer_remove(dd); |
581 | ipath_user_del(dd); | 536 | ipath_diag_remove(dd); |
537 | ipath_user_remove(dd); | ||
582 | ipathfs_remove_device(dd); | 538 | ipathfs_remove_device(dd); |
583 | ipath_device_remove_group(&pdev->dev, dd); | 539 | ipath_device_remove_group(&pdev->dev, dd); |
584 | ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, " | 540 | ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, " |
@@ -594,7 +550,6 @@ static void __devexit ipath_remove_one(struct pci_dev *pdev) | |||
594 | pci_disable_device(pdev); | 550 | pci_disable_device(pdev); |
595 | 551 | ||
596 | ipath_free_devdata(pdev, dd); | 552 | ipath_free_devdata(pdev, dd); |
597 | cleanup_port0_rcvhdrtail(pdev); | ||
598 | } | 553 | } |
599 | 554 | ||
600 | /* general driver use */ | 555 | /* general driver use */ |
@@ -868,7 +823,8 @@ static void ipath_rcv_layer(struct ipath_devdata *dd, u32 etail, | |||
868 | u8 pad, *bthbytes; | 823 | u8 pad, *bthbytes; |
869 | struct sk_buff *skb, *nskb; | 824 | struct sk_buff *skb, *nskb; |
870 | 825 | ||
871 | if (dd->ipath_port0_skbs && hdr->sub_opcode == OPCODE_ENCAP) { | 826 | if (dd->ipath_port0_skbs && |
827 | hdr->sub_opcode == IPATH_ITH4X_OPCODE_ENCAP) { | ||
872 | /* | 828 | /* |
873 | * Allocate a new sk_buff to replace the one we give | 829 | * Allocate a new sk_buff to replace the one we give |
874 | * to the network stack. | 830 | * to the network stack. |
@@ -899,7 +855,7 @@ static void ipath_rcv_layer(struct ipath_devdata *dd, u32 etail, | |||
899 | /* another ether packet received */ | 855 | /* another ether packet received */ |
900 | ipath_stats.sps_ether_rpkts++; | 856 | ipath_stats.sps_ether_rpkts++; |
901 | } | 857 | } |
902 | else if (hdr->sub_opcode == OPCODE_LID_ARP) | 858 | else if (hdr->sub_opcode == IPATH_ITH4X_OPCODE_LID_ARP) |
903 | __ipath_layer_rcv_lid(dd, hdr); | 859 | __ipath_layer_rcv_lid(dd, hdr); |
904 | } | 860 | } |
905 | 861 | ||
@@ -916,8 +872,8 @@ void ipath_kreceive(struct ipath_devdata *dd) | |||
916 | const u32 rsize = dd->ipath_rcvhdrentsize; /* words */ | 872 | const u32 rsize = dd->ipath_rcvhdrentsize; /* words */ |
917 | const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */ | 873 | const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */ |
918 | u32 etail = -1, l, hdrqtail; | 874 | u32 etail = -1, l, hdrqtail; |
919 | struct ips_message_header *hdr; | 875 | struct ipath_message_header *hdr; |
920 | u32 eflags, i, etype, tlen, pkttot = 0; | 876 | u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0; |
921 | static u64 totcalls; /* stats, may eventually remove */ | 877 | static u64 totcalls; /* stats, may eventually remove */ |
922 | char emsg[128]; | 878 | char emsg[128]; |
923 | 879 | ||
@@ -931,24 +887,18 @@ void ipath_kreceive(struct ipath_devdata *dd) | |||
931 | if (test_and_set_bit(0, &dd->ipath_rcv_pending)) | 887 | if (test_and_set_bit(0, &dd->ipath_rcv_pending)) |
932 | goto bail; | 888 | goto bail; |
933 | 889 | ||
934 | if (dd->ipath_port0head == | 890 | l = dd->ipath_port0head; |
935 | (u32)le64_to_cpu(*dd->ipath_hdrqtailptr)) | 891 | hdrqtail = (u32) le64_to_cpu(*dd->ipath_hdrqtailptr); |
892 | if (l == hdrqtail) | ||
936 | goto done; | 893 | goto done; |
937 | 894 | ||
938 | gotmore: | 895 | reloop: |
939 | /* | 896 | for (i = 0; l != hdrqtail; i++) { |
940 | * read only once at start. If in flood situation, this helps | ||
941 | * performance slightly. If more arrive while we are processing, | ||
942 | * we'll come back here and do them | ||
943 | */ | ||
944 | hdrqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr); | ||
945 | |||
946 | for (i = 0, l = dd->ipath_port0head; l != hdrqtail; i++) { | ||
947 | u32 qp; | 897 | u32 qp; |
948 | u8 *bthbytes; | 898 | u8 *bthbytes; |
949 | 899 | ||
950 | rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2)); | 900 | rc = (u64 *) (dd->ipath_pd[0]->port_rcvhdrq + (l << 2)); |
951 | hdr = (struct ips_message_header *)&rc[1]; | 901 | hdr = (struct ipath_message_header *)&rc[1]; |
952 | /* | 902 | /* |
953 | * could make a network order version of IPATH_KD_QP, and | 903 | * could make a network order version of IPATH_KD_QP, and |
954 | * do the obvious shift before masking to speed this up. | 904 | * do the obvious shift before masking to speed this up. |
@@ -956,10 +906,10 @@ gotmore: | |||
956 | qp = ntohl(hdr->bth[1]) & 0xffffff; | 906 | qp = ntohl(hdr->bth[1]) & 0xffffff; |
957 | bthbytes = (u8 *) hdr->bth; | 907 | bthbytes = (u8 *) hdr->bth; |
958 | 908 | ||
959 | eflags = ips_get_hdr_err_flags((__le32 *) rc); | 909 | eflags = ipath_hdrget_err_flags((__le32 *) rc); |
960 | etype = ips_get_rcv_type((__le32 *) rc); | 910 | etype = ipath_hdrget_rcv_type((__le32 *) rc); |
961 | /* total length */ | 911 | /* total length */ |
962 | tlen = ips_get_length_in_bytes((__le32 *) rc); | 912 | tlen = ipath_hdrget_length_in_bytes((__le32 *) rc); |
963 | ebuf = NULL; | 913 | ebuf = NULL; |
964 | if (etype != RCVHQ_RCV_TYPE_EXPECTED) { | 914 | if (etype != RCVHQ_RCV_TYPE_EXPECTED) { |
965 | /* | 915 | /* |
@@ -969,7 +919,7 @@ gotmore: | |||
969 | * set ebuf (so we try to copy data) unless the | 919 | * set ebuf (so we try to copy data) unless the |
970 | * length requires it. | 920 | * length requires it. |
971 | */ | 921 | */ |
972 | etail = ips_get_index((__le32 *) rc); | 922 | etail = ipath_hdrget_index((__le32 *) rc); |
973 | if (tlen > sizeof(*hdr) || | 923 | if (tlen > sizeof(*hdr) || |
974 | etype == RCVHQ_RCV_TYPE_NON_KD) | 924 | etype == RCVHQ_RCV_TYPE_NON_KD) |
975 | ebuf = ipath_get_egrbuf(dd, etail, 0); | 925 | ebuf = ipath_get_egrbuf(dd, etail, 0); |
@@ -981,7 +931,7 @@ gotmore: | |||
981 | */ | 931 | */ |
982 | 932 | ||
983 | if (etype != RCVHQ_RCV_TYPE_NON_KD && etype != | 933 | if (etype != RCVHQ_RCV_TYPE_NON_KD && etype != |
984 | RCVHQ_RCV_TYPE_ERROR && ips_get_ipath_ver( | 934 | RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver( |
985 | hdr->iph.ver_port_tid_offset) != | 935 | hdr->iph.ver_port_tid_offset) != |
986 | IPS_PROTO_VERSION) { | 936 | IPS_PROTO_VERSION) { |
987 | ipath_cdbg(PKT, "Bad InfiniPath protocol version " | 937 | ipath_cdbg(PKT, "Bad InfiniPath protocol version " |
@@ -994,7 +944,19 @@ gotmore: | |||
994 | ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u " | 944 | ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u " |
995 | "tlen=%x opcode=%x egridx=%x: %s\n", | 945 | "tlen=%x opcode=%x egridx=%x: %s\n", |
996 | eflags, l, etype, tlen, bthbytes[0], | 946 | eflags, l, etype, tlen, bthbytes[0], |
997 | ips_get_index((__le32 *) rc), emsg); | 947 | ipath_hdrget_index((__le32 *) rc), emsg); |
948 | /* Count local link integrity errors. */ | ||
949 | if (eflags & (INFINIPATH_RHF_H_ICRCERR | | ||
950 | INFINIPATH_RHF_H_VCRCERR)) { | ||
951 | u8 n = (dd->ipath_ibcctrl >> | ||
952 | INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) & | ||
953 | INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK; | ||
954 | |||
955 | if (++dd->ipath_lli_counter > n) { | ||
956 | dd->ipath_lli_counter = 0; | ||
957 | dd->ipath_lli_errors++; | ||
958 | } | ||
959 | } | ||
998 | } else if (etype == RCVHQ_RCV_TYPE_NON_KD) { | 960 | } else if (etype == RCVHQ_RCV_TYPE_NON_KD) { |
999 | int ret = __ipath_verbs_rcv(dd, rc + 1, | 961 | int ret = __ipath_verbs_rcv(dd, rc + 1, |
1000 | ebuf, tlen); | 962 | ebuf, tlen); |
@@ -1002,6 +964,9 @@ gotmore: | |||
1002 | ipath_cdbg(VERBOSE, | 964 | ipath_cdbg(VERBOSE, |
1003 | "received IB packet, " | 965 | "received IB packet, " |
1004 | "not SMA (QP=%x)\n", qp); | 966 | "not SMA (QP=%x)\n", qp); |
967 | if (dd->ipath_lli_counter) | ||
968 | dd->ipath_lli_counter--; | ||
969 | |||
1005 | } else if (etype == RCVHQ_RCV_TYPE_EAGER) { | 970 | } else if (etype == RCVHQ_RCV_TYPE_EAGER) { |
1006 | if (qp == IPATH_KD_QP && | 971 | if (qp == IPATH_KD_QP && |
1007 | bthbytes[0] == ipath_layer_rcv_opcode && | 972 | bthbytes[0] == ipath_layer_rcv_opcode && |
@@ -1054,25 +1019,49 @@ gotmore: | |||
1054 | l += rsize; | 1019 | l += rsize; |
1055 | if (l >= maxcnt) | 1020 | if (l >= maxcnt) |
1056 | l = 0; | 1021 | l = 0; |
1022 | if (etype != RCVHQ_RCV_TYPE_EXPECTED) | ||
1023 | updegr = 1; | ||
1057 | /* | 1024 | /* |
1058 | * update for each packet, to help prevent overflows if we | 1025 | * update head regs on last packet, and every 16 packets. |
1059 | * have lots of packets. | 1026 | * Reduce bus traffic, while still trying to prevent |
1027 | * rcvhdrq overflows, for when the queue is nearly full | ||
1060 | */ | 1028 | */ |
1061 | (void)ipath_write_ureg(dd, ur_rcvhdrhead, | 1029 | if (l == hdrqtail || (i && !(i&0xf))) { |
1062 | dd->ipath_rhdrhead_intr_off | l, 0); | 1030 | u64 lval; |
1063 | if (etype != RCVHQ_RCV_TYPE_EXPECTED) | 1031 | if (l == hdrqtail) /* PE-800 interrupt only on last */ |
1064 | (void)ipath_write_ureg(dd, ur_rcvegrindexhead, | 1032 | lval = dd->ipath_rhdrhead_intr_off | l; |
1065 | etail, 0); | 1033 | else |
1034 | lval = l; | ||
1035 | (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0); | ||
1036 | if (updegr) { | ||
1037 | (void)ipath_write_ureg(dd, ur_rcvegrindexhead, | ||
1038 | etail, 0); | ||
1039 | updegr = 0; | ||
1040 | } | ||
1041 | } | ||
1042 | } | ||
1043 | |||
1044 | if (!dd->ipath_rhdrhead_intr_off && !reloop) { | ||
1045 | /* HT-400 workaround; we can have a race clearing chip | ||
1046 | * interrupt with another interrupt about to be delivered, | ||
1047 | * and can clear it before it is delivered on the GPIO | ||
1048 | * workaround. By doing the extra check here for the | ||
1049 | * in-memory tail register updating while we were doing | ||
1050 | * earlier packets, we "almost" guarantee we have covered | ||
1051 | * that case. | ||
1052 | */ | ||
1053 | u32 hqtail = (u32)le64_to_cpu(*dd->ipath_hdrqtailptr); | ||
1054 | if (hqtail != hdrqtail) { | ||
1055 | hdrqtail = hqtail; | ||
1056 | reloop = 1; /* loop 1 extra time at most */ | ||
1057 | goto reloop; | ||
1058 | } | ||
1066 | } | 1059 | } |
1067 | 1060 | ||
1068 | pkttot += i; | 1061 | pkttot += i; |
1069 | 1062 | ||
1070 | dd->ipath_port0head = l; | 1063 | dd->ipath_port0head = l; |
1071 | 1064 | ||
1072 | if (hdrqtail != (u32)le64_to_cpu(*dd->ipath_hdrqtailptr)) | ||
1073 | /* more arrived while we handled first batch */ | ||
1074 | goto gotmore; | ||
1075 | |||
1076 | if (pkttot > ipath_stats.sps_maxpkts_call) | 1065 | if (pkttot > ipath_stats.sps_maxpkts_call) |
1077 | ipath_stats.sps_maxpkts_call = pkttot; | 1066 | ipath_stats.sps_maxpkts_call = pkttot; |
1078 | ipath_stats.sps_port0pkts += pkttot; | 1067 | ipath_stats.sps_port0pkts += pkttot; |
@@ -1369,26 +1358,20 @@ bail: | |||
1369 | * @dd: the infinipath device | 1358 | * @dd: the infinipath device |
1370 | * @pd: the port data | 1359 | * @pd: the port data |
1371 | * | 1360 | * |
1372 | * this *must* be physically contiguous memory, and for now, | 1361 | * this must be contiguous memory (from an i/o perspective), and must be |
1373 | * that limits it to what kmalloc can do. | 1362 | * DMA'able (which means for some systems, it will go through an IOMMU, |
1363 | * or be forced into a low address range). | ||
1374 | */ | 1364 | */ |
1375 | int ipath_create_rcvhdrq(struct ipath_devdata *dd, | 1365 | int ipath_create_rcvhdrq(struct ipath_devdata *dd, |
1376 | struct ipath_portdata *pd) | 1366 | struct ipath_portdata *pd) |
1377 | { | 1367 | { |
1378 | int ret = 0, amt; | 1368 | int ret = 0; |
1379 | 1369 | ||
1380 | amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * | ||
1381 | sizeof(u32), PAGE_SIZE); | ||
1382 | if (!pd->port_rcvhdrq) { | 1370 | if (!pd->port_rcvhdrq) { |
1383 | /* | 1371 | dma_addr_t phys_hdrqtail; |
1384 | * not using REPEAT isn't viable; at 128KB, we can easily | ||
1385 | * fail this. The problem with REPEAT is we can block here | ||
1386 | * "forever". There isn't an inbetween, unfortunately. We | ||
1387 | * could reduce the risk by never freeing the rcvhdrq except | ||
1388 | * at unload, but even then, the first time a port is used, | ||
1389 | * we could delay for some time... | ||
1390 | */ | ||
1391 | gfp_t gfp_flags = GFP_USER | __GFP_COMP; | 1372 | gfp_t gfp_flags = GFP_USER | __GFP_COMP; |
1373 | int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * | ||
1374 | sizeof(u32), PAGE_SIZE); | ||
1392 | 1375 | ||
1393 | pd->port_rcvhdrq = dma_alloc_coherent( | 1376 | pd->port_rcvhdrq = dma_alloc_coherent( |
1394 | &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys, | 1377 | &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys, |
@@ -1401,6 +1384,16 @@ int ipath_create_rcvhdrq(struct ipath_devdata *dd, | |||
1401 | ret = -ENOMEM; | 1384 | ret = -ENOMEM; |
1402 | goto bail; | 1385 | goto bail; |
1403 | } | 1386 | } |
1387 | pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent( | ||
1388 | &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL); | ||
1389 | if (!pd->port_rcvhdrtail_kvaddr) { | ||
1390 | ipath_dev_err(dd, "attempt to allocate 1 page " | ||
1391 | "for port %u rcvhdrqtailaddr failed\n", | ||
1392 | pd->port_port); | ||
1393 | ret = -ENOMEM; | ||
1394 | goto bail; | ||
1395 | } | ||
1396 | pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail; | ||
1404 | 1397 | ||
1405 | pd->port_rcvhdrq_size = amt; | 1398 | pd->port_rcvhdrq_size = amt; |
1406 | 1399 | ||
@@ -1410,20 +1403,28 @@ int ipath_create_rcvhdrq(struct ipath_devdata *dd, | |||
1410 | (unsigned long) pd->port_rcvhdrq_phys, | 1403 | (unsigned long) pd->port_rcvhdrq_phys, |
1411 | (unsigned long) pd->port_rcvhdrq_size, | 1404 | (unsigned long) pd->port_rcvhdrq_size, |
1412 | pd->port_port); | 1405 | pd->port_port); |
1413 | } else { | 1406 | |
1414 | /* | 1407 | ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n", |
1415 | * clear for security, sanity, and/or debugging, each | 1408 | pd->port_port, |
1416 | * time we reuse | 1409 | (unsigned long long) phys_hdrqtail); |
1417 | */ | ||
1418 | memset(pd->port_rcvhdrq, 0, amt); | ||
1419 | } | 1410 | } |
1411 | else | ||
1412 | ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; " | ||
1413 | "hdrtailaddr@%p %llx physical\n", | ||
1414 | pd->port_port, pd->port_rcvhdrq, | ||
1415 | pd->port_rcvhdrq_phys, pd->port_rcvhdrtail_kvaddr, | ||
1416 | (unsigned long long)pd->port_rcvhdrqtailaddr_phys); | ||
1417 | |||
1418 | /* clear for security and sanity on each use */ | ||
1419 | memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size); | ||
1420 | memset((void *)pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE); | ||
1420 | 1421 | ||
1421 | /* | 1422 | /* |
1422 | * tell chip each time we init it, even if we are re-using previous | 1423 | * tell chip each time we init it, even if we are re-using previous |
1423 | * memory (we zero it at process close) | 1424 | * memory (we zero the register at process close) |
1424 | */ | 1425 | */ |
1425 | ipath_cdbg(VERBOSE, "writing port %d rcvhdraddr as %lx\n", | 1426 | ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr, |
1426 | pd->port_port, (unsigned long) pd->port_rcvhdrq_phys); | 1427 | pd->port_port, pd->port_rcvhdrqtailaddr_phys); |
1427 | ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr, | 1428 | ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr, |
1428 | pd->port_port, pd->port_rcvhdrq_phys); | 1429 | pd->port_port, pd->port_rcvhdrq_phys); |
1429 | 1430 | ||
@@ -1511,15 +1512,27 @@ void ipath_set_ib_lstate(struct ipath_devdata *dd, int which) | |||
1511 | [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED", | 1512 | [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED", |
1512 | [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE" | 1513 | [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE" |
1513 | }; | 1514 | }; |
1515 | int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) & | ||
1516 | INFINIPATH_IBCC_LINKCMD_MASK; | ||
1517 | |||
1514 | ipath_cdbg(SMA, "Trying to move unit %u to %s, current ltstate " | 1518 | ipath_cdbg(SMA, "Trying to move unit %u to %s, current ltstate " |
1515 | "is %s\n", dd->ipath_unit, | 1519 | "is %s\n", dd->ipath_unit, |
1516 | what[(which >> INFINIPATH_IBCC_LINKCMD_SHIFT) & | 1520 | what[linkcmd], |
1517 | INFINIPATH_IBCC_LINKCMD_MASK], | ||
1518 | ipath_ibcstatus_str[ | 1521 | ipath_ibcstatus_str[ |
1519 | (ipath_read_kreg64 | 1522 | (ipath_read_kreg64 |
1520 | (dd, dd->ipath_kregs->kr_ibcstatus) >> | 1523 | (dd, dd->ipath_kregs->kr_ibcstatus) >> |
1521 | INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) & | 1524 | INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) & |
1522 | INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]); | 1525 | INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]); |
1526 | /* flush all queued sends when going to DOWN or INIT, to be sure that | ||
1527 | * they don't block SMA and other MAD packets */ | ||
1528 | if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT) { | ||
1529 | ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, | ||
1530 | INFINIPATH_S_ABORT); | ||
1531 | ipath_disarm_piobufs(dd, dd->ipath_lastport_piobuf, | ||
1532 | (unsigned)(dd->ipath_piobcnt2k + | ||
1533 | dd->ipath_piobcnt4k) - | ||
1534 | dd->ipath_lastport_piobuf); | ||
1535 | } | ||
1523 | 1536 | ||
1524 | ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, | 1537 | ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, |
1525 | dd->ipath_ibcctrl | which); | 1538 | dd->ipath_ibcctrl | which); |
@@ -1638,7 +1651,7 @@ void ipath_shutdown_device(struct ipath_devdata *dd) | |||
1638 | /* disable IBC */ | 1651 | /* disable IBC */ |
1639 | dd->ipath_control &= ~INFINIPATH_C_LINKENABLE; | 1652 | dd->ipath_control &= ~INFINIPATH_C_LINKENABLE; |
1640 | ipath_write_kreg(dd, dd->ipath_kregs->kr_control, | 1653 | ipath_write_kreg(dd, dd->ipath_kregs->kr_control, |
1641 | dd->ipath_control); | 1654 | dd->ipath_control | INFINIPATH_C_FREEZEMODE); |
1642 | 1655 | ||
1643 | /* | 1656 | /* |
1644 | * clear SerdesEnable and turn the leds off; do this here because | 1657 | * clear SerdesEnable and turn the leds off; do this here because |
@@ -1667,60 +1680,54 @@ void ipath_shutdown_device(struct ipath_devdata *dd) | |||
1667 | /** | 1680 | /** |
1668 | * ipath_free_pddata - free a port's allocated data | 1681 | * ipath_free_pddata - free a port's allocated data |
1669 | * @dd: the infinipath device | 1682 | * @dd: the infinipath device |
1670 | * @port: the port | 1683 | * @pd: the portdata structure |
1671 | * @freehdrq: free the port data structure if true | ||
1672 | * | 1684 | * |
1673 | * when closing, free up any allocated data for a port, if the | 1685 | * free up any allocated data for a port |
1674 | * reference count goes to zero | 1686 | * This should not touch anything that would affect a simultaneous |
1675 | * Note: this also optionally frees the portdata itself! | 1687 | * re-allocation of port data, because it is called after ipath_mutex |
1676 | * Any changes here have to be matched up with the reinit case | 1688 | * is released (and can be called from reinit as well). |
1677 | * of ipath_init_chip(), which calls this routine on reinit after reset. | 1689 | * It should never change any chip state, or global driver state. |
1690 | * (The only exception to global state is freeing the port0 port0_skbs.) | ||
1678 | */ | 1691 | */ |
1679 | void ipath_free_pddata(struct ipath_devdata *dd, u32 port, int freehdrq) | 1692 | void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd) |
1680 | { | 1693 | { |
1681 | struct ipath_portdata *pd = dd->ipath_pd[port]; | ||
1682 | |||
1683 | if (!pd) | 1694 | if (!pd) |
1684 | return; | 1695 | return; |
1685 | if (freehdrq) | 1696 | |
1686 | /* | 1697 | if (pd->port_rcvhdrq) { |
1687 | * only clear and free portdata if we are going to also | ||
1688 | * release the hdrq, otherwise we leak the hdrq on each | ||
1689 | * open/close cycle | ||
1690 | */ | ||
1691 | dd->ipath_pd[port] = NULL; | ||
1692 | if (freehdrq && pd->port_rcvhdrq) { | ||
1693 | ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p " | 1698 | ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p " |
1694 | "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq, | 1699 | "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq, |
1695 | (unsigned long) pd->port_rcvhdrq_size); | 1700 | (unsigned long) pd->port_rcvhdrq_size); |
1696 | dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size, | 1701 | dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size, |
1697 | pd->port_rcvhdrq, pd->port_rcvhdrq_phys); | 1702 | pd->port_rcvhdrq, pd->port_rcvhdrq_phys); |
1698 | pd->port_rcvhdrq = NULL; | 1703 | pd->port_rcvhdrq = NULL; |
1704 | if (pd->port_rcvhdrtail_kvaddr) { | ||
1705 | dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, | ||
1706 | (void *)pd->port_rcvhdrtail_kvaddr, | ||
1707 | pd->port_rcvhdrqtailaddr_phys); | ||
1708 | pd->port_rcvhdrtail_kvaddr = NULL; | ||
1709 | } | ||
1699 | } | 1710 | } |
1700 | if (port && pd->port_rcvegrbuf) { | 1711 | if (pd->port_port && pd->port_rcvegrbuf) { |
1701 | /* always free this */ | 1712 | unsigned e; |
1702 | if (pd->port_rcvegrbuf) { | 1713 | |
1703 | unsigned e; | 1714 | for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) { |
1704 | 1715 | void *base = pd->port_rcvegrbuf[e]; | |
1705 | for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) { | 1716 | size_t size = pd->port_rcvegrbuf_size; |
1706 | void *base = pd->port_rcvegrbuf[e]; | 1717 | |
1707 | size_t size = pd->port_rcvegrbuf_size; | 1718 | ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), " |
1708 | 1719 | "chunk %u/%u\n", base, | |
1709 | ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), " | 1720 | (unsigned long) size, |
1710 | "chunk %u/%u\n", base, | 1721 | e, pd->port_rcvegrbuf_chunks); |
1711 | (unsigned long) size, | 1722 | dma_free_coherent(&dd->pcidev->dev, size, |
1712 | e, pd->port_rcvegrbuf_chunks); | 1723 | base, pd->port_rcvegrbuf_phys[e]); |
1713 | dma_free_coherent( | ||
1714 | &dd->pcidev->dev, size, base, | ||
1715 | pd->port_rcvegrbuf_phys[e]); | ||
1716 | } | ||
1717 | vfree(pd->port_rcvegrbuf); | ||
1718 | pd->port_rcvegrbuf = NULL; | ||
1719 | vfree(pd->port_rcvegrbuf_phys); | ||
1720 | pd->port_rcvegrbuf_phys = NULL; | ||
1721 | } | 1724 | } |
1725 | vfree(pd->port_rcvegrbuf); | ||
1726 | pd->port_rcvegrbuf = NULL; | ||
1727 | vfree(pd->port_rcvegrbuf_phys); | ||
1728 | pd->port_rcvegrbuf_phys = NULL; | ||
1722 | pd->port_rcvegrbuf_chunks = 0; | 1729 | pd->port_rcvegrbuf_chunks = 0; |
1723 | } else if (port == 0 && dd->ipath_port0_skbs) { | 1730 | } else if (pd->port_port == 0 && dd->ipath_port0_skbs) { |
1724 | unsigned e; | 1731 | unsigned e; |
1725 | struct sk_buff **skbs = dd->ipath_port0_skbs; | 1732 | struct sk_buff **skbs = dd->ipath_port0_skbs; |
1726 | 1733 | ||
@@ -1732,10 +1739,8 @@ void ipath_free_pddata(struct ipath_devdata *dd, u32 port, int freehdrq) | |||
1732 | dev_kfree_skb(skbs[e]); | 1739 | dev_kfree_skb(skbs[e]); |
1733 | vfree(skbs); | 1740 | vfree(skbs); |
1734 | } | 1741 | } |
1735 | if (freehdrq) { | 1742 | kfree(pd->port_tid_pg_list); |
1736 | kfree(pd->port_tid_pg_list); | 1743 | kfree(pd); |
1737 | kfree(pd); | ||
1738 | } | ||
1739 | } | 1744 | } |
1740 | 1745 | ||
1741 | static int __init infinipath_init(void) | 1746 | static int __init infinipath_init(void) |
@@ -1806,7 +1811,6 @@ static void cleanup_device(struct ipath_devdata *dd) | |||
1806 | * re-init | 1811 | * re-init |
1807 | */ | 1812 | */ |
1808 | dd->ipath_kregbase = NULL; | 1813 | dd->ipath_kregbase = NULL; |
1809 | dd->ipath_kregvirt = NULL; | ||
1810 | dd->ipath_uregbase = 0; | 1814 | dd->ipath_uregbase = 0; |
1811 | dd->ipath_sregbase = 0; | 1815 | dd->ipath_sregbase = 0; |
1812 | dd->ipath_cregbase = 0; | 1816 | dd->ipath_cregbase = 0; |
@@ -1821,6 +1825,12 @@ static void cleanup_device(struct ipath_devdata *dd) | |||
1821 | dd->ipath_pioavailregs_phys); | 1825 | dd->ipath_pioavailregs_phys); |
1822 | dd->ipath_pioavailregs_dma = NULL; | 1826 | dd->ipath_pioavailregs_dma = NULL; |
1823 | } | 1827 | } |
1828 | if (dd->ipath_dummy_hdrq) { | ||
1829 | dma_free_coherent(&dd->pcidev->dev, | ||
1830 | dd->ipath_pd[0]->port_rcvhdrq_size, | ||
1831 | dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys); | ||
1832 | dd->ipath_dummy_hdrq = NULL; | ||
1833 | } | ||
1824 | 1834 | ||
1825 | if (dd->ipath_pageshadow) { | 1835 | if (dd->ipath_pageshadow) { |
1826 | struct page **tmpp = dd->ipath_pageshadow; | 1836 | struct page **tmpp = dd->ipath_pageshadow; |
@@ -1861,10 +1871,14 @@ static void cleanup_device(struct ipath_devdata *dd) | |||
1861 | 1871 | ||
1862 | /* | 1872 | /* |
1863 | * free any resources still in use (usually just kernel ports) | 1873 | * free any resources still in use (usually just kernel ports) |
1864 | * at unload | 1874 | * at unload; we do for portcnt, not cfgports, because cfgports |
1875 | * could have changed while we were loaded. | ||
1865 | */ | 1876 | */ |
1866 | for (port = 0; port < dd->ipath_cfgports; port++) | 1877 | for (port = 0; port < dd->ipath_portcnt; port++) { |
1867 | ipath_free_pddata(dd, port, 1); | 1878 | struct ipath_portdata *pd = dd->ipath_pd[port]; |
1879 | dd->ipath_pd[port] = NULL; | ||
1880 | ipath_free_pddata(dd, pd); | ||
1881 | } | ||
1868 | kfree(dd->ipath_pd); | 1882 | kfree(dd->ipath_pd); |
1869 | /* | 1883 | /* |
1870 | * debuggability, in case some cleanup path tries to use it | 1884 | * debuggability, in case some cleanup path tries to use it |