diff options
Diffstat (limited to 'drivers/infiniband/hw/ehca/hcp_if.c')
-rw-r--r-- | drivers/infiniband/hw/ehca/hcp_if.c | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/drivers/infiniband/hw/ehca/hcp_if.c b/drivers/infiniband/hw/ehca/hcp_if.c index 358796ccf008..fdbfebea7d11 100644 --- a/drivers/infiniband/hw/ehca/hcp_if.c +++ b/drivers/infiniband/hw/ehca/hcp_if.c | |||
@@ -52,10 +52,13 @@ | |||
52 | #define H_ALL_RES_QP_ENHANCED_OPS EHCA_BMASK_IBM(9, 11) | 52 | #define H_ALL_RES_QP_ENHANCED_OPS EHCA_BMASK_IBM(9, 11) |
53 | #define H_ALL_RES_QP_PTE_PIN EHCA_BMASK_IBM(12, 12) | 53 | #define H_ALL_RES_QP_PTE_PIN EHCA_BMASK_IBM(12, 12) |
54 | #define H_ALL_RES_QP_SERVICE_TYPE EHCA_BMASK_IBM(13, 15) | 54 | #define H_ALL_RES_QP_SERVICE_TYPE EHCA_BMASK_IBM(13, 15) |
55 | #define H_ALL_RES_QP_STORAGE EHCA_BMASK_IBM(16, 17) | ||
55 | #define H_ALL_RES_QP_LL_RQ_CQE_POSTING EHCA_BMASK_IBM(18, 18) | 56 | #define H_ALL_RES_QP_LL_RQ_CQE_POSTING EHCA_BMASK_IBM(18, 18) |
56 | #define H_ALL_RES_QP_LL_SQ_CQE_POSTING EHCA_BMASK_IBM(19, 21) | 57 | #define H_ALL_RES_QP_LL_SQ_CQE_POSTING EHCA_BMASK_IBM(19, 21) |
57 | #define H_ALL_RES_QP_SIGNALING_TYPE EHCA_BMASK_IBM(22, 23) | 58 | #define H_ALL_RES_QP_SIGNALING_TYPE EHCA_BMASK_IBM(22, 23) |
58 | #define H_ALL_RES_QP_UD_AV_LKEY_CTRL EHCA_BMASK_IBM(31, 31) | 59 | #define H_ALL_RES_QP_UD_AV_LKEY_CTRL EHCA_BMASK_IBM(31, 31) |
60 | #define H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE EHCA_BMASK_IBM(32, 35) | ||
61 | #define H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE EHCA_BMASK_IBM(36, 39) | ||
59 | #define H_ALL_RES_QP_RESOURCE_TYPE EHCA_BMASK_IBM(56, 63) | 62 | #define H_ALL_RES_QP_RESOURCE_TYPE EHCA_BMASK_IBM(56, 63) |
60 | 63 | ||
61 | #define H_ALL_RES_QP_MAX_OUTST_SEND_WR EHCA_BMASK_IBM(0, 15) | 64 | #define H_ALL_RES_QP_MAX_OUTST_SEND_WR EHCA_BMASK_IBM(0, 15) |
@@ -299,6 +302,11 @@ u64 hipz_h_alloc_resource_qp(const struct ipz_adapter_handle adapter_handle, | |||
299 | | EHCA_BMASK_SET(H_ALL_RES_QP_PTE_PIN, 0) | 302 | | EHCA_BMASK_SET(H_ALL_RES_QP_PTE_PIN, 0) |
300 | | EHCA_BMASK_SET(H_ALL_RES_QP_SERVICE_TYPE, parms->servicetype) | 303 | | EHCA_BMASK_SET(H_ALL_RES_QP_SERVICE_TYPE, parms->servicetype) |
301 | | EHCA_BMASK_SET(H_ALL_RES_QP_SIGNALING_TYPE, parms->sigtype) | 304 | | EHCA_BMASK_SET(H_ALL_RES_QP_SIGNALING_TYPE, parms->sigtype) |
305 | | EHCA_BMASK_SET(H_ALL_RES_QP_STORAGE, parms->qp_storage) | ||
306 | | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_SQ_PAGE_SIZE, | ||
307 | parms->squeue.page_size) | ||
308 | | EHCA_BMASK_SET(H_ALL_RES_QP_SMALL_RQ_PAGE_SIZE, | ||
309 | parms->rqueue.page_size) | ||
302 | | EHCA_BMASK_SET(H_ALL_RES_QP_LL_RQ_CQE_POSTING, | 310 | | EHCA_BMASK_SET(H_ALL_RES_QP_LL_RQ_CQE_POSTING, |
303 | !!(parms->ll_comp_flags & LLQP_RECV_COMP)) | 311 | !!(parms->ll_comp_flags & LLQP_RECV_COMP)) |
304 | | EHCA_BMASK_SET(H_ALL_RES_QP_LL_SQ_CQE_POSTING, | 312 | | EHCA_BMASK_SET(H_ALL_RES_QP_LL_SQ_CQE_POSTING, |
@@ -309,13 +317,13 @@ u64 hipz_h_alloc_resource_qp(const struct ipz_adapter_handle adapter_handle, | |||
309 | 317 | ||
310 | max_r10_reg = | 318 | max_r10_reg = |
311 | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_SEND_WR, | 319 | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_SEND_WR, |
312 | parms->max_send_wr + 1) | 320 | parms->squeue.max_wr + 1) |
313 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_RECV_WR, | 321 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_OUTST_RECV_WR, |
314 | parms->max_recv_wr + 1) | 322 | parms->rqueue.max_wr + 1) |
315 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_SEND_SGE, | 323 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_SEND_SGE, |
316 | parms->max_send_sge) | 324 | parms->squeue.max_sge) |
317 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_RECV_SGE, | 325 | | EHCA_BMASK_SET(H_ALL_RES_QP_MAX_RECV_SGE, |
318 | parms->max_recv_sge); | 326 | parms->rqueue.max_sge); |
319 | 327 | ||
320 | r11 = EHCA_BMASK_SET(H_ALL_RES_QP_SRQ_QP_TOKEN, parms->srq_token); | 328 | r11 = EHCA_BMASK_SET(H_ALL_RES_QP_SRQ_QP_TOKEN, parms->srq_token); |
321 | 329 | ||
@@ -335,17 +343,17 @@ u64 hipz_h_alloc_resource_qp(const struct ipz_adapter_handle adapter_handle, | |||
335 | 343 | ||
336 | parms->qp_handle.handle = outs[0]; | 344 | parms->qp_handle.handle = outs[0]; |
337 | parms->real_qp_num = (u32)outs[1]; | 345 | parms->real_qp_num = (u32)outs[1]; |
338 | parms->act_nr_send_wqes = | 346 | parms->squeue.act_nr_wqes = |
339 | (u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_SEND_WR, outs[2]); | 347 | (u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_SEND_WR, outs[2]); |
340 | parms->act_nr_recv_wqes = | 348 | parms->rqueue.act_nr_wqes = |
341 | (u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_RECV_WR, outs[2]); | 349 | (u16)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_OUTST_RECV_WR, outs[2]); |
342 | parms->act_nr_send_sges = | 350 | parms->squeue.act_nr_sges = |
343 | (u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_SEND_SGE, outs[3]); | 351 | (u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_SEND_SGE, outs[3]); |
344 | parms->act_nr_recv_sges = | 352 | parms->rqueue.act_nr_sges = |
345 | (u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_RECV_SGE, outs[3]); | 353 | (u8)EHCA_BMASK_GET(H_ALL_RES_QP_ACT_RECV_SGE, outs[3]); |
346 | parms->nr_sq_pages = | 354 | parms->squeue.queue_size = |
347 | (u32)EHCA_BMASK_GET(H_ALL_RES_QP_SQUEUE_SIZE_PAGES, outs[4]); | 355 | (u32)EHCA_BMASK_GET(H_ALL_RES_QP_SQUEUE_SIZE_PAGES, outs[4]); |
348 | parms->nr_rq_pages = | 356 | parms->rqueue.queue_size = |
349 | (u32)EHCA_BMASK_GET(H_ALL_RES_QP_RQUEUE_SIZE_PAGES, outs[4]); | 357 | (u32)EHCA_BMASK_GET(H_ALL_RES_QP_RQUEUE_SIZE_PAGES, outs[4]); |
350 | 358 | ||
351 | if (ret == H_SUCCESS) | 359 | if (ret == H_SUCCESS) |
@@ -497,7 +505,7 @@ u64 hipz_h_register_rpage_qp(const struct ipz_adapter_handle adapter_handle, | |||
497 | const u64 count, | 505 | const u64 count, |
498 | const struct h_galpa galpa) | 506 | const struct h_galpa galpa) |
499 | { | 507 | { |
500 | if (count != 1) { | 508 | if (count > 1) { |
501 | ehca_gen_err("Page counter=%lx", count); | 509 | ehca_gen_err("Page counter=%lx", count); |
502 | return H_PARAMETER; | 510 | return H_PARAMETER; |
503 | } | 511 | } |