diff options
Diffstat (limited to 'drivers/infiniband/hw/cxgb3')
-rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_hal.c | 30 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_hal.h | 3 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_wr.h | 6 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_cm.c | 3 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_ev.c | 5 | ||||
-rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_qp.c | 17 |
6 files changed, 47 insertions, 17 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c index 11efd3528ce4..a4a82bff7100 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.c +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
@@ -450,7 +450,7 @@ static int cqe_completes_wr(struct t3_cqe *cqe, struct t3_wq *wq) | |||
450 | if ((CQE_OPCODE(*cqe) == T3_READ_RESP) && SQ_TYPE(*cqe)) | 450 | if ((CQE_OPCODE(*cqe) == T3_READ_RESP) && SQ_TYPE(*cqe)) |
451 | return 0; | 451 | return 0; |
452 | 452 | ||
453 | if ((CQE_OPCODE(*cqe) == T3_SEND) && RQ_TYPE(*cqe) && | 453 | if (CQE_SEND_OPCODE(*cqe) && RQ_TYPE(*cqe) && |
454 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) | 454 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) |
455 | return 0; | 455 | return 0; |
456 | 456 | ||
@@ -941,6 +941,23 @@ int cxio_rdev_open(struct cxio_rdev *rdev_p) | |||
941 | if (!rdev_p->t3cdev_p) | 941 | if (!rdev_p->t3cdev_p) |
942 | rdev_p->t3cdev_p = dev2t3cdev(netdev_p); | 942 | rdev_p->t3cdev_p = dev2t3cdev(netdev_p); |
943 | rdev_p->t3cdev_p->ulp = (void *) rdev_p; | 943 | rdev_p->t3cdev_p->ulp = (void *) rdev_p; |
944 | |||
945 | err = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, GET_EMBEDDED_INFO, | ||
946 | &(rdev_p->fw_info)); | ||
947 | if (err) { | ||
948 | printk(KERN_ERR "%s t3cdev_p(%p)->ctl returned error %d.\n", | ||
949 | __func__, rdev_p->t3cdev_p, err); | ||
950 | goto err1; | ||
951 | } | ||
952 | if (G_FW_VERSION_MAJOR(rdev_p->fw_info.fw_vers) != CXIO_FW_MAJ) { | ||
953 | printk(KERN_ERR MOD "fatal firmware version mismatch: " | ||
954 | "need version %u but adapter has version %u\n", | ||
955 | CXIO_FW_MAJ, | ||
956 | G_FW_VERSION_MAJOR(rdev_p->fw_info.fw_vers)); | ||
957 | err = -EINVAL; | ||
958 | goto err1; | ||
959 | } | ||
960 | |||
944 | err = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_GET_PARAMS, | 961 | err = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_GET_PARAMS, |
945 | &(rdev_p->rnic_info)); | 962 | &(rdev_p->rnic_info)); |
946 | if (err) { | 963 | if (err) { |
@@ -1207,11 +1224,12 @@ int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe, | |||
1207 | } | 1224 | } |
1208 | 1225 | ||
1209 | /* incoming SEND with no receive posted failures */ | 1226 | /* incoming SEND with no receive posted failures */ |
1210 | if ((CQE_OPCODE(*hw_cqe) == T3_SEND) && RQ_TYPE(*hw_cqe) && | 1227 | if (CQE_SEND_OPCODE(*hw_cqe) && RQ_TYPE(*hw_cqe) && |
1211 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) { | 1228 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) { |
1212 | ret = -1; | 1229 | ret = -1; |
1213 | goto skip_cqe; | 1230 | goto skip_cqe; |
1214 | } | 1231 | } |
1232 | BUG_ON((*cqe_flushed == 0) && !SW_CQE(*hw_cqe)); | ||
1215 | goto proc_cqe; | 1233 | goto proc_cqe; |
1216 | } | 1234 | } |
1217 | 1235 | ||
@@ -1226,6 +1244,13 @@ int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe, | |||
1226 | * then we complete this with TPT_ERR_MSN and mark the wq in | 1244 | * then we complete this with TPT_ERR_MSN and mark the wq in |
1227 | * error. | 1245 | * error. |
1228 | */ | 1246 | */ |
1247 | |||
1248 | if (Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) { | ||
1249 | wq->error = 1; | ||
1250 | ret = -1; | ||
1251 | goto skip_cqe; | ||
1252 | } | ||
1253 | |||
1229 | if (unlikely((CQE_WRID_MSN(*hw_cqe) != (wq->rq_rptr + 1)))) { | 1254 | if (unlikely((CQE_WRID_MSN(*hw_cqe) != (wq->rq_rptr + 1)))) { |
1230 | wq->error = 1; | 1255 | wq->error = 1; |
1231 | hw_cqe->header |= htonl(V_CQE_STATUS(TPT_ERR_MSN)); | 1256 | hw_cqe->header |= htonl(V_CQE_STATUS(TPT_ERR_MSN)); |
@@ -1280,6 +1305,7 @@ proc_cqe: | |||
1280 | cxio_hal_pblpool_free(wq->rdev, | 1305 | cxio_hal_pblpool_free(wq->rdev, |
1281 | wq->rq[Q_PTR2IDX(wq->rq_rptr, | 1306 | wq->rq[Q_PTR2IDX(wq->rq_rptr, |
1282 | wq->rq_size_log2)].pbl_addr, T3_STAG0_PBL_SIZE); | 1307 | wq->rq_size_log2)].pbl_addr, T3_STAG0_PBL_SIZE); |
1308 | BUG_ON(Q_EMPTY(wq->rq_rptr, wq->rq_wptr)); | ||
1283 | wq->rq_rptr++; | 1309 | wq->rq_rptr++; |
1284 | } | 1310 | } |
1285 | 1311 | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h index 9ed65b055171..094a66d1480c 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.h +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h | |||
@@ -61,6 +61,8 @@ | |||
61 | 61 | ||
62 | #define T3_MAX_DEV_NAME_LEN 32 | 62 | #define T3_MAX_DEV_NAME_LEN 32 |
63 | 63 | ||
64 | #define CXIO_FW_MAJ 7 | ||
65 | |||
64 | struct cxio_hal_ctrl_qp { | 66 | struct cxio_hal_ctrl_qp { |
65 | u32 wptr; | 67 | u32 wptr; |
66 | u32 rptr; | 68 | u32 rptr; |
@@ -108,6 +110,7 @@ struct cxio_rdev { | |||
108 | struct gen_pool *pbl_pool; | 110 | struct gen_pool *pbl_pool; |
109 | struct gen_pool *rqt_pool; | 111 | struct gen_pool *rqt_pool; |
110 | struct list_head entry; | 112 | struct list_head entry; |
113 | struct ch_embedded_info fw_info; | ||
111 | u32 flags; | 114 | u32 flags; |
112 | #define CXIO_ERROR_FATAL 1 | 115 | #define CXIO_ERROR_FATAL 1 |
113 | }; | 116 | }; |
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h index 04618f7bfbb3..ff9be1a13106 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_wr.h +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
@@ -604,6 +604,12 @@ struct t3_cqe { | |||
604 | #define CQE_STATUS(x) (G_CQE_STATUS(be32_to_cpu((x).header))) | 604 | #define CQE_STATUS(x) (G_CQE_STATUS(be32_to_cpu((x).header))) |
605 | #define CQE_OPCODE(x) (G_CQE_OPCODE(be32_to_cpu((x).header))) | 605 | #define CQE_OPCODE(x) (G_CQE_OPCODE(be32_to_cpu((x).header))) |
606 | 606 | ||
607 | #define CQE_SEND_OPCODE(x)( \ | ||
608 | (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND) || \ | ||
609 | (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_SE) || \ | ||
610 | (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_INV) || \ | ||
611 | (G_CQE_OPCODE(be32_to_cpu((x).header)) == T3_SEND_WITH_SE_INV)) | ||
612 | |||
607 | #define CQE_LEN(x) (be32_to_cpu((x).len)) | 613 | #define CQE_LEN(x) (be32_to_cpu((x).len)) |
608 | 614 | ||
609 | /* used for RQ completion processing */ | 615 | /* used for RQ completion processing */ |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c index 44e936e48a31..8699947aaf6c 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_cm.c +++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c | |||
@@ -1678,6 +1678,9 @@ static int terminate(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | |||
1678 | { | 1678 | { |
1679 | struct iwch_ep *ep = ctx; | 1679 | struct iwch_ep *ep = ctx; |
1680 | 1680 | ||
1681 | if (state_read(&ep->com) != FPDU_MODE) | ||
1682 | return CPL_RET_BUF_DONE; | ||
1683 | |||
1681 | PDBG("%s ep %p\n", __func__, ep); | 1684 | PDBG("%s ep %p\n", __func__, ep); |
1682 | skb_pull(skb, sizeof(struct cpl_rdma_terminate)); | 1685 | skb_pull(skb, sizeof(struct cpl_rdma_terminate)); |
1683 | PDBG("%s saving %d bytes of term msg\n", __func__, skb->len); | 1686 | PDBG("%s saving %d bytes of term msg\n", __func__, skb->len); |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_ev.c b/drivers/infiniband/hw/cxgb3/iwch_ev.c index 7b67a6771720..743c5d8b8806 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_ev.c +++ b/drivers/infiniband/hw/cxgb3/iwch_ev.c | |||
@@ -179,11 +179,6 @@ void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb) | |||
179 | case TPT_ERR_BOUND: | 179 | case TPT_ERR_BOUND: |
180 | case TPT_ERR_INVALIDATE_SHARED_MR: | 180 | case TPT_ERR_INVALIDATE_SHARED_MR: |
181 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | 181 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: |
182 | printk(KERN_ERR "%s - CQE Err qpid 0x%x opcode %d status 0x%x " | ||
183 | "type %d wrid.hi 0x%x wrid.lo 0x%x \n", __func__, | ||
184 | CQE_QPID(rsp_msg->cqe), CQE_OPCODE(rsp_msg->cqe), | ||
185 | CQE_STATUS(rsp_msg->cqe), CQE_TYPE(rsp_msg->cqe), | ||
186 | CQE_WRID_HI(rsp_msg->cqe), CQE_WRID_LOW(rsp_msg->cqe)); | ||
187 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); | 182 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); |
188 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); | 183 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); |
189 | break; | 184 | break; |
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c index 19661b2f0406..c758fbd58478 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_qp.c +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
@@ -99,8 +99,8 @@ static int build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, | |||
99 | if (wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) { | 99 | if (wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) { |
100 | plen = 4; | 100 | plen = 4; |
101 | wqe->write.sgl[0].stag = wr->ex.imm_data; | 101 | wqe->write.sgl[0].stag = wr->ex.imm_data; |
102 | wqe->write.sgl[0].len = __constant_cpu_to_be32(0); | 102 | wqe->write.sgl[0].len = cpu_to_be32(0); |
103 | wqe->write.num_sgle = __constant_cpu_to_be32(0); | 103 | wqe->write.num_sgle = cpu_to_be32(0); |
104 | *flit_cnt = 6; | 104 | *flit_cnt = 6; |
105 | } else { | 105 | } else { |
106 | plen = 0; | 106 | plen = 0; |
@@ -195,15 +195,12 @@ static int build_inv_stag(union t3_wr *wqe, struct ib_send_wr *wr, | |||
195 | return 0; | 195 | return 0; |
196 | } | 196 | } |
197 | 197 | ||
198 | /* | ||
199 | * TBD: this is going to be moved to firmware. Missing pdid/qpid check for now. | ||
200 | */ | ||
201 | static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list, | 198 | static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list, |
202 | u32 num_sgle, u32 * pbl_addr, u8 * page_size) | 199 | u32 num_sgle, u32 * pbl_addr, u8 * page_size) |
203 | { | 200 | { |
204 | int i; | 201 | int i; |
205 | struct iwch_mr *mhp; | 202 | struct iwch_mr *mhp; |
206 | u32 offset; | 203 | u64 offset; |
207 | for (i = 0; i < num_sgle; i++) { | 204 | for (i = 0; i < num_sgle; i++) { |
208 | 205 | ||
209 | mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8); | 206 | mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8); |
@@ -235,8 +232,8 @@ static int iwch_sgl2pbl_map(struct iwch_dev *rhp, struct ib_sge *sg_list, | |||
235 | return -EINVAL; | 232 | return -EINVAL; |
236 | } | 233 | } |
237 | offset = sg_list[i].addr - mhp->attr.va_fbo; | 234 | offset = sg_list[i].addr - mhp->attr.va_fbo; |
238 | offset += ((u32) mhp->attr.va_fbo) % | 235 | offset += mhp->attr.va_fbo & |
239 | (1UL << (12 + mhp->attr.page_size)); | 236 | ((1UL << (12 + mhp->attr.page_size)) - 1); |
240 | pbl_addr[i] = ((mhp->attr.pbl_addr - | 237 | pbl_addr[i] = ((mhp->attr.pbl_addr - |
241 | rhp->rdev.rnic_info.pbl_base) >> 3) + | 238 | rhp->rdev.rnic_info.pbl_base) >> 3) + |
242 | (offset >> (12 + mhp->attr.page_size)); | 239 | (offset >> (12 + mhp->attr.page_size)); |
@@ -266,8 +263,8 @@ static int build_rdma_recv(struct iwch_qp *qhp, union t3_wr *wqe, | |||
266 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); | 263 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); |
267 | 264 | ||
268 | /* to in the WQE == the offset into the page */ | 265 | /* to in the WQE == the offset into the page */ |
269 | wqe->recv.sgl[i].to = cpu_to_be64(((u32) wr->sg_list[i].addr) % | 266 | wqe->recv.sgl[i].to = cpu_to_be64(((u32)wr->sg_list[i].addr) & |
270 | (1UL << (12 + page_size[i]))); | 267 | ((1UL << (12 + page_size[i])) - 1)); |
271 | 268 | ||
272 | /* pbl_addr is the adapters address in the PBL */ | 269 | /* pbl_addr is the adapters address in the PBL */ |
273 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_addr[i]); | 270 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_addr[i]); |