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-rw-r--r--drivers/iio/accel/Kconfig24
-rw-r--r--drivers/iio/accel/Makefile1
-rw-r--r--drivers/iio/accel/bma180.c476
-rw-r--r--drivers/iio/accel/bmc150-accel.c1430
-rw-r--r--drivers/iio/accel/hid-sensor-accel-3d.c1
-rw-r--r--drivers/iio/accel/kxcjk-1013.c873
-rw-r--r--drivers/iio/adc/Kconfig22
-rw-r--r--drivers/iio/adc/Makefile2
-rw-r--r--drivers/iio/adc/at91_adc.c2
-rw-r--r--drivers/iio/adc/exynos_adc.c138
-rw-r--r--drivers/iio/adc/lp8788_adc.c1
-rw-r--r--drivers/iio/adc/rockchip_saradc.c316
-rw-r--r--drivers/iio/adc/ti-adc128s052.c179
-rw-r--r--drivers/iio/adc/ti_am335x_adc.c1
-rw-r--r--drivers/iio/adc/twl4030-madc.c1
-rw-r--r--drivers/iio/adc/twl6030-gpadc.c1
-rw-r--r--drivers/iio/adc/vf610_adc.c1
-rw-r--r--drivers/iio/adc/viperboard_adc.c1
-rw-r--r--drivers/iio/adc/xilinx-xadc-core.c9
-rw-r--r--drivers/iio/common/st_sensors/st_sensors_buffer.c2
-rw-r--r--drivers/iio/common/st_sensors/st_sensors_core.c5
-rw-r--r--drivers/iio/dac/Kconfig8
-rw-r--r--drivers/iio/dac/Makefile1
-rw-r--r--drivers/iio/dac/max5821.c405
-rw-r--r--drivers/iio/gyro/Kconfig11
-rw-r--r--drivers/iio/gyro/Makefile1
-rw-r--r--drivers/iio/gyro/bmg160.c1228
-rw-r--r--drivers/iio/gyro/hid-sensor-gyro-3d.c1
-rw-r--r--drivers/iio/humidity/dht11.c1
-rw-r--r--drivers/iio/imu/inv_mpu6050/inv_mpu_core.c3
-rw-r--r--drivers/iio/industrialio-buffer.c63
-rw-r--r--drivers/iio/light/Kconfig10
-rw-r--r--drivers/iio/light/Makefile1
-rw-r--r--drivers/iio/light/al3320a.c232
-rw-r--r--drivers/iio/light/hid-sensor-als.c1
-rw-r--r--drivers/iio/light/hid-sensor-prox.c1
-rw-r--r--drivers/iio/light/lm3533-als.c1
-rw-r--r--drivers/iio/light/tsl4531.c7
-rw-r--r--drivers/iio/magnetometer/ak8975.c10
-rw-r--r--drivers/iio/magnetometer/hid-sensor-magn-3d.c8
-rw-r--r--drivers/iio/orientation/hid-sensor-incl-3d.c1
-rw-r--r--drivers/iio/orientation/hid-sensor-rotation.c1
-rw-r--r--drivers/iio/pressure/hid-sensor-press.c1
-rw-r--r--drivers/iio/proximity/as3935.c2
-rw-r--r--drivers/iio/trigger/iio-trig-interrupt.c1
45 files changed, 5149 insertions, 336 deletions
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index 12addf272a61..9b9be8725e9d 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -6,17 +6,32 @@
6menu "Accelerometers" 6menu "Accelerometers"
7 7
8config BMA180 8config BMA180
9 tristate "Bosch BMA180 3-Axis Accelerometer Driver" 9 tristate "Bosch BMA180/BMA250 3-Axis Accelerometer Driver"
10 depends on I2C 10 depends on I2C
11 select IIO_BUFFER 11 select IIO_BUFFER
12 select IIO_TRIGGERED_BUFFER 12 select IIO_TRIGGERED_BUFFER
13 help 13 help
14 Say Y here if you want to build a driver for the Bosch BMA180 14 Say Y here if you want to build a driver for the Bosch BMA180 or
15 triaxial acceleration sensor. 15 BMA250 triaxial acceleration sensor.
16 16
17 To compile this driver as a module, choose M here: the 17 To compile this driver as a module, choose M here: the
18 module will be called bma180. 18 module will be called bma180.
19 19
20config BMC150_ACCEL
21 tristate "Bosch BMC150 Accelerometer Driver"
22 depends on I2C
23 select IIO_BUFFER
24 select IIO_TRIGGERED_BUFFER
25 help
26 Say yes here to build support for the following Bosch accelerometers:
27 BMC150, BMI055, BMA250E, BMA222E, BMA255, BMA280.
28
29 Currently this only supports the device via an i2c interface.
30
31 This is a combo module with both accelerometer and magnetometer.
32 This driver is only implementing accelerometer part, which has
33 its own address and register map.
34
20config HID_SENSOR_ACCEL_3D 35config HID_SENSOR_ACCEL_3D
21 depends on HID_SENSOR_HUB 36 depends on HID_SENSOR_HUB
22 select IIO_BUFFER 37 select IIO_BUFFER
@@ -84,7 +99,8 @@ config KXCJK1013
84 select IIO_TRIGGERED_BUFFER 99 select IIO_TRIGGERED_BUFFER
85 help 100 help
86 Say Y here if you want to build a driver for the Kionix KXCJK-1013 101 Say Y here if you want to build a driver for the Kionix KXCJK-1013
87 triaxial acceleration sensor. 102 triaxial acceleration sensor. This driver also supports KXCJ9-1008
103 and KXTJ2-1009.
88 104
89 To compile this driver as a module, choose M here: the module will 105 To compile this driver as a module, choose M here: the module will
90 be called kxcjk-1013. 106 be called kxcjk-1013.
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index 6578ca1a8e09..a593996c6539 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -4,6 +4,7 @@
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6obj-$(CONFIG_BMA180) += bma180.o 6obj-$(CONFIG_BMA180) += bma180.o
7obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel.o
7obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o 8obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
8obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o 9obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
9obj-$(CONFIG_KXSD9) += kxsd9.o 10obj-$(CONFIG_KXSD9) += kxsd9.o
diff --git a/drivers/iio/accel/bma180.c b/drivers/iio/accel/bma180.c
index 19100fddd2ed..1096da327130 100644
--- a/drivers/iio/accel/bma180.c
+++ b/drivers/iio/accel/bma180.c
@@ -3,9 +3,15 @@
3 * 3 *
4 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com> 4 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com>
5 * 5 *
6 * Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net>
7 *
6 * This file is subject to the terms and conditions of version 2 of 8 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main 9 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details. 10 * directory of this archive for more details.
11 *
12 * SPI is not supported by driver
13 * BMA180: 7-bit I2C slave address 0x40 or 0x41
14 * BMA250: 7-bit I2C slave address 0x18 or 0x19
9 */ 15 */
10 16
11#include <linux/module.h> 17#include <linux/module.h>
@@ -26,9 +32,37 @@
26#define BMA180_DRV_NAME "bma180" 32#define BMA180_DRV_NAME "bma180"
27#define BMA180_IRQ_NAME "bma180_event" 33#define BMA180_IRQ_NAME "bma180_event"
28 34
35enum {
36 BMA180,
37 BMA250,
38};
39
40struct bma180_data;
41
42struct bma180_part_info {
43 const struct iio_chan_spec *channels;
44 unsigned num_channels;
45 const int *scale_table;
46 unsigned num_scales;
47 const int *bw_table;
48 unsigned num_bw;
49
50 u8 int_reset_reg, int_reset_mask;
51 u8 sleep_reg, sleep_mask;
52 u8 bw_reg, bw_mask;
53 u8 scale_reg, scale_mask;
54 u8 power_reg, power_mask, lowpower_val;
55 u8 int_enable_reg, int_enable_mask;
56 u8 softreset_reg;
57
58 int (*chip_config)(struct bma180_data *data);
59 void (*chip_disable)(struct bma180_data *data);
60};
61
29/* Register set */ 62/* Register set */
30#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */ 63#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
31#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */ 64#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
65#define BMA180_TEMP 0x08
32#define BMA180_CTRL_REG0 0x0d 66#define BMA180_CTRL_REG0 0x0d
33#define BMA180_RESET 0x10 67#define BMA180_RESET 0x10
34#define BMA180_BW_TCS 0x20 68#define BMA180_BW_TCS 0x20
@@ -49,65 +83,81 @@
49#define BMA180_SMP_SKIP BIT(0) 83#define BMA180_SMP_SKIP BIT(0)
50 84
51/* Bit masks for registers bit fields */ 85/* Bit masks for registers bit fields */
52#define BMA180_RANGE 0x0e /* Range of measured accel values*/ 86#define BMA180_RANGE 0x0e /* Range of measured accel values */
53#define BMA180_BW 0xf0 /* Accel bandwidth */ 87#define BMA180_BW 0xf0 /* Accel bandwidth */
54#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */ 88#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
55 89
56/* We have to write this value in reset register to do soft reset */ 90/* We have to write this value in reset register to do soft reset */
57#define BMA180_RESET_VAL 0xb6 91#define BMA180_RESET_VAL 0xb6
58 92
59#define BMA_180_ID_REG_VAL 0x03 93#define BMA180_ID_REG_VAL 0x03
60 94
61/* Chip power modes */ 95/* Chip power modes */
62#define BMA180_LOW_NOISE 0x00
63#define BMA180_LOW_POWER 0x03 96#define BMA180_LOW_POWER 0x03
64 97
65#define BMA180_LOW_NOISE_STR "low_noise" 98#define BMA250_RANGE_REG 0x0f
66#define BMA180_LOW_POWER_STR "low_power" 99#define BMA250_BW_REG 0x10
67 100#define BMA250_POWER_REG 0x11
68/* Defaults values */ 101#define BMA250_RESET_REG 0x14
69#define BMA180_DEF_PMODE 0 102#define BMA250_INT_ENABLE_REG 0x17
70#define BMA180_DEF_BW 20 103#define BMA250_INT_MAP_REG 0x1a
71#define BMA180_DEF_SCALE 2452 104#define BMA250_INT_RESET_REG 0x21
72 105
73/* Available values for sysfs */ 106#define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
74#define BMA180_FLP_FREQ_AVAILABLE \ 107#define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
75 "10 20 40 75 150 300" 108#define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
76#define BMA180_SCALE_AVAILABLE \ 109#define BMA250_LOWPOWER_MASK BIT(6)
77 "0.001275 0.001863 0.002452 0.003727 0.004903 0.009709 0.019417" 110#define BMA250_DATA_INTEN_MASK BIT(4)
111#define BMA250_INT1_DATA_MASK BIT(0)
112#define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
78 113
79struct bma180_data { 114struct bma180_data {
80 struct i2c_client *client; 115 struct i2c_client *client;
81 struct iio_trigger *trig; 116 struct iio_trigger *trig;
117 const struct bma180_part_info *part_info;
82 struct mutex mutex; 118 struct mutex mutex;
83 int sleep_state; 119 bool sleep_state;
84 int scale; 120 int scale;
85 int bw; 121 int bw;
86 int pmode; 122 bool pmode;
87 char *buff; 123 u8 buff[16]; /* 3x 16-bit + 8-bit + padding + timestamp */
88}; 124};
89 125
90enum bma180_axis { 126enum bma180_chan {
91 AXIS_X, 127 AXIS_X,
92 AXIS_Y, 128 AXIS_Y,
93 AXIS_Z, 129 AXIS_Z,
130 TEMP
94}; 131};
95 132
96static int bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */ 133static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
97static int scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 }; 134static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
135
136static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250 }; /* Hz */
137static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
138 0, 0, 306458 };
98 139
99static int bma180_get_acc_reg(struct bma180_data *data, enum bma180_axis axis) 140static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
100{ 141{
101 u8 reg = BMA180_ACC_X_LSB + axis * 2;
102 int ret; 142 int ret;
103 143
104 if (data->sleep_state) 144 if (data->sleep_state)
105 return -EBUSY; 145 return -EBUSY;
106 146
107 ret = i2c_smbus_read_word_data(data->client, reg); 147 switch (chan) {
108 if (ret < 0) 148 case TEMP:
109 dev_err(&data->client->dev, 149 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
110 "failed to read accel_%c registers\n", 'x' + axis); 150 if (ret < 0)
151 dev_err(&data->client->dev, "failed to read temp register\n");
152 break;
153 default:
154 ret = i2c_smbus_read_word_data(data->client,
155 BMA180_ACC_X_LSB + chan * 2);
156 if (ret < 0)
157 dev_err(&data->client->dev,
158 "failed to read accel_%c register\n",
159 'x' + chan);
160 }
111 161
112 return ret; 162 return ret;
113} 163}
@@ -125,7 +175,8 @@ static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
125 175
126static int bma180_reset_intr(struct bma180_data *data) 176static int bma180_reset_intr(struct bma180_data *data)
127{ 177{
128 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_RESET_INT, 1); 178 int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
179 data->part_info->int_reset_mask, 1);
129 180
130 if (ret) 181 if (ret)
131 dev_err(&data->client->dev, "failed to reset interrupt\n"); 182 dev_err(&data->client->dev, "failed to reset interrupt\n");
@@ -133,12 +184,10 @@ static int bma180_reset_intr(struct bma180_data *data)
133 return ret; 184 return ret;
134} 185}
135 186
136static int bma180_set_new_data_intr_state(struct bma180_data *data, int state) 187static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
137{ 188{
138 u8 reg_val = state ? BMA180_NEW_DATA_INT : 0x00; 189 int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
139 int ret = i2c_smbus_write_byte_data(data->client, BMA180_CTRL_REG3, 190 data->part_info->int_enable_mask, state);
140 reg_val);
141
142 if (ret) 191 if (ret)
143 goto err; 192 goto err;
144 ret = bma180_reset_intr(data); 193 ret = bma180_reset_intr(data);
@@ -153,9 +202,10 @@ err:
153 return ret; 202 return ret;
154} 203}
155 204
156static int bma180_set_sleep_state(struct bma180_data *data, int state) 205static int bma180_set_sleep_state(struct bma180_data *data, bool state)
157{ 206{
158 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_SLEEP, state); 207 int ret = bma180_set_bits(data, data->part_info->sleep_reg,
208 data->part_info->sleep_mask, state);
159 209
160 if (ret) { 210 if (ret) {
161 dev_err(&data->client->dev, 211 dev_err(&data->client->dev,
@@ -167,7 +217,7 @@ static int bma180_set_sleep_state(struct bma180_data *data, int state)
167 return 0; 217 return 0;
168} 218}
169 219
170static int bma180_set_ee_writing_state(struct bma180_data *data, int state) 220static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
171{ 221{
172 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state); 222 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
173 223
@@ -185,10 +235,10 @@ static int bma180_set_bw(struct bma180_data *data, int val)
185 if (data->sleep_state) 235 if (data->sleep_state)
186 return -EBUSY; 236 return -EBUSY;
187 237
188 for (i = 0; i < ARRAY_SIZE(bw_table); ++i) { 238 for (i = 0; i < data->part_info->num_bw; ++i) {
189 if (bw_table[i] == val) { 239 if (data->part_info->bw_table[i] == val) {
190 ret = bma180_set_bits(data, 240 ret = bma180_set_bits(data, data->part_info->bw_reg,
191 BMA180_BW_TCS, BMA180_BW, i); 241 data->part_info->bw_mask, i);
192 if (ret) { 242 if (ret) {
193 dev_err(&data->client->dev, 243 dev_err(&data->client->dev,
194 "failed to set bandwidth\n"); 244 "failed to set bandwidth\n");
@@ -209,10 +259,10 @@ static int bma180_set_scale(struct bma180_data *data, int val)
209 if (data->sleep_state) 259 if (data->sleep_state)
210 return -EBUSY; 260 return -EBUSY;
211 261
212 for (i = 0; i < ARRAY_SIZE(scale_table); ++i) 262 for (i = 0; i < data->part_info->num_scales; ++i)
213 if (scale_table[i] == val) { 263 if (data->part_info->scale_table[i] == val) {
214 ret = bma180_set_bits(data, 264 ret = bma180_set_bits(data, data->part_info->scale_reg,
215 BMA180_OFFSET_LSB1, BMA180_RANGE, i); 265 data->part_info->scale_mask, i);
216 if (ret) { 266 if (ret) {
217 dev_err(&data->client->dev, 267 dev_err(&data->client->dev,
218 "failed to set scale\n"); 268 "failed to set scale\n");
@@ -225,11 +275,11 @@ static int bma180_set_scale(struct bma180_data *data, int val)
225 return -EINVAL; 275 return -EINVAL;
226} 276}
227 277
228static int bma180_set_pmode(struct bma180_data *data, int mode) 278static int bma180_set_pmode(struct bma180_data *data, bool mode)
229{ 279{
230 u8 reg_val = mode ? BMA180_LOW_POWER : BMA180_LOW_NOISE; 280 u8 reg_val = mode ? data->part_info->lowpower_val : 0;
231 int ret = bma180_set_bits(data, BMA180_TCO_Z, BMA180_MODE_CONFIG, 281 int ret = bma180_set_bits(data, data->part_info->power_reg,
232 reg_val); 282 data->part_info->power_mask, reg_val);
233 283
234 if (ret) { 284 if (ret) {
235 dev_err(&data->client->dev, "failed to set power mode\n"); 285 dev_err(&data->client->dev, "failed to set power mode\n");
@@ -243,7 +293,7 @@ static int bma180_set_pmode(struct bma180_data *data, int mode)
243static int bma180_soft_reset(struct bma180_data *data) 293static int bma180_soft_reset(struct bma180_data *data)
244{ 294{
245 int ret = i2c_smbus_write_byte_data(data->client, 295 int ret = i2c_smbus_write_byte_data(data->client,
246 BMA180_RESET, BMA180_RESET_VAL); 296 data->part_info->softreset_reg, BMA180_RESET_VAL);
247 297
248 if (ret) 298 if (ret)
249 dev_err(&data->client->dev, "failed to reset the chip\n"); 299 dev_err(&data->client->dev, "failed to reset the chip\n");
@@ -257,57 +307,99 @@ static int bma180_chip_init(struct bma180_data *data)
257 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID); 307 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
258 308
259 if (ret < 0) 309 if (ret < 0)
260 goto err; 310 return ret;
261 if (ret != BMA_180_ID_REG_VAL) { 311 if (ret != BMA180_ID_REG_VAL)
262 ret = -ENODEV; 312 return -ENODEV;
263 goto err;
264 }
265 313
266 ret = bma180_soft_reset(data); 314 ret = bma180_soft_reset(data);
267 if (ret) 315 if (ret)
268 goto err; 316 return ret;
269 /* 317 /*
270 * No serial transaction should occur within minimum 10 us 318 * No serial transaction should occur within minimum 10 us
271 * after soft_reset command 319 * after soft_reset command
272 */ 320 */
273 msleep(20); 321 msleep(20);
274 322
275 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1); 323 ret = bma180_set_new_data_intr_state(data, false);
324 if (ret)
325 return ret;
326
327 return bma180_set_pmode(data, false);
328}
329
330static int bma180_chip_config(struct bma180_data *data)
331{
332 int ret = bma180_chip_init(data);
333
276 if (ret) 334 if (ret)
277 goto err; 335 goto err;
278 ret = bma180_set_ee_writing_state(data, 1); 336 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
279 if (ret) 337 if (ret)
280 goto err; 338 goto err;
281 ret = bma180_set_new_data_intr_state(data, 0); 339 ret = bma180_set_ee_writing_state(data, true);
282 if (ret) 340 if (ret)
283 goto err; 341 goto err;
284 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1); 342 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
285 if (ret) 343 if (ret)
286 goto err; 344 goto err;
287 ret = bma180_set_pmode(data, BMA180_DEF_PMODE); 345 ret = bma180_set_bw(data, 20); /* 20 Hz */
288 if (ret) 346 if (ret)
289 goto err; 347 goto err;
290 ret = bma180_set_bw(data, BMA180_DEF_BW); 348 ret = bma180_set_scale(data, 2452); /* 2 G */
349 if (ret)
350 goto err;
351
352 return 0;
353
354err:
355 dev_err(&data->client->dev, "failed to config the chip\n");
356 return ret;
357}
358
359static int bma250_chip_config(struct bma180_data *data)
360{
361 int ret = bma180_chip_init(data);
362
291 if (ret) 363 if (ret)
292 goto err; 364 goto err;
293 ret = bma180_set_scale(data, BMA180_DEF_SCALE); 365 ret = bma180_set_bw(data, 16); /* 16 Hz */
366 if (ret)
367 goto err;
368 ret = bma180_set_scale(data, 38344); /* 2 G */
369 if (ret)
370 goto err;
371 ret = bma180_set_bits(data, BMA250_INT_MAP_REG,
372 BMA250_INT1_DATA_MASK, 1);
294 if (ret) 373 if (ret)
295 goto err; 374 goto err;
296 375
297 return 0; 376 return 0;
298 377
299err: 378err:
300 dev_err(&data->client->dev, "failed to init the chip\n"); 379 dev_err(&data->client->dev, "failed to config the chip\n");
301 return ret; 380 return ret;
302} 381}
303 382
304static void bma180_chip_disable(struct bma180_data *data) 383static void bma180_chip_disable(struct bma180_data *data)
305{ 384{
306 if (bma180_set_new_data_intr_state(data, 0)) 385 if (bma180_set_new_data_intr_state(data, false))
307 goto err; 386 goto err;
308 if (bma180_set_ee_writing_state(data, 0)) 387 if (bma180_set_ee_writing_state(data, false))
388 goto err;
389 if (bma180_set_sleep_state(data, true))
390 goto err;
391
392 return;
393
394err:
395 dev_err(&data->client->dev, "failed to disable the chip\n");
396}
397
398static void bma250_chip_disable(struct bma180_data *data)
399{
400 if (bma180_set_new_data_intr_state(data, false))
309 goto err; 401 goto err;
310 if (bma180_set_sleep_state(data, 1)) 402 if (bma180_set_sleep_state(data, true))
311 goto err; 403 goto err;
312 404
313 return; 405 return;
@@ -316,13 +408,51 @@ err:
316 dev_err(&data->client->dev, "failed to disable the chip\n"); 408 dev_err(&data->client->dev, "failed to disable the chip\n");
317} 409}
318 410
319static IIO_CONST_ATTR(in_accel_filter_low_pass_3db_frequency_available, 411static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned n,
320 BMA180_FLP_FREQ_AVAILABLE); 412 bool micros)
321static IIO_CONST_ATTR(in_accel_scale_available, BMA180_SCALE_AVAILABLE); 413{
414 size_t len = 0;
415 int i;
416
417 for (i = 0; i < n; i++) {
418 if (!vals[i])
419 continue;
420 len += scnprintf(buf + len, PAGE_SIZE - len,
421 micros ? "0.%06d " : "%d ", vals[i]);
422 }
423 buf[len - 1] = '\n';
424
425 return len;
426}
427
428static ssize_t bma180_show_filter_freq_avail(struct device *dev,
429 struct device_attribute *attr, char *buf)
430{
431 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
432
433 return bma180_show_avail(buf, data->part_info->bw_table,
434 data->part_info->num_bw, false);
435}
436
437static ssize_t bma180_show_scale_avail(struct device *dev,
438 struct device_attribute *attr, char *buf)
439{
440 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
441
442 return bma180_show_avail(buf, data->part_info->scale_table,
443 data->part_info->num_scales, true);
444}
445
446static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
447 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
448
449static IIO_DEVICE_ATTR(in_accel_scale_available,
450 S_IRUGO, bma180_show_scale_avail, NULL, 0);
322 451
323static struct attribute *bma180_attributes[] = { 452static struct attribute *bma180_attributes[] = {
324 &iio_const_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr, 453 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
325 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 454 dev_attr.attr,
455 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
326 NULL, 456 NULL,
327}; 457};
328 458
@@ -340,22 +470,35 @@ static int bma180_read_raw(struct iio_dev *indio_dev,
340 switch (mask) { 470 switch (mask) {
341 case IIO_CHAN_INFO_RAW: 471 case IIO_CHAN_INFO_RAW:
342 mutex_lock(&data->mutex); 472 mutex_lock(&data->mutex);
343 if (iio_buffer_enabled(indio_dev)) 473 if (iio_buffer_enabled(indio_dev)) {
344 ret = -EBUSY; 474 mutex_unlock(&data->mutex);
345 else 475 return -EBUSY;
346 ret = bma180_get_acc_reg(data, chan->scan_index); 476 }
477 ret = bma180_get_data_reg(data, chan->scan_index);
347 mutex_unlock(&data->mutex); 478 mutex_unlock(&data->mutex);
348 if (ret < 0) 479 if (ret < 0)
349 return ret; 480 return ret;
350 *val = (s16)ret >> chan->scan_type.shift; 481 *val = sign_extend32(ret >> chan->scan_type.shift,
482 chan->scan_type.realbits - 1);
351 return IIO_VAL_INT; 483 return IIO_VAL_INT;
352 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 484 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
353 *val = data->bw; 485 *val = data->bw;
354 return IIO_VAL_INT; 486 return IIO_VAL_INT;
355 case IIO_CHAN_INFO_SCALE: 487 case IIO_CHAN_INFO_SCALE:
356 *val = 0; 488 switch (chan->type) {
357 *val2 = data->scale; 489 case IIO_ACCEL:
358 return IIO_VAL_INT_PLUS_MICRO; 490 *val = 0;
491 *val2 = data->scale;
492 return IIO_VAL_INT_PLUS_MICRO;
493 case IIO_TEMP:
494 *val = 500;
495 return IIO_VAL_INT;
496 default:
497 return -EINVAL;
498 }
499 case IIO_CHAN_INFO_OFFSET:
500 *val = 48; /* 0 LSB @ 24 degree C */
501 return IIO_VAL_INT;
359 default: 502 default:
360 return -EINVAL; 503 return -EINVAL;
361 } 504 }
@@ -387,33 +530,14 @@ static int bma180_write_raw(struct iio_dev *indio_dev,
387 } 530 }
388} 531}
389 532
390static int bma180_update_scan_mode(struct iio_dev *indio_dev,
391 const unsigned long *scan_mask)
392{
393 struct bma180_data *data = iio_priv(indio_dev);
394
395 if (data->buff)
396 devm_kfree(&indio_dev->dev, data->buff);
397 data->buff = devm_kzalloc(&indio_dev->dev,
398 indio_dev->scan_bytes, GFP_KERNEL);
399 if (!data->buff)
400 return -ENOMEM;
401
402 return 0;
403}
404
405static const struct iio_info bma180_info = { 533static const struct iio_info bma180_info = {
406 .attrs = &bma180_attrs_group, 534 .attrs = &bma180_attrs_group,
407 .read_raw = bma180_read_raw, 535 .read_raw = bma180_read_raw,
408 .write_raw = bma180_write_raw, 536 .write_raw = bma180_write_raw,
409 .update_scan_mode = bma180_update_scan_mode,
410 .driver_module = THIS_MODULE, 537 .driver_module = THIS_MODULE,
411}; 538};
412 539
413static const char * const bma180_power_modes[] = { 540static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
414 BMA180_LOW_NOISE_STR,
415 BMA180_LOW_POWER_STR,
416};
417 541
418static int bma180_get_power_mode(struct iio_dev *indio_dev, 542static int bma180_get_power_mode(struct iio_dev *indio_dev,
419 const struct iio_chan_spec *chan) 543 const struct iio_chan_spec *chan)
@@ -449,7 +573,7 @@ static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
449 { }, 573 { },
450}; 574};
451 575
452#define BMA180_CHANNEL(_axis) { \ 576#define BMA180_ACC_CHANNEL(_axis, _bits) { \
453 .type = IIO_ACCEL, \ 577 .type = IIO_ACCEL, \
454 .modified = 1, \ 578 .modified = 1, \
455 .channel2 = IIO_MOD_##_axis, \ 579 .channel2 = IIO_MOD_##_axis, \
@@ -459,18 +583,70 @@ static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
459 .scan_index = AXIS_##_axis, \ 583 .scan_index = AXIS_##_axis, \
460 .scan_type = { \ 584 .scan_type = { \
461 .sign = 's', \ 585 .sign = 's', \
462 .realbits = 14, \ 586 .realbits = _bits, \
463 .storagebits = 16, \ 587 .storagebits = 16, \
464 .shift = 2, \ 588 .shift = 16 - _bits, \
465 }, \ 589 }, \
466 .ext_info = bma180_ext_info, \ 590 .ext_info = bma180_ext_info, \
467} 591}
468 592
593#define BMA180_TEMP_CHANNEL { \
594 .type = IIO_TEMP, \
595 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
596 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
597 .scan_index = TEMP, \
598 .scan_type = { \
599 .sign = 's', \
600 .realbits = 8, \
601 .storagebits = 16, \
602 }, \
603}
604
469static const struct iio_chan_spec bma180_channels[] = { 605static const struct iio_chan_spec bma180_channels[] = {
470 BMA180_CHANNEL(X), 606 BMA180_ACC_CHANNEL(X, 14),
471 BMA180_CHANNEL(Y), 607 BMA180_ACC_CHANNEL(Y, 14),
472 BMA180_CHANNEL(Z), 608 BMA180_ACC_CHANNEL(Z, 14),
473 IIO_CHAN_SOFT_TIMESTAMP(3), 609 BMA180_TEMP_CHANNEL,
610 IIO_CHAN_SOFT_TIMESTAMP(4),
611};
612
613static const struct iio_chan_spec bma250_channels[] = {
614 BMA180_ACC_CHANNEL(X, 10),
615 BMA180_ACC_CHANNEL(Y, 10),
616 BMA180_ACC_CHANNEL(Z, 10),
617 BMA180_TEMP_CHANNEL,
618 IIO_CHAN_SOFT_TIMESTAMP(4),
619};
620
621static const struct bma180_part_info bma180_part_info[] = {
622 [BMA180] = {
623 bma180_channels, ARRAY_SIZE(bma180_channels),
624 bma180_scale_table, ARRAY_SIZE(bma180_scale_table),
625 bma180_bw_table, ARRAY_SIZE(bma180_bw_table),
626 BMA180_CTRL_REG0, BMA180_RESET_INT,
627 BMA180_CTRL_REG0, BMA180_SLEEP,
628 BMA180_BW_TCS, BMA180_BW,
629 BMA180_OFFSET_LSB1, BMA180_RANGE,
630 BMA180_TCO_Z, BMA180_MODE_CONFIG, BMA180_LOW_POWER,
631 BMA180_CTRL_REG3, BMA180_NEW_DATA_INT,
632 BMA180_RESET,
633 bma180_chip_config,
634 bma180_chip_disable,
635 },
636 [BMA250] = {
637 bma250_channels, ARRAY_SIZE(bma250_channels),
638 bma250_scale_table, ARRAY_SIZE(bma250_scale_table),
639 bma250_bw_table, ARRAY_SIZE(bma250_bw_table),
640 BMA250_INT_RESET_REG, BMA250_INT_RESET_MASK,
641 BMA250_POWER_REG, BMA250_SUSPEND_MASK,
642 BMA250_BW_REG, BMA250_BW_MASK,
643 BMA250_RANGE_REG, BMA250_RANGE_MASK,
644 BMA250_POWER_REG, BMA250_LOWPOWER_MASK, 1,
645 BMA250_INT_ENABLE_REG, BMA250_DATA_INTEN_MASK,
646 BMA250_RESET_REG,
647 bma250_chip_config,
648 bma250_chip_disable,
649 },
474}; 650};
475 651
476static irqreturn_t bma180_trigger_handler(int irq, void *p) 652static irqreturn_t bma180_trigger_handler(int irq, void *p)
@@ -485,13 +661,14 @@ static irqreturn_t bma180_trigger_handler(int irq, void *p)
485 661
486 for_each_set_bit(bit, indio_dev->buffer->scan_mask, 662 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
487 indio_dev->masklength) { 663 indio_dev->masklength) {
488 ret = bma180_get_acc_reg(data, bit); 664 ret = bma180_get_data_reg(data, bit);
489 if (ret < 0) { 665 if (ret < 0) {
490 mutex_unlock(&data->mutex); 666 mutex_unlock(&data->mutex);
491 goto err; 667 goto err;
492 } 668 }
493 ((s16 *)data->buff)[i++] = ret; 669 ((s16 *)data->buff)[i++] = ret;
494 } 670 }
671
495 mutex_unlock(&data->mutex); 672 mutex_unlock(&data->mutex);
496 673
497 iio_push_to_buffers_with_timestamp(indio_dev, data->buff, time_ns); 674 iio_push_to_buffers_with_timestamp(indio_dev, data->buff, time_ns);
@@ -529,7 +706,6 @@ static int bma180_probe(struct i2c_client *client,
529{ 706{
530 struct bma180_data *data; 707 struct bma180_data *data;
531 struct iio_dev *indio_dev; 708 struct iio_dev *indio_dev;
532 struct iio_trigger *trig;
533 int ret; 709 int ret;
534 710
535 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 711 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
@@ -539,43 +715,45 @@ static int bma180_probe(struct i2c_client *client,
539 data = iio_priv(indio_dev); 715 data = iio_priv(indio_dev);
540 i2c_set_clientdata(client, indio_dev); 716 i2c_set_clientdata(client, indio_dev);
541 data->client = client; 717 data->client = client;
718 data->part_info = &bma180_part_info[id->driver_data];
542 719
543 ret = bma180_chip_init(data); 720 ret = data->part_info->chip_config(data);
544 if (ret < 0) 721 if (ret < 0)
545 goto err_chip_disable; 722 goto err_chip_disable;
546 723
547 mutex_init(&data->mutex); 724 mutex_init(&data->mutex);
548
549 indio_dev->dev.parent = &client->dev; 725 indio_dev->dev.parent = &client->dev;
550 indio_dev->channels = bma180_channels; 726 indio_dev->channels = data->part_info->channels;
551 indio_dev->num_channels = ARRAY_SIZE(bma180_channels); 727 indio_dev->num_channels = data->part_info->num_channels;
552 indio_dev->name = BMA180_DRV_NAME; 728 indio_dev->name = id->name;
553 indio_dev->modes = INDIO_DIRECT_MODE; 729 indio_dev->modes = INDIO_DIRECT_MODE;
554 indio_dev->info = &bma180_info; 730 indio_dev->info = &bma180_info;
555 731
556 trig = iio_trigger_alloc("%s-dev%d", indio_dev->name, indio_dev->id); 732 if (client->irq > 0) {
557 if (!trig) { 733 data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
558 ret = -ENOMEM; 734 indio_dev->id);
559 goto err_chip_disable; 735 if (!data->trig) {
560 } 736 ret = -ENOMEM;
737 goto err_chip_disable;
738 }
561 739
562 ret = devm_request_irq(&client->dev, client->irq, 740 ret = devm_request_irq(&client->dev, client->irq,
563 iio_trigger_generic_data_rdy_poll, 741 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
564 IRQF_TRIGGER_RISING, BMA180_IRQ_NAME, trig); 742 "bma180_event", data->trig);
565 if (ret) { 743 if (ret) {
566 dev_err(&client->dev, "unable to request IRQ\n"); 744 dev_err(&client->dev, "unable to request IRQ\n");
567 goto err_trigger_free; 745 goto err_trigger_free;
568 } 746 }
569 747
570 trig->dev.parent = &client->dev; 748 data->trig->dev.parent = &client->dev;
571 trig->ops = &bma180_trigger_ops; 749 data->trig->ops = &bma180_trigger_ops;
572 iio_trigger_set_drvdata(trig, indio_dev); 750 iio_trigger_set_drvdata(data->trig, indio_dev);
573 data->trig = trig; 751 indio_dev->trig = iio_trigger_get(data->trig);
574 indio_dev->trig = iio_trigger_get(trig);
575 752
576 ret = iio_trigger_register(trig); 753 ret = iio_trigger_register(data->trig);
577 if (ret) 754 if (ret)
578 goto err_trigger_free; 755 goto err_trigger_free;
756 }
579 757
580 ret = iio_triggered_buffer_setup(indio_dev, NULL, 758 ret = iio_triggered_buffer_setup(indio_dev, NULL,
581 bma180_trigger_handler, NULL); 759 bma180_trigger_handler, NULL);
@@ -595,11 +773,12 @@ static int bma180_probe(struct i2c_client *client,
595err_buffer_cleanup: 773err_buffer_cleanup:
596 iio_triggered_buffer_cleanup(indio_dev); 774 iio_triggered_buffer_cleanup(indio_dev);
597err_trigger_unregister: 775err_trigger_unregister:
598 iio_trigger_unregister(trig); 776 if (data->trig)
777 iio_trigger_unregister(data->trig);
599err_trigger_free: 778err_trigger_free:
600 iio_trigger_free(trig); 779 iio_trigger_free(data->trig);
601err_chip_disable: 780err_chip_disable:
602 bma180_chip_disable(data); 781 data->part_info->chip_disable(data);
603 782
604 return ret; 783 return ret;
605} 784}
@@ -611,11 +790,13 @@ static int bma180_remove(struct i2c_client *client)
611 790
612 iio_device_unregister(indio_dev); 791 iio_device_unregister(indio_dev);
613 iio_triggered_buffer_cleanup(indio_dev); 792 iio_triggered_buffer_cleanup(indio_dev);
614 iio_trigger_unregister(data->trig); 793 if (data->trig) {
615 iio_trigger_free(data->trig); 794 iio_trigger_unregister(data->trig);
795 iio_trigger_free(data->trig);
796 }
616 797
617 mutex_lock(&data->mutex); 798 mutex_lock(&data->mutex);
618 bma180_chip_disable(data); 799 data->part_info->chip_disable(data);
619 mutex_unlock(&data->mutex); 800 mutex_unlock(&data->mutex);
620 801
621 return 0; 802 return 0;
@@ -629,7 +810,7 @@ static int bma180_suspend(struct device *dev)
629 int ret; 810 int ret;
630 811
631 mutex_lock(&data->mutex); 812 mutex_lock(&data->mutex);
632 ret = bma180_set_sleep_state(data, 1); 813 ret = bma180_set_sleep_state(data, true);
633 mutex_unlock(&data->mutex); 814 mutex_unlock(&data->mutex);
634 815
635 return ret; 816 return ret;
@@ -642,7 +823,7 @@ static int bma180_resume(struct device *dev)
642 int ret; 823 int ret;
643 824
644 mutex_lock(&data->mutex); 825 mutex_lock(&data->mutex);
645 ret = bma180_set_sleep_state(data, 0); 826 ret = bma180_set_sleep_state(data, false);
646 mutex_unlock(&data->mutex); 827 mutex_unlock(&data->mutex);
647 828
648 return ret; 829 return ret;
@@ -654,27 +835,28 @@ static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
654#define BMA180_PM_OPS NULL 835#define BMA180_PM_OPS NULL
655#endif 836#endif
656 837
657static struct i2c_device_id bma180_id[] = { 838static struct i2c_device_id bma180_ids[] = {
658 { BMA180_DRV_NAME, 0 }, 839 { "bma180", BMA180 },
840 { "bma250", BMA250 },
659 { } 841 { }
660}; 842};
661 843
662MODULE_DEVICE_TABLE(i2c, bma180_id); 844MODULE_DEVICE_TABLE(i2c, bma180_ids);
663 845
664static struct i2c_driver bma180_driver = { 846static struct i2c_driver bma180_driver = {
665 .driver = { 847 .driver = {
666 .name = BMA180_DRV_NAME, 848 .name = "bma180",
667 .owner = THIS_MODULE, 849 .owner = THIS_MODULE,
668 .pm = BMA180_PM_OPS, 850 .pm = BMA180_PM_OPS,
669 }, 851 },
670 .probe = bma180_probe, 852 .probe = bma180_probe,
671 .remove = bma180_remove, 853 .remove = bma180_remove,
672 .id_table = bma180_id, 854 .id_table = bma180_ids,
673}; 855};
674 856
675module_i2c_driver(bma180_driver); 857module_i2c_driver(bma180_driver);
676 858
677MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>"); 859MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
678MODULE_AUTHOR("Texas Instruments, Inc."); 860MODULE_AUTHOR("Texas Instruments, Inc.");
679MODULE_DESCRIPTION("Bosch BMA180 triaxial acceleration sensor"); 861MODULE_DESCRIPTION("Bosch BMA180/BMA250 triaxial acceleration sensor");
680MODULE_LICENSE("GPL"); 862MODULE_LICENSE("GPL");
diff --git a/drivers/iio/accel/bmc150-accel.c b/drivers/iio/accel/bmc150-accel.c
new file mode 100644
index 000000000000..22c096ce39ad
--- /dev/null
+++ b/drivers/iio/accel/bmc150-accel.c
@@ -0,0 +1,1430 @@
1/*
2 * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
3 * - BMC150
4 * - BMI055
5 * - BMA255
6 * - BMA250E
7 * - BMA222E
8 * - BMA280
9 *
10 * Copyright (c) 2014, Intel Corporation.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 */
21
22#include <linux/module.h>
23#include <linux/i2c.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/acpi.h>
28#include <linux/gpio/consumer.h>
29#include <linux/pm.h>
30#include <linux/pm_runtime.h>
31#include <linux/iio/iio.h>
32#include <linux/iio/sysfs.h>
33#include <linux/iio/buffer.h>
34#include <linux/iio/events.h>
35#include <linux/iio/trigger.h>
36#include <linux/iio/trigger_consumer.h>
37#include <linux/iio/triggered_buffer.h>
38
39#define BMC150_ACCEL_DRV_NAME "bmc150_accel"
40#define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
41#define BMC150_ACCEL_GPIO_NAME "bmc150_accel_int"
42
43#define BMC150_ACCEL_REG_CHIP_ID 0x00
44
45#define BMC150_ACCEL_REG_INT_STATUS_2 0x0B
46#define BMC150_ACCEL_ANY_MOTION_MASK 0x07
47#define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3)
48
49#define BMC150_ACCEL_REG_PMU_LPW 0x11
50#define BMC150_ACCEL_PMU_MODE_MASK 0xE0
51#define BMC150_ACCEL_PMU_MODE_SHIFT 5
52#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17
53#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1
54
55#define BMC150_ACCEL_REG_PMU_RANGE 0x0F
56
57#define BMC150_ACCEL_DEF_RANGE_2G 0x03
58#define BMC150_ACCEL_DEF_RANGE_4G 0x05
59#define BMC150_ACCEL_DEF_RANGE_8G 0x08
60#define BMC150_ACCEL_DEF_RANGE_16G 0x0C
61
62/* Default BW: 125Hz */
63#define BMC150_ACCEL_REG_PMU_BW 0x10
64#define BMC150_ACCEL_DEF_BW 125
65
66#define BMC150_ACCEL_REG_INT_MAP_0 0x19
67#define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
68
69#define BMC150_ACCEL_REG_INT_MAP_1 0x1A
70#define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
71
72#define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
73#define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
74#define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
75#define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00
76
77#define BMC150_ACCEL_REG_INT_EN_0 0x16
78#define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0)
79#define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1)
80#define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
81
82#define BMC150_ACCEL_REG_INT_EN_1 0x17
83#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
84
85#define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
86#define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
87
88#define BMC150_ACCEL_REG_INT_5 0x27
89#define BMC150_ACCEL_SLOPE_DUR_MASK 0x03
90
91#define BMC150_ACCEL_REG_INT_6 0x28
92#define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF
93
94/* Slope duration in terms of number of samples */
95#define BMC150_ACCEL_DEF_SLOPE_DURATION 2
96/* in terms of multiples of g's/LSB, based on range */
97#define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 5
98
99#define BMC150_ACCEL_REG_XOUT_L 0x02
100
101#define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100
102
103/* Sleep Duration values */
104#define BMC150_ACCEL_SLEEP_500_MICRO 0x05
105#define BMC150_ACCEL_SLEEP_1_MS 0x06
106#define BMC150_ACCEL_SLEEP_2_MS 0x07
107#define BMC150_ACCEL_SLEEP_4_MS 0x08
108#define BMC150_ACCEL_SLEEP_6_MS 0x09
109#define BMC150_ACCEL_SLEEP_10_MS 0x0A
110#define BMC150_ACCEL_SLEEP_25_MS 0x0B
111#define BMC150_ACCEL_SLEEP_50_MS 0x0C
112#define BMC150_ACCEL_SLEEP_100_MS 0x0D
113#define BMC150_ACCEL_SLEEP_500_MS 0x0E
114#define BMC150_ACCEL_SLEEP_1_SEC 0x0F
115
116#define BMC150_ACCEL_REG_TEMP 0x08
117#define BMC150_ACCEL_TEMP_CENTER_VAL 24
118
119#define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
120#define BMC150_AUTO_SUSPEND_DELAY_MS 2000
121
122enum bmc150_accel_axis {
123 AXIS_X,
124 AXIS_Y,
125 AXIS_Z,
126};
127
128enum bmc150_power_modes {
129 BMC150_ACCEL_SLEEP_MODE_NORMAL,
130 BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
131 BMC150_ACCEL_SLEEP_MODE_LPM,
132 BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
133};
134
135struct bmc150_scale_info {
136 int scale;
137 u8 reg_range;
138};
139
140struct bmc150_accel_chip_info {
141 u8 chip_id;
142 const struct iio_chan_spec *channels;
143 int num_channels;
144 const struct bmc150_scale_info scale_table[4];
145};
146
147struct bmc150_accel_data {
148 struct i2c_client *client;
149 struct iio_trigger *dready_trig;
150 struct iio_trigger *motion_trig;
151 struct mutex mutex;
152 s16 buffer[8];
153 u8 bw_bits;
154 u32 slope_dur;
155 u32 slope_thres;
156 u32 range;
157 int ev_enable_state;
158 bool dready_trigger_on;
159 bool motion_trigger_on;
160 int64_t timestamp;
161 const struct bmc150_accel_chip_info *chip_info;
162};
163
164static const struct {
165 int val;
166 int val2;
167 u8 bw_bits;
168} bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
169 {15, 630000, 0x09},
170 {31, 250000, 0x0A},
171 {62, 500000, 0x0B},
172 {125, 0, 0x0C},
173 {250, 0, 0x0D},
174 {500, 0, 0x0E},
175 {1000, 0, 0x0F} };
176
177static const struct {
178 int bw_bits;
179 int msec;
180} bmc150_accel_sample_upd_time[] = { {0x08, 64},
181 {0x09, 32},
182 {0x0A, 16},
183 {0x0B, 8},
184 {0x0C, 4},
185 {0x0D, 2},
186 {0x0E, 1},
187 {0x0F, 1} };
188
189static const struct {
190 int sleep_dur;
191 u8 reg_value;
192} bmc150_accel_sleep_value_table[] = { {0, 0},
193 {500, BMC150_ACCEL_SLEEP_500_MICRO},
194 {1000, BMC150_ACCEL_SLEEP_1_MS},
195 {2000, BMC150_ACCEL_SLEEP_2_MS},
196 {4000, BMC150_ACCEL_SLEEP_4_MS},
197 {6000, BMC150_ACCEL_SLEEP_6_MS},
198 {10000, BMC150_ACCEL_SLEEP_10_MS},
199 {25000, BMC150_ACCEL_SLEEP_25_MS},
200 {50000, BMC150_ACCEL_SLEEP_50_MS},
201 {100000, BMC150_ACCEL_SLEEP_100_MS},
202 {500000, BMC150_ACCEL_SLEEP_500_MS},
203 {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
204
205
206static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
207 enum bmc150_power_modes mode,
208 int dur_us)
209{
210 int i;
211 int ret;
212 u8 lpw_bits;
213 int dur_val = -1;
214
215 if (dur_us > 0) {
216 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
217 ++i) {
218 if (bmc150_accel_sleep_value_table[i].sleep_dur ==
219 dur_us)
220 dur_val =
221 bmc150_accel_sleep_value_table[i].reg_value;
222 }
223 } else
224 dur_val = 0;
225
226 if (dur_val < 0)
227 return -EINVAL;
228
229 lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
230 lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
231
232 dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
233
234 ret = i2c_smbus_write_byte_data(data->client,
235 BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
236 if (ret < 0) {
237 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
238 return ret;
239 }
240
241 return 0;
242}
243
244static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
245 int val2)
246{
247 int i;
248 int ret;
249
250 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
251 if (bmc150_accel_samp_freq_table[i].val == val &&
252 bmc150_accel_samp_freq_table[i].val2 == val2) {
253 ret = i2c_smbus_write_byte_data(
254 data->client,
255 BMC150_ACCEL_REG_PMU_BW,
256 bmc150_accel_samp_freq_table[i].bw_bits);
257 if (ret < 0)
258 return ret;
259
260 data->bw_bits =
261 bmc150_accel_samp_freq_table[i].bw_bits;
262 return 0;
263 }
264 }
265
266 return -EINVAL;
267}
268
269static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
270{
271 int ret;
272
273 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
274 if (ret < 0) {
275 dev_err(&data->client->dev,
276 "Error: Reading chip id\n");
277 return ret;
278 }
279
280 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
281 if (ret != data->chip_info->chip_id) {
282 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
283 return -ENODEV;
284 }
285
286 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
287 if (ret < 0)
288 return ret;
289
290 /* Set Bandwidth */
291 ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
292 if (ret < 0)
293 return ret;
294
295 /* Set Default Range */
296 ret = i2c_smbus_write_byte_data(data->client,
297 BMC150_ACCEL_REG_PMU_RANGE,
298 BMC150_ACCEL_DEF_RANGE_4G);
299 if (ret < 0) {
300 dev_err(&data->client->dev,
301 "Error writing reg_pmu_range\n");
302 return ret;
303 }
304
305 data->range = BMC150_ACCEL_DEF_RANGE_4G;
306
307 /* Set default slope duration */
308 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
309 if (ret < 0) {
310 dev_err(&data->client->dev, "Error reading reg_int_5\n");
311 return ret;
312 }
313 data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
314 ret = i2c_smbus_write_byte_data(data->client,
315 BMC150_ACCEL_REG_INT_5,
316 data->slope_dur);
317 if (ret < 0) {
318 dev_err(&data->client->dev, "Error writing reg_int_5\n");
319 return ret;
320 }
321 dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
322
323 /* Set default slope thresholds */
324 ret = i2c_smbus_write_byte_data(data->client,
325 BMC150_ACCEL_REG_INT_6,
326 BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
327 if (ret < 0) {
328 dev_err(&data->client->dev, "Error writing reg_int_6\n");
329 return ret;
330 }
331 data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
332 dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
333
334 /* Set default as latched interrupts */
335 ret = i2c_smbus_write_byte_data(data->client,
336 BMC150_ACCEL_REG_INT_RST_LATCH,
337 BMC150_ACCEL_INT_MODE_LATCH_INT |
338 BMC150_ACCEL_INT_MODE_LATCH_RESET);
339 if (ret < 0) {
340 dev_err(&data->client->dev,
341 "Error writing reg_int_rst_latch\n");
342 return ret;
343 }
344
345 return 0;
346}
347
348static int bmc150_accel_setup_any_motion_interrupt(
349 struct bmc150_accel_data *data,
350 bool status)
351{
352 int ret;
353
354 /* Enable/Disable INT1 mapping */
355 ret = i2c_smbus_read_byte_data(data->client,
356 BMC150_ACCEL_REG_INT_MAP_0);
357 if (ret < 0) {
358 dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
359 return ret;
360 }
361 if (status)
362 ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
363 else
364 ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
365
366 ret = i2c_smbus_write_byte_data(data->client,
367 BMC150_ACCEL_REG_INT_MAP_0,
368 ret);
369 if (ret < 0) {
370 dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
371 return ret;
372 }
373
374 if (status) {
375 /* Set slope duration (no of samples) */
376 ret = i2c_smbus_write_byte_data(data->client,
377 BMC150_ACCEL_REG_INT_5,
378 data->slope_dur);
379 if (ret < 0) {
380 dev_err(&data->client->dev, "Error write reg_int_5\n");
381 return ret;
382 }
383
384 /* Set slope thresholds */
385 ret = i2c_smbus_write_byte_data(data->client,
386 BMC150_ACCEL_REG_INT_6,
387 data->slope_thres);
388 if (ret < 0) {
389 dev_err(&data->client->dev, "Error write reg_int_6\n");
390 return ret;
391 }
392
393 /*
394 * New data interrupt is always non-latched,
395 * which will have higher priority, so no need
396 * to set latched mode, we will be flooded anyway with INTR
397 */
398 if (!data->dready_trigger_on) {
399 ret = i2c_smbus_write_byte_data(data->client,
400 BMC150_ACCEL_REG_INT_RST_LATCH,
401 BMC150_ACCEL_INT_MODE_LATCH_INT |
402 BMC150_ACCEL_INT_MODE_LATCH_RESET);
403 if (ret < 0) {
404 dev_err(&data->client->dev,
405 "Error writing reg_int_rst_latch\n");
406 return ret;
407 }
408 }
409
410 ret = i2c_smbus_write_byte_data(data->client,
411 BMC150_ACCEL_REG_INT_EN_0,
412 BMC150_ACCEL_INT_EN_BIT_SLP_X |
413 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
414 BMC150_ACCEL_INT_EN_BIT_SLP_Z);
415 } else
416 ret = i2c_smbus_write_byte_data(data->client,
417 BMC150_ACCEL_REG_INT_EN_0,
418 0);
419
420 if (ret < 0) {
421 dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
422 return ret;
423 }
424
425 return 0;
426}
427
428static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
429 bool status)
430{
431 int ret;
432
433 /* Enable/Disable INT1 mapping */
434 ret = i2c_smbus_read_byte_data(data->client,
435 BMC150_ACCEL_REG_INT_MAP_1);
436 if (ret < 0) {
437 dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
438 return ret;
439 }
440 if (status)
441 ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
442 else
443 ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
444
445 ret = i2c_smbus_write_byte_data(data->client,
446 BMC150_ACCEL_REG_INT_MAP_1,
447 ret);
448 if (ret < 0) {
449 dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
450 return ret;
451 }
452
453 if (status) {
454 /*
455 * Set non latched mode interrupt and clear any latched
456 * interrupt
457 */
458 ret = i2c_smbus_write_byte_data(data->client,
459 BMC150_ACCEL_REG_INT_RST_LATCH,
460 BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
461 BMC150_ACCEL_INT_MODE_LATCH_RESET);
462 if (ret < 0) {
463 dev_err(&data->client->dev,
464 "Error writing reg_int_rst_latch\n");
465 return ret;
466 }
467
468 ret = i2c_smbus_write_byte_data(data->client,
469 BMC150_ACCEL_REG_INT_EN_1,
470 BMC150_ACCEL_INT_EN_BIT_DATA_EN);
471
472 } else {
473 /* Restore default interrupt mode */
474 ret = i2c_smbus_write_byte_data(data->client,
475 BMC150_ACCEL_REG_INT_RST_LATCH,
476 BMC150_ACCEL_INT_MODE_LATCH_INT |
477 BMC150_ACCEL_INT_MODE_LATCH_RESET);
478 if (ret < 0) {
479 dev_err(&data->client->dev,
480 "Error writing reg_int_rst_latch\n");
481 return ret;
482 }
483
484 ret = i2c_smbus_write_byte_data(data->client,
485 BMC150_ACCEL_REG_INT_EN_1,
486 0);
487 }
488
489 if (ret < 0) {
490 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
491 return ret;
492 }
493
494 return 0;
495}
496
497static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
498 int *val2)
499{
500 int i;
501
502 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
503 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
504 *val = bmc150_accel_samp_freq_table[i].val;
505 *val2 = bmc150_accel_samp_freq_table[i].val2;
506 return IIO_VAL_INT_PLUS_MICRO;
507 }
508 }
509
510 return -EINVAL;
511}
512
513#ifdef CONFIG_PM_RUNTIME
514static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
515{
516 int i;
517
518 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
519 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
520 return bmc150_accel_sample_upd_time[i].msec;
521 }
522
523 return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
524}
525
526static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
527{
528 int ret;
529
530 if (on)
531 ret = pm_runtime_get_sync(&data->client->dev);
532 else {
533 pm_runtime_mark_last_busy(&data->client->dev);
534 ret = pm_runtime_put_autosuspend(&data->client->dev);
535 }
536 if (ret < 0) {
537 dev_err(&data->client->dev,
538 "Failed: bmc150_accel_set_power_state for %d\n", on);
539 return ret;
540 }
541
542 return 0;
543}
544#else
545static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
546{
547 return 0;
548}
549#endif
550
551static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
552{
553 int ret, i;
554
555 for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
556 if (data->chip_info->scale_table[i].scale == val) {
557 ret = i2c_smbus_write_byte_data(
558 data->client,
559 BMC150_ACCEL_REG_PMU_RANGE,
560 data->chip_info->scale_table[i].reg_range);
561 if (ret < 0) {
562 dev_err(&data->client->dev,
563 "Error writing pmu_range\n");
564 return ret;
565 }
566
567 data->range = data->chip_info->scale_table[i].reg_range;
568 return 0;
569 }
570 }
571
572 return -EINVAL;
573}
574
575static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
576{
577 int ret;
578
579 mutex_lock(&data->mutex);
580
581 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
582 if (ret < 0) {
583 dev_err(&data->client->dev, "Error reading reg_temp\n");
584 mutex_unlock(&data->mutex);
585 return ret;
586 }
587 *val = sign_extend32(ret, 7);
588
589 mutex_unlock(&data->mutex);
590
591 return IIO_VAL_INT;
592}
593
594static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
595 struct iio_chan_spec const *chan,
596 int *val)
597{
598 int ret;
599 int axis = chan->scan_index;
600
601 mutex_lock(&data->mutex);
602 ret = bmc150_accel_set_power_state(data, true);
603 if (ret < 0) {
604 mutex_unlock(&data->mutex);
605 return ret;
606 }
607
608 ret = i2c_smbus_read_word_data(data->client,
609 BMC150_ACCEL_AXIS_TO_REG(axis));
610 if (ret < 0) {
611 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
612 bmc150_accel_set_power_state(data, false);
613 mutex_unlock(&data->mutex);
614 return ret;
615 }
616 *val = sign_extend32(ret >> chan->scan_type.shift,
617 chan->scan_type.realbits - 1);
618 ret = bmc150_accel_set_power_state(data, false);
619 mutex_unlock(&data->mutex);
620 if (ret < 0)
621 return ret;
622
623 return IIO_VAL_INT;
624}
625
626static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
627 struct iio_chan_spec const *chan,
628 int *val, int *val2, long mask)
629{
630 struct bmc150_accel_data *data = iio_priv(indio_dev);
631 int ret;
632
633 switch (mask) {
634 case IIO_CHAN_INFO_RAW:
635 switch (chan->type) {
636 case IIO_TEMP:
637 return bmc150_accel_get_temp(data, val);
638 case IIO_ACCEL:
639 if (iio_buffer_enabled(indio_dev))
640 return -EBUSY;
641 else
642 return bmc150_accel_get_axis(data, chan, val);
643 default:
644 return -EINVAL;
645 }
646 case IIO_CHAN_INFO_OFFSET:
647 if (chan->type == IIO_TEMP) {
648 *val = BMC150_ACCEL_TEMP_CENTER_VAL;
649 return IIO_VAL_INT;
650 } else
651 return -EINVAL;
652 case IIO_CHAN_INFO_SCALE:
653 *val = 0;
654 switch (chan->type) {
655 case IIO_TEMP:
656 *val2 = 500000;
657 return IIO_VAL_INT_PLUS_MICRO;
658 case IIO_ACCEL:
659 {
660 int i;
661 const struct bmc150_scale_info *si;
662 int st_size = ARRAY_SIZE(data->chip_info->scale_table);
663
664 for (i = 0; i < st_size; ++i) {
665 si = &data->chip_info->scale_table[i];
666 if (si->reg_range == data->range) {
667 *val2 = si->scale;
668 return IIO_VAL_INT_PLUS_MICRO;
669 }
670 }
671 return -EINVAL;
672 }
673 default:
674 return -EINVAL;
675 }
676 case IIO_CHAN_INFO_SAMP_FREQ:
677 mutex_lock(&data->mutex);
678 ret = bmc150_accel_get_bw(data, val, val2);
679 mutex_unlock(&data->mutex);
680 return ret;
681 default:
682 return -EINVAL;
683 }
684}
685
686static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
687 struct iio_chan_spec const *chan,
688 int val, int val2, long mask)
689{
690 struct bmc150_accel_data *data = iio_priv(indio_dev);
691 int ret;
692
693 switch (mask) {
694 case IIO_CHAN_INFO_SAMP_FREQ:
695 mutex_lock(&data->mutex);
696 ret = bmc150_accel_set_bw(data, val, val2);
697 mutex_unlock(&data->mutex);
698 break;
699 case IIO_CHAN_INFO_SCALE:
700 if (val)
701 return -EINVAL;
702
703 mutex_lock(&data->mutex);
704 ret = bmc150_accel_set_scale(data, val2);
705 mutex_unlock(&data->mutex);
706 return ret;
707 default:
708 ret = -EINVAL;
709 }
710
711 return ret;
712}
713
714static int bmc150_accel_read_event(struct iio_dev *indio_dev,
715 const struct iio_chan_spec *chan,
716 enum iio_event_type type,
717 enum iio_event_direction dir,
718 enum iio_event_info info,
719 int *val, int *val2)
720{
721 struct bmc150_accel_data *data = iio_priv(indio_dev);
722
723 *val2 = 0;
724 switch (info) {
725 case IIO_EV_INFO_VALUE:
726 *val = data->slope_thres;
727 break;
728 case IIO_EV_INFO_PERIOD:
729 *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
730 break;
731 default:
732 return -EINVAL;
733 }
734
735 return IIO_VAL_INT;
736}
737
738static int bmc150_accel_write_event(struct iio_dev *indio_dev,
739 const struct iio_chan_spec *chan,
740 enum iio_event_type type,
741 enum iio_event_direction dir,
742 enum iio_event_info info,
743 int val, int val2)
744{
745 struct bmc150_accel_data *data = iio_priv(indio_dev);
746
747 if (data->ev_enable_state)
748 return -EBUSY;
749
750 switch (info) {
751 case IIO_EV_INFO_VALUE:
752 data->slope_thres = val;
753 break;
754 case IIO_EV_INFO_PERIOD:
755 data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
756 data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
757 break;
758 default:
759 return -EINVAL;
760 }
761
762 return 0;
763}
764
765static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
766 const struct iio_chan_spec *chan,
767 enum iio_event_type type,
768 enum iio_event_direction dir)
769{
770
771 struct bmc150_accel_data *data = iio_priv(indio_dev);
772
773 return data->ev_enable_state;
774}
775
776static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
777 const struct iio_chan_spec *chan,
778 enum iio_event_type type,
779 enum iio_event_direction dir,
780 int state)
781{
782 struct bmc150_accel_data *data = iio_priv(indio_dev);
783 int ret;
784
785 if (state && data->ev_enable_state)
786 return 0;
787
788 mutex_lock(&data->mutex);
789
790 if (!state && data->motion_trigger_on) {
791 data->ev_enable_state = 0;
792 mutex_unlock(&data->mutex);
793 return 0;
794 }
795
796 /*
797 * We will expect the enable and disable to do operation in
798 * in reverse order. This will happen here anyway as our
799 * resume operation uses sync mode runtime pm calls, the
800 * suspend operation will be delayed by autosuspend delay
801 * So the disable operation will still happen in reverse of
802 * enable operation. When runtime pm is disabled the mode
803 * is always on so sequence doesn't matter
804 */
805
806 ret = bmc150_accel_set_power_state(data, state);
807 if (ret < 0) {
808 mutex_unlock(&data->mutex);
809 return ret;
810 }
811
812 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
813 if (ret < 0) {
814 mutex_unlock(&data->mutex);
815 return ret;
816 }
817
818 data->ev_enable_state = state;
819 mutex_unlock(&data->mutex);
820
821 return 0;
822}
823
824static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
825 struct iio_trigger *trig)
826{
827 struct bmc150_accel_data *data = iio_priv(indio_dev);
828
829 if (data->dready_trig != trig && data->motion_trig != trig)
830 return -EINVAL;
831
832 return 0;
833}
834
835static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
836 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
837
838static struct attribute *bmc150_accel_attributes[] = {
839 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
840 NULL,
841};
842
843static const struct attribute_group bmc150_accel_attrs_group = {
844 .attrs = bmc150_accel_attributes,
845};
846
847static const struct iio_event_spec bmc150_accel_event = {
848 .type = IIO_EV_TYPE_ROC,
849 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
850 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
851 BIT(IIO_EV_INFO_ENABLE) |
852 BIT(IIO_EV_INFO_PERIOD)
853};
854
855#define BMC150_ACCEL_CHANNEL(_axis, bits) { \
856 .type = IIO_ACCEL, \
857 .modified = 1, \
858 .channel2 = IIO_MOD_##_axis, \
859 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
860 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
861 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
862 .scan_index = AXIS_##_axis, \
863 .scan_type = { \
864 .sign = 's', \
865 .realbits = (bits), \
866 .storagebits = 16, \
867 .shift = 16 - (bits), \
868 }, \
869 .event_spec = &bmc150_accel_event, \
870 .num_event_specs = 1 \
871}
872
873#define BMC150_ACCEL_CHANNELS(bits) { \
874 { \
875 .type = IIO_TEMP, \
876 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
877 BIT(IIO_CHAN_INFO_SCALE) | \
878 BIT(IIO_CHAN_INFO_OFFSET), \
879 .scan_index = -1, \
880 }, \
881 BMC150_ACCEL_CHANNEL(X, bits), \
882 BMC150_ACCEL_CHANNEL(Y, bits), \
883 BMC150_ACCEL_CHANNEL(Z, bits), \
884 IIO_CHAN_SOFT_TIMESTAMP(3), \
885}
886
887static const struct iio_chan_spec bma222e_accel_channels[] =
888 BMC150_ACCEL_CHANNELS(8);
889static const struct iio_chan_spec bma250e_accel_channels[] =
890 BMC150_ACCEL_CHANNELS(10);
891static const struct iio_chan_spec bmc150_accel_channels[] =
892 BMC150_ACCEL_CHANNELS(12);
893static const struct iio_chan_spec bma280_accel_channels[] =
894 BMC150_ACCEL_CHANNELS(14);
895
896enum {
897 bmc150,
898 bmi055,
899 bma255,
900 bma250e,
901 bma222e,
902 bma280,
903};
904
905static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
906 [bmc150] = {
907 .chip_id = 0xFA,
908 .channels = bmc150_accel_channels,
909 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
910 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
911 {19122, BMC150_ACCEL_DEF_RANGE_4G},
912 {38344, BMC150_ACCEL_DEF_RANGE_8G},
913 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
914 },
915 [bmi055] = {
916 .chip_id = 0xFA,
917 .channels = bmc150_accel_channels,
918 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
919 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
920 {19122, BMC150_ACCEL_DEF_RANGE_4G},
921 {38344, BMC150_ACCEL_DEF_RANGE_8G},
922 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
923 },
924 [bma255] = {
925 .chip_id = 0xFA,
926 .channels = bmc150_accel_channels,
927 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
928 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
929 {19122, BMC150_ACCEL_DEF_RANGE_4G},
930 {38344, BMC150_ACCEL_DEF_RANGE_8G},
931 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
932 },
933 [bma250e] = {
934 .chip_id = 0xF9,
935 .channels = bma250e_accel_channels,
936 .num_channels = ARRAY_SIZE(bma250e_accel_channels),
937 .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G},
938 {76590, BMC150_ACCEL_DEF_RANGE_4G},
939 {153277, BMC150_ACCEL_DEF_RANGE_8G},
940 {306457, BMC150_ACCEL_DEF_RANGE_16G} },
941 },
942 [bma222e] = {
943 .chip_id = 0xF8,
944 .channels = bma222e_accel_channels,
945 .num_channels = ARRAY_SIZE(bma222e_accel_channels),
946 .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G},
947 {306457, BMC150_ACCEL_DEF_RANGE_4G},
948 {612915, BMC150_ACCEL_DEF_RANGE_8G},
949 {1225831, BMC150_ACCEL_DEF_RANGE_16G} },
950 },
951 [bma280] = {
952 .chip_id = 0xFB,
953 .channels = bma280_accel_channels,
954 .num_channels = ARRAY_SIZE(bma280_accel_channels),
955 .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G},
956 {4785, BMC150_ACCEL_DEF_RANGE_4G},
957 {9581, BMC150_ACCEL_DEF_RANGE_8G},
958 {19152, BMC150_ACCEL_DEF_RANGE_16G} },
959 },
960};
961
962static const struct iio_info bmc150_accel_info = {
963 .attrs = &bmc150_accel_attrs_group,
964 .read_raw = bmc150_accel_read_raw,
965 .write_raw = bmc150_accel_write_raw,
966 .read_event_value = bmc150_accel_read_event,
967 .write_event_value = bmc150_accel_write_event,
968 .write_event_config = bmc150_accel_write_event_config,
969 .read_event_config = bmc150_accel_read_event_config,
970 .validate_trigger = bmc150_accel_validate_trigger,
971 .driver_module = THIS_MODULE,
972};
973
974static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
975{
976 struct iio_poll_func *pf = p;
977 struct iio_dev *indio_dev = pf->indio_dev;
978 struct bmc150_accel_data *data = iio_priv(indio_dev);
979 int bit, ret, i = 0;
980
981 mutex_lock(&data->mutex);
982 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
983 indio_dev->masklength) {
984 ret = i2c_smbus_read_word_data(data->client,
985 BMC150_ACCEL_AXIS_TO_REG(bit));
986 if (ret < 0) {
987 mutex_unlock(&data->mutex);
988 goto err_read;
989 }
990 data->buffer[i++] = ret;
991 }
992 mutex_unlock(&data->mutex);
993
994 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
995 data->timestamp);
996err_read:
997 iio_trigger_notify_done(indio_dev->trig);
998
999 return IRQ_HANDLED;
1000}
1001
1002static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
1003{
1004 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1005 struct bmc150_accel_data *data = iio_priv(indio_dev);
1006 int ret;
1007
1008 /* new data interrupts don't need ack */
1009 if (data->dready_trigger_on)
1010 return 0;
1011
1012 mutex_lock(&data->mutex);
1013 /* clear any latched interrupt */
1014 ret = i2c_smbus_write_byte_data(data->client,
1015 BMC150_ACCEL_REG_INT_RST_LATCH,
1016 BMC150_ACCEL_INT_MODE_LATCH_INT |
1017 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1018 mutex_unlock(&data->mutex);
1019 if (ret < 0) {
1020 dev_err(&data->client->dev,
1021 "Error writing reg_int_rst_latch\n");
1022 return ret;
1023 }
1024
1025 return 0;
1026}
1027
1028static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
1029 bool state)
1030{
1031 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1032 struct bmc150_accel_data *data = iio_priv(indio_dev);
1033 int ret;
1034
1035 mutex_lock(&data->mutex);
1036
1037 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1038 data->motion_trigger_on = false;
1039 mutex_unlock(&data->mutex);
1040 return 0;
1041 }
1042
1043 /*
1044 * Refer to comment in bmc150_accel_write_event_config for
1045 * enable/disable operation order
1046 */
1047 ret = bmc150_accel_set_power_state(data, state);
1048 if (ret < 0) {
1049 mutex_unlock(&data->mutex);
1050 return ret;
1051 }
1052 if (data->motion_trig == trig)
1053 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
1054 else
1055 ret = bmc150_accel_setup_new_data_interrupt(data, state);
1056 if (ret < 0) {
1057 mutex_unlock(&data->mutex);
1058 return ret;
1059 }
1060 if (data->motion_trig == trig)
1061 data->motion_trigger_on = state;
1062 else
1063 data->dready_trigger_on = state;
1064
1065 mutex_unlock(&data->mutex);
1066
1067 return ret;
1068}
1069
1070static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
1071 .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
1072 .try_reenable = bmc150_accel_trig_try_reen,
1073 .owner = THIS_MODULE,
1074};
1075
1076static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
1077{
1078 struct iio_dev *indio_dev = private;
1079 struct bmc150_accel_data *data = iio_priv(indio_dev);
1080 int ret;
1081 int dir;
1082
1083 ret = i2c_smbus_read_byte_data(data->client,
1084 BMC150_ACCEL_REG_INT_STATUS_2);
1085 if (ret < 0) {
1086 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
1087 goto ack_intr_status;
1088 }
1089
1090 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
1091 dir = IIO_EV_DIR_FALLING;
1092 else
1093 dir = IIO_EV_DIR_RISING;
1094
1095 if (ret & BMC150_ACCEL_ANY_MOTION_MASK)
1096 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1097 0,
1098 IIO_MOD_X_OR_Y_OR_Z,
1099 IIO_EV_TYPE_ROC,
1100 IIO_EV_DIR_EITHER),
1101 data->timestamp);
1102ack_intr_status:
1103 if (!data->dready_trigger_on)
1104 ret = i2c_smbus_write_byte_data(data->client,
1105 BMC150_ACCEL_REG_INT_RST_LATCH,
1106 BMC150_ACCEL_INT_MODE_LATCH_INT |
1107 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1108
1109 return IRQ_HANDLED;
1110}
1111
1112static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1113{
1114 struct iio_dev *indio_dev = private;
1115 struct bmc150_accel_data *data = iio_priv(indio_dev);
1116
1117 data->timestamp = iio_get_time_ns();
1118
1119 if (data->dready_trigger_on)
1120 iio_trigger_poll(data->dready_trig);
1121 else if (data->motion_trigger_on)
1122 iio_trigger_poll(data->motion_trig);
1123
1124 if (data->ev_enable_state)
1125 return IRQ_WAKE_THREAD;
1126 else
1127 return IRQ_HANDLED;
1128}
1129
1130static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
1131{
1132 const struct acpi_device_id *id;
1133
1134 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1135
1136 if (!id)
1137 return NULL;
1138
1139 *data = (int) id->driver_data;
1140
1141 return dev_name(dev);
1142}
1143
1144static int bmc150_accel_gpio_probe(struct i2c_client *client,
1145 struct bmc150_accel_data *data)
1146{
1147 struct device *dev;
1148 struct gpio_desc *gpio;
1149 int ret;
1150
1151 if (!client)
1152 return -EINVAL;
1153
1154 dev = &client->dev;
1155
1156 /* data ready gpio interrupt pin */
1157 gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
1158 if (IS_ERR(gpio)) {
1159 dev_err(dev, "Failed: gpio get index\n");
1160 return PTR_ERR(gpio);
1161 }
1162
1163 ret = gpiod_direction_input(gpio);
1164 if (ret)
1165 return ret;
1166
1167 ret = gpiod_to_irq(gpio);
1168
1169 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1170
1171 return ret;
1172}
1173
1174static int bmc150_accel_probe(struct i2c_client *client,
1175 const struct i2c_device_id *id)
1176{
1177 struct bmc150_accel_data *data;
1178 struct iio_dev *indio_dev;
1179 int ret;
1180 const char *name = NULL;
1181 int chip_id = 0;
1182
1183 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1184 if (!indio_dev)
1185 return -ENOMEM;
1186
1187 data = iio_priv(indio_dev);
1188 i2c_set_clientdata(client, indio_dev);
1189 data->client = client;
1190
1191 if (id) {
1192 name = id->name;
1193 chip_id = id->driver_data;
1194 }
1195
1196 if (ACPI_HANDLE(&client->dev))
1197 name = bmc150_accel_match_acpi_device(&client->dev, &chip_id);
1198
1199 data->chip_info = &bmc150_accel_chip_info_tbl[chip_id];
1200
1201 ret = bmc150_accel_chip_init(data);
1202 if (ret < 0)
1203 return ret;
1204
1205 mutex_init(&data->mutex);
1206
1207 indio_dev->dev.parent = &client->dev;
1208 indio_dev->channels = data->chip_info->channels;
1209 indio_dev->num_channels = data->chip_info->num_channels;
1210 indio_dev->name = name;
1211 indio_dev->modes = INDIO_DIRECT_MODE;
1212 indio_dev->info = &bmc150_accel_info;
1213
1214 if (client->irq < 0)
1215 client->irq = bmc150_accel_gpio_probe(client, data);
1216
1217 if (client->irq >= 0) {
1218 ret = devm_request_threaded_irq(
1219 &client->dev, client->irq,
1220 bmc150_accel_data_rdy_trig_poll,
1221 bmc150_accel_event_handler,
1222 IRQF_TRIGGER_RISING,
1223 BMC150_ACCEL_IRQ_NAME,
1224 indio_dev);
1225 if (ret)
1226 return ret;
1227
1228 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1229 "%s-dev%d",
1230 indio_dev->name,
1231 indio_dev->id);
1232 if (!data->dready_trig)
1233 return -ENOMEM;
1234
1235 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1236 "%s-any-motion-dev%d",
1237 indio_dev->name,
1238 indio_dev->id);
1239 if (!data->motion_trig)
1240 return -ENOMEM;
1241
1242 data->dready_trig->dev.parent = &client->dev;
1243 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1244 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1245 ret = iio_trigger_register(data->dready_trig);
1246 if (ret)
1247 return ret;
1248
1249 data->motion_trig->dev.parent = &client->dev;
1250 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1251 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1252 ret = iio_trigger_register(data->motion_trig);
1253 if (ret) {
1254 data->motion_trig = NULL;
1255 goto err_trigger_unregister;
1256 }
1257
1258 ret = iio_triggered_buffer_setup(indio_dev,
1259 &iio_pollfunc_store_time,
1260 bmc150_accel_trigger_handler,
1261 NULL);
1262 if (ret < 0) {
1263 dev_err(&client->dev,
1264 "Failed: iio triggered buffer setup\n");
1265 goto err_trigger_unregister;
1266 }
1267 }
1268
1269 ret = iio_device_register(indio_dev);
1270 if (ret < 0) {
1271 dev_err(&client->dev, "Unable to register iio device\n");
1272 goto err_buffer_cleanup;
1273 }
1274
1275 ret = pm_runtime_set_active(&client->dev);
1276 if (ret)
1277 goto err_iio_unregister;
1278
1279 pm_runtime_enable(&client->dev);
1280 pm_runtime_set_autosuspend_delay(&client->dev,
1281 BMC150_AUTO_SUSPEND_DELAY_MS);
1282 pm_runtime_use_autosuspend(&client->dev);
1283
1284 return 0;
1285
1286err_iio_unregister:
1287 iio_device_unregister(indio_dev);
1288err_buffer_cleanup:
1289 if (data->dready_trig)
1290 iio_triggered_buffer_cleanup(indio_dev);
1291err_trigger_unregister:
1292 if (data->dready_trig)
1293 iio_trigger_unregister(data->dready_trig);
1294 if (data->motion_trig)
1295 iio_trigger_unregister(data->motion_trig);
1296
1297 return ret;
1298}
1299
1300static int bmc150_accel_remove(struct i2c_client *client)
1301{
1302 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1303 struct bmc150_accel_data *data = iio_priv(indio_dev);
1304
1305 pm_runtime_disable(&client->dev);
1306 pm_runtime_set_suspended(&client->dev);
1307 pm_runtime_put_noidle(&client->dev);
1308
1309 iio_device_unregister(indio_dev);
1310
1311 if (data->dready_trig) {
1312 iio_triggered_buffer_cleanup(indio_dev);
1313 iio_trigger_unregister(data->dready_trig);
1314 iio_trigger_unregister(data->motion_trig);
1315 }
1316
1317 mutex_lock(&data->mutex);
1318 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1319 mutex_unlock(&data->mutex);
1320
1321 return 0;
1322}
1323
1324#ifdef CONFIG_PM_SLEEP
1325static int bmc150_accel_suspend(struct device *dev)
1326{
1327 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1328 struct bmc150_accel_data *data = iio_priv(indio_dev);
1329
1330 mutex_lock(&data->mutex);
1331 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1332 mutex_unlock(&data->mutex);
1333
1334 return 0;
1335}
1336
1337static int bmc150_accel_resume(struct device *dev)
1338{
1339 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1340 struct bmc150_accel_data *data = iio_priv(indio_dev);
1341
1342 mutex_lock(&data->mutex);
1343 if (data->dready_trigger_on || data->motion_trigger_on ||
1344 data->ev_enable_state)
1345 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1346 mutex_unlock(&data->mutex);
1347
1348 return 0;
1349}
1350#endif
1351
1352#ifdef CONFIG_PM_RUNTIME
1353static int bmc150_accel_runtime_suspend(struct device *dev)
1354{
1355 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1356 struct bmc150_accel_data *data = iio_priv(indio_dev);
1357
1358 dev_dbg(&data->client->dev, __func__);
1359
1360 return bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1361}
1362
1363static int bmc150_accel_runtime_resume(struct device *dev)
1364{
1365 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1366 struct bmc150_accel_data *data = iio_priv(indio_dev);
1367 int ret;
1368 int sleep_val;
1369
1370 dev_dbg(&data->client->dev, __func__);
1371
1372 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1373 if (ret < 0)
1374 return ret;
1375
1376 sleep_val = bmc150_accel_get_startup_times(data);
1377 if (sleep_val < 20)
1378 usleep_range(sleep_val * 1000, 20000);
1379 else
1380 msleep_interruptible(sleep_val);
1381
1382 return 0;
1383}
1384#endif
1385
1386static const struct dev_pm_ops bmc150_accel_pm_ops = {
1387 SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1388 SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1389 bmc150_accel_runtime_resume, NULL)
1390};
1391
1392static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1393 {"BSBA0150", bmc150},
1394 {"BMC150A", bmc150},
1395 {"BMI055A", bmi055},
1396 {"BMA0255", bma255},
1397 {"BMA250E", bma250e},
1398 {"BMA222E", bma222e},
1399 {"BMA0280", bma280},
1400 { },
1401};
1402MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1403
1404static const struct i2c_device_id bmc150_accel_id[] = {
1405 {"bmc150_accel", bmc150},
1406 {"bmi055_accel", bmi055},
1407 {"bma255", bma255},
1408 {"bma250e", bma250e},
1409 {"bma222e", bma222e},
1410 {"bma280", bma280},
1411 {}
1412};
1413
1414MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1415
1416static struct i2c_driver bmc150_accel_driver = {
1417 .driver = {
1418 .name = BMC150_ACCEL_DRV_NAME,
1419 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1420 .pm = &bmc150_accel_pm_ops,
1421 },
1422 .probe = bmc150_accel_probe,
1423 .remove = bmc150_accel_remove,
1424 .id_table = bmc150_accel_id,
1425};
1426module_i2c_driver(bmc150_accel_driver);
1427
1428MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1429MODULE_LICENSE("GPL v2");
1430MODULE_DESCRIPTION("BMC150 accelerometer driver");
diff --git a/drivers/iio/accel/hid-sensor-accel-3d.c b/drivers/iio/accel/hid-sensor-accel-3d.c
index 54e464e4bb72..d5d95317003a 100644
--- a/drivers/iio/accel/hid-sensor-accel-3d.c
+++ b/drivers/iio/accel/hid-sensor-accel-3d.c
@@ -419,7 +419,6 @@ static struct platform_driver hid_accel_3d_platform_driver = {
419 .id_table = hid_accel_3d_ids, 419 .id_table = hid_accel_3d_ids,
420 .driver = { 420 .driver = {
421 .name = KBUILD_MODNAME, 421 .name = KBUILD_MODNAME,
422 .owner = THIS_MODULE,
423 }, 422 },
424 .probe = hid_accel_3d_probe, 423 .probe = hid_accel_3d_probe,
425 .remove = hid_accel_3d_remove, 424 .remove = hid_accel_3d_remove,
diff --git a/drivers/iio/accel/kxcjk-1013.c b/drivers/iio/accel/kxcjk-1013.c
index 7941cf2d31ee..a23e58c4ed99 100644
--- a/drivers/iio/accel/kxcjk-1013.c
+++ b/drivers/iio/accel/kxcjk-1013.c
@@ -21,10 +21,13 @@
21#include <linux/string.h> 21#include <linux/string.h>
22#include <linux/acpi.h> 22#include <linux/acpi.h>
23#include <linux/gpio/consumer.h> 23#include <linux/gpio/consumer.h>
24#include <linux/pm.h>
25#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h> 26#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h> 27#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h> 28#include <linux/iio/buffer.h>
27#include <linux/iio/trigger.h> 29#include <linux/iio/trigger.h>
30#include <linux/iio/events.h>
28#include <linux/iio/trigger_consumer.h> 31#include <linux/iio/trigger_consumer.h>
29#include <linux/iio/triggered_buffer.h> 32#include <linux/iio/triggered_buffer.h>
30#include <linux/iio/accel/kxcjk_1013.h> 33#include <linux/iio/accel/kxcjk_1013.h>
@@ -71,15 +74,40 @@
71#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 74#define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
72#define KXCJK1013_MAX_STARTUP_TIME_US 100000 75#define KXCJK1013_MAX_STARTUP_TIME_US 100000
73 76
77#define KXCJK1013_SLEEP_DELAY_MS 2000
78
79#define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
80#define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
81#define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
82#define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
83#define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
84#define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
85
86#define KXCJK1013_DEFAULT_WAKE_THRES 1
87
88enum kx_chipset {
89 KXCJK1013,
90 KXCJ91008,
91 KXTJ21009,
92 KX_MAX_CHIPS /* this must be last */
93};
94
74struct kxcjk1013_data { 95struct kxcjk1013_data {
75 struct i2c_client *client; 96 struct i2c_client *client;
76 struct iio_trigger *trig; 97 struct iio_trigger *dready_trig;
77 bool trig_mode; 98 struct iio_trigger *motion_trig;
78 struct mutex mutex; 99 struct mutex mutex;
79 s16 buffer[8]; 100 s16 buffer[8];
80 int power_state;
81 u8 odr_bits; 101 u8 odr_bits;
102 u8 range;
103 int wake_thres;
104 int wake_dur;
82 bool active_high_intr; 105 bool active_high_intr;
106 bool dready_trigger_on;
107 int ev_enable_state;
108 bool motion_trigger_on;
109 int64_t timestamp;
110 enum kx_chipset chipset;
83}; 111};
84 112
85enum kxcjk1013_axis { 113enum kxcjk1013_axis {
@@ -93,6 +121,12 @@ enum kxcjk1013_mode {
93 OPERATION, 121 OPERATION,
94}; 122};
95 123
124enum kxcjk1013_range {
125 KXCJK1013_RANGE_2G,
126 KXCJK1013_RANGE_4G,
127 KXCJK1013_RANGE_8G,
128};
129
96static const struct { 130static const struct {
97 int val; 131 int val;
98 int val2; 132 int val2;
@@ -107,10 +141,78 @@ static const struct {
107static const struct { 141static const struct {
108 int odr_bits; 142 int odr_bits;
109 int usec; 143 int usec;
110} odr_start_up_times[] = { {0x08, 100000}, {0x09, 100000}, {0x0A, 100000}, 144} odr_start_up_times[KX_MAX_CHIPS][12] = {
111 {0x0B, 100000}, { 0, 80000}, {0x01, 41000}, 145 /* KXCJK-1013 */
112 {0x02, 21000}, {0x03, 11000}, {0x04, 6400}, 146 {
113 {0x05, 3900}, {0x06, 2700}, {0x07, 2100} }; 147 {0x08, 100000},
148 {0x09, 100000},
149 {0x0A, 100000},
150 {0x0B, 100000},
151 {0, 80000},
152 {0x01, 41000},
153 {0x02, 21000},
154 {0x03, 11000},
155 {0x04, 6400},
156 {0x05, 3900},
157 {0x06, 2700},
158 {0x07, 2100},
159 },
160 /* KXCJ9-1008 */
161 {
162 {0x08, 100000},
163 {0x09, 100000},
164 {0x0A, 100000},
165 {0x0B, 100000},
166 {0, 80000},
167 {0x01, 41000},
168 {0x02, 21000},
169 {0x03, 11000},
170 {0x04, 6400},
171 {0x05, 3900},
172 {0x06, 2700},
173 {0x07, 2100},
174 },
175 /* KXCTJ2-1009 */
176 {
177 {0x08, 1240000},
178 {0x09, 621000},
179 {0x0A, 309000},
180 {0x0B, 151000},
181 {0, 80000},
182 {0x01, 41000},
183 {0x02, 21000},
184 {0x03, 11000},
185 {0x04, 6000},
186 {0x05, 4000},
187 {0x06, 3000},
188 {0x07, 2000},
189 },
190};
191
192static const struct {
193 u16 scale;
194 u8 gsel_0;
195 u8 gsel_1;
196} KXCJK1013_scale_table[] = { {9582, 0, 0},
197 {19163, 1, 0},
198 {38326, 0, 1} };
199
200static const struct {
201 int val;
202 int val2;
203 int odr_bits;
204} wake_odr_data_rate_table[] = { {0, 781000, 0x00},
205 {1, 563000, 0x01},
206 {3, 125000, 0x02},
207 {6, 250000, 0x03},
208 {12, 500000, 0x04},
209 {25, 0, 0x05},
210 {50, 0, 0x06},
211 {100, 0, 0x06},
212 {200, 0, 0x06},
213 {400, 0, 0x06},
214 {800, 0, 0x06},
215 {1600, 0, 0x06} };
114 216
115static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 217static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
116 enum kxcjk1013_mode mode) 218 enum kxcjk1013_mode mode)
@@ -138,6 +240,51 @@ static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
138 return 0; 240 return 0;
139} 241}
140 242
243static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
244 enum kxcjk1013_mode *mode)
245{
246 int ret;
247
248 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
249 if (ret < 0) {
250 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
251 return ret;
252 }
253
254 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
255 *mode = OPERATION;
256 else
257 *mode = STANDBY;
258
259 return 0;
260}
261
262static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
263{
264 int ret;
265
266 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
267 if (ret < 0) {
268 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
269 return ret;
270 }
271
272 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
273 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
274
275 ret = i2c_smbus_write_byte_data(data->client,
276 KXCJK1013_REG_CTRL1,
277 ret);
278 if (ret < 0) {
279 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
280 return ret;
281 }
282
283 data->range = range_index;
284
285 return 0;
286}
287
141static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 288static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
142{ 289{
143 int ret; 290 int ret;
@@ -160,10 +307,6 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
160 return ret; 307 return ret;
161 } 308 }
162 309
163 /* Setting range to 4G */
164 ret |= KXCJK1013_REG_CTRL1_BIT_GSEL0;
165 ret &= ~KXCJK1013_REG_CTRL1_BIT_GSEL1;
166
167 /* Set 12 bit mode */ 310 /* Set 12 bit mode */
168 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 311 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
169 312
@@ -174,6 +317,11 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
174 return ret; 317 return ret;
175 } 318 }
176 319
320 /* Setting range to 4G */
321 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
322 if (ret < 0)
323 return ret;
324
177 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 325 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
178 if (ret < 0) { 326 if (ret < 0) {
179 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 327 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
@@ -201,14 +349,147 @@ static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
201 return ret; 349 return ret;
202 } 350 }
203 351
352 ret = kxcjk1013_set_mode(data, OPERATION);
353 if (ret < 0)
354 return ret;
355
356 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
357
204 return 0; 358 return 0;
205} 359}
206 360
207static int kxcjk1013_chip_setup_interrupt(struct kxcjk1013_data *data, 361#ifdef CONFIG_PM_RUNTIME
208 bool status) 362static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
363{
364 int i;
365 int idx = data->chipset;
366
367 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
368 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
369 return odr_start_up_times[idx][i].usec;
370 }
371
372 return KXCJK1013_MAX_STARTUP_TIME_US;
373}
374#endif
375
376static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
209{ 377{
210 int ret; 378 int ret;
211 379
380 if (on)
381 ret = pm_runtime_get_sync(&data->client->dev);
382 else {
383 pm_runtime_mark_last_busy(&data->client->dev);
384 ret = pm_runtime_put_autosuspend(&data->client->dev);
385 }
386 if (ret < 0) {
387 dev_err(&data->client->dev,
388 "Failed: kxcjk1013_set_power_state for %d\n", on);
389 return ret;
390 }
391
392 return 0;
393}
394
395static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
396{
397 int ret;
398
399 ret = i2c_smbus_write_byte_data(data->client,
400 KXCJK1013_REG_WAKE_TIMER,
401 data->wake_dur);
402 if (ret < 0) {
403 dev_err(&data->client->dev,
404 "Error writing reg_wake_timer\n");
405 return ret;
406 }
407
408 ret = i2c_smbus_write_byte_data(data->client,
409 KXCJK1013_REG_WAKE_THRES,
410 data->wake_thres);
411 if (ret < 0) {
412 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
413 return ret;
414 }
415
416 return 0;
417}
418
419static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
420 bool status)
421{
422 int ret;
423 enum kxcjk1013_mode store_mode;
424
425 ret = kxcjk1013_get_mode(data, &store_mode);
426 if (ret < 0)
427 return ret;
428
429 /* This is requirement by spec to change state to STANDBY */
430 ret = kxcjk1013_set_mode(data, STANDBY);
431 if (ret < 0)
432 return ret;
433
434 ret = kxcjk1013_chip_update_thresholds(data);
435 if (ret < 0)
436 return ret;
437
438 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
439 if (ret < 0) {
440 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
441 return ret;
442 }
443
444 if (status)
445 ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
446 else
447 ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
448
449 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
450 ret);
451 if (ret < 0) {
452 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
453 return ret;
454 }
455
456 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
457 if (ret < 0) {
458 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
459 return ret;
460 }
461
462 if (status)
463 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
464 else
465 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
466
467 ret = i2c_smbus_write_byte_data(data->client,
468 KXCJK1013_REG_CTRL1, ret);
469 if (ret < 0) {
470 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
471 return ret;
472 }
473
474 if (store_mode == OPERATION) {
475 ret = kxcjk1013_set_mode(data, OPERATION);
476 if (ret < 0)
477 return ret;
478 }
479
480 return 0;
481}
482
483static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
484 bool status)
485{
486 int ret;
487 enum kxcjk1013_mode store_mode;
488
489 ret = kxcjk1013_get_mode(data, &store_mode);
490 if (ret < 0)
491 return ret;
492
212 /* This is requirement by spec to change state to STANDBY */ 493 /* This is requirement by spec to change state to STANDBY */
213 ret = kxcjk1013_set_mode(data, STANDBY); 494 ret = kxcjk1013_set_mode(data, STANDBY);
214 if (ret < 0) 495 if (ret < 0)
@@ -250,7 +531,13 @@ static int kxcjk1013_chip_setup_interrupt(struct kxcjk1013_data *data,
250 return ret; 531 return ret;
251 } 532 }
252 533
253 return ret; 534 if (store_mode == OPERATION) {
535 ret = kxcjk1013_set_mode(data, OPERATION);
536 if (ret < 0)
537 return ret;
538 }
539
540 return 0;
254} 541}
255 542
256static int kxcjk1013_convert_freq_to_bit(int val, int val2) 543static int kxcjk1013_convert_freq_to_bit(int val, int val2)
@@ -267,10 +554,29 @@ static int kxcjk1013_convert_freq_to_bit(int val, int val2)
267 return -EINVAL; 554 return -EINVAL;
268} 555}
269 556
557static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2)
558{
559 int i;
560
561 for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) {
562 if (wake_odr_data_rate_table[i].val == val &&
563 wake_odr_data_rate_table[i].val2 == val2) {
564 return wake_odr_data_rate_table[i].odr_bits;
565 }
566 }
567
568 return -EINVAL;
569}
570
270static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 571static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
271{ 572{
272 int ret; 573 int ret;
273 int odr_bits; 574 int odr_bits;
575 enum kxcjk1013_mode store_mode;
576
577 ret = kxcjk1013_get_mode(data, &store_mode);
578 if (ret < 0)
579 return ret;
274 580
275 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2); 581 odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
276 if (odr_bits < 0) 582 if (odr_bits < 0)
@@ -290,9 +596,18 @@ static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
290 596
291 data->odr_bits = odr_bits; 597 data->odr_bits = odr_bits;
292 598
293 /* Check, if the ODR is changed after data enable */ 599 odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2);
294 if (data->power_state) { 600 if (odr_bits < 0)
295 /* Set the state back to operation */ 601 return odr_bits;
602
603 ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
604 odr_bits);
605 if (ret < 0) {
606 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
607 return ret;
608 }
609
610 if (store_mode == OPERATION) {
296 ret = kxcjk1013_set_mode(data, OPERATION); 611 ret = kxcjk1013_set_mode(data, OPERATION);
297 if (ret < 0) 612 if (ret < 0)
298 return ret; 613 return ret;
@@ -331,16 +646,38 @@ static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
331 return ret; 646 return ret;
332} 647}
333 648
334static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 649static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
335{ 650{
336 int i; 651 int ret, i;
652 enum kxcjk1013_mode store_mode;
653
654
655 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
656 if (KXCJK1013_scale_table[i].scale == val) {
657
658 ret = kxcjk1013_get_mode(data, &store_mode);
659 if (ret < 0)
660 return ret;
661
662 ret = kxcjk1013_set_mode(data, STANDBY);
663 if (ret < 0)
664 return ret;
665
666 ret = kxcjk1013_set_range(data, i);
667 if (ret < 0)
668 return ret;
337 669
338 for (i = 0; i < ARRAY_SIZE(odr_start_up_times); ++i) { 670 if (store_mode == OPERATION) {
339 if (odr_start_up_times[i].odr_bits == data->odr_bits) 671 ret = kxcjk1013_set_mode(data, OPERATION);
340 return odr_start_up_times[i].usec; 672 if (ret)
673 return ret;
674 }
675
676 return 0;
677 }
341 } 678 }
342 679
343 return KXCJK1013_MAX_STARTUP_TIME_US; 680 return -EINVAL;
344} 681}
345 682
346static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 683static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
@@ -356,34 +693,30 @@ static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
356 if (iio_buffer_enabled(indio_dev)) 693 if (iio_buffer_enabled(indio_dev))
357 ret = -EBUSY; 694 ret = -EBUSY;
358 else { 695 else {
359 int sleep_val; 696 ret = kxcjk1013_set_power_state(data, true);
360
361 ret = kxcjk1013_set_mode(data, OPERATION);
362 if (ret < 0) { 697 if (ret < 0) {
363 mutex_unlock(&data->mutex); 698 mutex_unlock(&data->mutex);
364 return ret; 699 return ret;
365 } 700 }
366 ++data->power_state;
367 sleep_val = kxcjk1013_get_startup_times(data);
368 if (sleep_val < 20000)
369 usleep_range(sleep_val, 20000);
370 else
371 msleep_interruptible(sleep_val/1000);
372 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 701 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
373 if (--data->power_state == 0) 702 if (ret < 0) {
374 kxcjk1013_set_mode(data, STANDBY); 703 kxcjk1013_set_power_state(data, false);
704 mutex_unlock(&data->mutex);
705 return ret;
706 }
707 *val = sign_extend32(ret >> 4, 11);
708 ret = kxcjk1013_set_power_state(data, false);
375 } 709 }
376 mutex_unlock(&data->mutex); 710 mutex_unlock(&data->mutex);
377 711
378 if (ret < 0) 712 if (ret < 0)
379 return ret; 713 return ret;
380 714
381 *val = sign_extend32(ret >> 4, 11);
382 return IIO_VAL_INT; 715 return IIO_VAL_INT;
383 716
384 case IIO_CHAN_INFO_SCALE: 717 case IIO_CHAN_INFO_SCALE:
385 *val = 0; 718 *val = 0;
386 *val2 = 19163; /* range +-4g (4/2047*9.806650) */ 719 *val2 = KXCJK1013_scale_table[data->range].scale;
387 return IIO_VAL_INT_PLUS_MICRO; 720 return IIO_VAL_INT_PLUS_MICRO;
388 721
389 case IIO_CHAN_INFO_SAMP_FREQ: 722 case IIO_CHAN_INFO_SAMP_FREQ:
@@ -410,6 +743,14 @@ static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
410 ret = kxcjk1013_set_odr(data, val, val2); 743 ret = kxcjk1013_set_odr(data, val, val2);
411 mutex_unlock(&data->mutex); 744 mutex_unlock(&data->mutex);
412 break; 745 break;
746 case IIO_CHAN_INFO_SCALE:
747 if (val)
748 return -EINVAL;
749
750 mutex_lock(&data->mutex);
751 ret = kxcjk1013_set_scale(data, val2);
752 mutex_unlock(&data->mutex);
753 break;
413 default: 754 default:
414 ret = -EINVAL; 755 ret = -EINVAL;
415 } 756 }
@@ -417,12 +758,120 @@ static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
417 return ret; 758 return ret;
418} 759}
419 760
761static int kxcjk1013_read_event(struct iio_dev *indio_dev,
762 const struct iio_chan_spec *chan,
763 enum iio_event_type type,
764 enum iio_event_direction dir,
765 enum iio_event_info info,
766 int *val, int *val2)
767{
768 struct kxcjk1013_data *data = iio_priv(indio_dev);
769
770 *val2 = 0;
771 switch (info) {
772 case IIO_EV_INFO_VALUE:
773 *val = data->wake_thres;
774 break;
775 case IIO_EV_INFO_PERIOD:
776 *val = data->wake_dur;
777 break;
778 default:
779 return -EINVAL;
780 }
781
782 return IIO_VAL_INT;
783}
784
785static int kxcjk1013_write_event(struct iio_dev *indio_dev,
786 const struct iio_chan_spec *chan,
787 enum iio_event_type type,
788 enum iio_event_direction dir,
789 enum iio_event_info info,
790 int val, int val2)
791{
792 struct kxcjk1013_data *data = iio_priv(indio_dev);
793
794 if (data->ev_enable_state)
795 return -EBUSY;
796
797 switch (info) {
798 case IIO_EV_INFO_VALUE:
799 data->wake_thres = val;
800 break;
801 case IIO_EV_INFO_PERIOD:
802 data->wake_dur = val;
803 break;
804 default:
805 return -EINVAL;
806 }
807
808 return 0;
809}
810
811static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
812 const struct iio_chan_spec *chan,
813 enum iio_event_type type,
814 enum iio_event_direction dir)
815{
816
817 struct kxcjk1013_data *data = iio_priv(indio_dev);
818
819 return data->ev_enable_state;
820}
821
822static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
823 const struct iio_chan_spec *chan,
824 enum iio_event_type type,
825 enum iio_event_direction dir,
826 int state)
827{
828 struct kxcjk1013_data *data = iio_priv(indio_dev);
829 int ret;
830
831 if (state && data->ev_enable_state)
832 return 0;
833
834 mutex_lock(&data->mutex);
835
836 if (!state && data->motion_trigger_on) {
837 data->ev_enable_state = 0;
838 mutex_unlock(&data->mutex);
839 return 0;
840 }
841
842 /*
843 * We will expect the enable and disable to do operation in
844 * in reverse order. This will happen here anyway as our
845 * resume operation uses sync mode runtime pm calls, the
846 * suspend operation will be delayed by autosuspend delay
847 * So the disable operation will still happen in reverse of
848 * enable operation. When runtime pm is disabled the mode
849 * is always on so sequence doesn't matter
850 */
851 ret = kxcjk1013_set_power_state(data, state);
852 if (ret < 0) {
853 mutex_unlock(&data->mutex);
854 return ret;
855 }
856
857 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
858 if (ret < 0) {
859 mutex_unlock(&data->mutex);
860 return ret;
861 }
862
863 data->ev_enable_state = state;
864 mutex_unlock(&data->mutex);
865
866 return 0;
867}
868
420static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev, 869static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
421 struct iio_trigger *trig) 870 struct iio_trigger *trig)
422{ 871{
423 struct kxcjk1013_data *data = iio_priv(indio_dev); 872 struct kxcjk1013_data *data = iio_priv(indio_dev);
424 873
425 if (data->trig != trig) 874 if (data->dready_trig != trig && data->motion_trig != trig)
426 return -EINVAL; 875 return -EINVAL;
427 876
428 return 0; 877 return 0;
@@ -431,8 +880,11 @@ static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
431static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 880static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
432 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"); 881 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
433 882
883static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
884
434static struct attribute *kxcjk1013_attributes[] = { 885static struct attribute *kxcjk1013_attributes[] = {
435 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 886 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
887 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
436 NULL, 888 NULL,
437}; 889};
438 890
@@ -440,6 +892,14 @@ static const struct attribute_group kxcjk1013_attrs_group = {
440 .attrs = kxcjk1013_attributes, 892 .attrs = kxcjk1013_attributes,
441}; 893};
442 894
895static const struct iio_event_spec kxcjk1013_event = {
896 .type = IIO_EV_TYPE_THRESH,
897 .dir = IIO_EV_DIR_EITHER,
898 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
899 BIT(IIO_EV_INFO_ENABLE) |
900 BIT(IIO_EV_INFO_PERIOD)
901};
902
443#define KXCJK1013_CHANNEL(_axis) { \ 903#define KXCJK1013_CHANNEL(_axis) { \
444 .type = IIO_ACCEL, \ 904 .type = IIO_ACCEL, \
445 .modified = 1, \ 905 .modified = 1, \
@@ -455,6 +915,8 @@ static const struct attribute_group kxcjk1013_attrs_group = {
455 .shift = 4, \ 915 .shift = 4, \
456 .endianness = IIO_CPU, \ 916 .endianness = IIO_CPU, \
457 }, \ 917 }, \
918 .event_spec = &kxcjk1013_event, \
919 .num_event_specs = 1 \
458} 920}
459 921
460static const struct iio_chan_spec kxcjk1013_channels[] = { 922static const struct iio_chan_spec kxcjk1013_channels[] = {
@@ -468,6 +930,10 @@ static const struct iio_info kxcjk1013_info = {
468 .attrs = &kxcjk1013_attrs_group, 930 .attrs = &kxcjk1013_attrs_group,
469 .read_raw = kxcjk1013_read_raw, 931 .read_raw = kxcjk1013_read_raw,
470 .write_raw = kxcjk1013_write_raw, 932 .write_raw = kxcjk1013_write_raw,
933 .read_event_value = kxcjk1013_read_event,
934 .write_event_value = kxcjk1013_write_event,
935 .write_event_config = kxcjk1013_write_event_config,
936 .read_event_config = kxcjk1013_read_event_config,
471 .validate_trigger = kxcjk1013_validate_trigger, 937 .validate_trigger = kxcjk1013_validate_trigger,
472 .driver_module = THIS_MODULE, 938 .driver_module = THIS_MODULE,
473}; 939};
@@ -493,7 +959,7 @@ static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
493 mutex_unlock(&data->mutex); 959 mutex_unlock(&data->mutex);
494 960
495 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 961 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
496 pf->timestamp); 962 data->timestamp);
497err: 963err:
498 iio_trigger_notify_done(indio_dev->trig); 964 iio_trigger_notify_done(indio_dev->trig);
499 965
@@ -520,20 +986,34 @@ static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
520{ 986{
521 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 987 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
522 struct kxcjk1013_data *data = iio_priv(indio_dev); 988 struct kxcjk1013_data *data = iio_priv(indio_dev);
989 int ret;
523 990
524 mutex_lock(&data->mutex); 991 mutex_lock(&data->mutex);
525 if (state) { 992
526 kxcjk1013_chip_setup_interrupt(data, true); 993 if (!state && data->ev_enable_state && data->motion_trigger_on) {
527 kxcjk1013_set_mode(data, OPERATION); 994 data->motion_trigger_on = false;
528 ++data->power_state; 995 mutex_unlock(&data->mutex);
529 } else { 996 return 0;
530 if (--data->power_state) {
531 mutex_unlock(&data->mutex);
532 return 0;
533 }
534 kxcjk1013_chip_setup_interrupt(data, false);
535 kxcjk1013_set_mode(data, STANDBY);
536 } 997 }
998
999 ret = kxcjk1013_set_power_state(data, state);
1000 if (ret < 0) {
1001 mutex_unlock(&data->mutex);
1002 return ret;
1003 }
1004 if (data->motion_trig == trig)
1005 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1006 else
1007 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1008 if (ret < 0) {
1009 mutex_unlock(&data->mutex);
1010 return ret;
1011 }
1012 if (data->motion_trig == trig)
1013 data->motion_trigger_on = state;
1014 else
1015 data->dready_trigger_on = state;
1016
537 mutex_unlock(&data->mutex); 1017 mutex_unlock(&data->mutex);
538 1018
539 return 0; 1019 return 0;
@@ -545,10 +1025,124 @@ static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
545 .owner = THIS_MODULE, 1025 .owner = THIS_MODULE,
546}; 1026};
547 1027
548static int kxcjk1013_acpi_gpio_probe(struct i2c_client *client, 1028static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
549 struct kxcjk1013_data *data) 1029{
1030 struct iio_dev *indio_dev = private;
1031 struct kxcjk1013_data *data = iio_priv(indio_dev);
1032 int ret;
1033
1034 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
1035 if (ret < 0) {
1036 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1037 goto ack_intr;
1038 }
1039
1040 if (ret & 0x02) {
1041 ret = i2c_smbus_read_byte_data(data->client,
1042 KXCJK1013_REG_INT_SRC2);
1043 if (ret < 0) {
1044 dev_err(&data->client->dev,
1045 "Error reading reg_int_src2\n");
1046 goto ack_intr;
1047 }
1048
1049 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1050 iio_push_event(indio_dev,
1051 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1052 0,
1053 IIO_MOD_X,
1054 IIO_EV_TYPE_THRESH,
1055 IIO_EV_DIR_FALLING),
1056 data->timestamp);
1057 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1058 iio_push_event(indio_dev,
1059 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1060 0,
1061 IIO_MOD_X,
1062 IIO_EV_TYPE_THRESH,
1063 IIO_EV_DIR_RISING),
1064 data->timestamp);
1065
1066
1067 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1068 iio_push_event(indio_dev,
1069 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1070 0,
1071 IIO_MOD_Y,
1072 IIO_EV_TYPE_THRESH,
1073 IIO_EV_DIR_FALLING),
1074 data->timestamp);
1075 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1076 iio_push_event(indio_dev,
1077 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1078 0,
1079 IIO_MOD_Y,
1080 IIO_EV_TYPE_THRESH,
1081 IIO_EV_DIR_RISING),
1082 data->timestamp);
1083
1084 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1085 iio_push_event(indio_dev,
1086 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1087 0,
1088 IIO_MOD_Z,
1089 IIO_EV_TYPE_THRESH,
1090 IIO_EV_DIR_FALLING),
1091 data->timestamp);
1092 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1093 iio_push_event(indio_dev,
1094 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1095 0,
1096 IIO_MOD_Z,
1097 IIO_EV_TYPE_THRESH,
1098 IIO_EV_DIR_RISING),
1099 data->timestamp);
1100 }
1101
1102ack_intr:
1103 if (data->dready_trigger_on)
1104 return IRQ_HANDLED;
1105
1106 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
1107 if (ret < 0)
1108 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1109
1110 return IRQ_HANDLED;
1111}
1112
1113static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1114{
1115 struct iio_dev *indio_dev = private;
1116 struct kxcjk1013_data *data = iio_priv(indio_dev);
1117
1118 data->timestamp = iio_get_time_ns();
1119
1120 if (data->dready_trigger_on)
1121 iio_trigger_poll(data->dready_trig);
1122 else if (data->motion_trigger_on)
1123 iio_trigger_poll(data->motion_trig);
1124
1125 if (data->ev_enable_state)
1126 return IRQ_WAKE_THREAD;
1127 else
1128 return IRQ_HANDLED;
1129}
1130
1131static const char *kxcjk1013_match_acpi_device(struct device *dev,
1132 enum kx_chipset *chipset)
550{ 1133{
551 const struct acpi_device_id *id; 1134 const struct acpi_device_id *id;
1135 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1136 if (!id)
1137 return NULL;
1138 *chipset = (enum kx_chipset)id->driver_data;
1139
1140 return dev_name(dev);
1141}
1142
1143static int kxcjk1013_gpio_probe(struct i2c_client *client,
1144 struct kxcjk1013_data *data)
1145{
552 struct device *dev; 1146 struct device *dev;
553 struct gpio_desc *gpio; 1147 struct gpio_desc *gpio;
554 int ret; 1148 int ret;
@@ -557,12 +1151,6 @@ static int kxcjk1013_acpi_gpio_probe(struct i2c_client *client,
557 return -EINVAL; 1151 return -EINVAL;
558 1152
559 dev = &client->dev; 1153 dev = &client->dev;
560 if (!ACPI_HANDLE(dev))
561 return -ENODEV;
562
563 id = acpi_match_device(dev->driver->acpi_match_table, dev);
564 if (!id)
565 return -ENODEV;
566 1154
567 /* data ready gpio interrupt pin */ 1155 /* data ready gpio interrupt pin */
568 gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0); 1156 gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0);
@@ -587,8 +1175,8 @@ static int kxcjk1013_probe(struct i2c_client *client,
587{ 1175{
588 struct kxcjk1013_data *data; 1176 struct kxcjk1013_data *data;
589 struct iio_dev *indio_dev; 1177 struct iio_dev *indio_dev;
590 struct iio_trigger *trig = NULL;
591 struct kxcjk_1013_platform_data *pdata; 1178 struct kxcjk_1013_platform_data *pdata;
1179 const char *name;
592 int ret; 1180 int ret;
593 1181
594 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1182 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
@@ -605,6 +1193,15 @@ static int kxcjk1013_probe(struct i2c_client *client,
605 else 1193 else
606 data->active_high_intr = true; /* default polarity */ 1194 data->active_high_intr = true; /* default polarity */
607 1195
1196 if (id) {
1197 data->chipset = (enum kx_chipset)(id->driver_data);
1198 name = id->name;
1199 } else if (ACPI_HANDLE(&client->dev)) {
1200 name = kxcjk1013_match_acpi_device(&client->dev,
1201 &data->chipset);
1202 } else
1203 return -ENODEV;
1204
608 ret = kxcjk1013_chip_init(data); 1205 ret = kxcjk1013_chip_init(data);
609 if (ret < 0) 1206 if (ret < 0)
610 return ret; 1207 return ret;
@@ -614,41 +1211,54 @@ static int kxcjk1013_probe(struct i2c_client *client,
614 indio_dev->dev.parent = &client->dev; 1211 indio_dev->dev.parent = &client->dev;
615 indio_dev->channels = kxcjk1013_channels; 1212 indio_dev->channels = kxcjk1013_channels;
616 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1213 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
617 indio_dev->name = KXCJK1013_DRV_NAME; 1214 indio_dev->name = name;
618 indio_dev->modes = INDIO_DIRECT_MODE; 1215 indio_dev->modes = INDIO_DIRECT_MODE;
619 indio_dev->info = &kxcjk1013_info; 1216 indio_dev->info = &kxcjk1013_info;
620 1217
621 if (client->irq < 0) 1218 if (client->irq < 0)
622 client->irq = kxcjk1013_acpi_gpio_probe(client, data); 1219 client->irq = kxcjk1013_gpio_probe(client, data);
623 1220
624 if (client->irq >= 0) { 1221 if (client->irq >= 0) {
625 trig = iio_trigger_alloc("%s-dev%d", indio_dev->name, 1222 ret = devm_request_threaded_irq(&client->dev, client->irq,
626 indio_dev->id); 1223 kxcjk1013_data_rdy_trig_poll,
627 if (!trig) 1224 kxcjk1013_event_handler,
628 return -ENOMEM; 1225 IRQF_TRIGGER_RISING,
1226 KXCJK1013_IRQ_NAME,
1227 indio_dev);
1228 if (ret)
1229 return ret;
629 1230
630 data->trig_mode = true; 1231 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1232 "%s-dev%d",
1233 indio_dev->name,
1234 indio_dev->id);
1235 if (!data->dready_trig)
1236 return -ENOMEM;
631 1237
632 ret = devm_request_irq(&client->dev, client->irq, 1238 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
633 iio_trigger_generic_data_rdy_poll, 1239 "%s-any-motion-dev%d",
634 IRQF_TRIGGER_RISING, 1240 indio_dev->name,
635 KXCJK1013_IRQ_NAME, 1241 indio_dev->id);
636 trig); 1242 if (!data->motion_trig)
637 if (ret) { 1243 return -ENOMEM;
638 dev_err(&client->dev, "unable to request IRQ\n");
639 goto err_trigger_free;
640 }
641 1244
642 trig->dev.parent = &client->dev; 1245 data->dready_trig->dev.parent = &client->dev;
643 trig->ops = &kxcjk1013_trigger_ops; 1246 data->dready_trig->ops = &kxcjk1013_trigger_ops;
644 iio_trigger_set_drvdata(trig, indio_dev); 1247 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
645 data->trig = trig; 1248 indio_dev->trig = data->dready_trig;
646 indio_dev->trig = trig;
647 iio_trigger_get(indio_dev->trig); 1249 iio_trigger_get(indio_dev->trig);
648 1250 ret = iio_trigger_register(data->dready_trig);
649 ret = iio_trigger_register(trig);
650 if (ret) 1251 if (ret)
651 goto err_trigger_free; 1252 return ret;
1253
1254 data->motion_trig->dev.parent = &client->dev;
1255 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1256 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1257 ret = iio_trigger_register(data->motion_trig);
1258 if (ret) {
1259 data->motion_trig = NULL;
1260 goto err_trigger_unregister;
1261 }
652 1262
653 ret = iio_triggered_buffer_setup(indio_dev, 1263 ret = iio_triggered_buffer_setup(indio_dev,
654 &iio_pollfunc_store_time, 1264 &iio_pollfunc_store_time,
@@ -661,23 +1271,33 @@ static int kxcjk1013_probe(struct i2c_client *client,
661 } 1271 }
662 } 1272 }
663 1273
664 ret = devm_iio_device_register(&client->dev, indio_dev); 1274 ret = iio_device_register(indio_dev);
665 if (ret < 0) { 1275 if (ret < 0) {
666 dev_err(&client->dev, "unable to register iio device\n"); 1276 dev_err(&client->dev, "unable to register iio device\n");
667 goto err_buffer_cleanup; 1277 goto err_buffer_cleanup;
668 } 1278 }
669 1279
1280 ret = pm_runtime_set_active(&client->dev);
1281 if (ret)
1282 goto err_iio_unregister;
1283
1284 pm_runtime_enable(&client->dev);
1285 pm_runtime_set_autosuspend_delay(&client->dev,
1286 KXCJK1013_SLEEP_DELAY_MS);
1287 pm_runtime_use_autosuspend(&client->dev);
1288
670 return 0; 1289 return 0;
671 1290
1291err_iio_unregister:
1292 iio_device_unregister(indio_dev);
672err_buffer_cleanup: 1293err_buffer_cleanup:
673 if (data->trig_mode) 1294 if (data->dready_trig)
674 iio_triggered_buffer_cleanup(indio_dev); 1295 iio_triggered_buffer_cleanup(indio_dev);
675err_trigger_unregister: 1296err_trigger_unregister:
676 if (data->trig_mode) 1297 if (data->dready_trig)
677 iio_trigger_unregister(trig); 1298 iio_trigger_unregister(data->dready_trig);
678err_trigger_free: 1299 if (data->motion_trig)
679 if (data->trig_mode) 1300 iio_trigger_unregister(data->motion_trig);
680 iio_trigger_free(trig);
681 1301
682 return ret; 1302 return ret;
683} 1303}
@@ -687,10 +1307,16 @@ static int kxcjk1013_remove(struct i2c_client *client)
687 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1307 struct iio_dev *indio_dev = i2c_get_clientdata(client);
688 struct kxcjk1013_data *data = iio_priv(indio_dev); 1308 struct kxcjk1013_data *data = iio_priv(indio_dev);
689 1309
690 if (data->trig_mode) { 1310 pm_runtime_disable(&client->dev);
1311 pm_runtime_set_suspended(&client->dev);
1312 pm_runtime_put_noidle(&client->dev);
1313
1314 iio_device_unregister(indio_dev);
1315
1316 if (data->dready_trig) {
691 iio_triggered_buffer_cleanup(indio_dev); 1317 iio_triggered_buffer_cleanup(indio_dev);
692 iio_trigger_unregister(data->trig); 1318 iio_trigger_unregister(data->dready_trig);
693 iio_trigger_free(data->trig); 1319 iio_trigger_unregister(data->motion_trig);
694 } 1320 }
695 1321
696 mutex_lock(&data->mutex); 1322 mutex_lock(&data->mutex);
@@ -705,43 +1331,80 @@ static int kxcjk1013_suspend(struct device *dev)
705{ 1331{
706 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1332 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
707 struct kxcjk1013_data *data = iio_priv(indio_dev); 1333 struct kxcjk1013_data *data = iio_priv(indio_dev);
1334 int ret;
708 1335
709 mutex_lock(&data->mutex); 1336 mutex_lock(&data->mutex);
710 kxcjk1013_set_mode(data, STANDBY); 1337 ret = kxcjk1013_set_mode(data, STANDBY);
711 mutex_unlock(&data->mutex); 1338 mutex_unlock(&data->mutex);
712 1339
713 return 0; 1340 return ret;
714} 1341}
715 1342
716static int kxcjk1013_resume(struct device *dev) 1343static int kxcjk1013_resume(struct device *dev)
717{ 1344{
718 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1345 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
719 struct kxcjk1013_data *data = iio_priv(indio_dev); 1346 struct kxcjk1013_data *data = iio_priv(indio_dev);
1347 int ret = 0;
720 1348
721 mutex_lock(&data->mutex); 1349 mutex_lock(&data->mutex);
1350 /* Check, if the suspend occured while active */
1351 if (data->dready_trigger_on || data->motion_trigger_on ||
1352 data->ev_enable_state)
1353 ret = kxcjk1013_set_mode(data, OPERATION);
1354 mutex_unlock(&data->mutex);
722 1355
723 if (data->power_state) 1356 return ret;
724 kxcjk1013_set_mode(data, OPERATION); 1357}
1358#endif
725 1359
726 mutex_unlock(&data->mutex); 1360#ifdef CONFIG_PM_RUNTIME
1361static int kxcjk1013_runtime_suspend(struct device *dev)
1362{
1363 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1364 struct kxcjk1013_data *data = iio_priv(indio_dev);
727 1365
728 return 0; 1366 return kxcjk1013_set_mode(data, STANDBY);
729} 1367}
730 1368
731static SIMPLE_DEV_PM_OPS(kxcjk1013_pm_ops, kxcjk1013_suspend, kxcjk1013_resume); 1369static int kxcjk1013_runtime_resume(struct device *dev)
732#define KXCJK1013_PM_OPS (&kxcjk1013_pm_ops) 1370{
733#else 1371 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
734#define KXCJK1013_PM_OPS NULL 1372 struct kxcjk1013_data *data = iio_priv(indio_dev);
1373 int ret;
1374 int sleep_val;
1375
1376 ret = kxcjk1013_set_mode(data, OPERATION);
1377 if (ret < 0)
1378 return ret;
1379
1380 sleep_val = kxcjk1013_get_startup_times(data);
1381 if (sleep_val < 20000)
1382 usleep_range(sleep_val, 20000);
1383 else
1384 msleep_interruptible(sleep_val/1000);
1385
1386 return 0;
1387}
735#endif 1388#endif
736 1389
1390static const struct dev_pm_ops kxcjk1013_pm_ops = {
1391 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1392 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1393 kxcjk1013_runtime_resume, NULL)
1394};
1395
737static const struct acpi_device_id kx_acpi_match[] = { 1396static const struct acpi_device_id kx_acpi_match[] = {
738 {"KXCJ1013", 0}, 1397 {"KXCJ1013", KXCJK1013},
1398 {"KXCJ1008", KXCJ91008},
1399 {"KXTJ1009", KXTJ21009},
739 { }, 1400 { },
740}; 1401};
741MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1402MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
742 1403
743static const struct i2c_device_id kxcjk1013_id[] = { 1404static const struct i2c_device_id kxcjk1013_id[] = {
744 {"kxcjk1013", 0}, 1405 {"kxcjk1013", KXCJK1013},
1406 {"kxcj91008", KXCJ91008},
1407 {"kxtj21009", KXTJ21009},
745 {} 1408 {}
746}; 1409};
747 1410
@@ -751,7 +1414,7 @@ static struct i2c_driver kxcjk1013_driver = {
751 .driver = { 1414 .driver = {
752 .name = KXCJK1013_DRV_NAME, 1415 .name = KXCJK1013_DRV_NAME,
753 .acpi_match_table = ACPI_PTR(kx_acpi_match), 1416 .acpi_match_table = ACPI_PTR(kx_acpi_match),
754 .pm = KXCJK1013_PM_OPS, 1417 .pm = &kxcjk1013_pm_ops,
755 }, 1418 },
756 .probe = kxcjk1013_probe, 1419 .probe = kxcjk1013_probe,
757 .remove = kxcjk1013_remove, 1420 .remove = kxcjk1013_remove,
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index db2681b4f24b..bc4e787096e8 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -137,7 +137,7 @@ config AXP288_ADC
137 137
138config EXYNOS_ADC 138config EXYNOS_ADC
139 tristate "Exynos ADC driver support" 139 tristate "Exynos ADC driver support"
140 depends on ARCH_EXYNOS || (OF && COMPILE_TEST) 140 depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST)
141 help 141 help
142 Core support for the ADC block found in the Samsung EXYNOS series 142 Core support for the ADC block found in the Samsung EXYNOS series
143 of SoCs for drivers such as the touchscreen and hwmon to use to share 143 of SoCs for drivers such as the touchscreen and hwmon to use to share
@@ -214,6 +214,16 @@ config NAU7802
214 To compile this driver as a module, choose M here: the 214 To compile this driver as a module, choose M here: the
215 module will be called nau7802. 215 module will be called nau7802.
216 216
217config ROCKCHIP_SARADC
218 tristate "Rockchip SARADC driver"
219 depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
220 help
221 Say yes here to build support for the SARADC found in SoCs from
222 Rockchip.
223
224 To compile this driver as a module, choose M here: the
225 module will be called rockchip_saradc.
226
217config TI_ADC081C 227config TI_ADC081C
218 tristate "Texas Instruments ADC081C021/027" 228 tristate "Texas Instruments ADC081C021/027"
219 depends on I2C 229 depends on I2C
@@ -224,6 +234,16 @@ config TI_ADC081C
224 This driver can also be built as a module. If so, the module will be 234 This driver can also be built as a module. If so, the module will be
225 called ti-adc081c. 235 called ti-adc081c.
226 236
237config TI_ADC128S052
238 tristate "Texas Instruments ADC128S052"
239 depends on SPI
240 help
241 If you say yes here you get support for Texas Instruments ADC128S052
242 chip.
243
244 This driver can also be built as a module. If so, the module will be
245 called ti-adc128s052.
246
227config TI_AM335X_ADC 247config TI_AM335X_ADC
228 tristate "TI's AM335X ADC driver" 248 tristate "TI's AM335X ADC driver"
229 depends on MFD_TI_AM335X_TSCADC 249 depends on MFD_TI_AM335X_TSCADC
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 19640f9dc470..f30093f5b67a 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -23,7 +23,9 @@ obj-$(CONFIG_MCP320X) += mcp320x.o
23obj-$(CONFIG_MCP3422) += mcp3422.o 23obj-$(CONFIG_MCP3422) += mcp3422.o
24obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o 24obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o
25obj-$(CONFIG_NAU7802) += nau7802.o 25obj-$(CONFIG_NAU7802) += nau7802.o
26obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
26obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o 27obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
28obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
27obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o 29obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
28obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o 30obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
29obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o 31obj-$(CONFIG_TWL6030_GPADC) += twl6030-gpadc.o
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 7eadaf16adc1..ff61ae55dd3f 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -267,7 +267,7 @@ static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
267} 267}
268 268
269/* Handler for classic adc channel eoc trigger */ 269/* Handler for classic adc channel eoc trigger */
270void handle_adc_eoc_trigger(int irq, struct iio_dev *idev) 270static void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
271{ 271{
272 struct at91_adc_state *st = iio_priv(idev); 272 struct at91_adc_state *st = iio_priv(idev);
273 273
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index fc9dfc23ecb7..43620fd4c66a 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -40,13 +40,16 @@
40#include <linux/iio/machine.h> 40#include <linux/iio/machine.h>
41#include <linux/iio/driver.h> 41#include <linux/iio/driver.h>
42 42
43/* EXYNOS4412/5250 ADC_V1 registers definitions */ 43/* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */
44#define ADC_V1_CON(x) ((x) + 0x00) 44#define ADC_V1_CON(x) ((x) + 0x00)
45#define ADC_V1_DLY(x) ((x) + 0x08) 45#define ADC_V1_DLY(x) ((x) + 0x08)
46#define ADC_V1_DATX(x) ((x) + 0x0C) 46#define ADC_V1_DATX(x) ((x) + 0x0C)
47#define ADC_V1_INTCLR(x) ((x) + 0x18) 47#define ADC_V1_INTCLR(x) ((x) + 0x18)
48#define ADC_V1_MUX(x) ((x) + 0x1c) 48#define ADC_V1_MUX(x) ((x) + 0x1c)
49 49
50/* S3C2410 ADC registers definitions */
51#define ADC_S3C2410_MUX(x) ((x) + 0x18)
52
50/* Future ADC_V2 registers definitions */ 53/* Future ADC_V2 registers definitions */
51#define ADC_V2_CON1(x) ((x) + 0x00) 54#define ADC_V2_CON1(x) ((x) + 0x00)
52#define ADC_V2_CON2(x) ((x) + 0x04) 55#define ADC_V2_CON2(x) ((x) + 0x04)
@@ -61,6 +64,11 @@
61#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) 64#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6)
62#define ADC_V1_CON_STANDBY (1u << 2) 65#define ADC_V1_CON_STANDBY (1u << 2)
63 66
67/* Bit definitions for S3C2410 ADC */
68#define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3)
69#define ADC_S3C2410_DATX_MASK 0x3FF
70#define ADC_S3C2416_CON_RES_SEL (1u << 3)
71
64/* Bit definitions for ADC_V2 */ 72/* Bit definitions for ADC_V2 */
65#define ADC_V2_CON1_SOFT_RESET (1u << 2) 73#define ADC_V2_CON1_SOFT_RESET (1u << 2)
66 74
@@ -77,6 +85,7 @@
77 85
78/* Bit definitions common for ADC_V1 and ADC_V2 */ 86/* Bit definitions common for ADC_V1 and ADC_V2 */
79#define ADC_CON_EN_START (1u << 0) 87#define ADC_CON_EN_START (1u << 0)
88#define ADC_CON_EN_START_MASK (0x3 << 0)
80#define ADC_DATX_MASK 0xFFF 89#define ADC_DATX_MASK 0xFFF
81 90
82#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100)) 91#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
@@ -100,6 +109,8 @@ struct exynos_adc {
100struct exynos_adc_data { 109struct exynos_adc_data {
101 int num_channels; 110 int num_channels;
102 bool needs_sclk; 111 bool needs_sclk;
112 bool needs_adc_phy;
113 u32 mask;
103 114
104 void (*init_hw)(struct exynos_adc *info); 115 void (*init_hw)(struct exynos_adc *info);
105 void (*exit_hw)(struct exynos_adc *info); 116 void (*exit_hw)(struct exynos_adc *info);
@@ -171,7 +182,8 @@ static void exynos_adc_v1_init_hw(struct exynos_adc *info)
171{ 182{
172 u32 con1; 183 u32 con1;
173 184
174 writel(1, info->enable_reg); 185 if (info->data->needs_adc_phy)
186 writel(1, info->enable_reg);
175 187
176 /* set default prescaler values and Enable prescaler */ 188 /* set default prescaler values and Enable prescaler */
177 con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN; 189 con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
@@ -185,7 +197,8 @@ static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
185{ 197{
186 u32 con; 198 u32 con;
187 199
188 writel(0, info->enable_reg); 200 if (info->data->needs_adc_phy)
201 writel(0, info->enable_reg);
189 202
190 con = readl(ADC_V1_CON(info->regs)); 203 con = readl(ADC_V1_CON(info->regs));
191 con |= ADC_V1_CON_STANDBY; 204 con |= ADC_V1_CON_STANDBY;
@@ -210,6 +223,8 @@ static void exynos_adc_v1_start_conv(struct exynos_adc *info,
210 223
211static const struct exynos_adc_data exynos_adc_v1_data = { 224static const struct exynos_adc_data exynos_adc_v1_data = {
212 .num_channels = MAX_ADC_V1_CHANNELS, 225 .num_channels = MAX_ADC_V1_CHANNELS,
226 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
227 .needs_adc_phy = true,
213 228
214 .init_hw = exynos_adc_v1_init_hw, 229 .init_hw = exynos_adc_v1_init_hw,
215 .exit_hw = exynos_adc_v1_exit_hw, 230 .exit_hw = exynos_adc_v1_exit_hw,
@@ -217,11 +232,89 @@ static const struct exynos_adc_data exynos_adc_v1_data = {
217 .start_conv = exynos_adc_v1_start_conv, 232 .start_conv = exynos_adc_v1_start_conv,
218}; 233};
219 234
235static void exynos_adc_s3c2416_start_conv(struct exynos_adc *info,
236 unsigned long addr)
237{
238 u32 con1;
239
240 /* Enable 12 bit ADC resolution */
241 con1 = readl(ADC_V1_CON(info->regs));
242 con1 |= ADC_S3C2416_CON_RES_SEL;
243 writel(con1, ADC_V1_CON(info->regs));
244
245 /* Select channel for S3C2416 */
246 writel(addr, ADC_S3C2410_MUX(info->regs));
247
248 con1 = readl(ADC_V1_CON(info->regs));
249 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
250}
251
252static struct exynos_adc_data const exynos_adc_s3c2416_data = {
253 .num_channels = MAX_ADC_V1_CHANNELS,
254 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
255
256 .init_hw = exynos_adc_v1_init_hw,
257 .exit_hw = exynos_adc_v1_exit_hw,
258 .start_conv = exynos_adc_s3c2416_start_conv,
259};
260
261static void exynos_adc_s3c2443_start_conv(struct exynos_adc *info,
262 unsigned long addr)
263{
264 u32 con1;
265
266 /* Select channel for S3C2433 */
267 writel(addr, ADC_S3C2410_MUX(info->regs));
268
269 con1 = readl(ADC_V1_CON(info->regs));
270 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
271}
272
273static struct exynos_adc_data const exynos_adc_s3c2443_data = {
274 .num_channels = MAX_ADC_V1_CHANNELS,
275 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
276
277 .init_hw = exynos_adc_v1_init_hw,
278 .exit_hw = exynos_adc_v1_exit_hw,
279 .start_conv = exynos_adc_s3c2443_start_conv,
280};
281
282static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
283 unsigned long addr)
284{
285 u32 con1;
286
287 con1 = readl(ADC_V1_CON(info->regs));
288 con1 &= ~ADC_S3C2410_CON_SELMUX(0x7);
289 con1 |= ADC_S3C2410_CON_SELMUX(addr);
290 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
291}
292
293static struct exynos_adc_data const exynos_adc_s3c24xx_data = {
294 .num_channels = MAX_ADC_V1_CHANNELS,
295 .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
296
297 .init_hw = exynos_adc_v1_init_hw,
298 .exit_hw = exynos_adc_v1_exit_hw,
299 .start_conv = exynos_adc_s3c64xx_start_conv,
300};
301
302static struct exynos_adc_data const exynos_adc_s3c64xx_data = {
303 .num_channels = MAX_ADC_V1_CHANNELS,
304 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
305
306 .init_hw = exynos_adc_v1_init_hw,
307 .exit_hw = exynos_adc_v1_exit_hw,
308 .clear_irq = exynos_adc_v1_clear_irq,
309 .start_conv = exynos_adc_s3c64xx_start_conv,
310};
311
220static void exynos_adc_v2_init_hw(struct exynos_adc *info) 312static void exynos_adc_v2_init_hw(struct exynos_adc *info)
221{ 313{
222 u32 con1, con2; 314 u32 con1, con2;
223 315
224 writel(1, info->enable_reg); 316 if (info->data->needs_adc_phy)
317 writel(1, info->enable_reg);
225 318
226 con1 = ADC_V2_CON1_SOFT_RESET; 319 con1 = ADC_V2_CON1_SOFT_RESET;
227 writel(con1, ADC_V2_CON1(info->regs)); 320 writel(con1, ADC_V2_CON1(info->regs));
@@ -238,7 +331,8 @@ static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
238{ 331{
239 u32 con; 332 u32 con;
240 333
241 writel(0, info->enable_reg); 334 if (info->data->needs_adc_phy)
335 writel(0, info->enable_reg);
242 336
243 con = readl(ADC_V2_CON1(info->regs)); 337 con = readl(ADC_V2_CON1(info->regs));
244 con &= ~ADC_CON_EN_START; 338 con &= ~ADC_CON_EN_START;
@@ -266,6 +360,8 @@ static void exynos_adc_v2_start_conv(struct exynos_adc *info,
266 360
267static const struct exynos_adc_data exynos_adc_v2_data = { 361static const struct exynos_adc_data exynos_adc_v2_data = {
268 .num_channels = MAX_ADC_V2_CHANNELS, 362 .num_channels = MAX_ADC_V2_CHANNELS,
363 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
364 .needs_adc_phy = true,
269 365
270 .init_hw = exynos_adc_v2_init_hw, 366 .init_hw = exynos_adc_v2_init_hw,
271 .exit_hw = exynos_adc_v2_exit_hw, 367 .exit_hw = exynos_adc_v2_exit_hw,
@@ -275,7 +371,9 @@ static const struct exynos_adc_data exynos_adc_v2_data = {
275 371
276static const struct exynos_adc_data exynos3250_adc_data = { 372static const struct exynos_adc_data exynos3250_adc_data = {
277 .num_channels = MAX_EXYNOS3250_ADC_CHANNELS, 373 .num_channels = MAX_EXYNOS3250_ADC_CHANNELS,
374 .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
278 .needs_sclk = true, 375 .needs_sclk = true,
376 .needs_adc_phy = true,
279 377
280 .init_hw = exynos_adc_v2_init_hw, 378 .init_hw = exynos_adc_v2_init_hw,
281 .exit_hw = exynos_adc_v2_exit_hw, 379 .exit_hw = exynos_adc_v2_exit_hw,
@@ -285,6 +383,21 @@ static const struct exynos_adc_data exynos3250_adc_data = {
285 383
286static const struct of_device_id exynos_adc_match[] = { 384static const struct of_device_id exynos_adc_match[] = {
287 { 385 {
386 .compatible = "samsung,s3c2410-adc",
387 .data = &exynos_adc_s3c24xx_data,
388 }, {
389 .compatible = "samsung,s3c2416-adc",
390 .data = &exynos_adc_s3c2416_data,
391 }, {
392 .compatible = "samsung,s3c2440-adc",
393 .data = &exynos_adc_s3c24xx_data,
394 }, {
395 .compatible = "samsung,s3c2443-adc",
396 .data = &exynos_adc_s3c2443_data,
397 }, {
398 .compatible = "samsung,s3c6410-adc",
399 .data = &exynos_adc_s3c64xx_data,
400 }, {
288 .compatible = "samsung,exynos-adc-v1", 401 .compatible = "samsung,exynos-adc-v1",
289 .data = &exynos_adc_v1_data, 402 .data = &exynos_adc_v1_data,
290 }, { 403 }, {
@@ -347,9 +460,10 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
347static irqreturn_t exynos_adc_isr(int irq, void *dev_id) 460static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
348{ 461{
349 struct exynos_adc *info = (struct exynos_adc *)dev_id; 462 struct exynos_adc *info = (struct exynos_adc *)dev_id;
463 u32 mask = info->data->mask;
350 464
351 /* Read value */ 465 /* Read value */
352 info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK; 466 info->value = readl(ADC_V1_DATX(info->regs)) & mask;
353 467
354 /* clear irq */ 468 /* clear irq */
355 if (info->data->clear_irq) 469 if (info->data->clear_irq)
@@ -442,10 +556,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
442 if (IS_ERR(info->regs)) 556 if (IS_ERR(info->regs))
443 return PTR_ERR(info->regs); 557 return PTR_ERR(info->regs);
444 558
445 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 559
446 info->enable_reg = devm_ioremap_resource(&pdev->dev, mem); 560 if (info->data->needs_adc_phy) {
447 if (IS_ERR(info->enable_reg)) 561 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
448 return PTR_ERR(info->enable_reg); 562 info->enable_reg = devm_ioremap_resource(&pdev->dev, mem);
563 if (IS_ERR(info->enable_reg))
564 return PTR_ERR(info->enable_reg);
565 }
449 566
450 irq = platform_get_irq(pdev, 0); 567 irq = platform_get_irq(pdev, 0);
451 if (irq < 0) { 568 if (irq < 0) {
@@ -606,7 +723,6 @@ static struct platform_driver exynos_adc_driver = {
606 .remove = exynos_adc_remove, 723 .remove = exynos_adc_remove,
607 .driver = { 724 .driver = {
608 .name = "exynos-adc", 725 .name = "exynos-adc",
609 .owner = THIS_MODULE,
610 .of_match_table = exynos_adc_match, 726 .of_match_table = exynos_adc_match,
611 .pm = &exynos_adc_pm_ops, 727 .pm = &exynos_adc_pm_ops,
612 }, 728 },
diff --git a/drivers/iio/adc/lp8788_adc.c b/drivers/iio/adc/lp8788_adc.c
index 5c8c91595f47..152cfc8e1c7b 100644
--- a/drivers/iio/adc/lp8788_adc.c
+++ b/drivers/iio/adc/lp8788_adc.c
@@ -244,7 +244,6 @@ static struct platform_driver lp8788_adc_driver = {
244 .remove = lp8788_adc_remove, 244 .remove = lp8788_adc_remove,
245 .driver = { 245 .driver = {
246 .name = LP8788_DEV_ADC, 246 .name = LP8788_DEV_ADC,
247 .owner = THIS_MODULE,
248 }, 247 },
249}; 248};
250module_platform_driver(lp8788_adc_driver); 249module_platform_driver(lp8788_adc_driver);
diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
new file mode 100644
index 000000000000..e074a0b03f28
--- /dev/null
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -0,0 +1,316 @@
1/*
2 * Rockchip Successive Approximation Register (SAR) A/D Converter
3 * Copyright (C) 2014 ROCKCHIP, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/clk.h>
22#include <linux/completion.h>
23#include <linux/regulator/consumer.h>
24#include <linux/iio/iio.h>
25
26#define SARADC_DATA 0x00
27#define SARADC_DATA_MASK 0x3ff
28
29#define SARADC_STAS 0x04
30#define SARADC_STAS_BUSY BIT(0)
31
32#define SARADC_CTRL 0x08
33#define SARADC_CTRL_IRQ_STATUS BIT(6)
34#define SARADC_CTRL_IRQ_ENABLE BIT(5)
35#define SARADC_CTRL_POWER_CTRL BIT(3)
36#define SARADC_CTRL_CHN_MASK 0x7
37
38#define SARADC_DLY_PU_SOC 0x0c
39#define SARADC_DLY_PU_SOC_MASK 0x3f
40
41#define SARADC_BITS 10
42#define SARADC_TIMEOUT msecs_to_jiffies(100)
43
44struct rockchip_saradc {
45 void __iomem *regs;
46 struct clk *pclk;
47 struct clk *clk;
48 struct completion completion;
49 struct regulator *vref;
50 u16 last_val;
51};
52
53static int rockchip_saradc_read_raw(struct iio_dev *indio_dev,
54 struct iio_chan_spec const *chan,
55 int *val, int *val2, long mask)
56{
57 struct rockchip_saradc *info = iio_priv(indio_dev);
58 int ret;
59
60 switch (mask) {
61 case IIO_CHAN_INFO_RAW:
62 mutex_lock(&indio_dev->mlock);
63
64 reinit_completion(&info->completion);
65
66 /* 8 clock periods as delay between power up and start cmd */
67 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
68
69 /* Select the channel to be used and trigger conversion */
70 writel(SARADC_CTRL_POWER_CTRL
71 | (chan->channel & SARADC_CTRL_CHN_MASK)
72 | SARADC_CTRL_IRQ_ENABLE,
73 info->regs + SARADC_CTRL);
74
75 if (!wait_for_completion_timeout(&info->completion,
76 SARADC_TIMEOUT)) {
77 writel_relaxed(0, info->regs + SARADC_CTRL);
78 mutex_unlock(&indio_dev->mlock);
79 return -ETIMEDOUT;
80 }
81
82 *val = info->last_val;
83 mutex_unlock(&indio_dev->mlock);
84 return IIO_VAL_INT;
85 case IIO_CHAN_INFO_SCALE:
86 ret = regulator_get_voltage(info->vref);
87 if (ret < 0) {
88 dev_err(&indio_dev->dev, "failed to get voltage\n");
89 return ret;
90 }
91
92 *val = ret / 1000;
93 *val2 = SARADC_BITS;
94 return IIO_VAL_FRACTIONAL_LOG2;
95 default:
96 return -EINVAL;
97 }
98}
99
100static irqreturn_t rockchip_saradc_isr(int irq, void *dev_id)
101{
102 struct rockchip_saradc *info = (struct rockchip_saradc *)dev_id;
103
104 /* Read value */
105 info->last_val = readl_relaxed(info->regs + SARADC_DATA);
106 info->last_val &= SARADC_DATA_MASK;
107
108 /* Clear irq & power down adc */
109 writel_relaxed(0, info->regs + SARADC_CTRL);
110
111 complete(&info->completion);
112
113 return IRQ_HANDLED;
114}
115
116static const struct iio_info rockchip_saradc_iio_info = {
117 .read_raw = rockchip_saradc_read_raw,
118 .driver_module = THIS_MODULE,
119};
120
121#define ADC_CHANNEL(_index, _id) { \
122 .type = IIO_VOLTAGE, \
123 .indexed = 1, \
124 .channel = _index, \
125 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
126 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
127 .datasheet_name = _id, \
128}
129
130static const struct iio_chan_spec rockchip_saradc_iio_channels[] = {
131 ADC_CHANNEL(0, "adc0"),
132 ADC_CHANNEL(1, "adc1"),
133 ADC_CHANNEL(2, "adc2"),
134};
135
136static int rockchip_saradc_probe(struct platform_device *pdev)
137{
138 struct rockchip_saradc *info = NULL;
139 struct device_node *np = pdev->dev.of_node;
140 struct iio_dev *indio_dev = NULL;
141 struct resource *mem;
142 int ret;
143 int irq;
144
145 if (!np)
146 return -ENODEV;
147
148 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
149 if (!indio_dev) {
150 dev_err(&pdev->dev, "failed allocating iio device\n");
151 return -ENOMEM;
152 }
153 info = iio_priv(indio_dev);
154
155 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
156 info->regs = devm_ioremap_resource(&pdev->dev, mem);
157 if (IS_ERR(info->regs))
158 return PTR_ERR(info->regs);
159
160 init_completion(&info->completion);
161
162 irq = platform_get_irq(pdev, 0);
163 if (irq < 0) {
164 dev_err(&pdev->dev, "no irq resource?\n");
165 return irq;
166 }
167
168 ret = devm_request_irq(&pdev->dev, irq, rockchip_saradc_isr,
169 0, dev_name(&pdev->dev), info);
170 if (ret < 0) {
171 dev_err(&pdev->dev, "failed requesting irq %d\n", irq);
172 return ret;
173 }
174
175 info->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
176 if (IS_ERR(info->pclk)) {
177 dev_err(&pdev->dev, "failed to get pclk\n");
178 return PTR_ERR(info->pclk);
179 }
180
181 info->clk = devm_clk_get(&pdev->dev, "saradc");
182 if (IS_ERR(info->clk)) {
183 dev_err(&pdev->dev, "failed to get adc clock\n");
184 return PTR_ERR(info->clk);
185 }
186
187 info->vref = devm_regulator_get(&pdev->dev, "vref");
188 if (IS_ERR(info->vref)) {
189 dev_err(&pdev->dev, "failed to get regulator, %ld\n",
190 PTR_ERR(info->vref));
191 return PTR_ERR(info->vref);
192 }
193
194 /*
195 * Use a default of 1MHz for the converter clock.
196 * This may become user-configurable in the future.
197 */
198 ret = clk_set_rate(info->clk, 1000000);
199 if (ret < 0) {
200 dev_err(&pdev->dev, "failed to set adc clk rate, %d\n", ret);
201 return ret;
202 }
203
204 ret = regulator_enable(info->vref);
205 if (ret < 0) {
206 dev_err(&pdev->dev, "failed to enable vref regulator\n");
207 return ret;
208 }
209
210 ret = clk_prepare_enable(info->pclk);
211 if (ret < 0) {
212 dev_err(&pdev->dev, "failed to enable pclk\n");
213 goto err_reg_voltage;
214 }
215
216 ret = clk_prepare_enable(info->clk);
217 if (ret < 0) {
218 dev_err(&pdev->dev, "failed to enable converter clock\n");
219 goto err_pclk;
220 }
221
222 platform_set_drvdata(pdev, indio_dev);
223
224 indio_dev->name = dev_name(&pdev->dev);
225 indio_dev->dev.parent = &pdev->dev;
226 indio_dev->dev.of_node = pdev->dev.of_node;
227 indio_dev->info = &rockchip_saradc_iio_info;
228 indio_dev->modes = INDIO_DIRECT_MODE;
229
230 indio_dev->channels = rockchip_saradc_iio_channels;
231 indio_dev->num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels);
232
233 ret = iio_device_register(indio_dev);
234 if (ret)
235 goto err_clk;
236
237 return 0;
238
239err_clk:
240 clk_disable_unprepare(info->clk);
241err_pclk:
242 clk_disable_unprepare(info->pclk);
243err_reg_voltage:
244 regulator_disable(info->vref);
245 return ret;
246}
247
248static int rockchip_saradc_remove(struct platform_device *pdev)
249{
250 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
251 struct rockchip_saradc *info = iio_priv(indio_dev);
252
253 iio_device_unregister(indio_dev);
254 clk_disable_unprepare(info->clk);
255 clk_disable_unprepare(info->pclk);
256 regulator_disable(info->vref);
257
258 return 0;
259}
260
261#ifdef CONFIG_PM_SLEEP
262static int rockchip_saradc_suspend(struct device *dev)
263{
264 struct iio_dev *indio_dev = dev_get_drvdata(dev);
265 struct rockchip_saradc *info = iio_priv(indio_dev);
266
267 clk_disable_unprepare(info->clk);
268 clk_disable_unprepare(info->pclk);
269 regulator_disable(info->vref);
270
271 return 0;
272}
273
274static int rockchip_saradc_resume(struct device *dev)
275{
276 struct iio_dev *indio_dev = dev_get_drvdata(dev);
277 struct rockchip_saradc *info = iio_priv(indio_dev);
278 int ret;
279
280 ret = regulator_enable(info->vref);
281 if (ret)
282 return ret;
283
284 ret = clk_prepare_enable(info->pclk);
285 if (ret)
286 return ret;
287
288 ret = clk_prepare_enable(info->clk);
289 if (ret)
290 return ret;
291
292 return ret;
293}
294#endif
295
296static SIMPLE_DEV_PM_OPS(rockchip_saradc_pm_ops,
297 rockchip_saradc_suspend, rockchip_saradc_resume);
298
299static const struct of_device_id rockchip_saradc_match[] = {
300 { .compatible = "rockchip,saradc" },
301 {},
302};
303MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
304
305static struct platform_driver rockchip_saradc_driver = {
306 .probe = rockchip_saradc_probe,
307 .remove = rockchip_saradc_remove,
308 .driver = {
309 .name = "rockchip-saradc",
310 .owner = THIS_MODULE,
311 .of_match_table = rockchip_saradc_match,
312 .pm = &rockchip_saradc_pm_ops,
313 },
314};
315
316module_platform_driver(rockchip_saradc_driver);
diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
new file mode 100644
index 000000000000..655cb564ec54
--- /dev/null
+++ b/drivers/iio/adc/ti-adc128s052.c
@@ -0,0 +1,179 @@
1/*
2 * Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com>
3 *
4 * Driver for Texas Instruments' ADC128S052 ADC chip.
5 * Datasheet can be found here:
6 * http://www.ti.com/lit/ds/symlink/adc128s052.pdf
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/err.h>
14#include <linux/spi/spi.h>
15#include <linux/module.h>
16#include <linux/iio/iio.h>
17#include <linux/regulator/consumer.h>
18
19struct adc128 {
20 struct spi_device *spi;
21
22 struct regulator *reg;
23 struct mutex lock;
24
25 u8 buffer[2] ____cacheline_aligned;
26};
27
28static int adc128_adc_conversion(struct adc128 *adc, u8 channel)
29{
30 int ret;
31
32 mutex_lock(&adc->lock);
33
34 adc->buffer[0] = channel << 3;
35 adc->buffer[1] = 0;
36
37 ret = spi_write(adc->spi, &adc->buffer, 2);
38 if (ret < 0) {
39 mutex_unlock(&adc->lock);
40 return ret;
41 }
42
43 ret = spi_read(adc->spi, &adc->buffer, 2);
44
45 mutex_unlock(&adc->lock);
46
47 if (ret < 0)
48 return ret;
49
50 return ((adc->buffer[0] << 8 | adc->buffer[1]) & 0xFFF);
51}
52
53static int adc128_read_raw(struct iio_dev *indio_dev,
54 struct iio_chan_spec const *channel, int *val,
55 int *val2, long mask)
56{
57 struct adc128 *adc = iio_priv(indio_dev);
58 int ret;
59
60 switch (mask) {
61 case IIO_CHAN_INFO_RAW:
62
63 ret = adc128_adc_conversion(adc, channel->channel);
64 if (ret < 0)
65 return ret;
66
67 *val = ret;
68 return IIO_VAL_INT;
69
70 case IIO_CHAN_INFO_SCALE:
71
72 ret = regulator_get_voltage(adc->reg);
73 if (ret < 0)
74 return ret;
75
76 *val = ret / 1000;
77 *val2 = 12;
78 return IIO_VAL_FRACTIONAL_LOG2;
79
80 default:
81 return -EINVAL;
82 }
83
84}
85
86#define ADC128_VOLTAGE_CHANNEL(num) \
87 { \
88 .type = IIO_VOLTAGE, \
89 .indexed = 1, \
90 .channel = (num), \
91 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
92 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
93 }
94
95static const struct iio_chan_spec adc128_channels[] = {
96 ADC128_VOLTAGE_CHANNEL(0),
97 ADC128_VOLTAGE_CHANNEL(1),
98 ADC128_VOLTAGE_CHANNEL(2),
99 ADC128_VOLTAGE_CHANNEL(3),
100 ADC128_VOLTAGE_CHANNEL(4),
101 ADC128_VOLTAGE_CHANNEL(5),
102 ADC128_VOLTAGE_CHANNEL(6),
103 ADC128_VOLTAGE_CHANNEL(7),
104};
105
106static const struct iio_info adc128_info = {
107 .read_raw = adc128_read_raw,
108 .driver_module = THIS_MODULE,
109};
110
111static int adc128_probe(struct spi_device *spi)
112{
113 struct iio_dev *indio_dev;
114 struct adc128 *adc;
115 int ret;
116
117 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
118 if (!indio_dev)
119 return -ENOMEM;
120
121 adc = iio_priv(indio_dev);
122 adc->spi = spi;
123
124 spi_set_drvdata(spi, indio_dev);
125
126 indio_dev->dev.parent = &spi->dev;
127 indio_dev->name = spi_get_device_id(spi)->name;
128 indio_dev->modes = INDIO_DIRECT_MODE;
129 indio_dev->info = &adc128_info;
130
131 indio_dev->channels = adc128_channels;
132 indio_dev->num_channels = ARRAY_SIZE(adc128_channels);
133
134 adc->reg = devm_regulator_get(&spi->dev, "vref");
135 if (IS_ERR(adc->reg))
136 return PTR_ERR(adc->reg);
137
138 ret = regulator_enable(adc->reg);
139 if (ret < 0)
140 return ret;
141
142 mutex_init(&adc->lock);
143
144 ret = iio_device_register(indio_dev);
145
146 return ret;
147}
148
149static int adc128_remove(struct spi_device *spi)
150{
151 struct iio_dev *indio_dev = spi_get_drvdata(spi);
152 struct adc128 *adc = iio_priv(indio_dev);
153
154 iio_device_unregister(indio_dev);
155 regulator_disable(adc->reg);
156
157 return 0;
158}
159
160static const struct spi_device_id adc128_id[] = {
161 { "adc128s052", 0},
162 { }
163};
164MODULE_DEVICE_TABLE(spi, adc128_id);
165
166static struct spi_driver adc128_driver = {
167 .driver = {
168 .name = "adc128s052",
169 .owner = THIS_MODULE,
170 },
171 .probe = adc128_probe,
172 .remove = adc128_remove,
173 .id_table = adc128_id,
174};
175module_spi_driver(adc128_driver);
176
177MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
178MODULE_DESCRIPTION("Texas Instruments ADC128S052");
179MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/ti_am335x_adc.c b/drivers/iio/adc/ti_am335x_adc.c
index d5dc4c6ce86c..b730864731e8 100644
--- a/drivers/iio/adc/ti_am335x_adc.c
+++ b/drivers/iio/adc/ti_am335x_adc.c
@@ -545,7 +545,6 @@ MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
545static struct platform_driver tiadc_driver = { 545static struct platform_driver tiadc_driver = {
546 .driver = { 546 .driver = {
547 .name = "TI-am335x-adc", 547 .name = "TI-am335x-adc",
548 .owner = THIS_MODULE,
549 .pm = TIADC_PM_OPS, 548 .pm = TIADC_PM_OPS,
550 .of_match_table = ti_adc_dt_ids, 549 .of_match_table = ti_adc_dt_ids,
551 }, 550 },
diff --git a/drivers/iio/adc/twl4030-madc.c b/drivers/iio/adc/twl4030-madc.c
index eb86786e698e..94c5f05b4bc1 100644
--- a/drivers/iio/adc/twl4030-madc.c
+++ b/drivers/iio/adc/twl4030-madc.c
@@ -883,7 +883,6 @@ static struct platform_driver twl4030_madc_driver = {
883 .remove = twl4030_madc_remove, 883 .remove = twl4030_madc_remove,
884 .driver = { 884 .driver = {
885 .name = "twl4030_madc", 885 .name = "twl4030_madc",
886 .owner = THIS_MODULE,
887 .of_match_table = of_match_ptr(twl_madc_of_match), 886 .of_match_table = of_match_ptr(twl_madc_of_match),
888 }, 887 },
889}; 888};
diff --git a/drivers/iio/adc/twl6030-gpadc.c b/drivers/iio/adc/twl6030-gpadc.c
index 15282f148b3b..89d8aa1d2818 100644
--- a/drivers/iio/adc/twl6030-gpadc.c
+++ b/drivers/iio/adc/twl6030-gpadc.c
@@ -994,7 +994,6 @@ static struct platform_driver twl6030_gpadc_driver = {
994 .remove = twl6030_gpadc_remove, 994 .remove = twl6030_gpadc_remove,
995 .driver = { 995 .driver = {
996 .name = DRIVER_NAME, 996 .name = DRIVER_NAME,
997 .owner = THIS_MODULE,
998 .pm = &twl6030_gpadc_pm_ops, 997 .pm = &twl6030_gpadc_pm_ops,
999 .of_match_table = of_twl6030_match_tbl, 998 .of_match_table = of_twl6030_match_tbl,
1000 }, 999 },
diff --git a/drivers/iio/adc/vf610_adc.c b/drivers/iio/adc/vf610_adc.c
index 44799eb5930e..4a10ae97dbf2 100644
--- a/drivers/iio/adc/vf610_adc.c
+++ b/drivers/iio/adc/vf610_adc.c
@@ -698,7 +698,6 @@ static struct platform_driver vf610_adc_driver = {
698 .remove = vf610_adc_remove, 698 .remove = vf610_adc_remove,
699 .driver = { 699 .driver = {
700 .name = DRIVER_NAME, 700 .name = DRIVER_NAME,
701 .owner = THIS_MODULE,
702 .of_match_table = vf610_adc_match, 701 .of_match_table = vf610_adc_match,
703 .pm = &vf610_adc_pm_ops, 702 .pm = &vf610_adc_pm_ops,
704 }, 703 },
diff --git a/drivers/iio/adc/viperboard_adc.c b/drivers/iio/adc/viperboard_adc.c
index 9acf6b6d705b..3be2e35721cc 100644
--- a/drivers/iio/adc/viperboard_adc.c
+++ b/drivers/iio/adc/viperboard_adc.c
@@ -145,7 +145,6 @@ static int vprbrd_adc_probe(struct platform_device *pdev)
145static struct platform_driver vprbrd_adc_driver = { 145static struct platform_driver vprbrd_adc_driver = {
146 .driver = { 146 .driver = {
147 .name = "viperboard-adc", 147 .name = "viperboard-adc",
148 .owner = THIS_MODULE,
149 }, 148 },
150 .probe = vprbrd_adc_probe, 149 .probe = vprbrd_adc_probe,
151}; 150};
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index 626b39749767..a221f7329b79 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -1201,12 +1201,16 @@ static int xadc_probe(struct platform_device *pdev)
1201 goto err_device_free; 1201 goto err_device_free;
1202 1202
1203 xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst"); 1203 xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst");
1204 if (IS_ERR(xadc->convst_trigger)) 1204 if (IS_ERR(xadc->convst_trigger)) {
1205 ret = PTR_ERR(xadc->convst_trigger);
1205 goto err_triggered_buffer_cleanup; 1206 goto err_triggered_buffer_cleanup;
1207 }
1206 xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev, 1208 xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev,
1207 "samplerate"); 1209 "samplerate");
1208 if (IS_ERR(xadc->samplerate_trigger)) 1210 if (IS_ERR(xadc->samplerate_trigger)) {
1211 ret = PTR_ERR(xadc->samplerate_trigger);
1209 goto err_free_convst_trigger; 1212 goto err_free_convst_trigger;
1213 }
1210 } 1214 }
1211 1215
1212 xadc->clk = devm_clk_get(&pdev->dev, NULL); 1216 xadc->clk = devm_clk_get(&pdev->dev, NULL);
@@ -1322,7 +1326,6 @@ static struct platform_driver xadc_driver = {
1322 .remove = xadc_remove, 1326 .remove = xadc_remove,
1323 .driver = { 1327 .driver = {
1324 .name = "xadc", 1328 .name = "xadc",
1325 .owner = THIS_MODULE,
1326 .of_match_table = xadc_of_match_table, 1329 .of_match_table = xadc_of_match_table,
1327 }, 1330 },
1328}; 1331};
diff --git a/drivers/iio/common/st_sensors/st_sensors_buffer.c b/drivers/iio/common/st_sensors/st_sensors_buffer.c
index 1665c8e4b62b..e18bc6782256 100644
--- a/drivers/iio/common/st_sensors/st_sensors_buffer.c
+++ b/drivers/iio/common/st_sensors/st_sensors_buffer.c
@@ -71,7 +71,7 @@ int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf)
71 goto st_sensors_free_memory; 71 goto st_sensors_free_memory;
72 } 72 }
73 73
74 for (i = 0; i < n * num_data_channels; i++) { 74 for (i = 0; i < n * byte_for_channel; i++) {
75 if (i < n) 75 if (i < n)
76 buf[i] = rx_array[i]; 76 buf[i] = rx_array[i];
77 else 77 else
diff --git a/drivers/iio/common/st_sensors/st_sensors_core.c b/drivers/iio/common/st_sensors/st_sensors_core.c
index 8a4ec00a91a0..24cfe4e044f9 100644
--- a/drivers/iio/common/st_sensors/st_sensors_core.c
+++ b/drivers/iio/common/st_sensors/st_sensors_core.c
@@ -306,8 +306,11 @@ int st_sensors_init_sensor(struct iio_dev *indio_dev,
306 if (of_pdata) 306 if (of_pdata)
307 pdata = of_pdata; 307 pdata = of_pdata;
308 308
309 if (pdata) 309 if (pdata) {
310 err = st_sensors_set_drdy_int_pin(indio_dev, pdata); 310 err = st_sensors_set_drdy_int_pin(indio_dev, pdata);
311 if (err < 0)
312 return err;
313 }
311 314
312 err = st_sensors_set_enable(indio_dev, false); 315 err = st_sensors_set_enable(indio_dev, false);
313 if (err < 0) 316 if (err < 0)
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
index f278eff42a4c..2236ea22f98a 100644
--- a/drivers/iio/dac/Kconfig
+++ b/drivers/iio/dac/Kconfig
@@ -152,6 +152,14 @@ config MAX517
152 This driver can also be built as a module. If so, the module 152 This driver can also be built as a module. If so, the module
153 will be called max517. 153 will be called max517.
154 154
155config MAX5821
156 tristate "Maxim MAX5821 DAC driver"
157 depends on I2C
158 depends on OF
159 help
160 Say yes here to build support for Maxim MAX5821
161 10 bits DAC.
162
155config MCP4725 163config MCP4725
156 tristate "MCP4725 DAC driver" 164 tristate "MCP4725 DAC driver"
157 depends on I2C 165 depends on I2C
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
index 10107640bb46..52be7e1acf16 100644
--- a/drivers/iio/dac/Makefile
+++ b/drivers/iio/dac/Makefile
@@ -17,5 +17,6 @@ obj-$(CONFIG_AD5791) += ad5791.o
17obj-$(CONFIG_AD5686) += ad5686.o 17obj-$(CONFIG_AD5686) += ad5686.o
18obj-$(CONFIG_AD7303) += ad7303.o 18obj-$(CONFIG_AD7303) += ad7303.o
19obj-$(CONFIG_MAX517) += max517.o 19obj-$(CONFIG_MAX517) += max517.o
20obj-$(CONFIG_MAX5821) += max5821.o
20obj-$(CONFIG_MCP4725) += mcp4725.o 21obj-$(CONFIG_MCP4725) += mcp4725.o
21obj-$(CONFIG_MCP4922) += mcp4922.o 22obj-$(CONFIG_MCP4922) += mcp4922.o
diff --git a/drivers/iio/dac/max5821.c b/drivers/iio/dac/max5821.c
new file mode 100644
index 000000000000..6e914495b346
--- /dev/null
+++ b/drivers/iio/dac/max5821.c
@@ -0,0 +1,405 @@
1 /*
2 * iio/dac/max5821.c
3 * Copyright (C) 2014 Philippe Reynes
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/i2c.h>
13#include <linux/iio/iio.h>
14#include <linux/regulator/consumer.h>
15
16#define MAX5821_MAX_DAC_CHANNELS 2
17
18/* command bytes */
19#define MAX5821_LOAD_DAC_A_IN_REG_B 0x00
20#define MAX5821_LOAD_DAC_B_IN_REG_A 0x10
21#define MAX5821_EXTENDED_COMMAND_MODE 0xf0
22#define MAX5821_READ_DAC_A_COMMAND 0xf1
23#define MAX5821_READ_DAC_B_COMMAND 0xf2
24
25#define MAX5821_EXTENDED_POWER_UP 0x00
26#define MAX5821_EXTENDED_POWER_DOWN_MODE0 0x01
27#define MAX5821_EXTENDED_POWER_DOWN_MODE1 0x02
28#define MAX5821_EXTENDED_POWER_DOWN_MODE2 0x03
29#define MAX5821_EXTENDED_DAC_A 0x04
30#define MAX5821_EXTENDED_DAC_B 0x08
31
32enum max5821_device_ids {
33 ID_MAX5821,
34};
35
36struct max5821_data {
37 struct i2c_client *client;
38 struct regulator *vref_reg;
39 unsigned short vref_mv;
40 bool powerdown[MAX5821_MAX_DAC_CHANNELS];
41 u8 powerdown_mode[MAX5821_MAX_DAC_CHANNELS];
42 struct mutex lock;
43};
44
45static const char * const max5821_powerdown_modes[] = {
46 "three_state",
47 "1kohm_to_gnd",
48 "100kohm_to_gnd",
49};
50
51enum {
52 MAX5821_THREE_STATE,
53 MAX5821_1KOHM_TO_GND,
54 MAX5821_100KOHM_TO_GND
55};
56
57static int max5821_get_powerdown_mode(struct iio_dev *indio_dev,
58 const struct iio_chan_spec *chan)
59{
60 struct max5821_data *st = iio_priv(indio_dev);
61
62 return st->powerdown_mode[chan->channel];
63}
64
65static int max5821_set_powerdown_mode(struct iio_dev *indio_dev,
66 const struct iio_chan_spec *chan,
67 unsigned int mode)
68{
69 struct max5821_data *st = iio_priv(indio_dev);
70
71 st->powerdown_mode[chan->channel] = mode;
72
73 return 0;
74}
75
76static const struct iio_enum max5821_powerdown_mode_enum = {
77 .items = max5821_powerdown_modes,
78 .num_items = ARRAY_SIZE(max5821_powerdown_modes),
79 .get = max5821_get_powerdown_mode,
80 .set = max5821_set_powerdown_mode,
81};
82
83static ssize_t max5821_read_dac_powerdown(struct iio_dev *indio_dev,
84 uintptr_t private,
85 const struct iio_chan_spec *chan,
86 char *buf)
87{
88 struct max5821_data *st = iio_priv(indio_dev);
89
90 return sprintf(buf, "%d\n", st->powerdown[chan->channel]);
91}
92
93static int max5821_sync_powerdown_mode(struct max5821_data *data,
94 const struct iio_chan_spec *chan)
95{
96 u8 outbuf[2];
97
98 outbuf[0] = MAX5821_EXTENDED_COMMAND_MODE;
99
100 if (chan->channel == 0)
101 outbuf[1] = MAX5821_EXTENDED_DAC_A;
102 else
103 outbuf[1] = MAX5821_EXTENDED_DAC_B;
104
105 if (data->powerdown[chan->channel])
106 outbuf[1] |= data->powerdown_mode[chan->channel] + 1;
107 else
108 outbuf[1] |= MAX5821_EXTENDED_POWER_UP;
109
110 return i2c_master_send(data->client, outbuf, 2);
111}
112
113static ssize_t max5821_write_dac_powerdown(struct iio_dev *indio_dev,
114 uintptr_t private,
115 const struct iio_chan_spec *chan,
116 const char *buf, size_t len)
117{
118 struct max5821_data *data = iio_priv(indio_dev);
119 bool powerdown;
120 int ret;
121
122 ret = strtobool(buf, &powerdown);
123 if (ret)
124 return ret;
125
126 data->powerdown[chan->channel] = powerdown;
127
128 ret = max5821_sync_powerdown_mode(data, chan);
129 if (ret < 0)
130 return ret;
131
132 return len;
133}
134
135static const struct iio_chan_spec_ext_info max5821_ext_info[] = {
136 {
137 .name = "powerdown",
138 .read = max5821_read_dac_powerdown,
139 .write = max5821_write_dac_powerdown,
140 .shared = IIO_SEPARATE,
141 },
142 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &max5821_powerdown_mode_enum),
143 IIO_ENUM_AVAILABLE("powerdown_mode", &max5821_powerdown_mode_enum),
144 { },
145};
146
147#define MAX5821_CHANNEL(chan) { \
148 .type = IIO_VOLTAGE, \
149 .indexed = 1, \
150 .output = 1, \
151 .channel = (chan), \
152 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
153 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
154 .ext_info = max5821_ext_info, \
155}
156
157static const struct iio_chan_spec max5821_channels[] = {
158 MAX5821_CHANNEL(0),
159 MAX5821_CHANNEL(1)
160};
161
162static const u8 max5821_read_dac_command[] = {
163 MAX5821_READ_DAC_A_COMMAND,
164 MAX5821_READ_DAC_B_COMMAND
165};
166
167static const u8 max5821_load_dac_command[] = {
168 MAX5821_LOAD_DAC_A_IN_REG_B,
169 MAX5821_LOAD_DAC_B_IN_REG_A
170};
171
172static int max5821_get_value(struct iio_dev *indio_dev,
173 int *val, int channel)
174{
175 struct max5821_data *data = iio_priv(indio_dev);
176 struct i2c_client *client = data->client;
177 u8 outbuf[1];
178 u8 inbuf[2];
179 int ret;
180
181 if ((channel != 0) && (channel != 1))
182 return -EINVAL;
183
184 outbuf[0] = max5821_read_dac_command[channel];
185
186 mutex_lock(&data->lock);
187
188 ret = i2c_master_send(client, outbuf, 1);
189 if (ret < 0) {
190 mutex_unlock(&data->lock);
191 return ret;
192 } else if (ret != 1) {
193 mutex_unlock(&data->lock);
194 return -EIO;
195 }
196
197 ret = i2c_master_recv(client, inbuf, 2);
198 if (ret < 0) {
199 mutex_unlock(&data->lock);
200 return ret;
201 } else if (ret != 2) {
202 mutex_unlock(&data->lock);
203 return -EIO;
204 }
205
206 mutex_unlock(&data->lock);
207
208 *val = ((inbuf[0] & 0x0f) << 6) | (inbuf[1] >> 2);
209
210 return IIO_VAL_INT;
211}
212
213static int max5821_set_value(struct iio_dev *indio_dev,
214 int val, int channel)
215{
216 struct max5821_data *data = iio_priv(indio_dev);
217 struct i2c_client *client = data->client;
218 u8 outbuf[2];
219 int ret;
220
221 if ((val < 0) || (val > 1023))
222 return -EINVAL;
223
224 if ((channel != 0) && (channel != 1))
225 return -EINVAL;
226
227 outbuf[0] = max5821_load_dac_command[channel];
228 outbuf[0] |= val >> 6;
229 outbuf[1] = (val & 0x3f) << 2;
230
231 ret = i2c_master_send(client, outbuf, 2);
232 if (ret < 0)
233 return ret;
234 else if (ret != 2)
235 return -EIO;
236 else
237 return 0;
238}
239
240static int max5821_read_raw(struct iio_dev *indio_dev,
241 struct iio_chan_spec const *chan,
242 int *val, int *val2, long mask)
243{
244 struct max5821_data *data = iio_priv(indio_dev);
245
246 switch (mask) {
247 case IIO_CHAN_INFO_RAW:
248 return max5821_get_value(indio_dev, val, chan->channel);
249 case IIO_CHAN_INFO_SCALE:
250 *val = data->vref_mv;
251 *val2 = 10;
252 return IIO_VAL_FRACTIONAL_LOG2;
253 default:
254 return -EINVAL;
255 }
256}
257
258static int max5821_write_raw(struct iio_dev *indio_dev,
259 struct iio_chan_spec const *chan,
260 int val, int val2, long mask)
261{
262 if (val2 != 0)
263 return -EINVAL;
264
265 switch (mask) {
266 case IIO_CHAN_INFO_RAW:
267 return max5821_set_value(indio_dev, val, chan->channel);
268 default:
269 return -EINVAL;
270 }
271}
272
273#ifdef CONFIG_PM_SLEEP
274static int max5821_suspend(struct device *dev)
275{
276 u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
277 MAX5821_EXTENDED_DAC_A |
278 MAX5821_EXTENDED_DAC_B |
279 MAX5821_EXTENDED_POWER_DOWN_MODE2 };
280
281 return i2c_master_send(to_i2c_client(dev), outbuf, 2);
282}
283
284static int max5821_resume(struct device *dev)
285{
286 u8 outbuf[2] = { MAX5821_EXTENDED_COMMAND_MODE,
287 MAX5821_EXTENDED_DAC_A |
288 MAX5821_EXTENDED_DAC_B |
289 MAX5821_EXTENDED_POWER_UP };
290
291 return i2c_master_send(to_i2c_client(dev), outbuf, 2);
292}
293
294static SIMPLE_DEV_PM_OPS(max5821_pm_ops, max5821_suspend, max5821_resume);
295#define MAX5821_PM_OPS (&max5821_pm_ops)
296#else
297#define MAX5821_PM_OPS NULL
298#endif /* CONFIG_PM_SLEEP */
299
300static const struct iio_info max5821_info = {
301 .read_raw = max5821_read_raw,
302 .write_raw = max5821_write_raw,
303 .driver_module = THIS_MODULE,
304};
305
306static int max5821_probe(struct i2c_client *client,
307 const struct i2c_device_id *id)
308{
309 struct max5821_data *data;
310 struct iio_dev *indio_dev;
311 u32 tmp;
312 int ret;
313
314 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
315 if (!indio_dev)
316 return -ENOMEM;
317 data = iio_priv(indio_dev);
318 i2c_set_clientdata(client, indio_dev);
319 data->client = client;
320 mutex_init(&data->lock);
321
322 /* max5821 start in powerdown mode 100Kohm to ground */
323 for (tmp = 0; tmp < MAX5821_MAX_DAC_CHANNELS; tmp++) {
324 data->powerdown[tmp] = true;
325 data->powerdown_mode[tmp] = MAX5821_100KOHM_TO_GND;
326 }
327
328 data->vref_reg = devm_regulator_get(&client->dev, "vref");
329 if (IS_ERR(data->vref_reg)) {
330 ret = PTR_ERR(data->vref_reg);
331 dev_err(&client->dev,
332 "Failed to get vref regulator: %d\n", ret);
333 goto error_free_reg;
334 }
335
336 ret = regulator_enable(data->vref_reg);
337 if (ret) {
338 dev_err(&client->dev,
339 "Failed to enable vref regulator: %d\n", ret);
340 goto error_free_reg;
341 }
342
343 ret = regulator_get_voltage(data->vref_reg);
344 if (ret < 0) {
345 dev_err(&client->dev,
346 "Failed to get voltage on regulator: %d\n", ret);
347 goto error_disable_reg;
348 }
349
350 data->vref_mv = ret / 1000;
351
352 indio_dev->name = id->name;
353 indio_dev->dev.parent = &client->dev;
354 indio_dev->num_channels = ARRAY_SIZE(max5821_channels);
355 indio_dev->channels = max5821_channels;
356 indio_dev->modes = INDIO_DIRECT_MODE;
357 indio_dev->info = &max5821_info;
358
359 return iio_device_register(indio_dev);
360
361error_disable_reg:
362 regulator_disable(data->vref_reg);
363
364error_free_reg:
365
366 return ret;
367}
368
369static int max5821_remove(struct i2c_client *client)
370{
371 struct iio_dev *indio_dev = i2c_get_clientdata(client);
372 struct max5821_data *data = iio_priv(indio_dev);
373
374 iio_device_unregister(indio_dev);
375 regulator_disable(data->vref_reg);
376
377 return 0;
378}
379
380static const struct i2c_device_id max5821_id[] = {
381 { "max5821", ID_MAX5821 },
382 { }
383};
384MODULE_DEVICE_TABLE(i2c, max5821_id);
385
386static const struct of_device_id max5821_of_match[] = {
387 { .compatible = "maxim,max5821" },
388 { }
389};
390
391static struct i2c_driver max5821_driver = {
392 .driver = {
393 .name = "max5821",
394 .pm = MAX5821_PM_OPS,
395 .owner = THIS_MODULE,
396 },
397 .probe = max5821_probe,
398 .remove = max5821_remove,
399 .id_table = max5821_id,
400};
401module_i2c_driver(max5821_driver);
402
403MODULE_AUTHOR("Philippe Reynes <tremyfr@yahoo.fr>");
404MODULE_DESCRIPTION("MAX5821 DAC");
405MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/gyro/Kconfig b/drivers/iio/gyro/Kconfig
index ac2d69e34c8c..b3d0e94f72eb 100644
--- a/drivers/iio/gyro/Kconfig
+++ b/drivers/iio/gyro/Kconfig
@@ -50,6 +50,17 @@ config ADXRS450
50 This driver can also be built as a module. If so, the module 50 This driver can also be built as a module. If so, the module
51 will be called adxrs450. 51 will be called adxrs450.
52 52
53config BMG160
54 tristate "BOSCH BMG160 Gyro Sensor"
55 depends on I2C
56 select IIO_TRIGGERED_BUFFER if IIO_BUFFER
57 help
58 Say yes here to build support for Bosch BMG160 Tri-axis Gyro Sensor
59 driver. This driver also supports BMI055 gyroscope.
60
61 This driver can also be built as a module. If so, the module
62 will be called bmg160.
63
53config HID_SENSOR_GYRO_3D 64config HID_SENSOR_GYRO_3D
54 depends on HID_SENSOR_HUB 65 depends on HID_SENSOR_HUB
55 select IIO_BUFFER 66 select IIO_BUFFER
diff --git a/drivers/iio/gyro/Makefile b/drivers/iio/gyro/Makefile
index 2f2752a4ea83..36a38776f739 100644
--- a/drivers/iio/gyro/Makefile
+++ b/drivers/iio/gyro/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_ADIS16130) += adis16130.o
8obj-$(CONFIG_ADIS16136) += adis16136.o 8obj-$(CONFIG_ADIS16136) += adis16136.o
9obj-$(CONFIG_ADIS16260) += adis16260.o 9obj-$(CONFIG_ADIS16260) += adis16260.o
10obj-$(CONFIG_ADXRS450) += adxrs450.o 10obj-$(CONFIG_ADXRS450) += adxrs450.o
11obj-$(CONFIG_BMG160) += bmg160.o
11 12
12obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o 13obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o
13 14
diff --git a/drivers/iio/gyro/bmg160.c b/drivers/iio/gyro/bmg160.c
new file mode 100644
index 000000000000..1f967e0d688e
--- /dev/null
+++ b/drivers/iio/gyro/bmg160.c
@@ -0,0 +1,1228 @@
1/*
2 * BMG160 Gyro Sensor driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/trigger.h>
28#include <linux/iio/events.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMG160_DRV_NAME "bmg160"
33#define BMG160_IRQ_NAME "bmg160_event"
34#define BMG160_GPIO_NAME "gpio_int"
35
36#define BMG160_REG_CHIP_ID 0x00
37#define BMG160_CHIP_ID_VAL 0x0F
38
39#define BMG160_REG_PMU_LPW 0x11
40#define BMG160_MODE_NORMAL 0x00
41#define BMG160_MODE_DEEP_SUSPEND 0x20
42#define BMG160_MODE_SUSPEND 0x80
43
44#define BMG160_REG_RANGE 0x0F
45
46#define BMG160_RANGE_2000DPS 0
47#define BMG160_RANGE_1000DPS 1
48#define BMG160_RANGE_500DPS 2
49#define BMG160_RANGE_250DPS 3
50#define BMG160_RANGE_125DPS 4
51
52#define BMG160_REG_PMU_BW 0x10
53#define BMG160_NO_FILTER 0
54#define BMG160_DEF_BW 100
55
56#define BMG160_REG_INT_MAP_0 0x17
57#define BMG160_INT_MAP_0_BIT_ANY BIT(1)
58
59#define BMG160_REG_INT_MAP_1 0x18
60#define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
61
62#define BMG160_REG_INT_RST_LATCH 0x21
63#define BMG160_INT_MODE_LATCH_RESET 0x80
64#define BMG160_INT_MODE_LATCH_INT 0x0F
65#define BMG160_INT_MODE_NON_LATCH_INT 0x00
66
67#define BMG160_REG_INT_EN_0 0x15
68#define BMG160_DATA_ENABLE_INT BIT(7)
69
70#define BMG160_REG_XOUT_L 0x02
71#define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
72
73#define BMG160_REG_SLOPE_THRES 0x1B
74#define BMG160_SLOPE_THRES_MASK 0x0F
75
76#define BMG160_REG_MOTION_INTR 0x1C
77#define BMG160_INT_MOTION_X BIT(0)
78#define BMG160_INT_MOTION_Y BIT(1)
79#define BMG160_INT_MOTION_Z BIT(2)
80#define BMG160_ANY_DUR_MASK 0x30
81#define BMG160_ANY_DUR_SHIFT 4
82
83#define BMG160_REG_INT_STATUS_2 0x0B
84#define BMG160_ANY_MOTION_MASK 0x07
85
86#define BMG160_REG_TEMP 0x08
87#define BMG160_TEMP_CENTER_VAL 23
88
89#define BMG160_MAX_STARTUP_TIME_MS 80
90
91#define BMG160_AUTO_SUSPEND_DELAY_MS 2000
92
93struct bmg160_data {
94 struct i2c_client *client;
95 struct iio_trigger *dready_trig;
96 struct iio_trigger *motion_trig;
97 struct mutex mutex;
98 s16 buffer[8];
99 u8 bw_bits;
100 u32 dps_range;
101 int ev_enable_state;
102 int slope_thres;
103 bool dready_trigger_on;
104 bool motion_trigger_on;
105 int64_t timestamp;
106};
107
108enum bmg160_axis {
109 AXIS_X,
110 AXIS_Y,
111 AXIS_Z,
112};
113
114static const struct {
115 int val;
116 int bw_bits;
117} bmg160_samp_freq_table[] = { {100, 0x07},
118 {200, 0x06},
119 {400, 0x03},
120 {1000, 0x02},
121 {2000, 0x01} };
122
123static const struct {
124 int scale;
125 int dps_range;
126} bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
127 { 532, BMG160_RANGE_1000DPS},
128 { 266, BMG160_RANGE_500DPS},
129 { 133, BMG160_RANGE_250DPS},
130 { 66, BMG160_RANGE_125DPS} };
131
132static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
133{
134 int ret;
135
136 ret = i2c_smbus_write_byte_data(data->client,
137 BMG160_REG_PMU_LPW, mode);
138 if (ret < 0) {
139 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
140 return ret;
141 }
142
143 return 0;
144}
145
146static int bmg160_convert_freq_to_bit(int val)
147{
148 int i;
149
150 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
151 if (bmg160_samp_freq_table[i].val == val)
152 return bmg160_samp_freq_table[i].bw_bits;
153 }
154
155 return -EINVAL;
156}
157
158static int bmg160_set_bw(struct bmg160_data *data, int val)
159{
160 int ret;
161 int bw_bits;
162
163 bw_bits = bmg160_convert_freq_to_bit(val);
164 if (bw_bits < 0)
165 return bw_bits;
166
167 ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
168 bw_bits);
169 if (ret < 0) {
170 dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
171 return ret;
172 }
173
174 data->bw_bits = bw_bits;
175
176 return 0;
177}
178
179static int bmg160_chip_init(struct bmg160_data *data)
180{
181 int ret;
182
183 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
184 if (ret < 0) {
185 dev_err(&data->client->dev, "Error reading reg_chip_id\n");
186 return ret;
187 }
188
189 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
190 if (ret != BMG160_CHIP_ID_VAL) {
191 dev_err(&data->client->dev, "invalid chip %x\n", ret);
192 return -ENODEV;
193 }
194
195 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
196 if (ret < 0)
197 return ret;
198
199 /* Wait upto 500 ms to be ready after changing mode */
200 usleep_range(500, 1000);
201
202 /* Set Bandwidth */
203 ret = bmg160_set_bw(data, BMG160_DEF_BW);
204 if (ret < 0)
205 return ret;
206
207 /* Set Default Range */
208 ret = i2c_smbus_write_byte_data(data->client,
209 BMG160_REG_RANGE,
210 BMG160_RANGE_500DPS);
211 if (ret < 0) {
212 dev_err(&data->client->dev, "Error writing reg_range\n");
213 return ret;
214 }
215 data->dps_range = BMG160_RANGE_500DPS;
216
217 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
218 if (ret < 0) {
219 dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
220 return ret;
221 }
222 data->slope_thres = ret;
223
224 /* Set default interrupt mode */
225 ret = i2c_smbus_write_byte_data(data->client,
226 BMG160_REG_INT_RST_LATCH,
227 BMG160_INT_MODE_LATCH_INT |
228 BMG160_INT_MODE_LATCH_RESET);
229 if (ret < 0) {
230 dev_err(&data->client->dev,
231 "Error writing reg_motion_intr\n");
232 return ret;
233 }
234
235 return 0;
236}
237
238static int bmg160_set_power_state(struct bmg160_data *data, bool on)
239{
240#ifdef CONFIG_PM_RUNTIME
241 int ret;
242
243 if (on)
244 ret = pm_runtime_get_sync(&data->client->dev);
245 else {
246 pm_runtime_mark_last_busy(&data->client->dev);
247 ret = pm_runtime_put_autosuspend(&data->client->dev);
248 }
249
250 if (ret < 0) {
251 dev_err(&data->client->dev,
252 "Failed: bmg160_set_power_state for %d\n", on);
253 return ret;
254 }
255#endif
256
257 return 0;
258}
259
260static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
261 bool status)
262{
263 int ret;
264
265 /* Enable/Disable INT_MAP0 mapping */
266 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
267 if (ret < 0) {
268 dev_err(&data->client->dev, "Error reading reg_int_map0\n");
269 return ret;
270 }
271 if (status)
272 ret |= BMG160_INT_MAP_0_BIT_ANY;
273 else
274 ret &= ~BMG160_INT_MAP_0_BIT_ANY;
275
276 ret = i2c_smbus_write_byte_data(data->client,
277 BMG160_REG_INT_MAP_0,
278 ret);
279 if (ret < 0) {
280 dev_err(&data->client->dev, "Error writing reg_int_map0\n");
281 return ret;
282 }
283
284 /* Enable/Disable slope interrupts */
285 if (status) {
286 /* Update slope thres */
287 ret = i2c_smbus_write_byte_data(data->client,
288 BMG160_REG_SLOPE_THRES,
289 data->slope_thres);
290 if (ret < 0) {
291 dev_err(&data->client->dev,
292 "Error writing reg_slope_thres\n");
293 return ret;
294 }
295
296 ret = i2c_smbus_write_byte_data(data->client,
297 BMG160_REG_MOTION_INTR,
298 BMG160_INT_MOTION_X |
299 BMG160_INT_MOTION_Y |
300 BMG160_INT_MOTION_Z);
301 if (ret < 0) {
302 dev_err(&data->client->dev,
303 "Error writing reg_motion_intr\n");
304 return ret;
305 }
306
307 /*
308 * New data interrupt is always non-latched,
309 * which will have higher priority, so no need
310 * to set latched mode, we will be flooded anyway with INTR
311 */
312 if (!data->dready_trigger_on) {
313 ret = i2c_smbus_write_byte_data(data->client,
314 BMG160_REG_INT_RST_LATCH,
315 BMG160_INT_MODE_LATCH_INT |
316 BMG160_INT_MODE_LATCH_RESET);
317 if (ret < 0) {
318 dev_err(&data->client->dev,
319 "Error writing reg_rst_latch\n");
320 return ret;
321 }
322 }
323
324 ret = i2c_smbus_write_byte_data(data->client,
325 BMG160_REG_INT_EN_0,
326 BMG160_DATA_ENABLE_INT);
327
328 } else
329 ret = i2c_smbus_write_byte_data(data->client,
330 BMG160_REG_INT_EN_0,
331 0);
332
333 if (ret < 0) {
334 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
335 return ret;
336 }
337
338 return 0;
339}
340
341static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
342 bool status)
343{
344 int ret;
345
346 /* Enable/Disable INT_MAP1 mapping */
347 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
348 if (ret < 0) {
349 dev_err(&data->client->dev, "Error reading reg_int_map1\n");
350 return ret;
351 }
352
353 if (status)
354 ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
355 else
356 ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
357
358 ret = i2c_smbus_write_byte_data(data->client,
359 BMG160_REG_INT_MAP_1,
360 ret);
361 if (ret < 0) {
362 dev_err(&data->client->dev, "Error writing reg_int_map1\n");
363 return ret;
364 }
365
366 if (status) {
367 ret = i2c_smbus_write_byte_data(data->client,
368 BMG160_REG_INT_RST_LATCH,
369 BMG160_INT_MODE_NON_LATCH_INT |
370 BMG160_INT_MODE_LATCH_RESET);
371 if (ret < 0) {
372 dev_err(&data->client->dev,
373 "Error writing reg_rst_latch\n");
374 return ret;
375 }
376
377 ret = i2c_smbus_write_byte_data(data->client,
378 BMG160_REG_INT_EN_0,
379 BMG160_DATA_ENABLE_INT);
380
381 } else {
382 /* Restore interrupt mode */
383 ret = i2c_smbus_write_byte_data(data->client,
384 BMG160_REG_INT_RST_LATCH,
385 BMG160_INT_MODE_LATCH_INT |
386 BMG160_INT_MODE_LATCH_RESET);
387 if (ret < 0) {
388 dev_err(&data->client->dev,
389 "Error writing reg_rst_latch\n");
390 return ret;
391 }
392
393 ret = i2c_smbus_write_byte_data(data->client,
394 BMG160_REG_INT_EN_0,
395 0);
396 }
397
398 if (ret < 0) {
399 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
400 return ret;
401 }
402
403 return 0;
404}
405
406static int bmg160_get_bw(struct bmg160_data *data, int *val)
407{
408 int i;
409
410 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
411 if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
412 *val = bmg160_samp_freq_table[i].val;
413 return IIO_VAL_INT;
414 }
415 }
416
417 return -EINVAL;
418}
419
420static int bmg160_set_scale(struct bmg160_data *data, int val)
421{
422 int ret, i;
423
424 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
425 if (bmg160_scale_table[i].scale == val) {
426 ret = i2c_smbus_write_byte_data(
427 data->client,
428 BMG160_REG_RANGE,
429 bmg160_scale_table[i].dps_range);
430 if (ret < 0) {
431 dev_err(&data->client->dev,
432 "Error writing reg_range\n");
433 return ret;
434 }
435 data->dps_range = bmg160_scale_table[i].dps_range;
436 return 0;
437 }
438 }
439
440 return -EINVAL;
441}
442
443static int bmg160_get_temp(struct bmg160_data *data, int *val)
444{
445 int ret;
446
447 mutex_lock(&data->mutex);
448 ret = bmg160_set_power_state(data, true);
449 if (ret < 0) {
450 mutex_unlock(&data->mutex);
451 return ret;
452 }
453
454 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
455 if (ret < 0) {
456 dev_err(&data->client->dev, "Error reading reg_temp\n");
457 bmg160_set_power_state(data, false);
458 mutex_unlock(&data->mutex);
459 return ret;
460 }
461
462 *val = sign_extend32(ret, 7);
463 ret = bmg160_set_power_state(data, false);
464 mutex_unlock(&data->mutex);
465 if (ret < 0)
466 return ret;
467
468 return IIO_VAL_INT;
469}
470
471static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
472{
473 int ret;
474
475 mutex_lock(&data->mutex);
476 ret = bmg160_set_power_state(data, true);
477 if (ret < 0) {
478 mutex_unlock(&data->mutex);
479 return ret;
480 }
481
482 ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
483 if (ret < 0) {
484 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
485 bmg160_set_power_state(data, false);
486 mutex_unlock(&data->mutex);
487 return ret;
488 }
489
490 *val = sign_extend32(ret, 15);
491 ret = bmg160_set_power_state(data, false);
492 mutex_unlock(&data->mutex);
493 if (ret < 0)
494 return ret;
495
496 return IIO_VAL_INT;
497}
498
499static int bmg160_read_raw(struct iio_dev *indio_dev,
500 struct iio_chan_spec const *chan,
501 int *val, int *val2, long mask)
502{
503 struct bmg160_data *data = iio_priv(indio_dev);
504 int ret;
505
506 switch (mask) {
507 case IIO_CHAN_INFO_RAW:
508 switch (chan->type) {
509 case IIO_TEMP:
510 return bmg160_get_temp(data, val);
511 case IIO_ANGL_VEL:
512 if (iio_buffer_enabled(indio_dev))
513 return -EBUSY;
514 else
515 return bmg160_get_axis(data, chan->scan_index,
516 val);
517 default:
518 return -EINVAL;
519 }
520 case IIO_CHAN_INFO_OFFSET:
521 if (chan->type == IIO_TEMP) {
522 *val = BMG160_TEMP_CENTER_VAL;
523 return IIO_VAL_INT;
524 } else
525 return -EINVAL;
526 case IIO_CHAN_INFO_SCALE:
527 *val = 0;
528 switch (chan->type) {
529 case IIO_TEMP:
530 *val2 = 500000;
531 return IIO_VAL_INT_PLUS_MICRO;
532 case IIO_ANGL_VEL:
533 {
534 int i;
535
536 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
537 if (bmg160_scale_table[i].dps_range ==
538 data->dps_range) {
539 *val2 = bmg160_scale_table[i].scale;
540 return IIO_VAL_INT_PLUS_MICRO;
541 }
542 }
543 return -EINVAL;
544 }
545 default:
546 return -EINVAL;
547 }
548 case IIO_CHAN_INFO_SAMP_FREQ:
549 *val2 = 0;
550 mutex_lock(&data->mutex);
551 ret = bmg160_get_bw(data, val);
552 mutex_unlock(&data->mutex);
553 return ret;
554 default:
555 return -EINVAL;
556 }
557}
558
559static int bmg160_write_raw(struct iio_dev *indio_dev,
560 struct iio_chan_spec const *chan,
561 int val, int val2, long mask)
562{
563 struct bmg160_data *data = iio_priv(indio_dev);
564 int ret;
565
566 switch (mask) {
567 case IIO_CHAN_INFO_SAMP_FREQ:
568 mutex_lock(&data->mutex);
569 /*
570 * Section 4.2 of spec
571 * In suspend mode, the only supported operations are reading
572 * registers as well as writing to the (0x14) softreset
573 * register. Since we will be in suspend mode by default, change
574 * mode to power on for other writes.
575 */
576 ret = bmg160_set_power_state(data, true);
577 if (ret < 0) {
578 mutex_unlock(&data->mutex);
579 return ret;
580 }
581 ret = bmg160_set_bw(data, val);
582 if (ret < 0) {
583 bmg160_set_power_state(data, false);
584 mutex_unlock(&data->mutex);
585 return ret;
586 }
587 ret = bmg160_set_power_state(data, false);
588 mutex_unlock(&data->mutex);
589 return ret;
590 case IIO_CHAN_INFO_SCALE:
591 if (val)
592 return -EINVAL;
593
594 mutex_lock(&data->mutex);
595 /* Refer to comments above for the suspend mode ops */
596 ret = bmg160_set_power_state(data, true);
597 if (ret < 0) {
598 mutex_unlock(&data->mutex);
599 return ret;
600 }
601 ret = bmg160_set_scale(data, val2);
602 if (ret < 0) {
603 bmg160_set_power_state(data, false);
604 mutex_unlock(&data->mutex);
605 return ret;
606 }
607 ret = bmg160_set_power_state(data, false);
608 mutex_unlock(&data->mutex);
609 return ret;
610 default:
611 return -EINVAL;
612 }
613
614 return -EINVAL;
615}
616
617static int bmg160_read_event(struct iio_dev *indio_dev,
618 const struct iio_chan_spec *chan,
619 enum iio_event_type type,
620 enum iio_event_direction dir,
621 enum iio_event_info info,
622 int *val, int *val2)
623{
624 struct bmg160_data *data = iio_priv(indio_dev);
625
626 *val2 = 0;
627 switch (info) {
628 case IIO_EV_INFO_VALUE:
629 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
630 break;
631 default:
632 return -EINVAL;
633 }
634
635 return IIO_VAL_INT;
636}
637
638static int bmg160_write_event(struct iio_dev *indio_dev,
639 const struct iio_chan_spec *chan,
640 enum iio_event_type type,
641 enum iio_event_direction dir,
642 enum iio_event_info info,
643 int val, int val2)
644{
645 struct bmg160_data *data = iio_priv(indio_dev);
646
647 switch (info) {
648 case IIO_EV_INFO_VALUE:
649 if (data->ev_enable_state)
650 return -EBUSY;
651 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
652 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
653 break;
654 default:
655 return -EINVAL;
656 }
657
658 return 0;
659}
660
661static int bmg160_read_event_config(struct iio_dev *indio_dev,
662 const struct iio_chan_spec *chan,
663 enum iio_event_type type,
664 enum iio_event_direction dir)
665{
666
667 struct bmg160_data *data = iio_priv(indio_dev);
668
669 return data->ev_enable_state;
670}
671
672static int bmg160_write_event_config(struct iio_dev *indio_dev,
673 const struct iio_chan_spec *chan,
674 enum iio_event_type type,
675 enum iio_event_direction dir,
676 int state)
677{
678 struct bmg160_data *data = iio_priv(indio_dev);
679 int ret;
680
681 if (state && data->ev_enable_state)
682 return 0;
683
684 mutex_lock(&data->mutex);
685
686 if (!state && data->motion_trigger_on) {
687 data->ev_enable_state = 0;
688 mutex_unlock(&data->mutex);
689 return 0;
690 }
691 /*
692 * We will expect the enable and disable to do operation in
693 * in reverse order. This will happen here anyway as our
694 * resume operation uses sync mode runtime pm calls, the
695 * suspend operation will be delayed by autosuspend delay
696 * So the disable operation will still happen in reverse of
697 * enable operation. When runtime pm is disabled the mode
698 * is always on so sequence doesn't matter
699 */
700 ret = bmg160_set_power_state(data, state);
701 if (ret < 0) {
702 mutex_unlock(&data->mutex);
703 return ret;
704 }
705
706 ret = bmg160_setup_any_motion_interrupt(data, state);
707 if (ret < 0) {
708 mutex_unlock(&data->mutex);
709 return ret;
710 }
711
712 data->ev_enable_state = state;
713 mutex_unlock(&data->mutex);
714
715 return 0;
716}
717
718static int bmg160_validate_trigger(struct iio_dev *indio_dev,
719 struct iio_trigger *trig)
720{
721 struct bmg160_data *data = iio_priv(indio_dev);
722
723 if (data->dready_trig != trig && data->motion_trig != trig)
724 return -EINVAL;
725
726 return 0;
727}
728
729static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
730
731static IIO_CONST_ATTR(in_anglvel_scale_available,
732 "0.001065 0.000532 0.000266 0.000133 0.000066");
733
734static struct attribute *bmg160_attributes[] = {
735 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
736 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
737 NULL,
738};
739
740static const struct attribute_group bmg160_attrs_group = {
741 .attrs = bmg160_attributes,
742};
743
744static const struct iio_event_spec bmg160_event = {
745 .type = IIO_EV_TYPE_ROC,
746 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
747 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
748 BIT(IIO_EV_INFO_ENABLE)
749};
750
751#define BMG160_CHANNEL(_axis) { \
752 .type = IIO_ANGL_VEL, \
753 .modified = 1, \
754 .channel2 = IIO_MOD_##_axis, \
755 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
756 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
757 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
758 .scan_index = AXIS_##_axis, \
759 .scan_type = { \
760 .sign = 's', \
761 .realbits = 16, \
762 .storagebits = 16, \
763 }, \
764 .event_spec = &bmg160_event, \
765 .num_event_specs = 1 \
766}
767
768static const struct iio_chan_spec bmg160_channels[] = {
769 {
770 .type = IIO_TEMP,
771 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
772 BIT(IIO_CHAN_INFO_SCALE) |
773 BIT(IIO_CHAN_INFO_OFFSET),
774 .scan_index = -1,
775 },
776 BMG160_CHANNEL(X),
777 BMG160_CHANNEL(Y),
778 BMG160_CHANNEL(Z),
779 IIO_CHAN_SOFT_TIMESTAMP(3),
780};
781
782static const struct iio_info bmg160_info = {
783 .attrs = &bmg160_attrs_group,
784 .read_raw = bmg160_read_raw,
785 .write_raw = bmg160_write_raw,
786 .read_event_value = bmg160_read_event,
787 .write_event_value = bmg160_write_event,
788 .write_event_config = bmg160_write_event_config,
789 .read_event_config = bmg160_read_event_config,
790 .validate_trigger = bmg160_validate_trigger,
791 .driver_module = THIS_MODULE,
792};
793
794static irqreturn_t bmg160_trigger_handler(int irq, void *p)
795{
796 struct iio_poll_func *pf = p;
797 struct iio_dev *indio_dev = pf->indio_dev;
798 struct bmg160_data *data = iio_priv(indio_dev);
799 int bit, ret, i = 0;
800
801 mutex_lock(&data->mutex);
802 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
803 indio_dev->masklength) {
804 ret = i2c_smbus_read_word_data(data->client,
805 BMG160_AXIS_TO_REG(bit));
806 if (ret < 0) {
807 mutex_unlock(&data->mutex);
808 goto err;
809 }
810 data->buffer[i++] = ret;
811 }
812 mutex_unlock(&data->mutex);
813
814 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
815 data->timestamp);
816err:
817 iio_trigger_notify_done(indio_dev->trig);
818
819 return IRQ_HANDLED;
820}
821
822static int bmg160_trig_try_reen(struct iio_trigger *trig)
823{
824 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
825 struct bmg160_data *data = iio_priv(indio_dev);
826 int ret;
827
828 /* new data interrupts don't need ack */
829 if (data->dready_trigger_on)
830 return 0;
831
832 /* Set latched mode interrupt and clear any latched interrupt */
833 ret = i2c_smbus_write_byte_data(data->client,
834 BMG160_REG_INT_RST_LATCH,
835 BMG160_INT_MODE_LATCH_INT |
836 BMG160_INT_MODE_LATCH_RESET);
837 if (ret < 0) {
838 dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
839 return ret;
840 }
841
842 return 0;
843}
844
845static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
846 bool state)
847{
848 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
849 struct bmg160_data *data = iio_priv(indio_dev);
850 int ret;
851
852 mutex_lock(&data->mutex);
853
854 if (!state && data->ev_enable_state && data->motion_trigger_on) {
855 data->motion_trigger_on = false;
856 mutex_unlock(&data->mutex);
857 return 0;
858 }
859
860 /*
861 * Refer to comment in bmg160_write_event_config for
862 * enable/disable operation order
863 */
864 ret = bmg160_set_power_state(data, state);
865 if (ret < 0) {
866 mutex_unlock(&data->mutex);
867 return ret;
868 }
869 if (data->motion_trig == trig)
870 ret = bmg160_setup_any_motion_interrupt(data, state);
871 else
872 ret = bmg160_setup_new_data_interrupt(data, state);
873 if (ret < 0) {
874 mutex_unlock(&data->mutex);
875 return ret;
876 }
877 if (data->motion_trig == trig)
878 data->motion_trigger_on = state;
879 else
880 data->dready_trigger_on = state;
881
882 mutex_unlock(&data->mutex);
883
884 return 0;
885}
886
887static const struct iio_trigger_ops bmg160_trigger_ops = {
888 .set_trigger_state = bmg160_data_rdy_trigger_set_state,
889 .try_reenable = bmg160_trig_try_reen,
890 .owner = THIS_MODULE,
891};
892
893static irqreturn_t bmg160_event_handler(int irq, void *private)
894{
895 struct iio_dev *indio_dev = private;
896 struct bmg160_data *data = iio_priv(indio_dev);
897 int ret;
898 int dir;
899
900 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
901 if (ret < 0) {
902 dev_err(&data->client->dev, "Error reading reg_int_status2\n");
903 goto ack_intr_status;
904 }
905
906 if (ret & 0x08)
907 dir = IIO_EV_DIR_RISING;
908 else
909 dir = IIO_EV_DIR_FALLING;
910
911 if (ret & BMG160_ANY_MOTION_MASK)
912 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
913 0,
914 IIO_MOD_X_OR_Y_OR_Z,
915 IIO_EV_TYPE_ROC,
916 dir),
917 data->timestamp);
918
919ack_intr_status:
920 if (!data->dready_trigger_on) {
921 ret = i2c_smbus_write_byte_data(data->client,
922 BMG160_REG_INT_RST_LATCH,
923 BMG160_INT_MODE_LATCH_INT |
924 BMG160_INT_MODE_LATCH_RESET);
925 if (ret < 0)
926 dev_err(&data->client->dev,
927 "Error writing reg_rst_latch\n");
928 }
929
930 return IRQ_HANDLED;
931}
932
933static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
934{
935 struct iio_dev *indio_dev = private;
936 struct bmg160_data *data = iio_priv(indio_dev);
937
938 data->timestamp = iio_get_time_ns();
939
940 if (data->dready_trigger_on)
941 iio_trigger_poll(data->dready_trig);
942 else if (data->motion_trigger_on)
943 iio_trigger_poll(data->motion_trig);
944
945 if (data->ev_enable_state)
946 return IRQ_WAKE_THREAD;
947 else
948 return IRQ_HANDLED;
949
950}
951
952static int bmg160_gpio_probe(struct i2c_client *client,
953 struct bmg160_data *data)
954
955{
956 struct device *dev;
957 struct gpio_desc *gpio;
958 int ret;
959
960 if (!client)
961 return -EINVAL;
962
963 dev = &client->dev;
964
965 /* data ready gpio interrupt pin */
966 gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
967 if (IS_ERR(gpio)) {
968 dev_err(dev, "acpi gpio get index failed\n");
969 return PTR_ERR(gpio);
970 }
971
972 ret = gpiod_direction_input(gpio);
973 if (ret)
974 return ret;
975
976 ret = gpiod_to_irq(gpio);
977
978 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
979
980 return ret;
981}
982
983static const char *bmg160_match_acpi_device(struct device *dev)
984{
985 const struct acpi_device_id *id;
986
987 id = acpi_match_device(dev->driver->acpi_match_table, dev);
988 if (!id)
989 return NULL;
990
991 return dev_name(dev);
992}
993
994static int bmg160_probe(struct i2c_client *client,
995 const struct i2c_device_id *id)
996{
997 struct bmg160_data *data;
998 struct iio_dev *indio_dev;
999 int ret;
1000 const char *name = NULL;
1001
1002 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1003 if (!indio_dev)
1004 return -ENOMEM;
1005
1006 data = iio_priv(indio_dev);
1007 i2c_set_clientdata(client, indio_dev);
1008 data->client = client;
1009
1010 ret = bmg160_chip_init(data);
1011 if (ret < 0)
1012 return ret;
1013
1014 mutex_init(&data->mutex);
1015
1016 if (id)
1017 name = id->name;
1018
1019 if (ACPI_HANDLE(&client->dev))
1020 name = bmg160_match_acpi_device(&client->dev);
1021
1022 indio_dev->dev.parent = &client->dev;
1023 indio_dev->channels = bmg160_channels;
1024 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
1025 indio_dev->name = name;
1026 indio_dev->modes = INDIO_DIRECT_MODE;
1027 indio_dev->info = &bmg160_info;
1028
1029 if (client->irq <= 0)
1030 client->irq = bmg160_gpio_probe(client, data);
1031
1032 if (client->irq > 0) {
1033 ret = devm_request_threaded_irq(&client->dev,
1034 client->irq,
1035 bmg160_data_rdy_trig_poll,
1036 bmg160_event_handler,
1037 IRQF_TRIGGER_RISING,
1038 BMG160_IRQ_NAME,
1039 indio_dev);
1040 if (ret)
1041 return ret;
1042
1043 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1044 "%s-dev%d",
1045 indio_dev->name,
1046 indio_dev->id);
1047 if (!data->dready_trig)
1048 return -ENOMEM;
1049
1050 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1051 "%s-any-motion-dev%d",
1052 indio_dev->name,
1053 indio_dev->id);
1054 if (!data->motion_trig)
1055 return -ENOMEM;
1056
1057 data->dready_trig->dev.parent = &client->dev;
1058 data->dready_trig->ops = &bmg160_trigger_ops;
1059 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1060 ret = iio_trigger_register(data->dready_trig);
1061 if (ret)
1062 return ret;
1063
1064 data->motion_trig->dev.parent = &client->dev;
1065 data->motion_trig->ops = &bmg160_trigger_ops;
1066 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1067 ret = iio_trigger_register(data->motion_trig);
1068 if (ret) {
1069 data->motion_trig = NULL;
1070 goto err_trigger_unregister;
1071 }
1072
1073 ret = iio_triggered_buffer_setup(indio_dev,
1074 NULL,
1075 bmg160_trigger_handler,
1076 NULL);
1077 if (ret < 0) {
1078 dev_err(&client->dev,
1079 "iio triggered buffer setup failed\n");
1080 goto err_trigger_unregister;
1081 }
1082 }
1083
1084 ret = iio_device_register(indio_dev);
1085 if (ret < 0) {
1086 dev_err(&client->dev, "unable to register iio device\n");
1087 goto err_buffer_cleanup;
1088 }
1089
1090 ret = pm_runtime_set_active(&client->dev);
1091 if (ret)
1092 goto err_iio_unregister;
1093
1094 pm_runtime_enable(&client->dev);
1095 pm_runtime_set_autosuspend_delay(&client->dev,
1096 BMG160_AUTO_SUSPEND_DELAY_MS);
1097 pm_runtime_use_autosuspend(&client->dev);
1098
1099 return 0;
1100
1101err_iio_unregister:
1102 iio_device_unregister(indio_dev);
1103err_buffer_cleanup:
1104 if (data->dready_trig)
1105 iio_triggered_buffer_cleanup(indio_dev);
1106err_trigger_unregister:
1107 if (data->dready_trig)
1108 iio_trigger_unregister(data->dready_trig);
1109 if (data->motion_trig)
1110 iio_trigger_unregister(data->motion_trig);
1111
1112 return ret;
1113}
1114
1115static int bmg160_remove(struct i2c_client *client)
1116{
1117 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1118 struct bmg160_data *data = iio_priv(indio_dev);
1119
1120 pm_runtime_disable(&client->dev);
1121 pm_runtime_set_suspended(&client->dev);
1122 pm_runtime_put_noidle(&client->dev);
1123
1124 iio_device_unregister(indio_dev);
1125
1126 if (data->dready_trig) {
1127 iio_triggered_buffer_cleanup(indio_dev);
1128 iio_trigger_unregister(data->dready_trig);
1129 iio_trigger_unregister(data->motion_trig);
1130 }
1131
1132 mutex_lock(&data->mutex);
1133 bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1134 mutex_unlock(&data->mutex);
1135
1136 return 0;
1137}
1138
1139#ifdef CONFIG_PM_SLEEP
1140static int bmg160_suspend(struct device *dev)
1141{
1142 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1143 struct bmg160_data *data = iio_priv(indio_dev);
1144
1145 mutex_lock(&data->mutex);
1146 bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1147 mutex_unlock(&data->mutex);
1148
1149 return 0;
1150}
1151
1152static int bmg160_resume(struct device *dev)
1153{
1154 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1155 struct bmg160_data *data = iio_priv(indio_dev);
1156
1157 mutex_lock(&data->mutex);
1158 if (data->dready_trigger_on || data->motion_trigger_on ||
1159 data->ev_enable_state)
1160 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1161 mutex_unlock(&data->mutex);
1162
1163 return 0;
1164}
1165#endif
1166
1167#ifdef CONFIG_PM_RUNTIME
1168static int bmg160_runtime_suspend(struct device *dev)
1169{
1170 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1171 struct bmg160_data *data = iio_priv(indio_dev);
1172
1173 return bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1174}
1175
1176static int bmg160_runtime_resume(struct device *dev)
1177{
1178 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1179 struct bmg160_data *data = iio_priv(indio_dev);
1180 int ret;
1181
1182 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1183 if (ret < 0)
1184 return ret;
1185
1186 msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1187
1188 return 0;
1189}
1190#endif
1191
1192static const struct dev_pm_ops bmg160_pm_ops = {
1193 SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1194 SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1195 bmg160_runtime_resume, NULL)
1196};
1197
1198static const struct acpi_device_id bmg160_acpi_match[] = {
1199 {"BMG0160", 0},
1200 {"BMI055B", 0},
1201 {},
1202};
1203
1204MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
1205
1206static const struct i2c_device_id bmg160_id[] = {
1207 {"bmg160", 0},
1208 {"bmi055_gyro", 0},
1209 {}
1210};
1211
1212MODULE_DEVICE_TABLE(i2c, bmg160_id);
1213
1214static struct i2c_driver bmg160_driver = {
1215 .driver = {
1216 .name = BMG160_DRV_NAME,
1217 .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
1218 .pm = &bmg160_pm_ops,
1219 },
1220 .probe = bmg160_probe,
1221 .remove = bmg160_remove,
1222 .id_table = bmg160_id,
1223};
1224module_i2c_driver(bmg160_driver);
1225
1226MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1227MODULE_LICENSE("GPL v2");
1228MODULE_DESCRIPTION("BMG160 Gyro driver");
diff --git a/drivers/iio/gyro/hid-sensor-gyro-3d.c b/drivers/iio/gyro/hid-sensor-gyro-3d.c
index fa034a3dad78..a3ea1e8785d7 100644
--- a/drivers/iio/gyro/hid-sensor-gyro-3d.c
+++ b/drivers/iio/gyro/hid-sensor-gyro-3d.c
@@ -416,7 +416,6 @@ static struct platform_driver hid_gyro_3d_platform_driver = {
416 .id_table = hid_gyro_3d_ids, 416 .id_table = hid_gyro_3d_ids,
417 .driver = { 417 .driver = {
418 .name = KBUILD_MODNAME, 418 .name = KBUILD_MODNAME,
419 .owner = THIS_MODULE,
420 }, 419 },
421 .probe = hid_gyro_3d_probe, 420 .probe = hid_gyro_3d_probe,
422 .remove = hid_gyro_3d_remove, 421 .remove = hid_gyro_3d_remove,
diff --git a/drivers/iio/humidity/dht11.c b/drivers/iio/humidity/dht11.c
index d8771f546bf2..623c145d8a97 100644
--- a/drivers/iio/humidity/dht11.c
+++ b/drivers/iio/humidity/dht11.c
@@ -281,7 +281,6 @@ static int dht11_probe(struct platform_device *pdev)
281static struct platform_driver dht11_driver = { 281static struct platform_driver dht11_driver = {
282 .driver = { 282 .driver = {
283 .name = DRIVER_NAME, 283 .name = DRIVER_NAME,
284 .owner = THIS_MODULE,
285 .of_match_table = dht11_dt_ids, 284 .of_match_table = dht11_dt_ids,
286 }, 285 },
287 .probe = dht11_probe, 286 .probe = dht11_probe,
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
index 0c6517c94a9d..b75519deac1a 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
@@ -673,8 +673,7 @@ static int inv_mpu_probe(struct i2c_client *client,
673 673
674 st = iio_priv(indio_dev); 674 st = iio_priv(indio_dev);
675 st->client = client; 675 st->client = client;
676 pdata = (struct inv_mpu6050_platform_data 676 pdata = dev_get_platdata(&client->dev);
677 *)dev_get_platdata(&client->dev);
678 if (pdata) 677 if (pdata)
679 st->plat_data = *pdata; 678 st->plat_data = *pdata;
680 /* power is turned on inside check chip type*/ 679 /* power is turned on inside check chip type*/
diff --git a/drivers/iio/industrialio-buffer.c b/drivers/iio/industrialio-buffer.c
index 0472ee268271..f971f79103ec 100644
--- a/drivers/iio/industrialio-buffer.c
+++ b/drivers/iio/industrialio-buffer.c
@@ -942,13 +942,34 @@ int iio_push_to_buffers(struct iio_dev *indio_dev, const void *data)
942} 942}
943EXPORT_SYMBOL_GPL(iio_push_to_buffers); 943EXPORT_SYMBOL_GPL(iio_push_to_buffers);
944 944
945static int iio_buffer_add_demux(struct iio_buffer *buffer,
946 struct iio_demux_table **p, unsigned int in_loc, unsigned int out_loc,
947 unsigned int length)
948{
949
950 if (*p && (*p)->from + (*p)->length == in_loc &&
951 (*p)->to + (*p)->length == out_loc) {
952 (*p)->length += length;
953 } else {
954 *p = kmalloc(sizeof(**p), GFP_KERNEL);
955 if (*p == NULL)
956 return -ENOMEM;
957 (*p)->from = in_loc;
958 (*p)->to = out_loc;
959 (*p)->length = length;
960 list_add_tail(&(*p)->l, &buffer->demux_list);
961 }
962
963 return 0;
964}
965
945static int iio_buffer_update_demux(struct iio_dev *indio_dev, 966static int iio_buffer_update_demux(struct iio_dev *indio_dev,
946 struct iio_buffer *buffer) 967 struct iio_buffer *buffer)
947{ 968{
948 const struct iio_chan_spec *ch; 969 const struct iio_chan_spec *ch;
949 int ret, in_ind = -1, out_ind, length; 970 int ret, in_ind = -1, out_ind, length;
950 unsigned in_loc = 0, out_loc = 0; 971 unsigned in_loc = 0, out_loc = 0;
951 struct iio_demux_table *p; 972 struct iio_demux_table *p = NULL;
952 973
953 /* Clear out any old demux */ 974 /* Clear out any old demux */
954 iio_buffer_demux_free(buffer); 975 iio_buffer_demux_free(buffer);
@@ -979,14 +1000,7 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
979 else 1000 else
980 length = ch->scan_type.storagebits / 8; 1001 length = ch->scan_type.storagebits / 8;
981 /* Make sure we are aligned */ 1002 /* Make sure we are aligned */
982 in_loc += length; 1003 in_loc = roundup(in_loc, length) + length;
983 if (in_loc % length)
984 in_loc += length - in_loc % length;
985 }
986 p = kmalloc(sizeof(*p), GFP_KERNEL);
987 if (p == NULL) {
988 ret = -ENOMEM;
989 goto error_clear_mux_table;
990 } 1004 }
991 ch = iio_find_channel_from_si(indio_dev, in_ind); 1005 ch = iio_find_channel_from_si(indio_dev, in_ind);
992 if (ch->scan_type.repeat > 1) 1006 if (ch->scan_type.repeat > 1)
@@ -994,24 +1008,16 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
994 ch->scan_type.repeat; 1008 ch->scan_type.repeat;
995 else 1009 else
996 length = ch->scan_type.storagebits / 8; 1010 length = ch->scan_type.storagebits / 8;
997 if (out_loc % length) 1011 out_loc = roundup(out_loc, length);
998 out_loc += length - out_loc % length; 1012 in_loc = roundup(in_loc, length);
999 if (in_loc % length) 1013 ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
1000 in_loc += length - in_loc % length; 1014 if (ret)
1001 p->from = in_loc; 1015 goto error_clear_mux_table;
1002 p->to = out_loc;
1003 p->length = length;
1004 list_add_tail(&p->l, &buffer->demux_list);
1005 out_loc += length; 1016 out_loc += length;
1006 in_loc += length; 1017 in_loc += length;
1007 } 1018 }
1008 /* Relies on scan_timestamp being last */ 1019 /* Relies on scan_timestamp being last */
1009 if (buffer->scan_timestamp) { 1020 if (buffer->scan_timestamp) {
1010 p = kmalloc(sizeof(*p), GFP_KERNEL);
1011 if (p == NULL) {
1012 ret = -ENOMEM;
1013 goto error_clear_mux_table;
1014 }
1015 ch = iio_find_channel_from_si(indio_dev, 1021 ch = iio_find_channel_from_si(indio_dev,
1016 indio_dev->scan_index_timestamp); 1022 indio_dev->scan_index_timestamp);
1017 if (ch->scan_type.repeat > 1) 1023 if (ch->scan_type.repeat > 1)
@@ -1019,14 +1025,11 @@ static int iio_buffer_update_demux(struct iio_dev *indio_dev,
1019 ch->scan_type.repeat; 1025 ch->scan_type.repeat;
1020 else 1026 else
1021 length = ch->scan_type.storagebits / 8; 1027 length = ch->scan_type.storagebits / 8;
1022 if (out_loc % length) 1028 out_loc = roundup(out_loc, length);
1023 out_loc += length - out_loc % length; 1029 in_loc = roundup(in_loc, length);
1024 if (in_loc % length) 1030 ret = iio_buffer_add_demux(buffer, &p, in_loc, out_loc, length);
1025 in_loc += length - in_loc % length; 1031 if (ret)
1026 p->from = in_loc; 1032 goto error_clear_mux_table;
1027 p->to = out_loc;
1028 p->length = length;
1029 list_add_tail(&p->l, &buffer->demux_list);
1030 out_loc += length; 1033 out_loc += length;
1031 in_loc += length; 1034 in_loc += length;
1032 } 1035 }
diff --git a/drivers/iio/light/Kconfig b/drivers/iio/light/Kconfig
index bf05ca5b0a57..5bea821adcae 100644
--- a/drivers/iio/light/Kconfig
+++ b/drivers/iio/light/Kconfig
@@ -17,6 +17,16 @@ config ADJD_S311
17 This driver can also be built as a module. If so, the module 17 This driver can also be built as a module. If so, the module
18 will be called adjd_s311. 18 will be called adjd_s311.
19 19
20config AL3320A
21 tristate "AL3320A ambient light sensor"
22 depends on I2C
23 help
24 Say Y here if you want to build a driver for the Dyna Image AL3320A
25 ambient light sensor.
26
27 To compile this driver as a module, choose M here: the
28 module will be called al3320a.
29
20config APDS9300 30config APDS9300
21 tristate "APDS9300 ambient light sensor" 31 tristate "APDS9300 ambient light sensor"
22 depends on I2C 32 depends on I2C
diff --git a/drivers/iio/light/Makefile b/drivers/iio/light/Makefile
index 8b8c09f9c1f8..47877a36cc12 100644
--- a/drivers/iio/light/Makefile
+++ b/drivers/iio/light/Makefile
@@ -4,6 +4,7 @@
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6obj-$(CONFIG_ADJD_S311) += adjd_s311.o 6obj-$(CONFIG_ADJD_S311) += adjd_s311.o
7obj-$(CONFIG_AL3320A) += al3320a.o
7obj-$(CONFIG_APDS9300) += apds9300.o 8obj-$(CONFIG_APDS9300) += apds9300.o
8obj-$(CONFIG_CM32181) += cm32181.o 9obj-$(CONFIG_CM32181) += cm32181.o
9obj-$(CONFIG_CM36651) += cm36651.o 10obj-$(CONFIG_CM36651) += cm36651.o
diff --git a/drivers/iio/light/al3320a.c b/drivers/iio/light/al3320a.c
new file mode 100644
index 000000000000..6aac6513fd41
--- /dev/null
+++ b/drivers/iio/light/al3320a.c
@@ -0,0 +1,232 @@
1/*
2 * AL3320A - Dyna Image Ambient Light Sensor
3 *
4 * Copyright (c) 2014, Intel Corporation.
5 *
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
9 *
10 * IIO driver for AL3320A (7-bit I2C slave address 0x1C).
11 *
12 * TODO: interrupt support, thresholds
13 *
14 */
15
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/i2c.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22
23#define AL3320A_DRV_NAME "al3320a"
24
25#define AL3320A_REG_CONFIG 0x00
26#define AL3320A_REG_STATUS 0x01
27#define AL3320A_REG_INT 0x02
28#define AL3320A_REG_WAIT 0x06
29#define AL3320A_REG_CONFIG_RANGE 0x07
30#define AL3320A_REG_PERSIST 0x08
31#define AL3320A_REG_MEAN_TIME 0x09
32#define AL3320A_REG_ADUMMY 0x0A
33#define AL3320A_REG_DATA_LOW 0x22
34
35#define AL3320A_REG_LOW_THRESH_LOW 0x30
36#define AL3320A_REG_LOW_THRESH_HIGH 0x31
37#define AL3320A_REG_HIGH_THRESH_LOW 0x32
38#define AL3320A_REG_HIGH_THRESH_HIGH 0x33
39
40#define AL3320A_CONFIG_DISABLE 0x00
41#define AL3320A_CONFIG_ENABLE 0x01
42
43#define AL3320A_GAIN_SHIFT 1
44#define AL3320A_GAIN_MASK (BIT(2) | BIT(1))
45
46/* chip params default values */
47#define AL3320A_DEFAULT_MEAN_TIME 4
48#define AL3320A_DEFAULT_WAIT_TIME 0 /* no waiting */
49
50#define AL3320A_SCALE_AVAILABLE "0.512 0.128 0.032 0.01"
51
52enum al3320a_range {
53 AL3320A_RANGE_1, /* 33.28 Klx */
54 AL3320A_RANGE_2, /* 8.32 Klx */
55 AL3320A_RANGE_3, /* 2.08 Klx */
56 AL3320A_RANGE_4 /* 0.65 Klx */
57};
58
59static const int al3320a_scales[][2] = {
60 {0, 512000}, {0, 128000}, {0, 32000}, {0, 10000}
61};
62
63struct al3320a_data {
64 struct i2c_client *client;
65};
66
67static const struct iio_chan_spec al3320a_channels[] = {
68 {
69 .type = IIO_LIGHT,
70 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
71 BIT(IIO_CHAN_INFO_SCALE),
72 }
73};
74
75static IIO_CONST_ATTR(in_illuminance_scale_available, AL3320A_SCALE_AVAILABLE);
76
77static struct attribute *al3320a_attributes[] = {
78 &iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
79 NULL,
80};
81
82static const struct attribute_group al3320a_attribute_group = {
83 .attrs = al3320a_attributes,
84};
85
86static int al3320a_init(struct al3320a_data *data)
87{
88 int ret;
89
90 /* power on */
91 ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_CONFIG,
92 AL3320A_CONFIG_ENABLE);
93 if (ret < 0)
94 return ret;
95
96 ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_CONFIG_RANGE,
97 AL3320A_RANGE_3 << AL3320A_GAIN_SHIFT);
98 if (ret < 0)
99 return ret;
100
101 ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_MEAN_TIME,
102 AL3320A_DEFAULT_MEAN_TIME);
103 if (ret < 0)
104 return ret;
105
106 ret = i2c_smbus_write_byte_data(data->client, AL3320A_REG_WAIT,
107 AL3320A_DEFAULT_WAIT_TIME);
108 if (ret < 0)
109 return ret;
110
111 return 0;
112}
113
114static int al3320a_read_raw(struct iio_dev *indio_dev,
115 struct iio_chan_spec const *chan, int *val,
116 int *val2, long mask)
117{
118 struct al3320a_data *data = iio_priv(indio_dev);
119 int ret;
120
121 switch (mask) {
122 case IIO_CHAN_INFO_RAW:
123 /*
124 * ALS ADC value is stored in two adjacent registers:
125 * - low byte of output is stored at AL3320A_REG_DATA_LOW
126 * - high byte of output is stored at AL3320A_REG_DATA_LOW + 1
127 */
128 ret = i2c_smbus_read_word_data(data->client,
129 AL3320A_REG_DATA_LOW);
130 if (ret < 0)
131 return ret;
132 *val = ret;
133 return IIO_VAL_INT;
134 case IIO_CHAN_INFO_SCALE:
135 ret = i2c_smbus_read_byte_data(data->client,
136 AL3320A_REG_CONFIG_RANGE);
137 if (ret < 0)
138 return ret;
139
140 ret = (ret & AL3320A_GAIN_MASK) >> AL3320A_GAIN_SHIFT;
141 *val = al3320a_scales[ret][0];
142 *val2 = al3320a_scales[ret][1];
143
144 return IIO_VAL_INT_PLUS_MICRO;
145 }
146 return -EINVAL;
147}
148
149static int al3320a_write_raw(struct iio_dev *indio_dev,
150 struct iio_chan_spec const *chan, int val,
151 int val2, long mask)
152{
153 struct al3320a_data *data = iio_priv(indio_dev);
154 int i;
155
156 switch (mask) {
157 case IIO_CHAN_INFO_SCALE:
158 for (i = 0; i < ARRAY_SIZE(al3320a_scales); i++) {
159 if (val == al3320a_scales[i][0] &&
160 val2 == al3320a_scales[i][1])
161 return i2c_smbus_write_byte_data(data->client,
162 AL3320A_REG_CONFIG_RANGE,
163 i << AL3320A_GAIN_SHIFT);
164 }
165 break;
166 }
167 return -EINVAL;
168}
169
170static const struct iio_info al3320a_info = {
171 .driver_module = THIS_MODULE,
172 .read_raw = al3320a_read_raw,
173 .write_raw = al3320a_write_raw,
174 .attrs = &al3320a_attribute_group,
175};
176
177static int al3320a_probe(struct i2c_client *client,
178 const struct i2c_device_id *id)
179{
180 struct al3320a_data *data;
181 struct iio_dev *indio_dev;
182 int ret;
183
184 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
185 if (!indio_dev)
186 return -ENOMEM;
187
188 data = iio_priv(indio_dev);
189 i2c_set_clientdata(client, indio_dev);
190 data->client = client;
191
192 indio_dev->dev.parent = &client->dev;
193 indio_dev->info = &al3320a_info;
194 indio_dev->name = AL3320A_DRV_NAME;
195 indio_dev->channels = al3320a_channels;
196 indio_dev->num_channels = ARRAY_SIZE(al3320a_channels);
197 indio_dev->modes = INDIO_DIRECT_MODE;
198
199 ret = al3320a_init(data);
200 if (ret < 0) {
201 dev_err(&client->dev, "al3320a chip init failed\n");
202 return ret;
203 }
204 return devm_iio_device_register(&client->dev, indio_dev);
205}
206
207static int al3320a_remove(struct i2c_client *client)
208{
209 return i2c_smbus_write_byte_data(client, AL3320A_REG_CONFIG,
210 AL3320A_CONFIG_DISABLE);
211}
212
213static const struct i2c_device_id al3320a_id[] = {
214 {"al3320a", 0},
215 {}
216};
217MODULE_DEVICE_TABLE(i2c, al3320a_id);
218
219static struct i2c_driver al3320a_driver = {
220 .driver = {
221 .name = AL3320A_DRV_NAME,
222 },
223 .probe = al3320a_probe,
224 .remove = al3320a_remove,
225 .id_table = al3320a_id,
226};
227
228module_i2c_driver(al3320a_driver);
229
230MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
231MODULE_DESCRIPTION("AL3320A Ambient Light Sensor driver");
232MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/light/hid-sensor-als.c b/drivers/iio/light/hid-sensor-als.c
index 96e71e103ea7..a5283d75c096 100644
--- a/drivers/iio/light/hid-sensor-als.c
+++ b/drivers/iio/light/hid-sensor-als.c
@@ -381,7 +381,6 @@ static struct platform_driver hid_als_platform_driver = {
381 .id_table = hid_als_ids, 381 .id_table = hid_als_ids,
382 .driver = { 382 .driver = {
383 .name = KBUILD_MODNAME, 383 .name = KBUILD_MODNAME,
384 .owner = THIS_MODULE,
385 }, 384 },
386 .probe = hid_als_probe, 385 .probe = hid_als_probe,
387 .remove = hid_als_remove, 386 .remove = hid_als_remove,
diff --git a/drivers/iio/light/hid-sensor-prox.c b/drivers/iio/light/hid-sensor-prox.c
index 412bae86d6ae..f5a514698fd8 100644
--- a/drivers/iio/light/hid-sensor-prox.c
+++ b/drivers/iio/light/hid-sensor-prox.c
@@ -373,7 +373,6 @@ static struct platform_driver hid_prox_platform_driver = {
373 .id_table = hid_prox_ids, 373 .id_table = hid_prox_ids,
374 .driver = { 374 .driver = {
375 .name = KBUILD_MODNAME, 375 .name = KBUILD_MODNAME,
376 .owner = THIS_MODULE,
377 }, 376 },
378 .probe = hid_prox_probe, 377 .probe = hid_prox_probe,
379 .remove = hid_prox_remove, 378 .remove = hid_prox_remove,
diff --git a/drivers/iio/light/lm3533-als.c b/drivers/iio/light/lm3533-als.c
index c1aadc6b865a..ae3c71bdd6c6 100644
--- a/drivers/iio/light/lm3533-als.c
+++ b/drivers/iio/light/lm3533-als.c
@@ -915,7 +915,6 @@ static int lm3533_als_remove(struct platform_device *pdev)
915static struct platform_driver lm3533_als_driver = { 915static struct platform_driver lm3533_als_driver = {
916 .driver = { 916 .driver = {
917 .name = "lm3533-als", 917 .name = "lm3533-als",
918 .owner = THIS_MODULE,
919 }, 918 },
920 .probe = lm3533_als_probe, 919 .probe = lm3533_als_probe,
921 .remove = lm3533_als_remove, 920 .remove = lm3533_als_remove,
diff --git a/drivers/iio/light/tsl4531.c b/drivers/iio/light/tsl4531.c
index a15006efa137..0763b8632573 100644
--- a/drivers/iio/light/tsl4531.c
+++ b/drivers/iio/light/tsl4531.c
@@ -230,9 +230,12 @@ static int tsl4531_resume(struct device *dev)
230 return i2c_smbus_write_byte_data(to_i2c_client(dev), TSL4531_CONTROL, 230 return i2c_smbus_write_byte_data(to_i2c_client(dev), TSL4531_CONTROL,
231 TSL4531_MODE_NORMAL); 231 TSL4531_MODE_NORMAL);
232} 232}
233#endif
234 233
235static SIMPLE_DEV_PM_OPS(tsl4531_pm_ops, tsl4531_suspend, tsl4531_resume); 234static SIMPLE_DEV_PM_OPS(tsl4531_pm_ops, tsl4531_suspend, tsl4531_resume);
235#define TSL4531_PM_OPS (&tsl4531_pm_ops)
236#else
237#define TSL4531_PM_OPS NULL
238#endif
236 239
237static const struct i2c_device_id tsl4531_id[] = { 240static const struct i2c_device_id tsl4531_id[] = {
238 { "tsl4531", 0 }, 241 { "tsl4531", 0 },
@@ -243,7 +246,7 @@ MODULE_DEVICE_TABLE(i2c, tsl4531_id);
243static struct i2c_driver tsl4531_driver = { 246static struct i2c_driver tsl4531_driver = {
244 .driver = { 247 .driver = {
245 .name = TSL4531_DRV_NAME, 248 .name = TSL4531_DRV_NAME,
246 .pm = &tsl4531_pm_ops, 249 .pm = TSL4531_PM_OPS,
247 .owner = THIS_MODULE, 250 .owner = THIS_MODULE,
248 }, 251 },
249 .probe = tsl4531_probe, 252 .probe = tsl4531_probe,
diff --git a/drivers/iio/magnetometer/ak8975.c b/drivers/iio/magnetometer/ak8975.c
index a2357921d761..bf5ef077e791 100644
--- a/drivers/iio/magnetometer/ak8975.c
+++ b/drivers/iio/magnetometer/ak8975.c
@@ -477,8 +477,8 @@ static const struct acpi_device_id ak_acpi_match[] = {
477}; 477};
478MODULE_DEVICE_TABLE(acpi, ak_acpi_match); 478MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
479 479
480static char *ak8975_match_acpi_device(struct device *dev, 480static const char *ak8975_match_acpi_device(struct device *dev,
481 enum asahi_compass_chipset *chipset) 481 enum asahi_compass_chipset *chipset)
482{ 482{
483 const struct acpi_device_id *id; 483 const struct acpi_device_id *id;
484 484
@@ -487,7 +487,7 @@ static char *ak8975_match_acpi_device(struct device *dev,
487 return NULL; 487 return NULL;
488 *chipset = (int)id->driver_data; 488 *chipset = (int)id->driver_data;
489 489
490 return (char *)dev_name(dev); 490 return dev_name(dev);
491} 491}
492 492
493static int ak8975_probe(struct i2c_client *client, 493static int ak8975_probe(struct i2c_client *client,
@@ -497,7 +497,7 @@ static int ak8975_probe(struct i2c_client *client,
497 struct iio_dev *indio_dev; 497 struct iio_dev *indio_dev;
498 int eoc_gpio; 498 int eoc_gpio;
499 int err; 499 int err;
500 char *name = NULL; 500 const char *name = NULL;
501 501
502 /* Grab and set up the supplied GPIO. */ 502 /* Grab and set up the supplied GPIO. */
503 if (client->dev.platform_data) 503 if (client->dev.platform_data)
@@ -539,7 +539,7 @@ static int ak8975_probe(struct i2c_client *client,
539 if (id) { 539 if (id) {
540 data->chipset = 540 data->chipset =
541 (enum asahi_compass_chipset)(id->driver_data); 541 (enum asahi_compass_chipset)(id->driver_data);
542 name = (char *) id->name; 542 name = id->name;
543 } else if (ACPI_HANDLE(&client->dev)) 543 } else if (ACPI_HANDLE(&client->dev))
544 name = ak8975_match_acpi_device(&client->dev, &data->chipset); 544 name = ak8975_match_acpi_device(&client->dev, &data->chipset);
545 else 545 else
diff --git a/drivers/iio/magnetometer/hid-sensor-magn-3d.c b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
index 3ec777a8f64e..6294575d2777 100644
--- a/drivers/iio/magnetometer/hid-sensor-magn-3d.c
+++ b/drivers/iio/magnetometer/hid-sensor-magn-3d.c
@@ -246,8 +246,7 @@ static const struct iio_info magn_3d_info = {
246}; 246};
247 247
248/* Function to push data to buffer */ 248/* Function to push data to buffer */
249static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data, 249static void hid_sensor_push_data(struct iio_dev *indio_dev, const void *data)
250 int len)
251{ 250{
252 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n"); 251 dev_dbg(&indio_dev->dev, "hid_sensor_push_data\n");
253 iio_push_to_buffers(indio_dev, data); 252 iio_push_to_buffers(indio_dev, data);
@@ -263,9 +262,7 @@ static int magn_3d_proc_event(struct hid_sensor_hub_device *hsdev,
263 262
264 dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n"); 263 dev_dbg(&indio_dev->dev, "magn_3d_proc_event\n");
265 if (atomic_read(&magn_state->common_attributes.data_ready)) 264 if (atomic_read(&magn_state->common_attributes.data_ready))
266 hid_sensor_push_data(indio_dev, 265 hid_sensor_push_data(indio_dev, magn_state->iio_vals);
267 magn_state->iio_vals,
268 sizeof(magn_state->iio_vals));
269 266
270 return 0; 267 return 0;
271} 268}
@@ -533,7 +530,6 @@ static struct platform_driver hid_magn_3d_platform_driver = {
533 .id_table = hid_magn_3d_ids, 530 .id_table = hid_magn_3d_ids,
534 .driver = { 531 .driver = {
535 .name = KBUILD_MODNAME, 532 .name = KBUILD_MODNAME,
536 .owner = THIS_MODULE,
537 }, 533 },
538 .probe = hid_magn_3d_probe, 534 .probe = hid_magn_3d_probe,
539 .remove = hid_magn_3d_remove, 535 .remove = hid_magn_3d_remove,
diff --git a/drivers/iio/orientation/hid-sensor-incl-3d.c b/drivers/iio/orientation/hid-sensor-incl-3d.c
index 2478f6c2ef25..1ff181bbbcef 100644
--- a/drivers/iio/orientation/hid-sensor-incl-3d.c
+++ b/drivers/iio/orientation/hid-sensor-incl-3d.c
@@ -437,7 +437,6 @@ static struct platform_driver hid_incl_3d_platform_driver = {
437 .id_table = hid_incl_3d_ids, 437 .id_table = hid_incl_3d_ids,
438 .driver = { 438 .driver = {
439 .name = KBUILD_MODNAME, 439 .name = KBUILD_MODNAME,
440 .owner = THIS_MODULE,
441 }, 440 },
442 .probe = hid_incl_3d_probe, 441 .probe = hid_incl_3d_probe,
443 .remove = hid_incl_3d_remove, 442 .remove = hid_incl_3d_remove,
diff --git a/drivers/iio/orientation/hid-sensor-rotation.c b/drivers/iio/orientation/hid-sensor-rotation.c
index dccf848e8b0f..4afb6c79ccbc 100644
--- a/drivers/iio/orientation/hid-sensor-rotation.c
+++ b/drivers/iio/orientation/hid-sensor-rotation.c
@@ -334,7 +334,6 @@ static struct platform_driver hid_dev_rot_platform_driver = {
334 .id_table = hid_dev_rot_ids, 334 .id_table = hid_dev_rot_ids,
335 .driver = { 335 .driver = {
336 .name = KBUILD_MODNAME, 336 .name = KBUILD_MODNAME,
337 .owner = THIS_MODULE,
338 }, 337 },
339 .probe = hid_dev_rot_probe, 338 .probe = hid_dev_rot_probe,
340 .remove = hid_dev_rot_remove, 339 .remove = hid_dev_rot_remove,
diff --git a/drivers/iio/pressure/hid-sensor-press.c b/drivers/iio/pressure/hid-sensor-press.c
index 2c0d2a4fed8c..764928682df2 100644
--- a/drivers/iio/pressure/hid-sensor-press.c
+++ b/drivers/iio/pressure/hid-sensor-press.c
@@ -382,7 +382,6 @@ static struct platform_driver hid_press_platform_driver = {
382 .id_table = hid_press_ids, 382 .id_table = hid_press_ids,
383 .driver = { 383 .driver = {
384 .name = KBUILD_MODNAME, 384 .name = KBUILD_MODNAME,
385 .owner = THIS_MODULE,
386 }, 385 },
387 .probe = hid_press_probe, 386 .probe = hid_press_probe,
388 .remove = hid_press_remove, 387 .remove = hid_press_remove,
diff --git a/drivers/iio/proximity/as3935.c b/drivers/iio/proximity/as3935.c
index 5e780ef206f3..8349cc0fdf66 100644
--- a/drivers/iio/proximity/as3935.c
+++ b/drivers/iio/proximity/as3935.c
@@ -330,7 +330,7 @@ static int as3935_probe(struct spi_device *spi)
330 return -EINVAL; 330 return -EINVAL;
331 } 331 }
332 332
333 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(st)); 333 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
334 if (!indio_dev) 334 if (!indio_dev)
335 return -ENOMEM; 335 return -ENOMEM;
336 336
diff --git a/drivers/iio/trigger/iio-trig-interrupt.c b/drivers/iio/trigger/iio-trig-interrupt.c
index 7a149a7822bc..572bc6f02ca8 100644
--- a/drivers/iio/trigger/iio-trig-interrupt.c
+++ b/drivers/iio/trigger/iio-trig-interrupt.c
@@ -109,7 +109,6 @@ static struct platform_driver iio_interrupt_trigger_driver = {
109 .remove = iio_interrupt_trigger_remove, 109 .remove = iio_interrupt_trigger_remove,
110 .driver = { 110 .driver = {
111 .name = "iio_interrupt_trigger", 111 .name = "iio_interrupt_trigger",
112 .owner = THIS_MODULE,
113 }, 112 },
114}; 113};
115 114
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 19:52:12 -0500