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-rw-r--r--drivers/iio/adc/at91_adc.c340
1 files changed, 292 insertions, 48 deletions
diff --git a/drivers/iio/adc/at91_adc.c b/drivers/iio/adc/at91_adc.c
index 89777ed9abd8..3b5bacd4d8da 100644
--- a/drivers/iio/adc/at91_adc.c
+++ b/drivers/iio/adc/at91_adc.c
@@ -31,7 +31,108 @@
31#include <linux/iio/trigger_consumer.h> 31#include <linux/iio/trigger_consumer.h>
32#include <linux/iio/triggered_buffer.h> 32#include <linux/iio/triggered_buffer.h>
33 33
34#include <mach/at91_adc.h> 34/* Registers */
35#define AT91_ADC_CR 0x00 /* Control Register */
36#define AT91_ADC_SWRST (1 << 0) /* Software Reset */
37#define AT91_ADC_START (1 << 1) /* Start Conversion */
38
39#define AT91_ADC_MR 0x04 /* Mode Register */
40#define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
41#define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
42#define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */
43#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
44#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
45#define AT91_ADC_TRGSEL_TC0 (0 << 1)
46#define AT91_ADC_TRGSEL_TC1 (1 << 1)
47#define AT91_ADC_TRGSEL_TC2 (2 << 1)
48#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
49#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
50#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
51#define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */
52#define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */
53#define AT91_ADC_PRESCAL_9G45 (0xff << 8)
54#define AT91_ADC_PRESCAL_(x) ((x) << 8)
55#define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */
56#define AT91_ADC_STARTUP_9G45 (0x7f << 16)
57#define AT91_ADC_STARTUP_9X5 (0xf << 16)
58#define AT91_ADC_STARTUP_(x) ((x) << 16)
59#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
60#define AT91_ADC_SHTIM_(x) ((x) << 24)
61#define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */
62#define AT91_ADC_PENDBC_(x) ((x) << 28)
63
64#define AT91_ADC_TSR 0x0C
65#define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */
66#define AT91_ADC_TSR_SHTIM_(x) ((x) << 24)
67
68#define AT91_ADC_CHER 0x10 /* Channel Enable Register */
69#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
70#define AT91_ADC_CHSR 0x18 /* Channel Status Register */
71#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */
72
73#define AT91_ADC_SR 0x1C /* Status Register */
74#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */
75#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */
76#define AT91_ADC_DRDY (1 << 16) /* Data Ready */
77#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */
78#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */
79#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */
80
81#define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */
82#define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */
83
84#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */
85#define AT91_ADC_LDATA (0x3ff)
86
87#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
88#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
89#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
90#define AT91RL_ADC_IER_PEN (1 << 20)
91#define AT91RL_ADC_IER_NOPEN (1 << 21)
92#define AT91_ADC_IER_PEN (1 << 29)
93#define AT91_ADC_IER_NOPEN (1 << 30)
94#define AT91_ADC_IER_XRDY (1 << 20)
95#define AT91_ADC_IER_YRDY (1 << 21)
96#define AT91_ADC_IER_PRDY (1 << 22)
97#define AT91_ADC_ISR_PENS (1 << 31)
98
99#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */
100#define AT91_ADC_DATA (0x3ff)
101
102#define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */
103
104#define AT91_ADC_ACR 0x94 /* Analog Control Register */
105#define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
106
107#define AT91_ADC_TSMR 0xB0
108#define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */
109#define AT91_ADC_TSMR_TSMODE_NONE (0 << 0)
110#define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0)
111#define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0)
112#define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0)
113#define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */
114#define AT91_ADC_TSMR_TSAV_(x) ((x) << 4)
115#define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */
116#define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */
117#define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28)
118#define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */
119#define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */
120#define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */
121
122#define AT91_ADC_TSXPOSR 0xB4
123#define AT91_ADC_TSYPOSR 0xB8
124#define AT91_ADC_TSPRESSR 0xBC
125
126#define AT91_ADC_TRGR_9260 AT91_ADC_MR
127#define AT91_ADC_TRGR_9G45 0x08
128#define AT91_ADC_TRGR_9X5 0xC0
129
130/* Trigger Register bit field */
131#define AT91_ADC_TRGR_TRGPER (0xffff << 16)
132#define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)
133#define AT91_ADC_TRGR_TRGMOD (0x7 << 0)
134#define AT91_ADC_TRGR_NONE (0 << 0)
135#define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)
35 136
36#define AT91_ADC_CHAN(st, ch) \ 137#define AT91_ADC_CHAN(st, ch) \
37 (st->registers->channel_base + (ch * 4)) 138 (st->registers->channel_base + (ch * 4))
@@ -46,6 +147,29 @@
46#define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */ 147#define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
47#define TOUCH_PEN_DETECT_DEBOUNCE_US 200 148#define TOUCH_PEN_DETECT_DEBOUNCE_US 200
48 149
150#define MAX_RLPOS_BITS 10
151#define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */
152#define TOUCH_SHTIM 0xa
153
154/**
155 * struct at91_adc_reg_desc - Various informations relative to registers
156 * @channel_base: Base offset for the channel data registers
157 * @drdy_mask: Mask of the DRDY field in the relevant registers
158 (Interruptions registers mostly)
159 * @status_register: Offset of the Interrupt Status Register
160 * @trigger_register: Offset of the Trigger setup register
161 * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
162 * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
163 */
164struct at91_adc_reg_desc {
165 u8 channel_base;
166 u32 drdy_mask;
167 u8 status_register;
168 u8 trigger_register;
169 u32 mr_prescal_mask;
170 u32 mr_startup_mask;
171};
172
49struct at91_adc_caps { 173struct at91_adc_caps {
50 bool has_ts; /* Support touch screen */ 174 bool has_ts; /* Support touch screen */
51 bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */ 175 bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */
@@ -64,12 +188,6 @@ struct at91_adc_caps {
64 struct at91_adc_reg_desc registers; 188 struct at91_adc_reg_desc registers;
65}; 189};
66 190
67enum atmel_adc_ts_type {
68 ATMEL_ADC_TOUCHSCREEN_NONE = 0,
69 ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
70 ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
71};
72
73struct at91_adc_state { 191struct at91_adc_state {
74 struct clk *adc_clk; 192 struct clk *adc_clk;
75 u16 *buffer; 193 u16 *buffer;
@@ -114,6 +232,11 @@ struct at91_adc_state {
114 232
115 u16 ts_sample_period_val; 233 u16 ts_sample_period_val;
116 u32 ts_pressure_threshold; 234 u32 ts_pressure_threshold;
235 u16 ts_pendbc;
236
237 bool ts_bufferedmeasure;
238 u32 ts_prev_absx;
239 u32 ts_prev_absy;
117}; 240};
118 241
119static irqreturn_t at91_adc_trigger_handler(int irq, void *p) 242static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
@@ -220,7 +343,72 @@ static int at91_ts_sample(struct at91_adc_state *st)
220 return 0; 343 return 0;
221} 344}
222 345
223static irqreturn_t at91_adc_interrupt(int irq, void *private) 346static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
347{
348 struct iio_dev *idev = private;
349 struct at91_adc_state *st = iio_priv(idev);
350 u32 status = at91_adc_readl(st, st->registers->status_register);
351 unsigned int reg;
352
353 status &= at91_adc_readl(st, AT91_ADC_IMR);
354 if (status & st->registers->drdy_mask)
355 handle_adc_eoc_trigger(irq, idev);
356
357 if (status & AT91RL_ADC_IER_PEN) {
358 /* Disabling pen debounce is required to get a NOPEN irq */
359 reg = at91_adc_readl(st, AT91_ADC_MR);
360 reg &= ~AT91_ADC_PENDBC;
361 at91_adc_writel(st, AT91_ADC_MR, reg);
362
363 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
364 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
365 | AT91_ADC_EOC(3));
366 /* Set up period trigger for sampling */
367 at91_adc_writel(st, st->registers->trigger_register,
368 AT91_ADC_TRGR_MOD_PERIOD_TRIG |
369 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
370 } else if (status & AT91RL_ADC_IER_NOPEN) {
371 reg = at91_adc_readl(st, AT91_ADC_MR);
372 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
373 at91_adc_writel(st, AT91_ADC_MR, reg);
374 at91_adc_writel(st, st->registers->trigger_register,
375 AT91_ADC_TRGR_NONE);
376
377 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
378 | AT91_ADC_EOC(3));
379 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
380 st->ts_bufferedmeasure = false;
381 input_report_key(st->ts_input, BTN_TOUCH, 0);
382 input_sync(st->ts_input);
383 } else if (status & AT91_ADC_EOC(3)) {
384 /* Conversion finished */
385 if (st->ts_bufferedmeasure) {
386 /*
387 * Last measurement is always discarded, since it can
388 * be erroneous.
389 * Always report previous measurement
390 */
391 input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
392 input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
393 input_report_key(st->ts_input, BTN_TOUCH, 1);
394 input_sync(st->ts_input);
395 } else
396 st->ts_bufferedmeasure = true;
397
398 /* Now make new measurement */
399 st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
400 << MAX_RLPOS_BITS;
401 st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
402
403 st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
404 << MAX_RLPOS_BITS;
405 st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
406 }
407
408 return IRQ_HANDLED;
409}
410
411static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
224{ 412{
225 struct iio_dev *idev = private; 413 struct iio_dev *idev = private;
226 struct at91_adc_state *st = iio_priv(idev); 414 struct at91_adc_state *st = iio_priv(idev);
@@ -653,6 +841,8 @@ static int at91_adc_probe_dt_ts(struct device_node *node,
653 return -EINVAL; 841 return -EINVAL;
654 } 842 }
655 843
844 if (!st->caps->has_tsmr)
845 return 0;
656 prop = 0; 846 prop = 0;
657 of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop); 847 of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
658 st->ts_pressure_threshold = prop; 848 st->ts_pressure_threshold = prop;
@@ -776,6 +966,7 @@ static int at91_adc_probe_pdata(struct at91_adc_state *st,
776 st->trigger_number = pdata->trigger_number; 966 st->trigger_number = pdata->trigger_number;
777 st->trigger_list = pdata->trigger_list; 967 st->trigger_list = pdata->trigger_list;
778 st->registers = &st->caps->registers; 968 st->registers = &st->caps->registers;
969 st->touchscreen_type = pdata->touchscreen_type;
779 970
780 return 0; 971 return 0;
781} 972}
@@ -790,7 +981,10 @@ static int atmel_ts_open(struct input_dev *dev)
790{ 981{
791 struct at91_adc_state *st = input_get_drvdata(dev); 982 struct at91_adc_state *st = input_get_drvdata(dev);
792 983
793 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN); 984 if (st->caps->has_tsmr)
985 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
986 else
987 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
794 return 0; 988 return 0;
795} 989}
796 990
@@ -798,45 +992,61 @@ static void atmel_ts_close(struct input_dev *dev)
798{ 992{
799 struct at91_adc_state *st = input_get_drvdata(dev); 993 struct at91_adc_state *st = input_get_drvdata(dev);
800 994
801 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN); 995 if (st->caps->has_tsmr)
996 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
997 else
998 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
802} 999}
803 1000
804static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz) 1001static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
805{ 1002{
806 u32 reg = 0, pendbc; 1003 u32 reg = 0;
807 int i = 0; 1004 int i = 0;
808 1005
809 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
810 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
811 else
812 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
813
814 /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid 1006 /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
815 * pen detect noise. 1007 * pen detect noise.
816 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock 1008 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
817 */ 1009 */
818 pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1); 1010 st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
1011 1000, 1);
819 1012
820 while (pendbc >> ++i) 1013 while (st->ts_pendbc >> ++i)
821 ; /* Empty! Find the shift offset */ 1014 ; /* Empty! Find the shift offset */
822 if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1)))) 1015 if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
823 pendbc = i; 1016 st->ts_pendbc = i;
824 else 1017 else
825 pendbc = i - 1; 1018 st->ts_pendbc = i - 1;
826 1019
827 if (st->caps->has_tsmr) { 1020 if (!st->caps->has_tsmr) {
828 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average) 1021 reg = at91_adc_readl(st, AT91_ADC_MR);
829 & AT91_ADC_TSMR_TSAV; 1022 reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
830 reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC; 1023
831 reg |= AT91_ADC_TSMR_NOTSDMA; 1024 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
832 reg |= AT91_ADC_TSMR_PENDET_ENA; 1025 at91_adc_writel(st, AT91_ADC_MR, reg);
833 reg |= 0x03 << 8; /* TSFREQ, need bigger than TSAV */ 1026
834 1027 reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
835 at91_adc_writel(st, AT91_ADC_TSMR, reg); 1028 at91_adc_writel(st, AT91_ADC_TSR, reg);
836 } else { 1029
837 /* TODO: for 9g45 which has no TSMR */ 1030 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
1031 adc_clk_khz / 1000) - 1, 1);
1032
1033 return 0;
838 } 1034 }
839 1035
1036 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
1037 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
1038 else
1039 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
1040
1041 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
1042 & AT91_ADC_TSMR_TSAV;
1043 reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
1044 reg |= AT91_ADC_TSMR_NOTSDMA;
1045 reg |= AT91_ADC_TSMR_PENDET_ENA;
1046 reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */
1047
1048 at91_adc_writel(st, AT91_ADC_TSMR, reg);
1049
840 /* Change adc internal resistor value for better pen detection, 1050 /* Change adc internal resistor value for better pen detection,
841 * default value is 100 kOhm. 1051 * default value is 100 kOhm.
842 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm 1052 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
@@ -845,7 +1055,7 @@ static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
845 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity 1055 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
846 & AT91_ADC_ACR_PENDETSENS); 1056 & AT91_ADC_ACR_PENDETSENS);
847 1057
848 /* Sample Peroid Time = (TRGPER + 1) / ADCClock */ 1058 /* Sample Period Time = (TRGPER + 1) / ADCClock */
849 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US * 1059 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
850 adc_clk_khz / 1000) - 1, 1); 1060 adc_clk_khz / 1000) - 1, 1);
851 1061
@@ -874,18 +1084,38 @@ static int at91_ts_register(struct at91_adc_state *st,
874 __set_bit(EV_ABS, input->evbit); 1084 __set_bit(EV_ABS, input->evbit);
875 __set_bit(EV_KEY, input->evbit); 1085 __set_bit(EV_KEY, input->evbit);
876 __set_bit(BTN_TOUCH, input->keybit); 1086 __set_bit(BTN_TOUCH, input->keybit);
877 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0); 1087 if (st->caps->has_tsmr) {
878 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0); 1088 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
879 input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0); 1089 0, 0);
1090 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
1091 0, 0);
1092 input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
1093 } else {
1094 if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
1095 dev_err(&pdev->dev,
1096 "This touchscreen controller only support 4 wires\n");
1097 ret = -EINVAL;
1098 goto err;
1099 }
1100
1101 input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
1102 0, 0);
1103 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
1104 0, 0);
1105 }
880 1106
881 st->ts_input = input; 1107 st->ts_input = input;
882 input_set_drvdata(input, st); 1108 input_set_drvdata(input, st);
883 1109
884 ret = input_register_device(input); 1110 ret = input_register_device(input);
885 if (ret) 1111 if (ret)
886 input_free_device(st->ts_input); 1112 goto err;
887 1113
888 return ret; 1114 return ret;
1115
1116err:
1117 input_free_device(st->ts_input);
1118 return ret;
889} 1119}
890 1120
891static void at91_ts_unregister(struct at91_adc_state *st) 1121static void at91_ts_unregister(struct at91_adc_state *st)
@@ -943,11 +1173,13 @@ static int at91_adc_probe(struct platform_device *pdev)
943 */ 1173 */
944 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST); 1174 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
945 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF); 1175 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
946 ret = request_irq(st->irq, 1176
947 at91_adc_interrupt, 1177 if (st->caps->has_tsmr)
948 0, 1178 ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
949 pdev->dev.driver->name, 1179 pdev->dev.driver->name, idev);
950 idev); 1180 else
1181 ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
1182 pdev->dev.driver->name, idev);
951 if (ret) { 1183 if (ret) {
952 dev_err(&pdev->dev, "Failed to allocate IRQ.\n"); 1184 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
953 return ret; 1185 return ret;
@@ -1051,12 +1283,6 @@ static int at91_adc_probe(struct platform_device *pdev)
1051 goto error_disable_adc_clk; 1283 goto error_disable_adc_clk;
1052 } 1284 }
1053 } else { 1285 } else {
1054 if (!st->caps->has_tsmr) {
1055 dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
1056 ret = -ENODEV;
1057 goto error_disable_adc_clk;
1058 }
1059
1060 ret = at91_ts_register(st, pdev); 1286 ret = at91_ts_register(st, pdev);
1061 if (ret) 1287 if (ret)
1062 goto error_disable_adc_clk; 1288 goto error_disable_adc_clk;
@@ -1120,6 +1346,20 @@ static struct at91_adc_caps at91sam9260_caps = {
1120 }, 1346 },
1121}; 1347};
1122 1348
1349static struct at91_adc_caps at91sam9rl_caps = {
1350 .has_ts = true,
1351 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */
1352 .num_channels = 6,
1353 .registers = {
1354 .channel_base = AT91_ADC_CHR(0),
1355 .drdy_mask = AT91_ADC_DRDY,
1356 .status_register = AT91_ADC_SR,
1357 .trigger_register = AT91_ADC_TRGR_9G45,
1358 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1359 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1360 },
1361};
1362
1123static struct at91_adc_caps at91sam9g45_caps = { 1363static struct at91_adc_caps at91sam9g45_caps = {
1124 .has_ts = true, 1364 .has_ts = true,
1125 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */ 1365 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */
@@ -1154,6 +1394,7 @@ static struct at91_adc_caps at91sam9x5_caps = {
1154 1394
1155static const struct of_device_id at91_adc_dt_ids[] = { 1395static const struct of_device_id at91_adc_dt_ids[] = {
1156 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps }, 1396 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1397 { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },
1157 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps }, 1398 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1158 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps }, 1399 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1159 {}, 1400 {},
@@ -1165,6 +1406,9 @@ static const struct platform_device_id at91_adc_ids[] = {
1165 .name = "at91sam9260-adc", 1406 .name = "at91sam9260-adc",
1166 .driver_data = (unsigned long)&at91sam9260_caps, 1407 .driver_data = (unsigned long)&at91sam9260_caps,
1167 }, { 1408 }, {
1409 .name = "at91sam9rl-adc",
1410 .driver_data = (unsigned long)&at91sam9rl_caps,
1411 }, {
1168 .name = "at91sam9g45-adc", 1412 .name = "at91sam9g45-adc",
1169 .driver_data = (unsigned long)&at91sam9g45_caps, 1413 .driver_data = (unsigned long)&at91sam9g45_caps,
1170 }, { 1414 }, {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-16 23:26:32 -0400