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-rw-r--r--drivers/iio/Kconfig1
-rw-r--r--drivers/iio/Makefile1
-rw-r--r--drivers/iio/dac/Kconfig121
-rw-r--r--drivers/iio/dac/Makefile15
-rw-r--r--drivers/iio/dac/ad5064.c538
-rw-r--r--drivers/iio/dac/ad5360.c570
-rw-r--r--drivers/iio/dac/ad5380.c657
-rw-r--r--drivers/iio/dac/ad5421.c544
-rw-r--r--drivers/iio/dac/ad5446.c381
-rw-r--r--drivers/iio/dac/ad5446.h89
-rw-r--r--drivers/iio/dac/ad5504.c393
-rw-r--r--drivers/iio/dac/ad5624r.h79
-rw-r--r--drivers/iio/dac/ad5624r_spi.c324
-rw-r--r--drivers/iio/dac/ad5686.c418
-rw-r--r--drivers/iio/dac/ad5764.c382
-rw-r--r--drivers/iio/dac/ad5791.c485
-rw-r--r--drivers/iio/dac/max517.c243
17 files changed, 5241 insertions, 0 deletions
diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
index 64c88e5cda4d..103349f2b3b5 100644
--- a/drivers/iio/Kconfig
+++ b/drivers/iio/Kconfig
@@ -52,5 +52,6 @@ source "drivers/iio/adc/Kconfig"
52source "drivers/iio/amplifiers/Kconfig" 52source "drivers/iio/amplifiers/Kconfig"
53source "drivers/iio/light/Kconfig" 53source "drivers/iio/light/Kconfig"
54source "drivers/iio/frequency/Kconfig" 54source "drivers/iio/frequency/Kconfig"
55source "drivers/iio/dac/Kconfig"
55 56
56endif # IIO 57endif # IIO
diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
index bd801c0bbc2f..c38fa2a40af2 100644
--- a/drivers/iio/Makefile
+++ b/drivers/iio/Makefile
@@ -13,3 +13,4 @@ obj-y += adc/
13obj-y += amplifiers/ 13obj-y += amplifiers/
14obj-y += light/ 14obj-y += light/
15obj-y += frequency/ 15obj-y += frequency/
16obj-y += dac/
diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig
new file mode 100644
index 000000000000..a626f03871ec
--- /dev/null
+++ b/drivers/iio/dac/Kconfig
@@ -0,0 +1,121 @@
1#
2# DAC drivers
3#
4menu "Digital to analog converters"
5
6config AD5064
7 tristate "Analog Devices AD5064/64-1/65/44/45/24/25, AD5628/48/66/68 DAC driver"
8 depends on SPI
9 help
10 Say yes here to build support for Analog Devices AD5024, AD5025, AD5044,
11 AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648, AD5666, AD5668 Digital
12 to Analog Converter.
13
14 To compile this driver as a module, choose M here: the
15 module will be called ad5064.
16
17config AD5360
18 tristate "Analog Devices Analog Devices AD5360/61/62/63/70/71/73 DAC driver"
19 depends on SPI
20 help
21 Say yes here to build support for Analog Devices AD5360, AD5361,
22 AD5362, AD5363, AD5370, AD5371, AD5373 multi-channel
23 Digital to Analog Converters (DAC).
24
25 To compile this driver as module choose M here: the module will be called
26 ad5360.
27
28config AD5380
29 tristate "Analog Devices AD5380/81/82/83/84/90/91/92 DAC driver"
30 depends on (SPI_MASTER || I2C)
31 select REGMAP_I2C if I2C
32 select REGMAP_SPI if SPI_MASTER
33 help
34 Say yes here to build support for Analog Devices AD5380, AD5381,
35 AD5382, AD5383, AD5384, AD5390, AD5391, AD5392 multi-channel
36 Digital to Analog Converters (DAC).
37
38 To compile this driver as module choose M here: the module will be called
39 ad5380.
40
41config AD5421
42 tristate "Analog Devices AD5421 DAC driver"
43 depends on SPI
44 help
45 Say yes here to build support for Analog Devices AD5421 loop-powered
46 digital-to-analog convertors (DAC).
47
48 To compile this driver as module choose M here: the module will be called
49 ad5421.
50
51config AD5624R_SPI
52 tristate "Analog Devices AD5624/44/64R DAC spi driver"
53 depends on SPI
54 help
55 Say yes here to build support for Analog Devices AD5624R, AD5644R and
56 AD5664R converters (DAC). This driver uses the common SPI interface.
57
58config AD5446
59 tristate "Analog Devices AD5446 and similar single channel DACs driver"
60 depends on SPI
61 help
62 Say yes here to build support for Analog Devices AD5444, AD5446,
63 AD5512A, AD5541A, AD5542A, AD5543, AD5553, AD5601, AD5611, AD5620,
64 AD5621, AD5640, AD5660, AD5662 DACs.
65
66 To compile this driver as a module, choose M here: the
67 module will be called ad5446.
68
69config AD5504
70 tristate "Analog Devices AD5504/AD5501 DAC SPI driver"
71 depends on SPI
72 help
73 Say yes here to build support for Analog Devices AD5504, AD5501,
74 High Voltage Digital to Analog Converter.
75
76 To compile this driver as a module, choose M here: the
77 module will be called ad5504.
78
79config AD5764
80 tristate "Analog Devices AD5764/64R/44/44R DAC driver"
81 depends on SPI_MASTER
82 help
83 Say yes here to build support for Analog Devices AD5764, AD5764R, AD5744,
84 AD5744R Digital to Analog Converter.
85
86 To compile this driver as a module, choose M here: the
87 module will be called ad5764.
88
89config AD5791
90 tristate "Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC SPI driver"
91 depends on SPI
92 help
93 Say yes here to build support for Analog Devices AD5760, AD5780,
94 AD5781, AD5790, AD5791 High Resolution Voltage Output Digital to
95 Analog Converter.
96
97 To compile this driver as a module, choose M here: the
98 module will be called ad5791.
99
100config AD5686
101 tristate "Analog Devices AD5686R/AD5685R/AD5684R DAC SPI driver"
102 depends on SPI
103 help
104 Say yes here to build support for Analog Devices AD5686R, AD5685R,
105 AD5684R, AD5791 Voltage Output Digital to
106 Analog Converter.
107
108 To compile this driver as a module, choose M here: the
109 module will be called ad5686.
110
111config MAX517
112 tristate "Maxim MAX517/518/519 DAC driver"
113 depends on I2C && EXPERIMENTAL
114 help
115 If you say yes here you get support for the Maxim chips MAX517,
116 MAX518 and MAX519 (I2C 8-Bit DACs with rail-to-rail outputs).
117
118 This driver can also be built as a module. If so, the module
119 will be called max517.
120
121endmenu
diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile
new file mode 100644
index 000000000000..8ab1d264aab7
--- /dev/null
+++ b/drivers/iio/dac/Makefile
@@ -0,0 +1,15 @@
1#
2# Makefile for industrial I/O DAC drivers
3#
4
5obj-$(CONFIG_AD5360) += ad5360.o
6obj-$(CONFIG_AD5380) += ad5380.o
7obj-$(CONFIG_AD5421) += ad5421.o
8obj-$(CONFIG_AD5624R_SPI) += ad5624r_spi.o
9obj-$(CONFIG_AD5064) += ad5064.o
10obj-$(CONFIG_AD5504) += ad5504.o
11obj-$(CONFIG_AD5446) += ad5446.o
12obj-$(CONFIG_AD5764) += ad5764.o
13obj-$(CONFIG_AD5791) += ad5791.o
14obj-$(CONFIG_AD5686) += ad5686.o
15obj-$(CONFIG_MAX517) += max517.o
diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c
new file mode 100644
index 000000000000..276af02520af
--- /dev/null
+++ b/drivers/iio/dac/ad5064.c
@@ -0,0 +1,538 @@
1/*
2 * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648,
3 * AD5666, AD5668 Digital to analog converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define AD5064_MAX_DAC_CHANNELS 8
23#define AD5064_MAX_VREFS 4
24
25#define AD5064_ADDR(x) ((x) << 20)
26#define AD5064_CMD(x) ((x) << 24)
27
28#define AD5064_ADDR_DAC(chan) (chan)
29#define AD5064_ADDR_ALL_DAC 0xF
30
31#define AD5064_CMD_WRITE_INPUT_N 0x0
32#define AD5064_CMD_UPDATE_DAC_N 0x1
33#define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
34#define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
35#define AD5064_CMD_POWERDOWN_DAC 0x4
36#define AD5064_CMD_CLEAR 0x5
37#define AD5064_CMD_LDAC_MASK 0x6
38#define AD5064_CMD_RESET 0x7
39#define AD5064_CMD_CONFIG 0x8
40
41#define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
42#define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
43
44#define AD5064_LDAC_PWRDN_NONE 0x0
45#define AD5064_LDAC_PWRDN_1K 0x1
46#define AD5064_LDAC_PWRDN_100K 0x2
47#define AD5064_LDAC_PWRDN_3STATE 0x3
48
49/**
50 * struct ad5064_chip_info - chip specific information
51 * @shared_vref: whether the vref supply is shared between channels
52 * @internal_vref: internal reference voltage. 0 if the chip has no internal
53 * vref.
54 * @channel: channel specification
55 * @num_channels: number of channels
56 */
57
58struct ad5064_chip_info {
59 bool shared_vref;
60 unsigned long internal_vref;
61 const struct iio_chan_spec *channels;
62 unsigned int num_channels;
63};
64
65/**
66 * struct ad5064_state - driver instance specific data
67 * @spi: spi_device
68 * @chip_info: chip model specific constants, available modes etc
69 * @vref_reg: vref supply regulators
70 * @pwr_down: whether channel is powered down
71 * @pwr_down_mode: channel's current power down mode
72 * @dac_cache: current DAC raw value (chip does not support readback)
73 * @use_internal_vref: set to true if the internal reference voltage should be
74 * used.
75 * @data: spi transfer buffers
76 */
77
78struct ad5064_state {
79 struct spi_device *spi;
80 const struct ad5064_chip_info *chip_info;
81 struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
82 bool pwr_down[AD5064_MAX_DAC_CHANNELS];
83 u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
84 unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
85 bool use_internal_vref;
86
87 /*
88 * DMA (thus cache coherency maintenance) requires the
89 * transfer buffers to live in their own cache lines.
90 */
91 __be32 data ____cacheline_aligned;
92};
93
94enum ad5064_type {
95 ID_AD5024,
96 ID_AD5025,
97 ID_AD5044,
98 ID_AD5045,
99 ID_AD5064,
100 ID_AD5064_1,
101 ID_AD5065,
102 ID_AD5628_1,
103 ID_AD5628_2,
104 ID_AD5648_1,
105 ID_AD5648_2,
106 ID_AD5666_1,
107 ID_AD5666_2,
108 ID_AD5668_1,
109 ID_AD5668_2,
110};
111
112static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
113 unsigned int addr, unsigned int val, unsigned int shift)
114{
115 val <<= shift;
116
117 st->data = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
118
119 return spi_write(st->spi, &st->data, sizeof(st->data));
120}
121
122static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
123 unsigned int channel)
124{
125 unsigned int val;
126 int ret;
127
128 val = (0x1 << channel);
129
130 if (st->pwr_down[channel])
131 val |= st->pwr_down_mode[channel] << 8;
132
133 ret = ad5064_spi_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
134
135 return ret;
136}
137
138static const char * const ad5064_powerdown_modes[] = {
139 "1kohm_to_gnd",
140 "100kohm_to_gnd",
141 "three_state",
142};
143
144static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
145 const struct iio_chan_spec *chan)
146{
147 struct ad5064_state *st = iio_priv(indio_dev);
148
149 return st->pwr_down_mode[chan->channel] - 1;
150}
151
152static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
153 const struct iio_chan_spec *chan, unsigned int mode)
154{
155 struct ad5064_state *st = iio_priv(indio_dev);
156 int ret;
157
158 mutex_lock(&indio_dev->mlock);
159 st->pwr_down_mode[chan->channel] = mode + 1;
160
161 ret = ad5064_sync_powerdown_mode(st, chan->channel);
162 mutex_unlock(&indio_dev->mlock);
163
164 return ret;
165}
166
167static const struct iio_enum ad5064_powerdown_mode_enum = {
168 .items = ad5064_powerdown_modes,
169 .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
170 .get = ad5064_get_powerdown_mode,
171 .set = ad5064_set_powerdown_mode,
172};
173
174static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
175 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
176{
177 struct ad5064_state *st = iio_priv(indio_dev);
178
179 return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
180}
181
182static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
183 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
184 size_t len)
185{
186 struct ad5064_state *st = iio_priv(indio_dev);
187 bool pwr_down;
188 int ret;
189
190 ret = strtobool(buf, &pwr_down);
191 if (ret)
192 return ret;
193
194 mutex_lock(&indio_dev->mlock);
195 st->pwr_down[chan->channel] = pwr_down;
196
197 ret = ad5064_sync_powerdown_mode(st, chan->channel);
198 mutex_unlock(&indio_dev->mlock);
199 return ret ? ret : len;
200}
201
202static int ad5064_get_vref(struct ad5064_state *st,
203 struct iio_chan_spec const *chan)
204{
205 unsigned int i;
206
207 if (st->use_internal_vref)
208 return st->chip_info->internal_vref;
209
210 i = st->chip_info->shared_vref ? 0 : chan->channel;
211 return regulator_get_voltage(st->vref_reg[i].consumer);
212}
213
214static int ad5064_read_raw(struct iio_dev *indio_dev,
215 struct iio_chan_spec const *chan,
216 int *val,
217 int *val2,
218 long m)
219{
220 struct ad5064_state *st = iio_priv(indio_dev);
221 int scale_uv;
222
223 switch (m) {
224 case IIO_CHAN_INFO_RAW:
225 *val = st->dac_cache[chan->channel];
226 return IIO_VAL_INT;
227 case IIO_CHAN_INFO_SCALE:
228 scale_uv = ad5064_get_vref(st, chan);
229 if (scale_uv < 0)
230 return scale_uv;
231
232 scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
233 *val = scale_uv / 100000;
234 *val2 = (scale_uv % 100000) * 10;
235 return IIO_VAL_INT_PLUS_MICRO;
236 default:
237 break;
238 }
239 return -EINVAL;
240}
241
242static int ad5064_write_raw(struct iio_dev *indio_dev,
243 struct iio_chan_spec const *chan, int val, int val2, long mask)
244{
245 struct ad5064_state *st = iio_priv(indio_dev);
246 int ret;
247
248 switch (mask) {
249 case IIO_CHAN_INFO_RAW:
250 if (val > (1 << chan->scan_type.realbits) || val < 0)
251 return -EINVAL;
252
253 mutex_lock(&indio_dev->mlock);
254 ret = ad5064_spi_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
255 chan->address, val, chan->scan_type.shift);
256 if (ret == 0)
257 st->dac_cache[chan->channel] = val;
258 mutex_unlock(&indio_dev->mlock);
259 break;
260 default:
261 ret = -EINVAL;
262 }
263
264 return ret;
265}
266
267static const struct iio_info ad5064_info = {
268 .read_raw = ad5064_read_raw,
269 .write_raw = ad5064_write_raw,
270 .driver_module = THIS_MODULE,
271};
272
273static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
274 {
275 .name = "powerdown",
276 .read = ad5064_read_dac_powerdown,
277 .write = ad5064_write_dac_powerdown,
278 },
279 IIO_ENUM("powerdown_mode", false, &ad5064_powerdown_mode_enum),
280 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
281 { },
282};
283
284#define AD5064_CHANNEL(chan, bits) { \
285 .type = IIO_VOLTAGE, \
286 .indexed = 1, \
287 .output = 1, \
288 .channel = (chan), \
289 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
290 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
291 .address = AD5064_ADDR_DAC(chan), \
292 .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \
293 .ext_info = ad5064_ext_info, \
294}
295
296#define DECLARE_AD5064_CHANNELS(name, bits) \
297const struct iio_chan_spec name[] = { \
298 AD5064_CHANNEL(0, bits), \
299 AD5064_CHANNEL(1, bits), \
300 AD5064_CHANNEL(2, bits), \
301 AD5064_CHANNEL(3, bits), \
302 AD5064_CHANNEL(4, bits), \
303 AD5064_CHANNEL(5, bits), \
304 AD5064_CHANNEL(6, bits), \
305 AD5064_CHANNEL(7, bits), \
306}
307
308static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
309static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
310static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
311
312static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
313 [ID_AD5024] = {
314 .shared_vref = false,
315 .channels = ad5024_channels,
316 .num_channels = 4,
317 },
318 [ID_AD5025] = {
319 .shared_vref = false,
320 .channels = ad5024_channels,
321 .num_channels = 2,
322 },
323 [ID_AD5044] = {
324 .shared_vref = false,
325 .channels = ad5044_channels,
326 .num_channels = 4,
327 },
328 [ID_AD5045] = {
329 .shared_vref = false,
330 .channels = ad5044_channels,
331 .num_channels = 2,
332 },
333 [ID_AD5064] = {
334 .shared_vref = false,
335 .channels = ad5064_channels,
336 .num_channels = 4,
337 },
338 [ID_AD5064_1] = {
339 .shared_vref = true,
340 .channels = ad5064_channels,
341 .num_channels = 4,
342 },
343 [ID_AD5065] = {
344 .shared_vref = false,
345 .channels = ad5064_channels,
346 .num_channels = 2,
347 },
348 [ID_AD5628_1] = {
349 .shared_vref = true,
350 .internal_vref = 2500000,
351 .channels = ad5024_channels,
352 .num_channels = 8,
353 },
354 [ID_AD5628_2] = {
355 .shared_vref = true,
356 .internal_vref = 5000000,
357 .channels = ad5024_channels,
358 .num_channels = 8,
359 },
360 [ID_AD5648_1] = {
361 .shared_vref = true,
362 .internal_vref = 2500000,
363 .channels = ad5044_channels,
364 .num_channels = 8,
365 },
366 [ID_AD5648_2] = {
367 .shared_vref = true,
368 .internal_vref = 5000000,
369 .channels = ad5044_channels,
370 .num_channels = 8,
371 },
372 [ID_AD5666_1] = {
373 .shared_vref = true,
374 .internal_vref = 2500000,
375 .channels = ad5064_channels,
376 .num_channels = 4,
377 },
378 [ID_AD5666_2] = {
379 .shared_vref = true,
380 .internal_vref = 5000000,
381 .channels = ad5064_channels,
382 .num_channels = 4,
383 },
384 [ID_AD5668_1] = {
385 .shared_vref = true,
386 .internal_vref = 2500000,
387 .channels = ad5064_channels,
388 .num_channels = 8,
389 },
390 [ID_AD5668_2] = {
391 .shared_vref = true,
392 .internal_vref = 5000000,
393 .channels = ad5064_channels,
394 .num_channels = 8,
395 },
396};
397
398static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
399{
400 return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
401}
402
403static const char * const ad5064_vref_names[] = {
404 "vrefA",
405 "vrefB",
406 "vrefC",
407 "vrefD",
408};
409
410static const char * const ad5064_vref_name(struct ad5064_state *st,
411 unsigned int vref)
412{
413 return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
414}
415
416static int __devinit ad5064_probe(struct spi_device *spi)
417{
418 enum ad5064_type type = spi_get_device_id(spi)->driver_data;
419 struct iio_dev *indio_dev;
420 struct ad5064_state *st;
421 unsigned int i;
422 int ret;
423
424 indio_dev = iio_device_alloc(sizeof(*st));
425 if (indio_dev == NULL)
426 return -ENOMEM;
427
428 st = iio_priv(indio_dev);
429 spi_set_drvdata(spi, indio_dev);
430
431 st->chip_info = &ad5064_chip_info_tbl[type];
432 st->spi = spi;
433
434 for (i = 0; i < ad5064_num_vref(st); ++i)
435 st->vref_reg[i].supply = ad5064_vref_name(st, i);
436
437 ret = regulator_bulk_get(&st->spi->dev, ad5064_num_vref(st),
438 st->vref_reg);
439 if (ret) {
440 if (!st->chip_info->internal_vref)
441 goto error_free;
442 st->use_internal_vref = true;
443 ret = ad5064_spi_write(st, AD5064_CMD_CONFIG, 0,
444 AD5064_CONFIG_INT_VREF_ENABLE, 0);
445 if (ret) {
446 dev_err(&spi->dev, "Failed to enable internal vref: %d\n",
447 ret);
448 goto error_free;
449 }
450 } else {
451 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
452 if (ret)
453 goto error_free_reg;
454 }
455
456 for (i = 0; i < st->chip_info->num_channels; ++i) {
457 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
458 st->dac_cache[i] = 0x8000;
459 }
460
461 indio_dev->dev.parent = &spi->dev;
462 indio_dev->name = spi_get_device_id(spi)->name;
463 indio_dev->info = &ad5064_info;
464 indio_dev->modes = INDIO_DIRECT_MODE;
465 indio_dev->channels = st->chip_info->channels;
466 indio_dev->num_channels = st->chip_info->num_channels;
467
468 ret = iio_device_register(indio_dev);
469 if (ret)
470 goto error_disable_reg;
471
472 return 0;
473
474error_disable_reg:
475 if (!st->use_internal_vref)
476 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
477error_free_reg:
478 if (!st->use_internal_vref)
479 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
480error_free:
481 iio_device_free(indio_dev);
482
483 return ret;
484}
485
486
487static int __devexit ad5064_remove(struct spi_device *spi)
488{
489 struct iio_dev *indio_dev = spi_get_drvdata(spi);
490 struct ad5064_state *st = iio_priv(indio_dev);
491
492 iio_device_unregister(indio_dev);
493
494 if (!st->use_internal_vref) {
495 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
496 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
497 }
498
499 iio_device_free(indio_dev);
500
501 return 0;
502}
503
504static const struct spi_device_id ad5064_id[] = {
505 {"ad5024", ID_AD5024},
506 {"ad5025", ID_AD5025},
507 {"ad5044", ID_AD5044},
508 {"ad5045", ID_AD5045},
509 {"ad5064", ID_AD5064},
510 {"ad5064-1", ID_AD5064_1},
511 {"ad5065", ID_AD5065},
512 {"ad5628-1", ID_AD5628_1},
513 {"ad5628-2", ID_AD5628_2},
514 {"ad5648-1", ID_AD5648_1},
515 {"ad5648-2", ID_AD5648_2},
516 {"ad5666-1", ID_AD5666_1},
517 {"ad5666-2", ID_AD5666_2},
518 {"ad5668-1", ID_AD5668_1},
519 {"ad5668-2", ID_AD5668_2},
520 {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
521 {}
522};
523MODULE_DEVICE_TABLE(spi, ad5064_id);
524
525static struct spi_driver ad5064_driver = {
526 .driver = {
527 .name = "ad5064",
528 .owner = THIS_MODULE,
529 },
530 .probe = ad5064_probe,
531 .remove = __devexit_p(ad5064_remove),
532 .id_table = ad5064_id,
533};
534module_spi_driver(ad5064_driver);
535
536MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
537MODULE_DESCRIPTION("Analog Devices AD5024/25/44/45/64/64-1/65, AD5628/48/66/68 DAC");
538MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5360.c b/drivers/iio/dac/ad5360.c
new file mode 100644
index 000000000000..8fce84fe70b1
--- /dev/null
+++ b/drivers/iio/dac/ad5360.c
@@ -0,0 +1,570 @@
1/*
2 * Analog devices AD5360, AD5361, AD5362, AD5363, AD5370, AD5371, AD5373
3 * multi-channel Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define AD5360_CMD(x) ((x) << 22)
23#define AD5360_ADDR(x) ((x) << 16)
24
25#define AD5360_READBACK_TYPE(x) ((x) << 13)
26#define AD5360_READBACK_ADDR(x) ((x) << 7)
27
28#define AD5360_CHAN_ADDR(chan) ((chan) + 0x8)
29
30#define AD5360_CMD_WRITE_DATA 0x3
31#define AD5360_CMD_WRITE_OFFSET 0x2
32#define AD5360_CMD_WRITE_GAIN 0x1
33#define AD5360_CMD_SPECIAL_FUNCTION 0x0
34
35/* Special function register addresses */
36#define AD5360_REG_SF_NOP 0x0
37#define AD5360_REG_SF_CTRL 0x1
38#define AD5360_REG_SF_OFS(x) (0x2 + (x))
39#define AD5360_REG_SF_READBACK 0x5
40
41#define AD5360_SF_CTRL_PWR_DOWN BIT(0)
42
43#define AD5360_READBACK_X1A 0x0
44#define AD5360_READBACK_X1B 0x1
45#define AD5360_READBACK_OFFSET 0x2
46#define AD5360_READBACK_GAIN 0x3
47#define AD5360_READBACK_SF 0x4
48
49
50/**
51 * struct ad5360_chip_info - chip specific information
52 * @channel_template: channel specification template
53 * @num_channels: number of channels
54 * @channels_per_group: number of channels per group
55 * @num_vrefs: number of vref supplies for the chip
56*/
57
58struct ad5360_chip_info {
59 struct iio_chan_spec channel_template;
60 unsigned int num_channels;
61 unsigned int channels_per_group;
62 unsigned int num_vrefs;
63};
64
65/**
66 * struct ad5360_state - driver instance specific data
67 * @spi: spi_device
68 * @chip_info: chip model specific constants, available modes etc
69 * @vref_reg: vref supply regulators
70 * @ctrl: control register cache
71 * @data: spi transfer buffers
72 */
73
74struct ad5360_state {
75 struct spi_device *spi;
76 const struct ad5360_chip_info *chip_info;
77 struct regulator_bulk_data vref_reg[3];
78 unsigned int ctrl;
79
80 /*
81 * DMA (thus cache coherency maintenance) requires the
82 * transfer buffers to live in their own cache lines.
83 */
84 union {
85 __be32 d32;
86 u8 d8[4];
87 } data[2] ____cacheline_aligned;
88};
89
90enum ad5360_type {
91 ID_AD5360,
92 ID_AD5361,
93 ID_AD5362,
94 ID_AD5363,
95 ID_AD5370,
96 ID_AD5371,
97 ID_AD5372,
98 ID_AD5373,
99};
100
101#define AD5360_CHANNEL(bits) { \
102 .type = IIO_VOLTAGE, \
103 .indexed = 1, \
104 .output = 1, \
105 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
106 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
107 IIO_CHAN_INFO_OFFSET_SEPARATE_BIT | \
108 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
109 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
110 .scan_type = IIO_ST('u', (bits), 16, 16 - (bits)) \
111}
112
113static const struct ad5360_chip_info ad5360_chip_info_tbl[] = {
114 [ID_AD5360] = {
115 .channel_template = AD5360_CHANNEL(16),
116 .num_channels = 16,
117 .channels_per_group = 8,
118 .num_vrefs = 2,
119 },
120 [ID_AD5361] = {
121 .channel_template = AD5360_CHANNEL(14),
122 .num_channels = 16,
123 .channels_per_group = 8,
124 .num_vrefs = 2,
125 },
126 [ID_AD5362] = {
127 .channel_template = AD5360_CHANNEL(16),
128 .num_channels = 8,
129 .channels_per_group = 4,
130 .num_vrefs = 2,
131 },
132 [ID_AD5363] = {
133 .channel_template = AD5360_CHANNEL(14),
134 .num_channels = 8,
135 .channels_per_group = 4,
136 .num_vrefs = 2,
137 },
138 [ID_AD5370] = {
139 .channel_template = AD5360_CHANNEL(16),
140 .num_channels = 40,
141 .channels_per_group = 8,
142 .num_vrefs = 2,
143 },
144 [ID_AD5371] = {
145 .channel_template = AD5360_CHANNEL(14),
146 .num_channels = 40,
147 .channels_per_group = 8,
148 .num_vrefs = 3,
149 },
150 [ID_AD5372] = {
151 .channel_template = AD5360_CHANNEL(16),
152 .num_channels = 32,
153 .channels_per_group = 8,
154 .num_vrefs = 2,
155 },
156 [ID_AD5373] = {
157 .channel_template = AD5360_CHANNEL(14),
158 .num_channels = 32,
159 .channels_per_group = 8,
160 .num_vrefs = 2,
161 },
162};
163
164static unsigned int ad5360_get_channel_vref_index(struct ad5360_state *st,
165 unsigned int channel)
166{
167 unsigned int i;
168
169 /* The first groups have their own vref, while the remaining groups
170 * share the last vref */
171 i = channel / st->chip_info->channels_per_group;
172 if (i >= st->chip_info->num_vrefs)
173 i = st->chip_info->num_vrefs - 1;
174
175 return i;
176}
177
178static int ad5360_get_channel_vref(struct ad5360_state *st,
179 unsigned int channel)
180{
181 unsigned int i = ad5360_get_channel_vref_index(st, channel);
182
183 return regulator_get_voltage(st->vref_reg[i].consumer);
184}
185
186
187static int ad5360_write_unlocked(struct iio_dev *indio_dev,
188 unsigned int cmd, unsigned int addr, unsigned int val,
189 unsigned int shift)
190{
191 struct ad5360_state *st = iio_priv(indio_dev);
192
193 val <<= shift;
194 val |= AD5360_CMD(cmd) | AD5360_ADDR(addr);
195 st->data[0].d32 = cpu_to_be32(val);
196
197 return spi_write(st->spi, &st->data[0].d8[1], 3);
198}
199
200static int ad5360_write(struct iio_dev *indio_dev, unsigned int cmd,
201 unsigned int addr, unsigned int val, unsigned int shift)
202{
203 int ret;
204
205 mutex_lock(&indio_dev->mlock);
206 ret = ad5360_write_unlocked(indio_dev, cmd, addr, val, shift);
207 mutex_unlock(&indio_dev->mlock);
208
209 return ret;
210}
211
212static int ad5360_read(struct iio_dev *indio_dev, unsigned int type,
213 unsigned int addr)
214{
215 struct ad5360_state *st = iio_priv(indio_dev);
216 struct spi_message m;
217 int ret;
218 struct spi_transfer t[] = {
219 {
220 .tx_buf = &st->data[0].d8[1],
221 .len = 3,
222 .cs_change = 1,
223 }, {
224 .rx_buf = &st->data[1].d8[1],
225 .len = 3,
226 },
227 };
228
229 spi_message_init(&m);
230 spi_message_add_tail(&t[0], &m);
231 spi_message_add_tail(&t[1], &m);
232
233 mutex_lock(&indio_dev->mlock);
234
235 st->data[0].d32 = cpu_to_be32(AD5360_CMD(AD5360_CMD_SPECIAL_FUNCTION) |
236 AD5360_ADDR(AD5360_REG_SF_READBACK) |
237 AD5360_READBACK_TYPE(type) |
238 AD5360_READBACK_ADDR(addr));
239
240 ret = spi_sync(st->spi, &m);
241 if (ret >= 0)
242 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
243
244 mutex_unlock(&indio_dev->mlock);
245
246 return ret;
247}
248
249static ssize_t ad5360_read_dac_powerdown(struct device *dev,
250 struct device_attribute *attr,
251 char *buf)
252{
253 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
254 struct ad5360_state *st = iio_priv(indio_dev);
255
256 return sprintf(buf, "%d\n", (bool)(st->ctrl & AD5360_SF_CTRL_PWR_DOWN));
257}
258
259static int ad5360_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
260 unsigned int clr)
261{
262 struct ad5360_state *st = iio_priv(indio_dev);
263 unsigned int ret;
264
265 mutex_lock(&indio_dev->mlock);
266
267 st->ctrl |= set;
268 st->ctrl &= ~clr;
269
270 ret = ad5360_write_unlocked(indio_dev, AD5360_CMD_SPECIAL_FUNCTION,
271 AD5360_REG_SF_CTRL, st->ctrl, 0);
272
273 mutex_unlock(&indio_dev->mlock);
274
275 return ret;
276}
277
278static ssize_t ad5360_write_dac_powerdown(struct device *dev,
279 struct device_attribute *attr, const char *buf, size_t len)
280{
281 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
282 bool pwr_down;
283 int ret;
284
285 ret = strtobool(buf, &pwr_down);
286 if (ret)
287 return ret;
288
289 if (pwr_down)
290 ret = ad5360_update_ctrl(indio_dev, AD5360_SF_CTRL_PWR_DOWN, 0);
291 else
292 ret = ad5360_update_ctrl(indio_dev, 0, AD5360_SF_CTRL_PWR_DOWN);
293
294 return ret ? ret : len;
295}
296
297static IIO_DEVICE_ATTR(out_voltage_powerdown,
298 S_IRUGO | S_IWUSR,
299 ad5360_read_dac_powerdown,
300 ad5360_write_dac_powerdown, 0);
301
302static struct attribute *ad5360_attributes[] = {
303 &iio_dev_attr_out_voltage_powerdown.dev_attr.attr,
304 NULL,
305};
306
307static const struct attribute_group ad5360_attribute_group = {
308 .attrs = ad5360_attributes,
309};
310
311static int ad5360_write_raw(struct iio_dev *indio_dev,
312 struct iio_chan_spec const *chan,
313 int val,
314 int val2,
315 long mask)
316{
317 struct ad5360_state *st = iio_priv(indio_dev);
318 int max_val = (1 << chan->scan_type.realbits);
319 unsigned int ofs_index;
320
321 switch (mask) {
322 case IIO_CHAN_INFO_RAW:
323 if (val >= max_val || val < 0)
324 return -EINVAL;
325
326 return ad5360_write(indio_dev, AD5360_CMD_WRITE_DATA,
327 chan->address, val, chan->scan_type.shift);
328
329 case IIO_CHAN_INFO_CALIBBIAS:
330 if (val >= max_val || val < 0)
331 return -EINVAL;
332
333 return ad5360_write(indio_dev, AD5360_CMD_WRITE_OFFSET,
334 chan->address, val, chan->scan_type.shift);
335
336 case IIO_CHAN_INFO_CALIBSCALE:
337 if (val >= max_val || val < 0)
338 return -EINVAL;
339
340 return ad5360_write(indio_dev, AD5360_CMD_WRITE_GAIN,
341 chan->address, val, chan->scan_type.shift);
342
343 case IIO_CHAN_INFO_OFFSET:
344 if (val <= -max_val || val > 0)
345 return -EINVAL;
346
347 val = -val;
348
349 /* offset is supposed to have the same scale as raw, but it
350 * is always 14bits wide, so on a chip where the raw value has
351 * more bits, we need to shift offset. */
352 val >>= (chan->scan_type.realbits - 14);
353
354 /* There is one DAC offset register per vref. Changing one
355 * channels offset will also change the offset for all other
356 * channels which share the same vref supply. */
357 ofs_index = ad5360_get_channel_vref_index(st, chan->channel);
358 return ad5360_write(indio_dev, AD5360_CMD_SPECIAL_FUNCTION,
359 AD5360_REG_SF_OFS(ofs_index), val, 0);
360 default:
361 break;
362 }
363
364 return -EINVAL;
365}
366
367static int ad5360_read_raw(struct iio_dev *indio_dev,
368 struct iio_chan_spec const *chan,
369 int *val,
370 int *val2,
371 long m)
372{
373 struct ad5360_state *st = iio_priv(indio_dev);
374 unsigned int ofs_index;
375 int scale_uv;
376 int ret;
377
378 switch (m) {
379 case IIO_CHAN_INFO_RAW:
380 ret = ad5360_read(indio_dev, AD5360_READBACK_X1A,
381 chan->address);
382 if (ret < 0)
383 return ret;
384 *val = ret >> chan->scan_type.shift;
385 return IIO_VAL_INT;
386 case IIO_CHAN_INFO_SCALE:
387 /* vout = 4 * vref * dac_code */
388 scale_uv = ad5360_get_channel_vref(st, chan->channel) * 4 * 100;
389 if (scale_uv < 0)
390 return scale_uv;
391
392 scale_uv >>= (chan->scan_type.realbits);
393 *val = scale_uv / 100000;
394 *val2 = (scale_uv % 100000) * 10;
395 return IIO_VAL_INT_PLUS_MICRO;
396 case IIO_CHAN_INFO_CALIBBIAS:
397 ret = ad5360_read(indio_dev, AD5360_READBACK_OFFSET,
398 chan->address);
399 if (ret < 0)
400 return ret;
401 *val = ret;
402 return IIO_VAL_INT;
403 case IIO_CHAN_INFO_CALIBSCALE:
404 ret = ad5360_read(indio_dev, AD5360_READBACK_GAIN,
405 chan->address);
406 if (ret < 0)
407 return ret;
408 *val = ret;
409 return IIO_VAL_INT;
410 case IIO_CHAN_INFO_OFFSET:
411 ofs_index = ad5360_get_channel_vref_index(st, chan->channel);
412 ret = ad5360_read(indio_dev, AD5360_READBACK_SF,
413 AD5360_REG_SF_OFS(ofs_index));
414 if (ret < 0)
415 return ret;
416
417 ret <<= (chan->scan_type.realbits - 14);
418 *val = -ret;
419 return IIO_VAL_INT;
420 }
421
422 return -EINVAL;
423}
424
425static const struct iio_info ad5360_info = {
426 .read_raw = ad5360_read_raw,
427 .write_raw = ad5360_write_raw,
428 .attrs = &ad5360_attribute_group,
429 .driver_module = THIS_MODULE,
430};
431
432static const char * const ad5360_vref_name[] = {
433 "vref0", "vref1", "vref2"
434};
435
436static int __devinit ad5360_alloc_channels(struct iio_dev *indio_dev)
437{
438 struct ad5360_state *st = iio_priv(indio_dev);
439 struct iio_chan_spec *channels;
440 unsigned int i;
441
442 channels = kcalloc(st->chip_info->num_channels,
443 sizeof(struct iio_chan_spec), GFP_KERNEL);
444
445 if (!channels)
446 return -ENOMEM;
447
448 for (i = 0; i < st->chip_info->num_channels; ++i) {
449 channels[i] = st->chip_info->channel_template;
450 channels[i].channel = i;
451 channels[i].address = AD5360_CHAN_ADDR(i);
452 }
453
454 indio_dev->channels = channels;
455
456 return 0;
457}
458
459static int __devinit ad5360_probe(struct spi_device *spi)
460{
461 enum ad5360_type type = spi_get_device_id(spi)->driver_data;
462 struct iio_dev *indio_dev;
463 struct ad5360_state *st;
464 unsigned int i;
465 int ret;
466
467 indio_dev = iio_device_alloc(sizeof(*st));
468 if (indio_dev == NULL) {
469 dev_err(&spi->dev, "Failed to allocate iio device\n");
470 return -ENOMEM;
471 }
472
473 st = iio_priv(indio_dev);
474 spi_set_drvdata(spi, indio_dev);
475
476 st->chip_info = &ad5360_chip_info_tbl[type];
477 st->spi = spi;
478
479 indio_dev->dev.parent = &spi->dev;
480 indio_dev->name = spi_get_device_id(spi)->name;
481 indio_dev->info = &ad5360_info;
482 indio_dev->modes = INDIO_DIRECT_MODE;
483 indio_dev->num_channels = st->chip_info->num_channels;
484
485 ret = ad5360_alloc_channels(indio_dev);
486 if (ret) {
487 dev_err(&spi->dev, "Failed to allocate channel spec: %d\n", ret);
488 goto error_free;
489 }
490
491 for (i = 0; i < st->chip_info->num_vrefs; ++i)
492 st->vref_reg[i].supply = ad5360_vref_name[i];
493
494 ret = regulator_bulk_get(&st->spi->dev, st->chip_info->num_vrefs,
495 st->vref_reg);
496 if (ret) {
497 dev_err(&spi->dev, "Failed to request vref regulators: %d\n", ret);
498 goto error_free_channels;
499 }
500
501 ret = regulator_bulk_enable(st->chip_info->num_vrefs, st->vref_reg);
502 if (ret) {
503 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n", ret);
504 goto error_free_reg;
505 }
506
507 ret = iio_device_register(indio_dev);
508 if (ret) {
509 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
510 goto error_disable_reg;
511 }
512
513 return 0;
514
515error_disable_reg:
516 regulator_bulk_disable(st->chip_info->num_vrefs, st->vref_reg);
517error_free_reg:
518 regulator_bulk_free(st->chip_info->num_vrefs, st->vref_reg);
519error_free_channels:
520 kfree(indio_dev->channels);
521error_free:
522 iio_device_free(indio_dev);
523
524 return ret;
525}
526
527static int __devexit ad5360_remove(struct spi_device *spi)
528{
529 struct iio_dev *indio_dev = spi_get_drvdata(spi);
530 struct ad5360_state *st = iio_priv(indio_dev);
531
532 iio_device_unregister(indio_dev);
533
534 kfree(indio_dev->channels);
535
536 regulator_bulk_disable(st->chip_info->num_vrefs, st->vref_reg);
537 regulator_bulk_free(st->chip_info->num_vrefs, st->vref_reg);
538
539 iio_device_free(indio_dev);
540
541 return 0;
542}
543
544static const struct spi_device_id ad5360_ids[] = {
545 { "ad5360", ID_AD5360 },
546 { "ad5361", ID_AD5361 },
547 { "ad5362", ID_AD5362 },
548 { "ad5363", ID_AD5363 },
549 { "ad5370", ID_AD5370 },
550 { "ad5371", ID_AD5371 },
551 { "ad5372", ID_AD5372 },
552 { "ad5373", ID_AD5373 },
553 {}
554};
555MODULE_DEVICE_TABLE(spi, ad5360_ids);
556
557static struct spi_driver ad5360_driver = {
558 .driver = {
559 .name = "ad5360",
560 .owner = THIS_MODULE,
561 },
562 .probe = ad5360_probe,
563 .remove = __devexit_p(ad5360_remove),
564 .id_table = ad5360_ids,
565};
566module_spi_driver(ad5360_driver);
567
568MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
569MODULE_DESCRIPTION("Analog Devices AD5360/61/62/63/70/71/72/73 DAC");
570MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5380.c b/drivers/iio/dac/ad5380.c
new file mode 100644
index 000000000000..5dfb4451728f
--- /dev/null
+++ b/drivers/iio/dac/ad5380.c
@@ -0,0 +1,657 @@
1/*
2 * Analog devices AD5380, AD5381, AD5382, AD5383, AD5390, AD5391, AD5392
3 * multi-channel Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/i2c.h>
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/regmap.h>
19#include <linux/regulator/consumer.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23
24#define AD5380_REG_DATA(x) (((x) << 2) | 3)
25#define AD5380_REG_OFFSET(x) (((x) << 2) | 2)
26#define AD5380_REG_GAIN(x) (((x) << 2) | 1)
27#define AD5380_REG_SF_PWR_DOWN (8 << 2)
28#define AD5380_REG_SF_PWR_UP (9 << 2)
29#define AD5380_REG_SF_CTRL (12 << 2)
30
31#define AD5380_CTRL_PWR_DOWN_MODE_OFFSET 13
32#define AD5380_CTRL_INT_VREF_2V5 BIT(12)
33#define AD5380_CTRL_INT_VREF_EN BIT(10)
34
35/**
36 * struct ad5380_chip_info - chip specific information
37 * @channel_template: channel specification template
38 * @num_channels: number of channels
39 * @int_vref: internal vref in uV
40*/
41
42struct ad5380_chip_info {
43 struct iio_chan_spec channel_template;
44 unsigned int num_channels;
45 unsigned int int_vref;
46};
47
48/**
49 * struct ad5380_state - driver instance specific data
50 * @regmap: regmap instance used by the device
51 * @chip_info: chip model specific constants, available modes etc
52 * @vref_reg: vref supply regulator
53 * @vref: actual reference voltage used in uA
54 * @pwr_down: whether the chip is currently in power down mode
55 */
56
57struct ad5380_state {
58 struct regmap *regmap;
59 const struct ad5380_chip_info *chip_info;
60 struct regulator *vref_reg;
61 int vref;
62 bool pwr_down;
63};
64
65enum ad5380_type {
66 ID_AD5380_3,
67 ID_AD5380_5,
68 ID_AD5381_3,
69 ID_AD5381_5,
70 ID_AD5382_3,
71 ID_AD5382_5,
72 ID_AD5383_3,
73 ID_AD5383_5,
74 ID_AD5390_3,
75 ID_AD5390_5,
76 ID_AD5391_3,
77 ID_AD5391_5,
78 ID_AD5392_3,
79 ID_AD5392_5,
80};
81
82static ssize_t ad5380_read_dac_powerdown(struct iio_dev *indio_dev,
83 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
84{
85 struct ad5380_state *st = iio_priv(indio_dev);
86
87 return sprintf(buf, "%d\n", st->pwr_down);
88}
89
90static ssize_t ad5380_write_dac_powerdown(struct iio_dev *indio_dev,
91 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
92 size_t len)
93{
94 struct ad5380_state *st = iio_priv(indio_dev);
95 bool pwr_down;
96 int ret;
97
98 ret = strtobool(buf, &pwr_down);
99 if (ret)
100 return ret;
101
102 mutex_lock(&indio_dev->mlock);
103
104 if (pwr_down)
105 ret = regmap_write(st->regmap, AD5380_REG_SF_PWR_DOWN, 0);
106 else
107 ret = regmap_write(st->regmap, AD5380_REG_SF_PWR_UP, 0);
108
109 st->pwr_down = pwr_down;
110
111 mutex_unlock(&indio_dev->mlock);
112
113 return ret ? ret : len;
114}
115
116static const char * const ad5380_powerdown_modes[] = {
117 "100kohm_to_gnd",
118 "three_state",
119};
120
121static int ad5380_get_powerdown_mode(struct iio_dev *indio_dev,
122 const struct iio_chan_spec *chan)
123{
124 struct ad5380_state *st = iio_priv(indio_dev);
125 unsigned int mode;
126 int ret;
127
128 ret = regmap_read(st->regmap, AD5380_REG_SF_CTRL, &mode);
129 if (ret)
130 return ret;
131
132 mode = (mode >> AD5380_CTRL_PWR_DOWN_MODE_OFFSET) & 1;
133
134 return mode;
135}
136
137static int ad5380_set_powerdown_mode(struct iio_dev *indio_dev,
138 const struct iio_chan_spec *chan, unsigned int mode)
139{
140 struct ad5380_state *st = iio_priv(indio_dev);
141 int ret;
142
143 ret = regmap_update_bits(st->regmap, AD5380_REG_SF_CTRL,
144 1 << AD5380_CTRL_PWR_DOWN_MODE_OFFSET,
145 mode << AD5380_CTRL_PWR_DOWN_MODE_OFFSET);
146
147 return ret;
148}
149
150static const struct iio_enum ad5380_powerdown_mode_enum = {
151 .items = ad5380_powerdown_modes,
152 .num_items = ARRAY_SIZE(ad5380_powerdown_modes),
153 .get = ad5380_get_powerdown_mode,
154 .set = ad5380_set_powerdown_mode,
155};
156
157static unsigned int ad5380_info_to_reg(struct iio_chan_spec const *chan,
158 long info)
159{
160 switch (info) {
161 case 0:
162 return AD5380_REG_DATA(chan->address);
163 case IIO_CHAN_INFO_CALIBBIAS:
164 return AD5380_REG_OFFSET(chan->address);
165 case IIO_CHAN_INFO_CALIBSCALE:
166 return AD5380_REG_GAIN(chan->address);
167 default:
168 break;
169 }
170
171 return 0;
172}
173
174static int ad5380_write_raw(struct iio_dev *indio_dev,
175 struct iio_chan_spec const *chan, int val, int val2, long info)
176{
177 const unsigned int max_val = (1 << chan->scan_type.realbits);
178 struct ad5380_state *st = iio_priv(indio_dev);
179
180 switch (info) {
181 case IIO_CHAN_INFO_RAW:
182 case IIO_CHAN_INFO_CALIBSCALE:
183 if (val >= max_val || val < 0)
184 return -EINVAL;
185
186 return regmap_write(st->regmap,
187 ad5380_info_to_reg(chan, info),
188 val << chan->scan_type.shift);
189 case IIO_CHAN_INFO_CALIBBIAS:
190 val += (1 << chan->scan_type.realbits) / 2;
191 if (val >= max_val || val < 0)
192 return -EINVAL;
193
194 return regmap_write(st->regmap,
195 AD5380_REG_OFFSET(chan->address),
196 val << chan->scan_type.shift);
197 default:
198 break;
199 }
200 return -EINVAL;
201}
202
203static int ad5380_read_raw(struct iio_dev *indio_dev,
204 struct iio_chan_spec const *chan, int *val, int *val2, long info)
205{
206 struct ad5380_state *st = iio_priv(indio_dev);
207 unsigned long scale_uv;
208 int ret;
209
210 switch (info) {
211 case IIO_CHAN_INFO_RAW:
212 case IIO_CHAN_INFO_CALIBSCALE:
213 ret = regmap_read(st->regmap, ad5380_info_to_reg(chan, info),
214 val);
215 if (ret)
216 return ret;
217 *val >>= chan->scan_type.shift;
218 return IIO_VAL_INT;
219 case IIO_CHAN_INFO_CALIBBIAS:
220 ret = regmap_read(st->regmap, AD5380_REG_OFFSET(chan->address),
221 val);
222 if (ret)
223 return ret;
224 *val >>= chan->scan_type.shift;
225 val -= (1 << chan->scan_type.realbits) / 2;
226 return IIO_VAL_INT;
227 case IIO_CHAN_INFO_SCALE:
228 scale_uv = ((2 * st->vref) >> chan->scan_type.realbits) * 100;
229 *val = scale_uv / 100000;
230 *val2 = (scale_uv % 100000) * 10;
231 return IIO_VAL_INT_PLUS_MICRO;
232 default:
233 break;
234 }
235
236 return -EINVAL;
237}
238
239static const struct iio_info ad5380_info = {
240 .read_raw = ad5380_read_raw,
241 .write_raw = ad5380_write_raw,
242 .driver_module = THIS_MODULE,
243};
244
245static struct iio_chan_spec_ext_info ad5380_ext_info[] = {
246 {
247 .name = "powerdown",
248 .read = ad5380_read_dac_powerdown,
249 .write = ad5380_write_dac_powerdown,
250 },
251 IIO_ENUM("powerdown_mode", true, &ad5380_powerdown_mode_enum),
252 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5380_powerdown_mode_enum),
253 { },
254};
255
256#define AD5380_CHANNEL(_bits) { \
257 .type = IIO_VOLTAGE, \
258 .indexed = 1, \
259 .output = 1, \
260 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
261 IIO_CHAN_INFO_SCALE_SHARED_BIT | \
262 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
263 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
264 .scan_type = IIO_ST('u', (_bits), 16, 14 - (_bits)), \
265 .ext_info = ad5380_ext_info, \
266}
267
268static const struct ad5380_chip_info ad5380_chip_info_tbl[] = {
269 [ID_AD5380_3] = {
270 .channel_template = AD5380_CHANNEL(14),
271 .num_channels = 40,
272 .int_vref = 1250000,
273 },
274 [ID_AD5380_5] = {
275 .channel_template = AD5380_CHANNEL(14),
276 .num_channels = 40,
277 .int_vref = 2500000,
278 },
279 [ID_AD5381_3] = {
280 .channel_template = AD5380_CHANNEL(12),
281 .num_channels = 16,
282 .int_vref = 1250000,
283 },
284 [ID_AD5381_5] = {
285 .channel_template = AD5380_CHANNEL(12),
286 .num_channels = 16,
287 .int_vref = 2500000,
288 },
289 [ID_AD5382_3] = {
290 .channel_template = AD5380_CHANNEL(14),
291 .num_channels = 32,
292 .int_vref = 1250000,
293 },
294 [ID_AD5382_5] = {
295 .channel_template = AD5380_CHANNEL(14),
296 .num_channels = 32,
297 .int_vref = 2500000,
298 },
299 [ID_AD5383_3] = {
300 .channel_template = AD5380_CHANNEL(12),
301 .num_channels = 32,
302 .int_vref = 1250000,
303 },
304 [ID_AD5383_5] = {
305 .channel_template = AD5380_CHANNEL(12),
306 .num_channels = 32,
307 .int_vref = 2500000,
308 },
309 [ID_AD5390_3] = {
310 .channel_template = AD5380_CHANNEL(14),
311 .num_channels = 16,
312 .int_vref = 1250000,
313 },
314 [ID_AD5390_5] = {
315 .channel_template = AD5380_CHANNEL(14),
316 .num_channels = 16,
317 .int_vref = 2500000,
318 },
319 [ID_AD5391_3] = {
320 .channel_template = AD5380_CHANNEL(12),
321 .num_channels = 16,
322 .int_vref = 1250000,
323 },
324 [ID_AD5391_5] = {
325 .channel_template = AD5380_CHANNEL(12),
326 .num_channels = 16,
327 .int_vref = 2500000,
328 },
329 [ID_AD5392_3] = {
330 .channel_template = AD5380_CHANNEL(14),
331 .num_channels = 8,
332 .int_vref = 1250000,
333 },
334 [ID_AD5392_5] = {
335 .channel_template = AD5380_CHANNEL(14),
336 .num_channels = 8,
337 .int_vref = 2500000,
338 },
339};
340
341static int __devinit ad5380_alloc_channels(struct iio_dev *indio_dev)
342{
343 struct ad5380_state *st = iio_priv(indio_dev);
344 struct iio_chan_spec *channels;
345 unsigned int i;
346
347 channels = kcalloc(st->chip_info->num_channels,
348 sizeof(struct iio_chan_spec), GFP_KERNEL);
349
350 if (!channels)
351 return -ENOMEM;
352
353 for (i = 0; i < st->chip_info->num_channels; ++i) {
354 channels[i] = st->chip_info->channel_template;
355 channels[i].channel = i;
356 channels[i].address = i;
357 }
358
359 indio_dev->channels = channels;
360
361 return 0;
362}
363
364static int __devinit ad5380_probe(struct device *dev, struct regmap *regmap,
365 enum ad5380_type type, const char *name)
366{
367 struct iio_dev *indio_dev;
368 struct ad5380_state *st;
369 unsigned int ctrl = 0;
370 int ret;
371
372 indio_dev = iio_device_alloc(sizeof(*st));
373 if (indio_dev == NULL) {
374 dev_err(dev, "Failed to allocate iio device\n");
375 ret = -ENOMEM;
376 goto error_regmap_exit;
377 }
378
379 st = iio_priv(indio_dev);
380 dev_set_drvdata(dev, indio_dev);
381
382 st->chip_info = &ad5380_chip_info_tbl[type];
383 st->regmap = regmap;
384
385 indio_dev->dev.parent = dev;
386 indio_dev->name = name;
387 indio_dev->info = &ad5380_info;
388 indio_dev->modes = INDIO_DIRECT_MODE;
389 indio_dev->num_channels = st->chip_info->num_channels;
390
391 ret = ad5380_alloc_channels(indio_dev);
392 if (ret) {
393 dev_err(dev, "Failed to allocate channel spec: %d\n", ret);
394 goto error_free;
395 }
396
397 if (st->chip_info->int_vref == 2500000)
398 ctrl |= AD5380_CTRL_INT_VREF_2V5;
399
400 st->vref_reg = regulator_get(dev, "vref");
401 if (!IS_ERR(st->vref_reg)) {
402 ret = regulator_enable(st->vref_reg);
403 if (ret) {
404 dev_err(dev, "Failed to enable vref regulators: %d\n",
405 ret);
406 goto error_free_reg;
407 }
408
409 st->vref = regulator_get_voltage(st->vref_reg);
410 } else {
411 st->vref = st->chip_info->int_vref;
412 ctrl |= AD5380_CTRL_INT_VREF_EN;
413 }
414
415 ret = regmap_write(st->regmap, AD5380_REG_SF_CTRL, ctrl);
416 if (ret) {
417 dev_err(dev, "Failed to write to device: %d\n", ret);
418 goto error_disable_reg;
419 }
420
421 ret = iio_device_register(indio_dev);
422 if (ret) {
423 dev_err(dev, "Failed to register iio device: %d\n", ret);
424 goto error_disable_reg;
425 }
426
427 return 0;
428
429error_disable_reg:
430 if (!IS_ERR(st->vref_reg))
431 regulator_disable(st->vref_reg);
432error_free_reg:
433 if (!IS_ERR(st->vref_reg))
434 regulator_put(st->vref_reg);
435
436 kfree(indio_dev->channels);
437error_free:
438 iio_device_free(indio_dev);
439error_regmap_exit:
440 regmap_exit(regmap);
441
442 return ret;
443}
444
445static int __devexit ad5380_remove(struct device *dev)
446{
447 struct iio_dev *indio_dev = dev_get_drvdata(dev);
448 struct ad5380_state *st = iio_priv(indio_dev);
449
450 iio_device_unregister(indio_dev);
451
452 kfree(indio_dev->channels);
453
454 if (!IS_ERR(st->vref_reg)) {
455 regulator_disable(st->vref_reg);
456 regulator_put(st->vref_reg);
457 }
458
459 regmap_exit(st->regmap);
460 iio_device_free(indio_dev);
461
462 return 0;
463}
464
465static bool ad5380_reg_false(struct device *dev, unsigned int reg)
466{
467 return false;
468}
469
470static const struct regmap_config ad5380_regmap_config = {
471 .reg_bits = 10,
472 .val_bits = 14,
473
474 .max_register = AD5380_REG_DATA(40),
475 .cache_type = REGCACHE_RBTREE,
476
477 .volatile_reg = ad5380_reg_false,
478 .readable_reg = ad5380_reg_false,
479};
480
481#if IS_ENABLED(CONFIG_SPI_MASTER)
482
483static int __devinit ad5380_spi_probe(struct spi_device *spi)
484{
485 const struct spi_device_id *id = spi_get_device_id(spi);
486 struct regmap *regmap;
487
488 regmap = regmap_init_spi(spi, &ad5380_regmap_config);
489
490 if (IS_ERR(regmap))
491 return PTR_ERR(regmap);
492
493 return ad5380_probe(&spi->dev, regmap, id->driver_data, id->name);
494}
495
496static int __devexit ad5380_spi_remove(struct spi_device *spi)
497{
498 return ad5380_remove(&spi->dev);
499}
500
501static const struct spi_device_id ad5380_spi_ids[] = {
502 { "ad5380-3", ID_AD5380_3 },
503 { "ad5380-5", ID_AD5380_5 },
504 { "ad5381-3", ID_AD5381_3 },
505 { "ad5381-5", ID_AD5381_5 },
506 { "ad5382-3", ID_AD5382_3 },
507 { "ad5382-5", ID_AD5382_5 },
508 { "ad5383-3", ID_AD5383_3 },
509 { "ad5383-5", ID_AD5383_5 },
510 { "ad5384-3", ID_AD5380_3 },
511 { "ad5384-5", ID_AD5380_5 },
512 { "ad5390-3", ID_AD5390_3 },
513 { "ad5390-5", ID_AD5390_5 },
514 { "ad5391-3", ID_AD5391_3 },
515 { "ad5391-5", ID_AD5391_5 },
516 { "ad5392-3", ID_AD5392_3 },
517 { "ad5392-5", ID_AD5392_5 },
518 { }
519};
520MODULE_DEVICE_TABLE(spi, ad5380_spi_ids);
521
522static struct spi_driver ad5380_spi_driver = {
523 .driver = {
524 .name = "ad5380",
525 .owner = THIS_MODULE,
526 },
527 .probe = ad5380_spi_probe,
528 .remove = __devexit_p(ad5380_spi_remove),
529 .id_table = ad5380_spi_ids,
530};
531
532static inline int ad5380_spi_register_driver(void)
533{
534 return spi_register_driver(&ad5380_spi_driver);
535}
536
537static inline void ad5380_spi_unregister_driver(void)
538{
539 spi_unregister_driver(&ad5380_spi_driver);
540}
541
542#else
543
544static inline int ad5380_spi_register_driver(void)
545{
546 return 0;
547}
548
549static inline void ad5380_spi_unregister_driver(void)
550{
551}
552
553#endif
554
555#if IS_ENABLED(CONFIG_I2C)
556
557static int __devinit ad5380_i2c_probe(struct i2c_client *i2c,
558 const struct i2c_device_id *id)
559{
560 struct regmap *regmap;
561
562 regmap = regmap_init_i2c(i2c, &ad5380_regmap_config);
563
564 if (IS_ERR(regmap))
565 return PTR_ERR(regmap);
566
567 return ad5380_probe(&i2c->dev, regmap, id->driver_data, id->name);
568}
569
570static int __devexit ad5380_i2c_remove(struct i2c_client *i2c)
571{
572 return ad5380_remove(&i2c->dev);
573}
574
575static const struct i2c_device_id ad5380_i2c_ids[] = {
576 { "ad5380-3", ID_AD5380_3 },
577 { "ad5380-5", ID_AD5380_5 },
578 { "ad5381-3", ID_AD5381_3 },
579 { "ad5381-5", ID_AD5381_5 },
580 { "ad5382-3", ID_AD5382_3 },
581 { "ad5382-5", ID_AD5382_5 },
582 { "ad5383-3", ID_AD5383_3 },
583 { "ad5383-5", ID_AD5383_5 },
584 { "ad5384-3", ID_AD5380_3 },
585 { "ad5384-5", ID_AD5380_5 },
586 { "ad5390-3", ID_AD5390_3 },
587 { "ad5390-5", ID_AD5390_5 },
588 { "ad5391-3", ID_AD5391_3 },
589 { "ad5391-5", ID_AD5391_5 },
590 { "ad5392-3", ID_AD5392_3 },
591 { "ad5392-5", ID_AD5392_5 },
592 { }
593};
594MODULE_DEVICE_TABLE(i2c, ad5380_i2c_ids);
595
596static struct i2c_driver ad5380_i2c_driver = {
597 .driver = {
598 .name = "ad5380",
599 .owner = THIS_MODULE,
600 },
601 .probe = ad5380_i2c_probe,
602 .remove = __devexit_p(ad5380_i2c_remove),
603 .id_table = ad5380_i2c_ids,
604};
605
606static inline int ad5380_i2c_register_driver(void)
607{
608 return i2c_add_driver(&ad5380_i2c_driver);
609}
610
611static inline void ad5380_i2c_unregister_driver(void)
612{
613 i2c_del_driver(&ad5380_i2c_driver);
614}
615
616#else
617
618static inline int ad5380_i2c_register_driver(void)
619{
620 return 0;
621}
622
623static inline void ad5380_i2c_unregister_driver(void)
624{
625}
626
627#endif
628
629static int __init ad5380_spi_init(void)
630{
631 int ret;
632
633 ret = ad5380_spi_register_driver();
634 if (ret)
635 return ret;
636
637 ret = ad5380_i2c_register_driver();
638 if (ret) {
639 ad5380_spi_unregister_driver();
640 return ret;
641 }
642
643 return 0;
644}
645module_init(ad5380_spi_init);
646
647static void __exit ad5380_spi_exit(void)
648{
649 ad5380_i2c_unregister_driver();
650 ad5380_spi_unregister_driver();
651
652}
653module_exit(ad5380_spi_exit);
654
655MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
656MODULE_DESCRIPTION("Analog Devices AD5380/81/82/83/84/90/91/92 DAC");
657MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5421.c b/drivers/iio/dac/ad5421.c
new file mode 100644
index 000000000000..cdbc5bf25c31
--- /dev/null
+++ b/drivers/iio/dac/ad5421.c
@@ -0,0 +1,544 @@
1/*
2 * AD5421 Digital to analog converters driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/device.h>
10#include <linux/delay.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21#include <linux/iio/events.h>
22#include <linux/iio/dac/ad5421.h>
23
24
25#define AD5421_REG_DAC_DATA 0x1
26#define AD5421_REG_CTRL 0x2
27#define AD5421_REG_OFFSET 0x3
28#define AD5421_REG_GAIN 0x4
29/* load dac and fault shared the same register number. Writing to it will cause
30 * a dac load command, reading from it will return the fault status register */
31#define AD5421_REG_LOAD_DAC 0x5
32#define AD5421_REG_FAULT 0x5
33#define AD5421_REG_FORCE_ALARM_CURRENT 0x6
34#define AD5421_REG_RESET 0x7
35#define AD5421_REG_START_CONVERSION 0x8
36#define AD5421_REG_NOOP 0x9
37
38#define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
39#define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
40#define AD5421_CTRL_MIN_CURRENT BIT(9)
41#define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
42#define AD5421_CTRL_ADC_ENABLE BIT(7)
43#define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
44
45#define AD5421_FAULT_SPI BIT(15)
46#define AD5421_FAULT_PEC BIT(14)
47#define AD5421_FAULT_OVER_CURRENT BIT(13)
48#define AD5421_FAULT_UNDER_CURRENT BIT(12)
49#define AD5421_FAULT_TEMP_OVER_140 BIT(11)
50#define AD5421_FAULT_TEMP_OVER_100 BIT(10)
51#define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
52#define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
53
54/* These bits will cause the fault pin to go high */
55#define AD5421_FAULT_TRIGGER_IRQ \
56 (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
57 AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
58
59/**
60 * struct ad5421_state - driver instance specific data
61 * @spi: spi_device
62 * @ctrl: control register cache
63 * @current_range: current range which the device is configured for
64 * @data: spi transfer buffers
65 * @fault_mask: software masking of events
66 */
67struct ad5421_state {
68 struct spi_device *spi;
69 unsigned int ctrl;
70 enum ad5421_current_range current_range;
71 unsigned int fault_mask;
72
73 /*
74 * DMA (thus cache coherency maintenance) requires the
75 * transfer buffers to live in their own cache lines.
76 */
77 union {
78 u32 d32;
79 u8 d8[4];
80 } data[2] ____cacheline_aligned;
81};
82
83static const struct iio_chan_spec ad5421_channels[] = {
84 {
85 .type = IIO_CURRENT,
86 .indexed = 1,
87 .output = 1,
88 .channel = 0,
89 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
90 IIO_CHAN_INFO_SCALE_SHARED_BIT |
91 IIO_CHAN_INFO_OFFSET_SHARED_BIT |
92 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
93 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
94 .scan_type = IIO_ST('u', 16, 16, 0),
95 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
96 IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
97 },
98 {
99 .type = IIO_TEMP,
100 .channel = -1,
101 .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
102 },
103};
104
105static int ad5421_write_unlocked(struct iio_dev *indio_dev,
106 unsigned int reg, unsigned int val)
107{
108 struct ad5421_state *st = iio_priv(indio_dev);
109
110 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
111
112 return spi_write(st->spi, &st->data[0].d8[1], 3);
113}
114
115static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
116 unsigned int val)
117{
118 int ret;
119
120 mutex_lock(&indio_dev->mlock);
121 ret = ad5421_write_unlocked(indio_dev, reg, val);
122 mutex_unlock(&indio_dev->mlock);
123
124 return ret;
125}
126
127static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
128{
129 struct ad5421_state *st = iio_priv(indio_dev);
130 struct spi_message m;
131 int ret;
132 struct spi_transfer t[] = {
133 {
134 .tx_buf = &st->data[0].d8[1],
135 .len = 3,
136 .cs_change = 1,
137 }, {
138 .rx_buf = &st->data[1].d8[1],
139 .len = 3,
140 },
141 };
142
143 spi_message_init(&m);
144 spi_message_add_tail(&t[0], &m);
145 spi_message_add_tail(&t[1], &m);
146
147 mutex_lock(&indio_dev->mlock);
148
149 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
150
151 ret = spi_sync(st->spi, &m);
152 if (ret >= 0)
153 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
154
155 mutex_unlock(&indio_dev->mlock);
156
157 return ret;
158}
159
160static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
161 unsigned int clr)
162{
163 struct ad5421_state *st = iio_priv(indio_dev);
164 unsigned int ret;
165
166 mutex_lock(&indio_dev->mlock);
167
168 st->ctrl &= ~clr;
169 st->ctrl |= set;
170
171 ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
172
173 mutex_unlock(&indio_dev->mlock);
174
175 return ret;
176}
177
178static irqreturn_t ad5421_fault_handler(int irq, void *data)
179{
180 struct iio_dev *indio_dev = data;
181 struct ad5421_state *st = iio_priv(indio_dev);
182 unsigned int fault;
183 unsigned int old_fault = 0;
184 unsigned int events;
185
186 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
187 if (!fault)
188 return IRQ_NONE;
189
190 /* If we had a fault, this might mean that the DAC has lost its state
191 * and has been reset. Make sure that the control register actually
192 * contains what we expect it to contain. Otherwise the watchdog might
193 * be enabled and we get watchdog timeout faults, which will render the
194 * DAC unusable. */
195 ad5421_update_ctrl(indio_dev, 0, 0);
196
197
198 /* The fault pin stays high as long as a fault condition is present and
199 * it is not possible to mask fault conditions. For certain fault
200 * conditions for example like over-temperature it takes some time
201 * until the fault condition disappears. If we would exit the interrupt
202 * handler immediately after handling the event it would be entered
203 * again instantly. Thus we fall back to polling in case we detect that
204 * a interrupt condition is still present.
205 */
206 do {
207 /* 0xffff is a invalid value for the register and will only be
208 * read if there has been a communication error */
209 if (fault == 0xffff)
210 fault = 0;
211
212 /* we are only interested in new events */
213 events = (old_fault ^ fault) & fault;
214 events &= st->fault_mask;
215
216 if (events & AD5421_FAULT_OVER_CURRENT) {
217 iio_push_event(indio_dev,
218 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
219 0,
220 IIO_EV_TYPE_THRESH,
221 IIO_EV_DIR_RISING),
222 iio_get_time_ns());
223 }
224
225 if (events & AD5421_FAULT_UNDER_CURRENT) {
226 iio_push_event(indio_dev,
227 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
228 0,
229 IIO_EV_TYPE_THRESH,
230 IIO_EV_DIR_FALLING),
231 iio_get_time_ns());
232 }
233
234 if (events & AD5421_FAULT_TEMP_OVER_140) {
235 iio_push_event(indio_dev,
236 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
237 0,
238 IIO_EV_TYPE_MAG,
239 IIO_EV_DIR_RISING),
240 iio_get_time_ns());
241 }
242
243 old_fault = fault;
244 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
245
246 /* still active? go to sleep for some time */
247 if (fault & AD5421_FAULT_TRIGGER_IRQ)
248 msleep(1000);
249
250 } while (fault & AD5421_FAULT_TRIGGER_IRQ);
251
252
253 return IRQ_HANDLED;
254}
255
256static void ad5421_get_current_min_max(struct ad5421_state *st,
257 unsigned int *min, unsigned int *max)
258{
259 /* The current range is configured using external pins, which are
260 * usually hard-wired and not run-time switchable. */
261 switch (st->current_range) {
262 case AD5421_CURRENT_RANGE_4mA_20mA:
263 *min = 4000;
264 *max = 20000;
265 break;
266 case AD5421_CURRENT_RANGE_3mA8_21mA:
267 *min = 3800;
268 *max = 21000;
269 break;
270 case AD5421_CURRENT_RANGE_3mA2_24mA:
271 *min = 3200;
272 *max = 24000;
273 break;
274 default:
275 *min = 0;
276 *max = 1;
277 break;
278 }
279}
280
281static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
282{
283 unsigned int min, max;
284
285 ad5421_get_current_min_max(st, &min, &max);
286 return (min * (1 << 16)) / (max - min);
287}
288
289static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
290{
291 unsigned int min, max;
292
293 ad5421_get_current_min_max(st, &min, &max);
294 return ((max - min) * 1000) / (1 << 16);
295}
296
297static int ad5421_read_raw(struct iio_dev *indio_dev,
298 struct iio_chan_spec const *chan, int *val, int *val2, long m)
299{
300 struct ad5421_state *st = iio_priv(indio_dev);
301 int ret;
302
303 if (chan->type != IIO_CURRENT)
304 return -EINVAL;
305
306 switch (m) {
307 case IIO_CHAN_INFO_RAW:
308 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
309 if (ret < 0)
310 return ret;
311 *val = ret;
312 return IIO_VAL_INT;
313 case IIO_CHAN_INFO_SCALE:
314 *val = 0;
315 *val2 = ad5421_get_scale(st);
316 return IIO_VAL_INT_PLUS_MICRO;
317 case IIO_CHAN_INFO_OFFSET:
318 *val = ad5421_get_offset(st);
319 return IIO_VAL_INT;
320 case IIO_CHAN_INFO_CALIBBIAS:
321 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
322 if (ret < 0)
323 return ret;
324 *val = ret - 32768;
325 return IIO_VAL_INT;
326 case IIO_CHAN_INFO_CALIBSCALE:
327 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
328 if (ret < 0)
329 return ret;
330 *val = ret;
331 return IIO_VAL_INT;
332 }
333
334 return -EINVAL;
335}
336
337static int ad5421_write_raw(struct iio_dev *indio_dev,
338 struct iio_chan_spec const *chan, int val, int val2, long mask)
339{
340 const unsigned int max_val = 1 << 16;
341
342 switch (mask) {
343 case IIO_CHAN_INFO_RAW:
344 if (val >= max_val || val < 0)
345 return -EINVAL;
346
347 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
348 case IIO_CHAN_INFO_CALIBBIAS:
349 val += 32768;
350 if (val >= max_val || val < 0)
351 return -EINVAL;
352
353 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
354 case IIO_CHAN_INFO_CALIBSCALE:
355 if (val >= max_val || val < 0)
356 return -EINVAL;
357
358 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
359 default:
360 break;
361 }
362
363 return -EINVAL;
364}
365
366static int ad5421_write_event_config(struct iio_dev *indio_dev,
367 u64 event_code, int state)
368{
369 struct ad5421_state *st = iio_priv(indio_dev);
370 unsigned int mask;
371
372 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
373 case IIO_CURRENT:
374 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
375 IIO_EV_DIR_RISING)
376 mask = AD5421_FAULT_OVER_CURRENT;
377 else
378 mask = AD5421_FAULT_UNDER_CURRENT;
379 break;
380 case IIO_TEMP:
381 mask = AD5421_FAULT_TEMP_OVER_140;
382 break;
383 default:
384 return -EINVAL;
385 }
386
387 mutex_lock(&indio_dev->mlock);
388 if (state)
389 st->fault_mask |= mask;
390 else
391 st->fault_mask &= ~mask;
392 mutex_unlock(&indio_dev->mlock);
393
394 return 0;
395}
396
397static int ad5421_read_event_config(struct iio_dev *indio_dev,
398 u64 event_code)
399{
400 struct ad5421_state *st = iio_priv(indio_dev);
401 unsigned int mask;
402
403 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
404 case IIO_CURRENT:
405 if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
406 IIO_EV_DIR_RISING)
407 mask = AD5421_FAULT_OVER_CURRENT;
408 else
409 mask = AD5421_FAULT_UNDER_CURRENT;
410 break;
411 case IIO_TEMP:
412 mask = AD5421_FAULT_TEMP_OVER_140;
413 break;
414 default:
415 return -EINVAL;
416 }
417
418 return (bool)(st->fault_mask & mask);
419}
420
421static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
422 int *val)
423{
424 int ret;
425
426 switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
427 case IIO_CURRENT:
428 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
429 if (ret < 0)
430 return ret;
431 *val = ret;
432 break;
433 case IIO_TEMP:
434 *val = 140000;
435 break;
436 default:
437 return -EINVAL;
438 }
439
440 return 0;
441}
442
443static const struct iio_info ad5421_info = {
444 .read_raw = ad5421_read_raw,
445 .write_raw = ad5421_write_raw,
446 .read_event_config = ad5421_read_event_config,
447 .write_event_config = ad5421_write_event_config,
448 .read_event_value = ad5421_read_event_value,
449 .driver_module = THIS_MODULE,
450};
451
452static int __devinit ad5421_probe(struct spi_device *spi)
453{
454 struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
455 struct iio_dev *indio_dev;
456 struct ad5421_state *st;
457 int ret;
458
459 indio_dev = iio_device_alloc(sizeof(*st));
460 if (indio_dev == NULL) {
461 dev_err(&spi->dev, "Failed to allocate iio device\n");
462 return -ENOMEM;
463 }
464
465 st = iio_priv(indio_dev);
466 spi_set_drvdata(spi, indio_dev);
467
468 st->spi = spi;
469
470 indio_dev->dev.parent = &spi->dev;
471 indio_dev->name = "ad5421";
472 indio_dev->info = &ad5421_info;
473 indio_dev->modes = INDIO_DIRECT_MODE;
474 indio_dev->channels = ad5421_channels;
475 indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
476
477 st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
478 AD5421_CTRL_AUTO_FAULT_READBACK;
479
480 if (pdata) {
481 st->current_range = pdata->current_range;
482 if (pdata->external_vref)
483 st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
484 } else {
485 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
486 }
487
488 /* write initial ctrl register value */
489 ad5421_update_ctrl(indio_dev, 0, 0);
490
491 if (spi->irq) {
492 ret = request_threaded_irq(spi->irq,
493 NULL,
494 ad5421_fault_handler,
495 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
496 "ad5421 fault",
497 indio_dev);
498 if (ret)
499 goto error_free;
500 }
501
502 ret = iio_device_register(indio_dev);
503 if (ret) {
504 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
505 goto error_free_irq;
506 }
507
508 return 0;
509
510error_free_irq:
511 if (spi->irq)
512 free_irq(spi->irq, indio_dev);
513error_free:
514 iio_device_free(indio_dev);
515
516 return ret;
517}
518
519static int __devexit ad5421_remove(struct spi_device *spi)
520{
521 struct iio_dev *indio_dev = spi_get_drvdata(spi);
522
523 iio_device_unregister(indio_dev);
524 if (spi->irq)
525 free_irq(spi->irq, indio_dev);
526 iio_device_free(indio_dev);
527
528 return 0;
529}
530
531static struct spi_driver ad5421_driver = {
532 .driver = {
533 .name = "ad5421",
534 .owner = THIS_MODULE,
535 },
536 .probe = ad5421_probe,
537 .remove = __devexit_p(ad5421_remove),
538};
539module_spi_driver(ad5421_driver);
540
541MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
542MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
543MODULE_LICENSE("GPL v2");
544MODULE_ALIAS("spi:ad5421");
diff --git a/drivers/iio/dac/ad5446.c b/drivers/iio/dac/ad5446.c
new file mode 100644
index 000000000000..49f557fc673b
--- /dev/null
+++ b/drivers/iio/dac/ad5446.c
@@ -0,0 +1,381 @@
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/workqueue.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/list.h>
16#include <linux/spi/spi.h>
17#include <linux/regulator/consumer.h>
18#include <linux/err.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23
24#include "ad5446.h"
25
26static int ad5446_write(struct ad5446_state *st, unsigned val)
27{
28 __be16 data = cpu_to_be16(val);
29 return spi_write(st->spi, &data, sizeof(data));
30}
31
32static int ad5660_write(struct ad5446_state *st, unsigned val)
33{
34 uint8_t data[3];
35
36 data[0] = (val >> 16) & 0xFF;
37 data[1] = (val >> 8) & 0xFF;
38 data[2] = val & 0xFF;
39
40 return spi_write(st->spi, data, sizeof(data));
41}
42
43static const char * const ad5446_powerdown_modes[] = {
44 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
45};
46
47static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
48 const struct iio_chan_spec *chan, unsigned int mode)
49{
50 struct ad5446_state *st = iio_priv(indio_dev);
51
52 st->pwr_down_mode = mode + 1;
53
54 return 0;
55}
56
57static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
58 const struct iio_chan_spec *chan)
59{
60 struct ad5446_state *st = iio_priv(indio_dev);
61
62 return st->pwr_down_mode - 1;
63}
64
65static const struct iio_enum ad5446_powerdown_mode_enum = {
66 .items = ad5446_powerdown_modes,
67 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
68 .get = ad5446_get_powerdown_mode,
69 .set = ad5446_set_powerdown_mode,
70};
71
72static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
73 uintptr_t private,
74 const struct iio_chan_spec *chan,
75 char *buf)
76{
77 struct ad5446_state *st = iio_priv(indio_dev);
78
79 return sprintf(buf, "%d\n", st->pwr_down);
80}
81
82static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
83 uintptr_t private,
84 const struct iio_chan_spec *chan,
85 const char *buf, size_t len)
86{
87 struct ad5446_state *st = iio_priv(indio_dev);
88 unsigned int shift;
89 unsigned int val;
90 bool powerdown;
91 int ret;
92
93 ret = strtobool(buf, &powerdown);
94 if (ret)
95 return ret;
96
97 mutex_lock(&indio_dev->mlock);
98 st->pwr_down = powerdown;
99
100 if (st->pwr_down) {
101 shift = chan->scan_type.realbits + chan->scan_type.shift;
102 val = st->pwr_down_mode << shift;
103 } else {
104 val = st->cached_val;
105 }
106
107 ret = st->chip_info->write(st, val);
108 mutex_unlock(&indio_dev->mlock);
109
110 return ret ? ret : len;
111}
112
113static const struct iio_chan_spec_ext_info ad5064_ext_info_powerdown[] = {
114 {
115 .name = "powerdown",
116 .read = ad5446_read_dac_powerdown,
117 .write = ad5446_write_dac_powerdown,
118 },
119 IIO_ENUM("powerdown_mode", false, &ad5446_powerdown_mode_enum),
120 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
121 { },
122};
123
124#define _AD5446_CHANNEL(bits, storage, shift, ext) { \
125 .type = IIO_VOLTAGE, \
126 .indexed = 1, \
127 .output = 1, \
128 .channel = 0, \
129 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
130 IIO_CHAN_INFO_SCALE_SHARED_BIT, \
131 .scan_type = IIO_ST('u', (bits), (storage), (shift)), \
132 .ext_info = (ext), \
133}
134
135#define AD5446_CHANNEL(bits, storage, shift) \
136 _AD5446_CHANNEL(bits, storage, shift, NULL)
137
138#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
139 _AD5446_CHANNEL(bits, storage, shift, ad5064_ext_info_powerdown)
140
141static const struct ad5446_chip_info ad5446_chip_info_tbl[] = {
142 [ID_AD5444] = {
143 .channel = AD5446_CHANNEL(12, 16, 2),
144 .write = ad5446_write,
145 },
146 [ID_AD5446] = {
147 .channel = AD5446_CHANNEL(14, 16, 0),
148 .write = ad5446_write,
149 },
150 [ID_AD5541A] = {
151 .channel = AD5446_CHANNEL(16, 16, 0),
152 .write = ad5446_write,
153 },
154 [ID_AD5512A] = {
155 .channel = AD5446_CHANNEL(12, 16, 4),
156 .write = ad5446_write,
157 },
158 [ID_AD5553] = {
159 .channel = AD5446_CHANNEL(14, 16, 0),
160 .write = ad5446_write,
161 },
162 [ID_AD5601] = {
163 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
164 .write = ad5446_write,
165 },
166 [ID_AD5611] = {
167 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
168 .write = ad5446_write,
169 },
170 [ID_AD5621] = {
171 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
172 .write = ad5446_write,
173 },
174 [ID_AD5620_2500] = {
175 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
176 .int_vref_mv = 2500,
177 .write = ad5446_write,
178 },
179 [ID_AD5620_1250] = {
180 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
181 .int_vref_mv = 1250,
182 .write = ad5446_write,
183 },
184 [ID_AD5640_2500] = {
185 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
186 .int_vref_mv = 2500,
187 .write = ad5446_write,
188 },
189 [ID_AD5640_1250] = {
190 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
191 .int_vref_mv = 1250,
192 .write = ad5446_write,
193 },
194 [ID_AD5660_2500] = {
195 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
196 .int_vref_mv = 2500,
197 .write = ad5660_write,
198 },
199 [ID_AD5660_1250] = {
200 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
201 .int_vref_mv = 1250,
202 .write = ad5660_write,
203 },
204 [ID_AD5662] = {
205 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
206 .write = ad5660_write,
207 },
208};
209
210static int ad5446_read_raw(struct iio_dev *indio_dev,
211 struct iio_chan_spec const *chan,
212 int *val,
213 int *val2,
214 long m)
215{
216 struct ad5446_state *st = iio_priv(indio_dev);
217 unsigned long scale_uv;
218
219 switch (m) {
220 case IIO_CHAN_INFO_RAW:
221 *val = st->cached_val;
222 return IIO_VAL_INT;
223 case IIO_CHAN_INFO_SCALE:
224 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
225 *val = scale_uv / 1000;
226 *val2 = (scale_uv % 1000) * 1000;
227 return IIO_VAL_INT_PLUS_MICRO;
228
229 }
230 return -EINVAL;
231}
232
233static int ad5446_write_raw(struct iio_dev *indio_dev,
234 struct iio_chan_spec const *chan,
235 int val,
236 int val2,
237 long mask)
238{
239 struct ad5446_state *st = iio_priv(indio_dev);
240 int ret = 0;
241
242 switch (mask) {
243 case IIO_CHAN_INFO_RAW:
244 if (val >= (1 << chan->scan_type.realbits) || val < 0)
245 return -EINVAL;
246
247 val <<= chan->scan_type.shift;
248 mutex_lock(&indio_dev->mlock);
249 st->cached_val = val;
250 if (!st->pwr_down)
251 ret = st->chip_info->write(st, val);
252 mutex_unlock(&indio_dev->mlock);
253 break;
254 default:
255 ret = -EINVAL;
256 }
257
258 return ret;
259}
260
261static const struct iio_info ad5446_info = {
262 .read_raw = ad5446_read_raw,
263 .write_raw = ad5446_write_raw,
264 .driver_module = THIS_MODULE,
265};
266
267static int __devinit ad5446_probe(struct spi_device *spi)
268{
269 struct ad5446_state *st;
270 struct iio_dev *indio_dev;
271 struct regulator *reg;
272 int ret, voltage_uv = 0;
273
274 reg = regulator_get(&spi->dev, "vcc");
275 if (!IS_ERR(reg)) {
276 ret = regulator_enable(reg);
277 if (ret)
278 goto error_put_reg;
279
280 voltage_uv = regulator_get_voltage(reg);
281 }
282
283 indio_dev = iio_device_alloc(sizeof(*st));
284 if (indio_dev == NULL) {
285 ret = -ENOMEM;
286 goto error_disable_reg;
287 }
288 st = iio_priv(indio_dev);
289 st->chip_info =
290 &ad5446_chip_info_tbl[spi_get_device_id(spi)->driver_data];
291
292 spi_set_drvdata(spi, indio_dev);
293 st->reg = reg;
294 st->spi = spi;
295
296 /* Establish that the iio_dev is a child of the spi device */
297 indio_dev->dev.parent = &spi->dev;
298 indio_dev->name = spi_get_device_id(spi)->name;
299 indio_dev->info = &ad5446_info;
300 indio_dev->modes = INDIO_DIRECT_MODE;
301 indio_dev->channels = &st->chip_info->channel;
302 indio_dev->num_channels = 1;
303
304 st->pwr_down_mode = MODE_PWRDWN_1k;
305
306 if (st->chip_info->int_vref_mv)
307 st->vref_mv = st->chip_info->int_vref_mv;
308 else if (voltage_uv)
309 st->vref_mv = voltage_uv / 1000;
310 else
311 dev_warn(&spi->dev, "reference voltage unspecified\n");
312
313 ret = iio_device_register(indio_dev);
314 if (ret)
315 goto error_free_device;
316
317 return 0;
318
319error_free_device:
320 iio_device_free(indio_dev);
321error_disable_reg:
322 if (!IS_ERR(reg))
323 regulator_disable(reg);
324error_put_reg:
325 if (!IS_ERR(reg))
326 regulator_put(reg);
327
328 return ret;
329}
330
331static int ad5446_remove(struct spi_device *spi)
332{
333 struct iio_dev *indio_dev = spi_get_drvdata(spi);
334 struct ad5446_state *st = iio_priv(indio_dev);
335
336 iio_device_unregister(indio_dev);
337 if (!IS_ERR(st->reg)) {
338 regulator_disable(st->reg);
339 regulator_put(st->reg);
340 }
341 iio_device_free(indio_dev);
342
343 return 0;
344}
345
346static const struct spi_device_id ad5446_id[] = {
347 {"ad5444", ID_AD5444},
348 {"ad5446", ID_AD5446},
349 {"ad5512a", ID_AD5512A},
350 {"ad5541a", ID_AD5541A},
351 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
352 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
353 {"ad5553", ID_AD5553},
354 {"ad5601", ID_AD5601},
355 {"ad5611", ID_AD5611},
356 {"ad5621", ID_AD5621},
357 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
358 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
359 {"ad5640-2500", ID_AD5640_2500},
360 {"ad5640-1250", ID_AD5640_1250},
361 {"ad5660-2500", ID_AD5660_2500},
362 {"ad5660-1250", ID_AD5660_1250},
363 {"ad5662", ID_AD5662},
364 {}
365};
366MODULE_DEVICE_TABLE(spi, ad5446_id);
367
368static struct spi_driver ad5446_driver = {
369 .driver = {
370 .name = "ad5446",
371 .owner = THIS_MODULE,
372 },
373 .probe = ad5446_probe,
374 .remove = __devexit_p(ad5446_remove),
375 .id_table = ad5446_id,
376};
377module_spi_driver(ad5446_driver);
378
379MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
380MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
381MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5446.h b/drivers/iio/dac/ad5446.h
new file mode 100644
index 000000000000..dfd68ce7427e
--- /dev/null
+++ b/drivers/iio/dac/ad5446.h
@@ -0,0 +1,89 @@
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8#ifndef IIO_DAC_AD5446_H_
9#define IIO_DAC_AD5446_H_
10
11/* DAC Control Bits */
12
13#define AD5446_LOAD (0x0 << 14) /* Load and update */
14#define AD5446_SDO_DIS (0x1 << 14) /* Disable SDO */
15#define AD5446_NOP (0x2 << 14) /* No operation */
16#define AD5446_CLK_RISING (0x3 << 14) /* Clock data on rising edge */
17
18#define AD5620_LOAD (0x0 << 14) /* Load and update Norm Operation*/
19#define AD5620_PWRDWN_1k (0x1 << 14) /* Power-down: 1kOhm to GND */
20#define AD5620_PWRDWN_100k (0x2 << 14) /* Power-down: 100kOhm to GND */
21#define AD5620_PWRDWN_TRISTATE (0x3 << 14) /* Power-down: Three-state */
22
23#define AD5660_LOAD (0x0 << 16) /* Load and update Norm Operation*/
24#define AD5660_PWRDWN_1k (0x1 << 16) /* Power-down: 1kOhm to GND */
25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */
26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */
27
28#define MODE_PWRDWN_1k 0x1
29#define MODE_PWRDWN_100k 0x2
30#define MODE_PWRDWN_TRISTATE 0x3
31
32/**
33 * struct ad5446_state - driver instance specific data
34 * @spi: spi_device
35 * @chip_info: chip model specific constants, available modes etc
36 * @reg: supply regulator
37 * @vref_mv: actual reference voltage used
38 */
39
40struct ad5446_state {
41 struct spi_device *spi;
42 const struct ad5446_chip_info *chip_info;
43 struct regulator *reg;
44 unsigned short vref_mv;
45 unsigned cached_val;
46 unsigned pwr_down_mode;
47 unsigned pwr_down;
48};
49
50/**
51 * struct ad5446_chip_info - chip specific information
52 * @channel: channel spec for the DAC
53 * @int_vref_mv: AD5620/40/60: the internal reference voltage
54 * @write: chip specific helper function to write to the register
55 */
56
57struct ad5446_chip_info {
58 struct iio_chan_spec channel;
59 u16 int_vref_mv;
60 int (*write)(struct ad5446_state *st, unsigned val);
61};
62
63/**
64 * ad5446_supported_device_ids:
65 * The AD5620/40/60 parts are available in different fixed internal reference
66 * voltage options. The actual part numbers may look differently
67 * (and a bit cryptic), however this style is used to make clear which
68 * parts are supported here.
69 */
70
71enum ad5446_supported_device_ids {
72 ID_AD5444,
73 ID_AD5446,
74 ID_AD5541A,
75 ID_AD5512A,
76 ID_AD5553,
77 ID_AD5601,
78 ID_AD5611,
79 ID_AD5621,
80 ID_AD5620_2500,
81 ID_AD5620_1250,
82 ID_AD5640_2500,
83 ID_AD5640_1250,
84 ID_AD5660_2500,
85 ID_AD5660_1250,
86 ID_AD5662,
87};
88
89#endif /* IIO_DAC_AD5446_H_ */
diff --git a/drivers/iio/dac/ad5504.c b/drivers/iio/dac/ad5504.c
new file mode 100644
index 000000000000..242bdc7d0044
--- /dev/null
+++ b/drivers/iio/dac/ad5504.c
@@ -0,0 +1,393 @@
1/*
2 * AD5504, AD5501 High Voltage Digital to Analog Converter
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/fs.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/spi/spi.h>
14#include <linux/slab.h>
15#include <linux/sysfs.h>
16#include <linux/regulator/consumer.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21#include <linux/iio/events.h>
22#include <linux/iio/dac/ad5504.h>
23
24#define AD5505_BITS 12
25#define AD5504_RES_MASK ((1 << (AD5505_BITS)) - 1)
26
27#define AD5504_CMD_READ (1 << 15)
28#define AD5504_CMD_WRITE (0 << 15)
29#define AD5504_ADDR(addr) ((addr) << 12)
30
31/* Registers */
32#define AD5504_ADDR_NOOP 0
33#define AD5504_ADDR_DAC(x) ((x) + 1)
34#define AD5504_ADDR_ALL_DAC 5
35#define AD5504_ADDR_CTRL 7
36
37/* Control Register */
38#define AD5504_DAC_PWR(ch) ((ch) << 2)
39#define AD5504_DAC_PWRDWN_MODE(mode) ((mode) << 6)
40#define AD5504_DAC_PWRDN_20K 0
41#define AD5504_DAC_PWRDN_3STATE 1
42
43/**
44 * struct ad5446_state - driver instance specific data
45 * @us: spi_device
46 * @reg: supply regulator
47 * @vref_mv: actual reference voltage used
48 * @pwr_down_mask power down mask
49 * @pwr_down_mode current power down mode
50 */
51
52struct ad5504_state {
53 struct spi_device *spi;
54 struct regulator *reg;
55 unsigned short vref_mv;
56 unsigned pwr_down_mask;
57 unsigned pwr_down_mode;
58};
59
60/**
61 * ad5504_supported_device_ids:
62 */
63
64enum ad5504_supported_device_ids {
65 ID_AD5504,
66 ID_AD5501,
67};
68
69static int ad5504_spi_write(struct spi_device *spi, u8 addr, u16 val)
70{
71 u16 tmp = cpu_to_be16(AD5504_CMD_WRITE |
72 AD5504_ADDR(addr) |
73 (val & AD5504_RES_MASK));
74
75 return spi_write(spi, (u8 *)&tmp, 2);
76}
77
78static int ad5504_spi_read(struct spi_device *spi, u8 addr)
79{
80 u16 tmp = cpu_to_be16(AD5504_CMD_READ | AD5504_ADDR(addr));
81 u16 val;
82 int ret;
83 struct spi_transfer t = {
84 .tx_buf = &tmp,
85 .rx_buf = &val,
86 .len = 2,
87 };
88 struct spi_message m;
89
90 spi_message_init(&m);
91 spi_message_add_tail(&t, &m);
92 ret = spi_sync(spi, &m);
93
94 if (ret < 0)
95 return ret;
96
97 return be16_to_cpu(val) & AD5504_RES_MASK;
98}
99
100static int ad5504_read_raw(struct iio_dev *indio_dev,
101 struct iio_chan_spec const *chan,
102 int *val,
103 int *val2,
104 long m)
105{
106 struct ad5504_state *st = iio_priv(indio_dev);
107 unsigned long scale_uv;
108 int ret;
109
110 switch (m) {
111 case IIO_CHAN_INFO_RAW:
112 ret = ad5504_spi_read(st->spi, chan->address);
113 if (ret < 0)
114 return ret;
115
116 *val = ret;
117
118 return IIO_VAL_INT;
119 case IIO_CHAN_INFO_SCALE:
120 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
121 *val = scale_uv / 1000;
122 *val2 = (scale_uv % 1000) * 1000;
123 return IIO_VAL_INT_PLUS_MICRO;
124
125 }
126 return -EINVAL;
127}
128
129static int ad5504_write_raw(struct iio_dev *indio_dev,
130 struct iio_chan_spec const *chan,
131 int val,
132 int val2,
133 long mask)
134{
135 struct ad5504_state *st = iio_priv(indio_dev);
136 int ret;
137
138 switch (mask) {
139 case IIO_CHAN_INFO_RAW:
140 if (val >= (1 << chan->scan_type.realbits) || val < 0)
141 return -EINVAL;
142
143 return ad5504_spi_write(st->spi, chan->address, val);
144 default:
145 ret = -EINVAL;
146 }
147
148 return -EINVAL;
149}
150
151static const char * const ad5504_powerdown_modes[] = {
152 "20kohm_to_gnd",
153 "three_state",
154};
155
156static int ad5504_get_powerdown_mode(struct iio_dev *indio_dev,
157 const struct iio_chan_spec *chan)
158{
159 struct ad5504_state *st = iio_priv(indio_dev);
160
161 return st->pwr_down_mode;
162}
163
164static int ad5504_set_powerdown_mode(struct iio_dev *indio_dev,
165 const struct iio_chan_spec *chan, unsigned int mode)
166{
167 struct ad5504_state *st = iio_priv(indio_dev);
168
169 st->pwr_down_mode = mode;
170
171 return 0;
172}
173
174static const struct iio_enum ad5504_powerdown_mode_enum = {
175 .items = ad5504_powerdown_modes,
176 .num_items = ARRAY_SIZE(ad5504_powerdown_modes),
177 .get = ad5504_get_powerdown_mode,
178 .set = ad5504_set_powerdown_mode,
179};
180
181static ssize_t ad5504_read_dac_powerdown(struct iio_dev *indio_dev,
182 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
183{
184 struct ad5504_state *st = iio_priv(indio_dev);
185
186 return sprintf(buf, "%d\n",
187 !(st->pwr_down_mask & (1 << chan->channel)));
188}
189
190static ssize_t ad5504_write_dac_powerdown(struct iio_dev *indio_dev,
191 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
192 size_t len)
193{
194 bool pwr_down;
195 int ret;
196 struct ad5504_state *st = iio_priv(indio_dev);
197
198 ret = strtobool(buf, &pwr_down);
199 if (ret)
200 return ret;
201
202 if (pwr_down)
203 st->pwr_down_mask |= (1 << chan->channel);
204 else
205 st->pwr_down_mask &= ~(1 << chan->channel);
206
207 ret = ad5504_spi_write(st->spi, AD5504_ADDR_CTRL,
208 AD5504_DAC_PWRDWN_MODE(st->pwr_down_mode) |
209 AD5504_DAC_PWR(st->pwr_down_mask));
210
211 /* writes to the CTRL register must be followed by a NOOP */
212 ad5504_spi_write(st->spi, AD5504_ADDR_NOOP, 0);
213
214 return ret ? ret : len;
215}
216
217static IIO_CONST_ATTR(temp0_thresh_rising_value, "110000");
218static IIO_CONST_ATTR(temp0_thresh_rising_en, "1");
219
220static struct attribute *ad5504_ev_attributes[] = {
221 &iio_const_attr_temp0_thresh_rising_value.dev_attr.attr,
222 &iio_const_attr_temp0_thresh_rising_en.dev_attr.attr,
223 NULL,
224};
225
226static struct attribute_group ad5504_ev_attribute_group = {
227 .attrs = ad5504_ev_attributes,
228 .name = "events",
229};
230
231static irqreturn_t ad5504_event_handler(int irq, void *private)
232{
233 iio_push_event(private,
234 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
235 0,
236 IIO_EV_TYPE_THRESH,
237 IIO_EV_DIR_RISING),
238 iio_get_time_ns());
239
240 return IRQ_HANDLED;
241}
242
243static const struct iio_info ad5504_info = {
244 .write_raw = ad5504_write_raw,
245 .read_raw = ad5504_read_raw,
246 .event_attrs = &ad5504_ev_attribute_group,
247 .driver_module = THIS_MODULE,
248};
249
250static const struct iio_chan_spec_ext_info ad5504_ext_info[] = {
251 {
252 .name = "powerdown",
253 .read = ad5504_read_dac_powerdown,
254 .write = ad5504_write_dac_powerdown,
255 },
256 IIO_ENUM("powerdown_mode", true, &ad5504_powerdown_mode_enum),
257 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5504_powerdown_mode_enum),
258 { },
259};
260
261#define AD5504_CHANNEL(_chan) { \
262 .type = IIO_VOLTAGE, \
263 .indexed = 1, \
264 .output = 1, \
265 .channel = (_chan), \
266 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
267 IIO_CHAN_INFO_SCALE_SHARED_BIT, \
268 .address = AD5504_ADDR_DAC(_chan), \
269 .scan_type = IIO_ST('u', 12, 16, 0), \
270 .ext_info = ad5504_ext_info, \
271}
272
273static const struct iio_chan_spec ad5504_channels[] = {
274 AD5504_CHANNEL(0),
275 AD5504_CHANNEL(1),
276 AD5504_CHANNEL(2),
277 AD5504_CHANNEL(3),
278};
279
280static int __devinit ad5504_probe(struct spi_device *spi)
281{
282 struct ad5504_platform_data *pdata = spi->dev.platform_data;
283 struct iio_dev *indio_dev;
284 struct ad5504_state *st;
285 struct regulator *reg;
286 int ret, voltage_uv = 0;
287
288 indio_dev = iio_device_alloc(sizeof(*st));
289 if (indio_dev == NULL) {
290 ret = -ENOMEM;
291 goto error_ret;
292 }
293 reg = regulator_get(&spi->dev, "vcc");
294 if (!IS_ERR(reg)) {
295 ret = regulator_enable(reg);
296 if (ret)
297 goto error_put_reg;
298
299 voltage_uv = regulator_get_voltage(reg);
300 }
301
302 spi_set_drvdata(spi, indio_dev);
303 st = iio_priv(indio_dev);
304 if (voltage_uv)
305 st->vref_mv = voltage_uv / 1000;
306 else if (pdata)
307 st->vref_mv = pdata->vref_mv;
308 else
309 dev_warn(&spi->dev, "reference voltage unspecified\n");
310
311 st->reg = reg;
312 st->spi = spi;
313 indio_dev->dev.parent = &spi->dev;
314 indio_dev->name = spi_get_device_id(st->spi)->name;
315 indio_dev->info = &ad5504_info;
316 if (spi_get_device_id(st->spi)->driver_data == ID_AD5501)
317 indio_dev->num_channels = 1;
318 else
319 indio_dev->num_channels = 4;
320 indio_dev->channels = ad5504_channels;
321 indio_dev->modes = INDIO_DIRECT_MODE;
322
323 if (spi->irq) {
324 ret = request_threaded_irq(spi->irq,
325 NULL,
326 &ad5504_event_handler,
327 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
328 spi_get_device_id(st->spi)->name,
329 indio_dev);
330 if (ret)
331 goto error_disable_reg;
332 }
333
334 ret = iio_device_register(indio_dev);
335 if (ret)
336 goto error_free_irq;
337
338 return 0;
339
340error_free_irq:
341 if (spi->irq)
342 free_irq(spi->irq, indio_dev);
343error_disable_reg:
344 if (!IS_ERR(reg))
345 regulator_disable(reg);
346error_put_reg:
347 if (!IS_ERR(reg))
348 regulator_put(reg);
349
350 iio_device_free(indio_dev);
351error_ret:
352 return ret;
353}
354
355static int __devexit ad5504_remove(struct spi_device *spi)
356{
357 struct iio_dev *indio_dev = spi_get_drvdata(spi);
358 struct ad5504_state *st = iio_priv(indio_dev);
359
360 iio_device_unregister(indio_dev);
361 if (spi->irq)
362 free_irq(spi->irq, indio_dev);
363
364 if (!IS_ERR(st->reg)) {
365 regulator_disable(st->reg);
366 regulator_put(st->reg);
367 }
368 iio_device_free(indio_dev);
369
370 return 0;
371}
372
373static const struct spi_device_id ad5504_id[] = {
374 {"ad5504", ID_AD5504},
375 {"ad5501", ID_AD5501},
376 {}
377};
378MODULE_DEVICE_TABLE(spi, ad5504_id);
379
380static struct spi_driver ad5504_driver = {
381 .driver = {
382 .name = "ad5504",
383 .owner = THIS_MODULE,
384 },
385 .probe = ad5504_probe,
386 .remove = __devexit_p(ad5504_remove),
387 .id_table = ad5504_id,
388};
389module_spi_driver(ad5504_driver);
390
391MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
392MODULE_DESCRIPTION("Analog Devices AD5501/AD5501 DAC");
393MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5624r.h b/drivers/iio/dac/ad5624r.h
new file mode 100644
index 000000000000..5dca3028cdfd
--- /dev/null
+++ b/drivers/iio/dac/ad5624r.h
@@ -0,0 +1,79 @@
1/*
2 * AD5624R SPI DAC driver
3 *
4 * Copyright 2010-2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8#ifndef SPI_AD5624R_H_
9#define SPI_AD5624R_H_
10
11#define AD5624R_DAC_CHANNELS 4
12
13#define AD5624R_ADDR_DAC0 0x0
14#define AD5624R_ADDR_DAC1 0x1
15#define AD5624R_ADDR_DAC2 0x2
16#define AD5624R_ADDR_DAC3 0x3
17#define AD5624R_ADDR_ALL_DAC 0x7
18
19#define AD5624R_CMD_WRITE_INPUT_N 0x0
20#define AD5624R_CMD_UPDATE_DAC_N 0x1
21#define AD5624R_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
22#define AD5624R_CMD_WRITE_INPUT_N_UPDATE_N 0x3
23#define AD5624R_CMD_POWERDOWN_DAC 0x4
24#define AD5624R_CMD_RESET 0x5
25#define AD5624R_CMD_LDAC_SETUP 0x6
26#define AD5624R_CMD_INTERNAL_REFER_SETUP 0x7
27
28#define AD5624R_LDAC_PWRDN_NONE 0x0
29#define AD5624R_LDAC_PWRDN_1K 0x1
30#define AD5624R_LDAC_PWRDN_100K 0x2
31#define AD5624R_LDAC_PWRDN_3STATE 0x3
32
33/**
34 * struct ad5624r_chip_info - chip specific information
35 * @channels: channel spec for the DAC
36 * @int_vref_mv: AD5620/40/60: the internal reference voltage
37 */
38
39struct ad5624r_chip_info {
40 const struct iio_chan_spec *channels;
41 u16 int_vref_mv;
42};
43
44/**
45 * struct ad5446_state - driver instance specific data
46 * @indio_dev: the industrial I/O device
47 * @us: spi_device
48 * @chip_info: chip model specific constants, available modes etc
49 * @reg: supply regulator
50 * @vref_mv: actual reference voltage used
51 * @pwr_down_mask power down mask
52 * @pwr_down_mode current power down mode
53 */
54
55struct ad5624r_state {
56 struct spi_device *us;
57 const struct ad5624r_chip_info *chip_info;
58 struct regulator *reg;
59 unsigned short vref_mv;
60 unsigned pwr_down_mask;
61 unsigned pwr_down_mode;
62};
63
64/**
65 * ad5624r_supported_device_ids:
66 * The AD5624/44/64 parts are available in different
67 * fixed internal reference voltage options.
68 */
69
70enum ad5624r_supported_device_ids {
71 ID_AD5624R3,
72 ID_AD5644R3,
73 ID_AD5664R3,
74 ID_AD5624R5,
75 ID_AD5644R5,
76 ID_AD5664R5,
77};
78
79#endif /* SPI_AD5624R_H_ */
diff --git a/drivers/iio/dac/ad5624r_spi.c b/drivers/iio/dac/ad5624r_spi.c
new file mode 100644
index 000000000000..6a7d6a48cc6d
--- /dev/null
+++ b/drivers/iio/dac/ad5624r_spi.c
@@ -0,0 +1,324 @@
1/*
2 * AD5624R, AD5644R, AD5664R Digital to analog convertors spi driver
3 *
4 * Copyright 2010-2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/fs.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/spi/spi.h>
14#include <linux/slab.h>
15#include <linux/sysfs.h>
16#include <linux/regulator/consumer.h>
17#include <linux/module.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#include "ad5624r.h"
23
24static int ad5624r_spi_write(struct spi_device *spi,
25 u8 cmd, u8 addr, u16 val, u8 len)
26{
27 u32 data;
28 u8 msg[3];
29
30 /*
31 * The input shift register is 24 bits wide. The first two bits are
32 * don't care bits. The next three are the command bits, C2 to C0,
33 * followed by the 3-bit DAC address, A2 to A0, and then the
34 * 16-, 14-, 12-bit data-word. The data-word comprises the 16-,
35 * 14-, 12-bit input code followed by 0, 2, or 4 don't care bits,
36 * for the AD5664R, AD5644R, and AD5624R, respectively.
37 */
38 data = (0 << 22) | (cmd << 19) | (addr << 16) | (val << (16 - len));
39 msg[0] = data >> 16;
40 msg[1] = data >> 8;
41 msg[2] = data;
42
43 return spi_write(spi, msg, 3);
44}
45
46static int ad5624r_read_raw(struct iio_dev *indio_dev,
47 struct iio_chan_spec const *chan,
48 int *val,
49 int *val2,
50 long m)
51{
52 struct ad5624r_state *st = iio_priv(indio_dev);
53 unsigned long scale_uv;
54
55 switch (m) {
56 case IIO_CHAN_INFO_SCALE:
57 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
58 *val = scale_uv / 1000;
59 *val2 = (scale_uv % 1000) * 1000;
60 return IIO_VAL_INT_PLUS_MICRO;
61
62 }
63 return -EINVAL;
64}
65
66static int ad5624r_write_raw(struct iio_dev *indio_dev,
67 struct iio_chan_spec const *chan,
68 int val,
69 int val2,
70 long mask)
71{
72 struct ad5624r_state *st = iio_priv(indio_dev);
73 int ret;
74
75 switch (mask) {
76 case IIO_CHAN_INFO_RAW:
77 if (val >= (1 << chan->scan_type.realbits) || val < 0)
78 return -EINVAL;
79
80 return ad5624r_spi_write(st->us,
81 AD5624R_CMD_WRITE_INPUT_N_UPDATE_N,
82 chan->address, val,
83 chan->scan_type.shift);
84 default:
85 ret = -EINVAL;
86 }
87
88 return -EINVAL;
89}
90
91static const char * const ad5624r_powerdown_modes[] = {
92 "1kohm_to_gnd",
93 "100kohm_to_gnd",
94 "three_state"
95};
96
97static int ad5624r_get_powerdown_mode(struct iio_dev *indio_dev,
98 const struct iio_chan_spec *chan)
99{
100 struct ad5624r_state *st = iio_priv(indio_dev);
101
102 return st->pwr_down_mode;
103}
104
105static int ad5624r_set_powerdown_mode(struct iio_dev *indio_dev,
106 const struct iio_chan_spec *chan, unsigned int mode)
107{
108 struct ad5624r_state *st = iio_priv(indio_dev);
109
110 st->pwr_down_mode = mode;
111
112 return 0;
113}
114
115static const struct iio_enum ad5624r_powerdown_mode_enum = {
116 .items = ad5624r_powerdown_modes,
117 .num_items = ARRAY_SIZE(ad5624r_powerdown_modes),
118 .get = ad5624r_get_powerdown_mode,
119 .set = ad5624r_set_powerdown_mode,
120};
121
122static ssize_t ad5624r_read_dac_powerdown(struct iio_dev *indio_dev,
123 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
124{
125 struct ad5624r_state *st = iio_priv(indio_dev);
126
127 return sprintf(buf, "%d\n",
128 !!(st->pwr_down_mask & (1 << chan->channel)));
129}
130
131static ssize_t ad5624r_write_dac_powerdown(struct iio_dev *indio_dev,
132 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
133 size_t len)
134{
135 bool pwr_down;
136 int ret;
137 struct ad5624r_state *st = iio_priv(indio_dev);
138
139 ret = strtobool(buf, &pwr_down);
140 if (ret)
141 return ret;
142
143 if (pwr_down)
144 st->pwr_down_mask |= (1 << chan->channel);
145 else
146 st->pwr_down_mask &= ~(1 << chan->channel);
147
148 ret = ad5624r_spi_write(st->us, AD5624R_CMD_POWERDOWN_DAC, 0,
149 (st->pwr_down_mode << 4) |
150 st->pwr_down_mask, 16);
151
152 return ret ? ret : len;
153}
154
155static const struct iio_info ad5624r_info = {
156 .write_raw = ad5624r_write_raw,
157 .read_raw = ad5624r_read_raw,
158 .driver_module = THIS_MODULE,
159};
160
161static const struct iio_chan_spec_ext_info ad5624r_ext_info[] = {
162 {
163 .name = "powerdown",
164 .read = ad5624r_read_dac_powerdown,
165 .write = ad5624r_write_dac_powerdown,
166 },
167 IIO_ENUM("powerdown_mode", true, &ad5624r_powerdown_mode_enum),
168 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5624r_powerdown_mode_enum),
169 { },
170};
171
172#define AD5624R_CHANNEL(_chan, _bits) { \
173 .type = IIO_VOLTAGE, \
174 .indexed = 1, \
175 .output = 1, \
176 .channel = (_chan), \
177 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
178 IIO_CHAN_INFO_SCALE_SHARED_BIT, \
179 .address = (_chan), \
180 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)), \
181 .ext_info = ad5624r_ext_info, \
182}
183
184#define DECLARE_AD5624R_CHANNELS(_name, _bits) \
185 const struct iio_chan_spec _name##_channels[] = { \
186 AD5624R_CHANNEL(0, _bits), \
187 AD5624R_CHANNEL(1, _bits), \
188 AD5624R_CHANNEL(2, _bits), \
189 AD5624R_CHANNEL(3, _bits), \
190}
191
192static DECLARE_AD5624R_CHANNELS(ad5624r, 12);
193static DECLARE_AD5624R_CHANNELS(ad5644r, 14);
194static DECLARE_AD5624R_CHANNELS(ad5664r, 16);
195
196static const struct ad5624r_chip_info ad5624r_chip_info_tbl[] = {
197 [ID_AD5624R3] = {
198 .channels = ad5624r_channels,
199 .int_vref_mv = 1250,
200 },
201 [ID_AD5624R5] = {
202 .channels = ad5624r_channels,
203 .int_vref_mv = 2500,
204 },
205 [ID_AD5644R3] = {
206 .channels = ad5644r_channels,
207 .int_vref_mv = 1250,
208 },
209 [ID_AD5644R5] = {
210 .channels = ad5644r_channels,
211 .int_vref_mv = 2500,
212 },
213 [ID_AD5664R3] = {
214 .channels = ad5664r_channels,
215 .int_vref_mv = 1250,
216 },
217 [ID_AD5664R5] = {
218 .channels = ad5664r_channels,
219 .int_vref_mv = 2500,
220 },
221};
222
223static int __devinit ad5624r_probe(struct spi_device *spi)
224{
225 struct ad5624r_state *st;
226 struct iio_dev *indio_dev;
227 int ret, voltage_uv = 0;
228
229 indio_dev = iio_device_alloc(sizeof(*st));
230 if (indio_dev == NULL) {
231 ret = -ENOMEM;
232 goto error_ret;
233 }
234 st = iio_priv(indio_dev);
235 st->reg = regulator_get(&spi->dev, "vcc");
236 if (!IS_ERR(st->reg)) {
237 ret = regulator_enable(st->reg);
238 if (ret)
239 goto error_put_reg;
240
241 voltage_uv = regulator_get_voltage(st->reg);
242 }
243
244 spi_set_drvdata(spi, indio_dev);
245 st->chip_info =
246 &ad5624r_chip_info_tbl[spi_get_device_id(spi)->driver_data];
247
248 if (voltage_uv)
249 st->vref_mv = voltage_uv / 1000;
250 else
251 st->vref_mv = st->chip_info->int_vref_mv;
252
253 st->us = spi;
254
255 indio_dev->dev.parent = &spi->dev;
256 indio_dev->name = spi_get_device_id(spi)->name;
257 indio_dev->info = &ad5624r_info;
258 indio_dev->modes = INDIO_DIRECT_MODE;
259 indio_dev->channels = st->chip_info->channels;
260 indio_dev->num_channels = AD5624R_DAC_CHANNELS;
261
262 ret = ad5624r_spi_write(spi, AD5624R_CMD_INTERNAL_REFER_SETUP, 0,
263 !!voltage_uv, 16);
264 if (ret)
265 goto error_disable_reg;
266
267 ret = iio_device_register(indio_dev);
268 if (ret)
269 goto error_disable_reg;
270
271 return 0;
272
273error_disable_reg:
274 if (!IS_ERR(st->reg))
275 regulator_disable(st->reg);
276error_put_reg:
277 if (!IS_ERR(st->reg))
278 regulator_put(st->reg);
279 iio_device_free(indio_dev);
280error_ret:
281
282 return ret;
283}
284
285static int __devexit ad5624r_remove(struct spi_device *spi)
286{
287 struct iio_dev *indio_dev = spi_get_drvdata(spi);
288 struct ad5624r_state *st = iio_priv(indio_dev);
289
290 iio_device_unregister(indio_dev);
291 if (!IS_ERR(st->reg)) {
292 regulator_disable(st->reg);
293 regulator_put(st->reg);
294 }
295 iio_device_free(indio_dev);
296
297 return 0;
298}
299
300static const struct spi_device_id ad5624r_id[] = {
301 {"ad5624r3", ID_AD5624R3},
302 {"ad5644r3", ID_AD5644R3},
303 {"ad5664r3", ID_AD5664R3},
304 {"ad5624r5", ID_AD5624R5},
305 {"ad5644r5", ID_AD5644R5},
306 {"ad5664r5", ID_AD5664R5},
307 {}
308};
309MODULE_DEVICE_TABLE(spi, ad5624r_id);
310
311static struct spi_driver ad5624r_driver = {
312 .driver = {
313 .name = "ad5624r",
314 .owner = THIS_MODULE,
315 },
316 .probe = ad5624r_probe,
317 .remove = __devexit_p(ad5624r_remove),
318 .id_table = ad5624r_id,
319};
320module_spi_driver(ad5624r_driver);
321
322MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
323MODULE_DESCRIPTION("Analog Devices AD5624/44/64R DAC spi driver");
324MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c
new file mode 100644
index 000000000000..6948d75e1036
--- /dev/null
+++ b/drivers/iio/dac/ad5686.c
@@ -0,0 +1,418 @@
1/*
2 * AD5686R, AD5685R, AD5684R Digital to analog converters driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/fs.h>
11#include <linux/device.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define AD5686_DAC_CHANNELS 4
23
24#define AD5686_ADDR(x) ((x) << 16)
25#define AD5686_CMD(x) ((x) << 20)
26
27#define AD5686_ADDR_DAC(chan) (0x1 << (chan))
28#define AD5686_ADDR_ALL_DAC 0xF
29
30#define AD5686_CMD_NOOP 0x0
31#define AD5686_CMD_WRITE_INPUT_N 0x1
32#define AD5686_CMD_UPDATE_DAC_N 0x2
33#define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
34#define AD5686_CMD_POWERDOWN_DAC 0x4
35#define AD5686_CMD_LDAC_MASK 0x5
36#define AD5686_CMD_RESET 0x6
37#define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
38#define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
39#define AD5686_CMD_READBACK_ENABLE 0x9
40
41#define AD5686_LDAC_PWRDN_NONE 0x0
42#define AD5686_LDAC_PWRDN_1K 0x1
43#define AD5686_LDAC_PWRDN_100K 0x2
44#define AD5686_LDAC_PWRDN_3STATE 0x3
45
46/**
47 * struct ad5686_chip_info - chip specific information
48 * @int_vref_mv: AD5620/40/60: the internal reference voltage
49 * @channel: channel specification
50*/
51
52struct ad5686_chip_info {
53 u16 int_vref_mv;
54 struct iio_chan_spec channel[AD5686_DAC_CHANNELS];
55};
56
57/**
58 * struct ad5446_state - driver instance specific data
59 * @spi: spi_device
60 * @chip_info: chip model specific constants, available modes etc
61 * @reg: supply regulator
62 * @vref_mv: actual reference voltage used
63 * @pwr_down_mask: power down mask
64 * @pwr_down_mode: current power down mode
65 * @data: spi transfer buffers
66 */
67
68struct ad5686_state {
69 struct spi_device *spi;
70 const struct ad5686_chip_info *chip_info;
71 struct regulator *reg;
72 unsigned short vref_mv;
73 unsigned pwr_down_mask;
74 unsigned pwr_down_mode;
75 /*
76 * DMA (thus cache coherency maintenance) requires the
77 * transfer buffers to live in their own cache lines.
78 */
79
80 union {
81 u32 d32;
82 u8 d8[4];
83 } data[3] ____cacheline_aligned;
84};
85
86/**
87 * ad5686_supported_device_ids:
88 */
89
90enum ad5686_supported_device_ids {
91 ID_AD5684,
92 ID_AD5685,
93 ID_AD5686,
94};
95static int ad5686_spi_write(struct ad5686_state *st,
96 u8 cmd, u8 addr, u16 val, u8 shift)
97{
98 val <<= shift;
99
100 st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
101 AD5686_ADDR(addr) |
102 val);
103
104 return spi_write(st->spi, &st->data[0].d8[1], 3);
105}
106
107static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
108{
109 struct spi_transfer t[] = {
110 {
111 .tx_buf = &st->data[0].d8[1],
112 .len = 3,
113 .cs_change = 1,
114 }, {
115 .tx_buf = &st->data[1].d8[1],
116 .rx_buf = &st->data[2].d8[1],
117 .len = 3,
118 },
119 };
120 struct spi_message m;
121 int ret;
122
123 spi_message_init(&m);
124 spi_message_add_tail(&t[0], &m);
125 spi_message_add_tail(&t[1], &m);
126
127 st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
128 AD5686_ADDR(addr));
129 st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
130
131 ret = spi_sync(st->spi, &m);
132 if (ret < 0)
133 return ret;
134
135 return be32_to_cpu(st->data[2].d32);
136}
137
138static const char * const ad5686_powerdown_modes[] = {
139 "1kohm_to_gnd",
140 "100kohm_to_gnd",
141 "three_state"
142};
143
144static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
145 const struct iio_chan_spec *chan)
146{
147 struct ad5686_state *st = iio_priv(indio_dev);
148
149 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
150}
151
152static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
153 const struct iio_chan_spec *chan, unsigned int mode)
154{
155 struct ad5686_state *st = iio_priv(indio_dev);
156
157 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
158 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
159
160 return 0;
161}
162
163static const struct iio_enum ad5686_powerdown_mode_enum = {
164 .items = ad5686_powerdown_modes,
165 .num_items = ARRAY_SIZE(ad5686_powerdown_modes),
166 .get = ad5686_get_powerdown_mode,
167 .set = ad5686_set_powerdown_mode,
168};
169
170static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
171 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
172{
173 struct ad5686_state *st = iio_priv(indio_dev);
174
175 return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
176 (0x3 << (chan->channel * 2))));
177}
178
179static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
180 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
181 size_t len)
182{
183 bool readin;
184 int ret;
185 struct ad5686_state *st = iio_priv(indio_dev);
186
187 ret = strtobool(buf, &readin);
188 if (ret)
189 return ret;
190
191 if (readin == true)
192 st->pwr_down_mask |= (0x3 << (chan->channel * 2));
193 else
194 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
195
196 ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
197 st->pwr_down_mask & st->pwr_down_mode, 0);
198
199 return ret ? ret : len;
200}
201
202static int ad5686_read_raw(struct iio_dev *indio_dev,
203 struct iio_chan_spec const *chan,
204 int *val,
205 int *val2,
206 long m)
207{
208 struct ad5686_state *st = iio_priv(indio_dev);
209 unsigned long scale_uv;
210 int ret;
211
212 switch (m) {
213 case IIO_CHAN_INFO_RAW:
214 mutex_lock(&indio_dev->mlock);
215 ret = ad5686_spi_read(st, chan->address);
216 mutex_unlock(&indio_dev->mlock);
217 if (ret < 0)
218 return ret;
219 *val = ret;
220 return IIO_VAL_INT;
221 break;
222 case IIO_CHAN_INFO_SCALE:
223 scale_uv = (st->vref_mv * 100000)
224 >> (chan->scan_type.realbits);
225 *val = scale_uv / 100000;
226 *val2 = (scale_uv % 100000) * 10;
227 return IIO_VAL_INT_PLUS_MICRO;
228
229 }
230 return -EINVAL;
231}
232
233static int ad5686_write_raw(struct iio_dev *indio_dev,
234 struct iio_chan_spec const *chan,
235 int val,
236 int val2,
237 long mask)
238{
239 struct ad5686_state *st = iio_priv(indio_dev);
240 int ret;
241
242 switch (mask) {
243 case IIO_CHAN_INFO_RAW:
244 if (val > (1 << chan->scan_type.realbits) || val < 0)
245 return -EINVAL;
246
247 mutex_lock(&indio_dev->mlock);
248 ret = ad5686_spi_write(st,
249 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
250 chan->address,
251 val,
252 chan->scan_type.shift);
253 mutex_unlock(&indio_dev->mlock);
254 break;
255 default:
256 ret = -EINVAL;
257 }
258
259 return ret;
260}
261
262static const struct iio_info ad5686_info = {
263 .read_raw = ad5686_read_raw,
264 .write_raw = ad5686_write_raw,
265 .driver_module = THIS_MODULE,
266};
267
268static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
269 {
270 .name = "powerdown",
271 .read = ad5686_read_dac_powerdown,
272 .write = ad5686_write_dac_powerdown,
273 },
274 IIO_ENUM("powerdown_mode", false, &ad5686_powerdown_mode_enum),
275 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
276 { },
277};
278
279#define AD5868_CHANNEL(chan, bits, shift) { \
280 .type = IIO_VOLTAGE, \
281 .indexed = 1, \
282 .output = 1, \
283 .channel = chan, \
284 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
285 IIO_CHAN_INFO_SCALE_SHARED_BIT, \
286 .address = AD5686_ADDR_DAC(chan), \
287 .scan_type = IIO_ST('u', bits, 16, shift), \
288 .ext_info = ad5686_ext_info, \
289}
290
291static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
292 [ID_AD5684] = {
293 .channel[0] = AD5868_CHANNEL(0, 12, 4),
294 .channel[1] = AD5868_CHANNEL(1, 12, 4),
295 .channel[2] = AD5868_CHANNEL(2, 12, 4),
296 .channel[3] = AD5868_CHANNEL(3, 12, 4),
297 .int_vref_mv = 2500,
298 },
299 [ID_AD5685] = {
300 .channel[0] = AD5868_CHANNEL(0, 14, 2),
301 .channel[1] = AD5868_CHANNEL(1, 14, 2),
302 .channel[2] = AD5868_CHANNEL(2, 14, 2),
303 .channel[3] = AD5868_CHANNEL(3, 14, 2),
304 .int_vref_mv = 2500,
305 },
306 [ID_AD5686] = {
307 .channel[0] = AD5868_CHANNEL(0, 16, 0),
308 .channel[1] = AD5868_CHANNEL(1, 16, 0),
309 .channel[2] = AD5868_CHANNEL(2, 16, 0),
310 .channel[3] = AD5868_CHANNEL(3, 16, 0),
311 .int_vref_mv = 2500,
312 },
313};
314
315
316static int __devinit ad5686_probe(struct spi_device *spi)
317{
318 struct ad5686_state *st;
319 struct iio_dev *indio_dev;
320 int ret, regdone = 0, voltage_uv = 0;
321
322 indio_dev = iio_device_alloc(sizeof(*st));
323 if (indio_dev == NULL)
324 return -ENOMEM;
325
326 st = iio_priv(indio_dev);
327 spi_set_drvdata(spi, indio_dev);
328
329 st->reg = regulator_get(&spi->dev, "vcc");
330 if (!IS_ERR(st->reg)) {
331 ret = regulator_enable(st->reg);
332 if (ret)
333 goto error_put_reg;
334
335 voltage_uv = regulator_get_voltage(st->reg);
336 }
337
338 st->chip_info =
339 &ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
340
341 if (voltage_uv)
342 st->vref_mv = voltage_uv / 1000;
343 else
344 st->vref_mv = st->chip_info->int_vref_mv;
345
346 st->spi = spi;
347
348 /* Set all the power down mode for all channels to 1K pulldown */
349 st->pwr_down_mode = 0x55;
350
351 indio_dev->dev.parent = &spi->dev;
352 indio_dev->name = spi_get_device_id(spi)->name;
353 indio_dev->info = &ad5686_info;
354 indio_dev->modes = INDIO_DIRECT_MODE;
355 indio_dev->channels = st->chip_info->channel;
356 indio_dev->num_channels = AD5686_DAC_CHANNELS;
357
358 regdone = 1;
359 ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
360 !!voltage_uv, 0);
361 if (ret)
362 goto error_disable_reg;
363
364 ret = iio_device_register(indio_dev);
365 if (ret)
366 goto error_disable_reg;
367
368 return 0;
369
370error_disable_reg:
371 if (!IS_ERR(st->reg))
372 regulator_disable(st->reg);
373error_put_reg:
374 if (!IS_ERR(st->reg))
375 regulator_put(st->reg);
376
377 iio_device_free(indio_dev);
378
379 return ret;
380}
381
382static int __devexit ad5686_remove(struct spi_device *spi)
383{
384 struct iio_dev *indio_dev = spi_get_drvdata(spi);
385 struct ad5686_state *st = iio_priv(indio_dev);
386
387 iio_device_unregister(indio_dev);
388 if (!IS_ERR(st->reg)) {
389 regulator_disable(st->reg);
390 regulator_put(st->reg);
391 }
392 iio_device_free(indio_dev);
393
394 return 0;
395}
396
397static const struct spi_device_id ad5686_id[] = {
398 {"ad5684", ID_AD5684},
399 {"ad5685", ID_AD5685},
400 {"ad5686", ID_AD5686},
401 {}
402};
403MODULE_DEVICE_TABLE(spi, ad5686_id);
404
405static struct spi_driver ad5686_driver = {
406 .driver = {
407 .name = "ad5686",
408 .owner = THIS_MODULE,
409 },
410 .probe = ad5686_probe,
411 .remove = __devexit_p(ad5686_remove),
412 .id_table = ad5686_id,
413};
414module_spi_driver(ad5686_driver);
415
416MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
417MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
418MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5764.c b/drivers/iio/dac/ad5764.c
new file mode 100644
index 000000000000..ffce30447445
--- /dev/null
+++ b/drivers/iio/dac/ad5764.c
@@ -0,0 +1,382 @@
1/*
2 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3 * Digital to Analog Converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/sysfs.h>
21
22#define AD5764_REG_SF_NOP 0x0
23#define AD5764_REG_SF_CONFIG 0x1
24#define AD5764_REG_SF_CLEAR 0x4
25#define AD5764_REG_SF_LOAD 0x5
26#define AD5764_REG_DATA(x) ((2 << 3) | (x))
27#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
28#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
29#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
30
31#define AD5764_NUM_CHANNELS 4
32
33/**
34 * struct ad5764_chip_info - chip specific information
35 * @int_vref: Value of the internal reference voltage in uV - 0 if external
36 * reference voltage is used
37 * @channel channel specification
38*/
39
40struct ad5764_chip_info {
41 unsigned long int_vref;
42 const struct iio_chan_spec *channels;
43};
44
45/**
46 * struct ad5764_state - driver instance specific data
47 * @spi: spi_device
48 * @chip_info: chip info
49 * @vref_reg: vref supply regulators
50 * @data: spi transfer buffers
51 */
52
53struct ad5764_state {
54 struct spi_device *spi;
55 const struct ad5764_chip_info *chip_info;
56 struct regulator_bulk_data vref_reg[2];
57
58 /*
59 * DMA (thus cache coherency maintenance) requires the
60 * transfer buffers to live in their own cache lines.
61 */
62 union {
63 __be32 d32;
64 u8 d8[4];
65 } data[2] ____cacheline_aligned;
66};
67
68enum ad5764_type {
69 ID_AD5744,
70 ID_AD5744R,
71 ID_AD5764,
72 ID_AD5764R,
73};
74
75#define AD5764_CHANNEL(_chan, _bits) { \
76 .type = IIO_VOLTAGE, \
77 .indexed = 1, \
78 .output = 1, \
79 .channel = (_chan), \
80 .address = (_chan), \
81 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
82 IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
83 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
84 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
85 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
86 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
87}
88
89#define DECLARE_AD5764_CHANNELS(_name, _bits) \
90const struct iio_chan_spec _name##_channels[] = { \
91 AD5764_CHANNEL(0, (_bits)), \
92 AD5764_CHANNEL(1, (_bits)), \
93 AD5764_CHANNEL(2, (_bits)), \
94 AD5764_CHANNEL(3, (_bits)), \
95};
96
97static DECLARE_AD5764_CHANNELS(ad5764, 16);
98static DECLARE_AD5764_CHANNELS(ad5744, 14);
99
100static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 [ID_AD5744] = {
102 .int_vref = 0,
103 .channels = ad5744_channels,
104 },
105 [ID_AD5744R] = {
106 .int_vref = 5000000,
107 .channels = ad5744_channels,
108 },
109 [ID_AD5764] = {
110 .int_vref = 0,
111 .channels = ad5764_channels,
112 },
113 [ID_AD5764R] = {
114 .int_vref = 5000000,
115 .channels = ad5764_channels,
116 },
117};
118
119static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 unsigned int val)
121{
122 struct ad5764_state *st = iio_priv(indio_dev);
123 int ret;
124
125 mutex_lock(&indio_dev->mlock);
126 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
127
128 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 mutex_unlock(&indio_dev->mlock);
130
131 return ret;
132}
133
134static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 unsigned int *val)
136{
137 struct ad5764_state *st = iio_priv(indio_dev);
138 struct spi_message m;
139 int ret;
140 struct spi_transfer t[] = {
141 {
142 .tx_buf = &st->data[0].d8[1],
143 .len = 3,
144 .cs_change = 1,
145 }, {
146 .rx_buf = &st->data[1].d8[1],
147 .len = 3,
148 },
149 };
150
151 spi_message_init(&m);
152 spi_message_add_tail(&t[0], &m);
153 spi_message_add_tail(&t[1], &m);
154
155 mutex_lock(&indio_dev->mlock);
156
157 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
158
159 ret = spi_sync(st->spi, &m);
160 if (ret >= 0)
161 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
162
163 mutex_unlock(&indio_dev->mlock);
164
165 return ret;
166}
167
168static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
169{
170 switch (info) {
171 case 0:
172 return AD5764_REG_DATA(chan->address);
173 case IIO_CHAN_INFO_CALIBBIAS:
174 return AD5764_REG_OFFSET(chan->address);
175 case IIO_CHAN_INFO_CALIBSCALE:
176 return AD5764_REG_FINE_GAIN(chan->address);
177 default:
178 break;
179 }
180
181 return 0;
182}
183
184static int ad5764_write_raw(struct iio_dev *indio_dev,
185 struct iio_chan_spec const *chan, int val, int val2, long info)
186{
187 const int max_val = (1 << chan->scan_type.realbits);
188 unsigned int reg;
189
190 switch (info) {
191 case IIO_CHAN_INFO_RAW:
192 if (val >= max_val || val < 0)
193 return -EINVAL;
194 val <<= chan->scan_type.shift;
195 break;
196 case IIO_CHAN_INFO_CALIBBIAS:
197 if (val >= 128 || val < -128)
198 return -EINVAL;
199 break;
200 case IIO_CHAN_INFO_CALIBSCALE:
201 if (val >= 32 || val < -32)
202 return -EINVAL;
203 break;
204 default:
205 return -EINVAL;
206 }
207
208 reg = ad5764_chan_info_to_reg(chan, info);
209 return ad5764_write(indio_dev, reg, (u16)val);
210}
211
212static int ad5764_get_channel_vref(struct ad5764_state *st,
213 unsigned int channel)
214{
215 if (st->chip_info->int_vref)
216 return st->chip_info->int_vref;
217 else
218 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
219}
220
221static int ad5764_read_raw(struct iio_dev *indio_dev,
222 struct iio_chan_spec const *chan, int *val, int *val2, long info)
223{
224 struct ad5764_state *st = iio_priv(indio_dev);
225 unsigned long scale_uv;
226 unsigned int reg;
227 int vref;
228 int ret;
229
230 switch (info) {
231 case IIO_CHAN_INFO_RAW:
232 reg = AD5764_REG_DATA(chan->address);
233 ret = ad5764_read(indio_dev, reg, val);
234 if (ret < 0)
235 return ret;
236 *val >>= chan->scan_type.shift;
237 return IIO_VAL_INT;
238 case IIO_CHAN_INFO_CALIBBIAS:
239 reg = AD5764_REG_OFFSET(chan->address);
240 ret = ad5764_read(indio_dev, reg, val);
241 if (ret < 0)
242 return ret;
243 *val = sign_extend32(*val, 7);
244 return IIO_VAL_INT;
245 case IIO_CHAN_INFO_CALIBSCALE:
246 reg = AD5764_REG_FINE_GAIN(chan->address);
247 ret = ad5764_read(indio_dev, reg, val);
248 if (ret < 0)
249 return ret;
250 *val = sign_extend32(*val, 5);
251 return IIO_VAL_INT;
252 case IIO_CHAN_INFO_SCALE:
253 /* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
254 vref = ad5764_get_channel_vref(st, chan->channel);
255 if (vref < 0)
256 return vref;
257
258 scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
259 *val = scale_uv / 100000;
260 *val2 = (scale_uv % 100000) * 10;
261 return IIO_VAL_INT_PLUS_MICRO;
262 case IIO_CHAN_INFO_OFFSET:
263 *val = -(1 << chan->scan_type.realbits) / 2;
264 return IIO_VAL_INT;
265 }
266
267 return -EINVAL;
268}
269
270static const struct iio_info ad5764_info = {
271 .read_raw = ad5764_read_raw,
272 .write_raw = ad5764_write_raw,
273 .driver_module = THIS_MODULE,
274};
275
276static int __devinit ad5764_probe(struct spi_device *spi)
277{
278 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
279 struct iio_dev *indio_dev;
280 struct ad5764_state *st;
281 int ret;
282
283 indio_dev = iio_device_alloc(sizeof(*st));
284 if (indio_dev == NULL) {
285 dev_err(&spi->dev, "Failed to allocate iio device\n");
286 return -ENOMEM;
287 }
288
289 st = iio_priv(indio_dev);
290 spi_set_drvdata(spi, indio_dev);
291
292 st->spi = spi;
293 st->chip_info = &ad5764_chip_infos[type];
294
295 indio_dev->dev.parent = &spi->dev;
296 indio_dev->name = spi_get_device_id(spi)->name;
297 indio_dev->info = &ad5764_info;
298 indio_dev->modes = INDIO_DIRECT_MODE;
299 indio_dev->num_channels = AD5764_NUM_CHANNELS;
300 indio_dev->channels = st->chip_info->channels;
301
302 if (st->chip_info->int_vref == 0) {
303 st->vref_reg[0].supply = "vrefAB";
304 st->vref_reg[1].supply = "vrefCD";
305
306 ret = regulator_bulk_get(&st->spi->dev,
307 ARRAY_SIZE(st->vref_reg), st->vref_reg);
308 if (ret) {
309 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
310 ret);
311 goto error_free;
312 }
313
314 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
315 st->vref_reg);
316 if (ret) {
317 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
318 ret);
319 goto error_free_reg;
320 }
321 }
322
323 ret = iio_device_register(indio_dev);
324 if (ret) {
325 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
326 goto error_disable_reg;
327 }
328
329 return 0;
330
331error_disable_reg:
332 if (st->chip_info->int_vref == 0)
333 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
334error_free_reg:
335 if (st->chip_info->int_vref == 0)
336 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
337error_free:
338 iio_device_free(indio_dev);
339
340 return ret;
341}
342
343static int __devexit ad5764_remove(struct spi_device *spi)
344{
345 struct iio_dev *indio_dev = spi_get_drvdata(spi);
346 struct ad5764_state *st = iio_priv(indio_dev);
347
348 iio_device_unregister(indio_dev);
349
350 if (st->chip_info->int_vref == 0) {
351 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
352 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
353 }
354
355 iio_device_free(indio_dev);
356
357 return 0;
358}
359
360static const struct spi_device_id ad5764_ids[] = {
361 { "ad5744", ID_AD5744 },
362 { "ad5744r", ID_AD5744R },
363 { "ad5764", ID_AD5764 },
364 { "ad5764r", ID_AD5764R },
365 { }
366};
367MODULE_DEVICE_TABLE(spi, ad5764_ids);
368
369static struct spi_driver ad5764_driver = {
370 .driver = {
371 .name = "ad5764",
372 .owner = THIS_MODULE,
373 },
374 .probe = ad5764_probe,
375 .remove = __devexit_p(ad5764_remove),
376 .id_table = ad5764_ids,
377};
378module_spi_driver(ad5764_driver);
379
380MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
381MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
382MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/ad5791.c b/drivers/iio/dac/ad5791.c
new file mode 100644
index 000000000000..2bd2e37280ff
--- /dev/null
+++ b/drivers/iio/dac/ad5791.c
@@ -0,0 +1,485 @@
1/*
2 * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
3 * Converter
4 *
5 * Copyright 2011 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2.
8 */
9
10#include <linux/interrupt.h>
11#include <linux/fs.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/spi/spi.h>
15#include <linux/slab.h>
16#include <linux/sysfs.h>
17#include <linux/regulator/consumer.h>
18#include <linux/module.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/dac/ad5791.h>
23
24#define AD5791_RES_MASK(x) ((1 << (x)) - 1)
25#define AD5791_DAC_MASK AD5791_RES_MASK(20)
26#define AD5791_DAC_MSB (1 << 19)
27
28#define AD5791_CMD_READ (1 << 23)
29#define AD5791_CMD_WRITE (0 << 23)
30#define AD5791_ADDR(addr) ((addr) << 20)
31
32/* Registers */
33#define AD5791_ADDR_NOOP 0
34#define AD5791_ADDR_DAC0 1
35#define AD5791_ADDR_CTRL 2
36#define AD5791_ADDR_CLRCODE 3
37#define AD5791_ADDR_SW_CTRL 4
38
39/* Control Register */
40#define AD5791_CTRL_RBUF (1 << 1)
41#define AD5791_CTRL_OPGND (1 << 2)
42#define AD5791_CTRL_DACTRI (1 << 3)
43#define AD5791_CTRL_BIN2SC (1 << 4)
44#define AD5791_CTRL_SDODIS (1 << 5)
45#define AD5761_CTRL_LINCOMP(x) ((x) << 6)
46
47#define AD5791_LINCOMP_0_10 0
48#define AD5791_LINCOMP_10_12 1
49#define AD5791_LINCOMP_12_16 2
50#define AD5791_LINCOMP_16_19 3
51#define AD5791_LINCOMP_19_20 12
52
53#define AD5780_LINCOMP_0_10 0
54#define AD5780_LINCOMP_10_20 12
55
56/* Software Control Register */
57#define AD5791_SWCTRL_LDAC (1 << 0)
58#define AD5791_SWCTRL_CLR (1 << 1)
59#define AD5791_SWCTRL_RESET (1 << 2)
60
61#define AD5791_DAC_PWRDN_6K 0
62#define AD5791_DAC_PWRDN_3STATE 1
63
64/**
65 * struct ad5791_chip_info - chip specific information
66 * @get_lin_comp: function pointer to the device specific function
67 */
68
69struct ad5791_chip_info {
70 int (*get_lin_comp) (unsigned int span);
71};
72
73/**
74 * struct ad5791_state - driver instance specific data
75 * @us: spi_device
76 * @reg_vdd: positive supply regulator
77 * @reg_vss: negative supply regulator
78 * @chip_info: chip model specific constants
79 * @vref_mv: actual reference voltage used
80 * @vref_neg_mv: voltage of the negative supply
81 * @pwr_down_mode current power down mode
82 */
83
84struct ad5791_state {
85 struct spi_device *spi;
86 struct regulator *reg_vdd;
87 struct regulator *reg_vss;
88 const struct ad5791_chip_info *chip_info;
89 unsigned short vref_mv;
90 unsigned int vref_neg_mv;
91 unsigned ctrl;
92 unsigned pwr_down_mode;
93 bool pwr_down;
94};
95
96/**
97 * ad5791_supported_device_ids:
98 */
99
100enum ad5791_supported_device_ids {
101 ID_AD5760,
102 ID_AD5780,
103 ID_AD5781,
104 ID_AD5791,
105};
106
107static int ad5791_spi_write(struct spi_device *spi, u8 addr, u32 val)
108{
109 union {
110 u32 d32;
111 u8 d8[4];
112 } data;
113
114 data.d32 = cpu_to_be32(AD5791_CMD_WRITE |
115 AD5791_ADDR(addr) |
116 (val & AD5791_DAC_MASK));
117
118 return spi_write(spi, &data.d8[1], 3);
119}
120
121static int ad5791_spi_read(struct spi_device *spi, u8 addr, u32 *val)
122{
123 union {
124 u32 d32;
125 u8 d8[4];
126 } data[3];
127 int ret;
128 struct spi_message msg;
129 struct spi_transfer xfers[] = {
130 {
131 .tx_buf = &data[0].d8[1],
132 .bits_per_word = 8,
133 .len = 3,
134 .cs_change = 1,
135 }, {
136 .tx_buf = &data[1].d8[1],
137 .rx_buf = &data[2].d8[1],
138 .bits_per_word = 8,
139 .len = 3,
140 },
141 };
142
143 data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
144 AD5791_ADDR(addr));
145 data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
146
147 spi_message_init(&msg);
148 spi_message_add_tail(&xfers[0], &msg);
149 spi_message_add_tail(&xfers[1], &msg);
150 ret = spi_sync(spi, &msg);
151
152 *val = be32_to_cpu(data[2].d32);
153
154 return ret;
155}
156
157static const char * const ad5791_powerdown_modes[] = {
158 "6kohm_to_gnd",
159 "three_state",
160};
161
162static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
163 const struct iio_chan_spec *chan)
164{
165 struct ad5791_state *st = iio_priv(indio_dev);
166
167 return st->pwr_down_mode;
168}
169
170static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
171 const struct iio_chan_spec *chan, unsigned int mode)
172{
173 struct ad5791_state *st = iio_priv(indio_dev);
174
175 st->pwr_down_mode = mode;
176
177 return 0;
178}
179
180static const struct iio_enum ad5791_powerdown_mode_enum = {
181 .items = ad5791_powerdown_modes,
182 .num_items = ARRAY_SIZE(ad5791_powerdown_modes),
183 .get = ad5791_get_powerdown_mode,
184 .set = ad5791_set_powerdown_mode,
185};
186
187static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
188 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
189{
190 struct ad5791_state *st = iio_priv(indio_dev);
191
192 return sprintf(buf, "%d\n", st->pwr_down);
193}
194
195static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
196 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
197 size_t len)
198{
199 bool pwr_down;
200 int ret;
201 struct ad5791_state *st = iio_priv(indio_dev);
202
203 ret = strtobool(buf, &pwr_down);
204 if (ret)
205 return ret;
206
207 if (!pwr_down) {
208 st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
209 } else {
210 if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
211 st->ctrl |= AD5791_CTRL_OPGND;
212 else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
213 st->ctrl |= AD5791_CTRL_DACTRI;
214 }
215 st->pwr_down = pwr_down;
216
217 ret = ad5791_spi_write(st->spi, AD5791_ADDR_CTRL, st->ctrl);
218
219 return ret ? ret : len;
220}
221
222static int ad5791_get_lin_comp(unsigned int span)
223{
224 if (span <= 10000)
225 return AD5791_LINCOMP_0_10;
226 else if (span <= 12000)
227 return AD5791_LINCOMP_10_12;
228 else if (span <= 16000)
229 return AD5791_LINCOMP_12_16;
230 else if (span <= 19000)
231 return AD5791_LINCOMP_16_19;
232 else
233 return AD5791_LINCOMP_19_20;
234}
235
236static int ad5780_get_lin_comp(unsigned int span)
237{
238 if (span <= 10000)
239 return AD5780_LINCOMP_0_10;
240 else
241 return AD5780_LINCOMP_10_20;
242}
243static const struct ad5791_chip_info ad5791_chip_info_tbl[] = {
244 [ID_AD5760] = {
245 .get_lin_comp = ad5780_get_lin_comp,
246 },
247 [ID_AD5780] = {
248 .get_lin_comp = ad5780_get_lin_comp,
249 },
250 [ID_AD5781] = {
251 .get_lin_comp = ad5791_get_lin_comp,
252 },
253 [ID_AD5791] = {
254 .get_lin_comp = ad5791_get_lin_comp,
255 },
256};
257
258static int ad5791_read_raw(struct iio_dev *indio_dev,
259 struct iio_chan_spec const *chan,
260 int *val,
261 int *val2,
262 long m)
263{
264 struct ad5791_state *st = iio_priv(indio_dev);
265 u64 val64;
266 int ret;
267
268 switch (m) {
269 case IIO_CHAN_INFO_RAW:
270 ret = ad5791_spi_read(st->spi, chan->address, val);
271 if (ret)
272 return ret;
273 *val &= AD5791_DAC_MASK;
274 *val >>= chan->scan_type.shift;
275 return IIO_VAL_INT;
276 case IIO_CHAN_INFO_SCALE:
277 *val = 0;
278 *val2 = (((u64)st->vref_mv) * 1000000ULL) >> chan->scan_type.realbits;
279 return IIO_VAL_INT_PLUS_MICRO;
280 case IIO_CHAN_INFO_OFFSET:
281 val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
282 do_div(val64, st->vref_mv);
283 *val = -val64;
284 return IIO_VAL_INT;
285 default:
286 return -EINVAL;
287 }
288
289};
290
291static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
292 {
293 .name = "powerdown",
294 .shared = true,
295 .read = ad5791_read_dac_powerdown,
296 .write = ad5791_write_dac_powerdown,
297 },
298 IIO_ENUM("powerdown_mode", true, &ad5791_powerdown_mode_enum),
299 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5791_powerdown_mode_enum),
300 { },
301};
302
303#define AD5791_CHAN(bits, shift) { \
304 .type = IIO_VOLTAGE, \
305 .output = 1, \
306 .indexed = 1, \
307 .address = AD5791_ADDR_DAC0, \
308 .channel = 0, \
309 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
310 IIO_CHAN_INFO_SCALE_SHARED_BIT | \
311 IIO_CHAN_INFO_OFFSET_SHARED_BIT, \
312 .scan_type = IIO_ST('u', bits, 24, shift), \
313 .ext_info = ad5791_ext_info, \
314}
315
316static const struct iio_chan_spec ad5791_channels[] = {
317 [ID_AD5760] = AD5791_CHAN(16, 4),
318 [ID_AD5780] = AD5791_CHAN(18, 2),
319 [ID_AD5781] = AD5791_CHAN(18, 2),
320 [ID_AD5791] = AD5791_CHAN(20, 0)
321};
322
323static int ad5791_write_raw(struct iio_dev *indio_dev,
324 struct iio_chan_spec const *chan,
325 int val,
326 int val2,
327 long mask)
328{
329 struct ad5791_state *st = iio_priv(indio_dev);
330
331 switch (mask) {
332 case IIO_CHAN_INFO_RAW:
333 val &= AD5791_RES_MASK(chan->scan_type.realbits);
334 val <<= chan->scan_type.shift;
335
336 return ad5791_spi_write(st->spi, chan->address, val);
337
338 default:
339 return -EINVAL;
340 }
341}
342
343static const struct iio_info ad5791_info = {
344 .read_raw = &ad5791_read_raw,
345 .write_raw = &ad5791_write_raw,
346 .driver_module = THIS_MODULE,
347};
348
349static int __devinit ad5791_probe(struct spi_device *spi)
350{
351 struct ad5791_platform_data *pdata = spi->dev.platform_data;
352 struct iio_dev *indio_dev;
353 struct ad5791_state *st;
354 int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
355
356 indio_dev = iio_device_alloc(sizeof(*st));
357 if (indio_dev == NULL) {
358 ret = -ENOMEM;
359 goto error_ret;
360 }
361 st = iio_priv(indio_dev);
362 st->reg_vdd = regulator_get(&spi->dev, "vdd");
363 if (!IS_ERR(st->reg_vdd)) {
364 ret = regulator_enable(st->reg_vdd);
365 if (ret)
366 goto error_put_reg_pos;
367
368 pos_voltage_uv = regulator_get_voltage(st->reg_vdd);
369 }
370
371 st->reg_vss = regulator_get(&spi->dev, "vss");
372 if (!IS_ERR(st->reg_vss)) {
373 ret = regulator_enable(st->reg_vss);
374 if (ret)
375 goto error_put_reg_neg;
376
377 neg_voltage_uv = regulator_get_voltage(st->reg_vss);
378 }
379
380 st->pwr_down = true;
381 st->spi = spi;
382
383 if (!IS_ERR(st->reg_vss) && !IS_ERR(st->reg_vdd)) {
384 st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
385 st->vref_neg_mv = neg_voltage_uv / 1000;
386 } else if (pdata) {
387 st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
388 st->vref_neg_mv = pdata->vref_neg_mv;
389 } else {
390 dev_warn(&spi->dev, "reference voltage unspecified\n");
391 }
392
393 ret = ad5791_spi_write(spi, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
394 if (ret)
395 goto error_disable_reg_neg;
396
397 st->chip_info = &ad5791_chip_info_tbl[spi_get_device_id(spi)
398 ->driver_data];
399
400
401 st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
402 | ((pdata && pdata->use_rbuf_gain2) ? 0 : AD5791_CTRL_RBUF) |
403 AD5791_CTRL_BIN2SC;
404
405 ret = ad5791_spi_write(spi, AD5791_ADDR_CTRL, st->ctrl |
406 AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
407 if (ret)
408 goto error_disable_reg_neg;
409
410 spi_set_drvdata(spi, indio_dev);
411 indio_dev->dev.parent = &spi->dev;
412 indio_dev->info = &ad5791_info;
413 indio_dev->modes = INDIO_DIRECT_MODE;
414 indio_dev->channels
415 = &ad5791_channels[spi_get_device_id(spi)->driver_data];
416 indio_dev->num_channels = 1;
417 indio_dev->name = spi_get_device_id(st->spi)->name;
418 ret = iio_device_register(indio_dev);
419 if (ret)
420 goto error_disable_reg_neg;
421
422 return 0;
423
424error_disable_reg_neg:
425 if (!IS_ERR(st->reg_vss))
426 regulator_disable(st->reg_vss);
427error_put_reg_neg:
428 if (!IS_ERR(st->reg_vss))
429 regulator_put(st->reg_vss);
430
431 if (!IS_ERR(st->reg_vdd))
432 regulator_disable(st->reg_vdd);
433error_put_reg_pos:
434 if (!IS_ERR(st->reg_vdd))
435 regulator_put(st->reg_vdd);
436 iio_device_free(indio_dev);
437error_ret:
438
439 return ret;
440}
441
442static int __devexit ad5791_remove(struct spi_device *spi)
443{
444 struct iio_dev *indio_dev = spi_get_drvdata(spi);
445 struct ad5791_state *st = iio_priv(indio_dev);
446
447 iio_device_unregister(indio_dev);
448 if (!IS_ERR(st->reg_vdd)) {
449 regulator_disable(st->reg_vdd);
450 regulator_put(st->reg_vdd);
451 }
452
453 if (!IS_ERR(st->reg_vss)) {
454 regulator_disable(st->reg_vss);
455 regulator_put(st->reg_vss);
456 }
457 iio_device_free(indio_dev);
458
459 return 0;
460}
461
462static const struct spi_device_id ad5791_id[] = {
463 {"ad5760", ID_AD5760},
464 {"ad5780", ID_AD5780},
465 {"ad5781", ID_AD5781},
466 {"ad5790", ID_AD5791},
467 {"ad5791", ID_AD5791},
468 {}
469};
470MODULE_DEVICE_TABLE(spi, ad5791_id);
471
472static struct spi_driver ad5791_driver = {
473 .driver = {
474 .name = "ad5791",
475 .owner = THIS_MODULE,
476 },
477 .probe = ad5791_probe,
478 .remove = __devexit_p(ad5791_remove),
479 .id_table = ad5791_id,
480};
481module_spi_driver(ad5791_driver);
482
483MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
484MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
485MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/dac/max517.c b/drivers/iio/dac/max517.c
new file mode 100644
index 000000000000..92c77c82026c
--- /dev/null
+++ b/drivers/iio/dac/max517.c
@@ -0,0 +1,243 @@
1/*
2 * max517.c - Support for Maxim MAX517, MAX518 and MAX519
3 *
4 * Copyright (C) 2010, 2011 Roland Stigge <stigge@antcom.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/slab.h>
24#include <linux/jiffies.h>
25#include <linux/i2c.h>
26#include <linux/err.h>
27
28#include <linux/iio/iio.h>
29#include <linux/iio/sysfs.h>
30#include <linux/iio/dac/max517.h>
31
32#define MAX517_DRV_NAME "max517"
33
34/* Commands */
35#define COMMAND_CHANNEL0 0x00
36#define COMMAND_CHANNEL1 0x01 /* for MAX518 and MAX519 */
37#define COMMAND_PD 0x08 /* Power Down */
38
39enum max517_device_ids {
40 ID_MAX517,
41 ID_MAX518,
42 ID_MAX519,
43};
44
45struct max517_data {
46 struct iio_dev *indio_dev;
47 struct i2c_client *client;
48 unsigned short vref_mv[2];
49};
50
51/*
52 * channel: bit 0: channel 1
53 * bit 1: channel 2
54 * (this way, it's possible to set both channels at once)
55 */
56static int max517_set_value(struct iio_dev *indio_dev,
57 long val, int channel)
58{
59 struct max517_data *data = iio_priv(indio_dev);
60 struct i2c_client *client = data->client;
61 u8 outbuf[2];
62 int res;
63
64 if (val < 0 || val > 255)
65 return -EINVAL;
66
67 outbuf[0] = channel;
68 outbuf[1] = val;
69
70 res = i2c_master_send(client, outbuf, 2);
71 if (res < 0)
72 return res;
73 else if (res != 2)
74 return -EIO;
75 else
76 return 0;
77}
78
79static int max517_read_raw(struct iio_dev *indio_dev,
80 struct iio_chan_spec const *chan,
81 int *val,
82 int *val2,
83 long m)
84{
85 struct max517_data *data = iio_priv(indio_dev);
86 unsigned int scale_uv;
87
88 switch (m) {
89 case IIO_CHAN_INFO_SCALE:
90 /* Corresponds to Vref / 2^(bits) */
91 scale_uv = (data->vref_mv[chan->channel] * 1000) >> 8;
92 *val = scale_uv / 1000000;
93 *val2 = scale_uv % 1000000;
94 return IIO_VAL_INT_PLUS_MICRO;
95 default:
96 break;
97 }
98 return -EINVAL;
99}
100
101static int max517_write_raw(struct iio_dev *indio_dev,
102 struct iio_chan_spec const *chan, int val, int val2, long mask)
103{
104 int ret;
105
106 switch (mask) {
107 case IIO_CHAN_INFO_RAW:
108 ret = max517_set_value(indio_dev, val, chan->channel);
109 break;
110 default:
111 ret = -EINVAL;
112 break;
113 }
114
115 return ret;
116}
117
118#ifdef CONFIG_PM_SLEEP
119static int max517_suspend(struct device *dev)
120{
121 u8 outbuf = COMMAND_PD;
122
123 return i2c_master_send(to_i2c_client(dev), &outbuf, 1);
124}
125
126static int max517_resume(struct device *dev)
127{
128 u8 outbuf = 0;
129
130 return i2c_master_send(to_i2c_client(dev), &outbuf, 1);
131}
132
133static SIMPLE_DEV_PM_OPS(max517_pm_ops, max517_suspend, max517_resume);
134#define MAX517_PM_OPS (&max517_pm_ops)
135#else
136#define MAX517_PM_OPS NULL
137#endif
138
139static const struct iio_info max517_info = {
140 .read_raw = max517_read_raw,
141 .write_raw = max517_write_raw,
142 .driver_module = THIS_MODULE,
143};
144
145#define MAX517_CHANNEL(chan) { \
146 .type = IIO_VOLTAGE, \
147 .indexed = 1, \
148 .output = 1, \
149 .channel = (chan), \
150 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
151 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \
152 .scan_type = IIO_ST('u', 8, 8, 0), \
153}
154
155static const struct iio_chan_spec max517_channels[] = {
156 MAX517_CHANNEL(0),
157 MAX517_CHANNEL(1)
158};
159
160static int max517_probe(struct i2c_client *client,
161 const struct i2c_device_id *id)
162{
163 struct max517_data *data;
164 struct iio_dev *indio_dev;
165 struct max517_platform_data *platform_data = client->dev.platform_data;
166 int err;
167
168 indio_dev = iio_device_alloc(sizeof(*data));
169 if (indio_dev == NULL) {
170 err = -ENOMEM;
171 goto exit;
172 }
173 data = iio_priv(indio_dev);
174 i2c_set_clientdata(client, indio_dev);
175 data->client = client;
176
177 /* establish that the iio_dev is a child of the i2c device */
178 indio_dev->dev.parent = &client->dev;
179
180 /* reduced channel set for MAX517 */
181 if (id->driver_data == ID_MAX517)
182 indio_dev->num_channels = 1;
183 else
184 indio_dev->num_channels = 2;
185 indio_dev->channels = max517_channels;
186 indio_dev->modes = INDIO_DIRECT_MODE;
187 indio_dev->info = &max517_info;
188
189 /*
190 * Reference voltage on MAX518 and default is 5V, else take vref_mv
191 * from platform_data
192 */
193 if (id->driver_data == ID_MAX518 || !platform_data) {
194 data->vref_mv[0] = data->vref_mv[1] = 5000; /* mV */
195 } else {
196 data->vref_mv[0] = platform_data->vref_mv[0];
197 data->vref_mv[1] = platform_data->vref_mv[1];
198 }
199
200 err = iio_device_register(indio_dev);
201 if (err)
202 goto exit_free_device;
203
204 dev_info(&client->dev, "DAC registered\n");
205
206 return 0;
207
208exit_free_device:
209 iio_device_free(indio_dev);
210exit:
211 return err;
212}
213
214static int max517_remove(struct i2c_client *client)
215{
216 iio_device_unregister(i2c_get_clientdata(client));
217 iio_device_free(i2c_get_clientdata(client));
218
219 return 0;
220}
221
222static const struct i2c_device_id max517_id[] = {
223 { "max517", ID_MAX517 },
224 { "max518", ID_MAX518 },
225 { "max519", ID_MAX519 },
226 { }
227};
228MODULE_DEVICE_TABLE(i2c, max517_id);
229
230static struct i2c_driver max517_driver = {
231 .driver = {
232 .name = MAX517_DRV_NAME,
233 .pm = MAX517_PM_OPS,
234 },
235 .probe = max517_probe,
236 .remove = max517_remove,
237 .id_table = max517_id,
238};
239module_i2c_driver(max517_driver);
240
241MODULE_AUTHOR("Roland Stigge <stigge@antcom.de>");
242MODULE_DESCRIPTION("MAX517/MAX518/MAX519 8-bit DAC");
243MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 13:16:14 -0500