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-rw-r--r--drivers/iio/adc/Kconfig22
-rw-r--r--drivers/iio/adc/Makefile3
-rw-r--r--drivers/iio/adc/ad7793.c876
-rw-r--r--drivers/iio/adc/ti-adc081c.c161
-rw-r--r--drivers/iio/gyro/adis16136.c5
-rw-r--r--drivers/iio/imu/adis16480.c5
6 files changed, 1066 insertions, 6 deletions
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index cd5eed60be28..961b8d0a4bac 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -42,6 +42,18 @@ config AD7791
42 To compile this driver as a module, choose M here: the module will be 42 To compile this driver as a module, choose M here: the module will be
43 called ad7791. 43 called ad7791.
44 44
45config AD7793
46 tristate "Analog Devices AD7793 and similar ADCs driver"
47 depends on SPI
48 select AD_SIGMA_DELTA
49 help
50 Say yes here to build support for Analog Devices AD7785, AD7792, AD7793,
51 AD7794 and AD7795 SPI analog to digital converters (ADC).
52 If unsure, say N (but it's safe to say "Y").
53
54 To compile this driver as a module, choose M here: the
55 module will be called AD7793.
56
45config AD7476 57config AD7476
46 tristate "Analog Devices AD7476 and similar 1-channel ADCs driver" 58 tristate "Analog Devices AD7476 and similar 1-channel ADCs driver"
47 depends on SPI 59 depends on SPI
@@ -103,4 +115,14 @@ config MAX1363
103 max11646, max11647) Provides direct access via sysfs and buffered 115 max11646, max11647) Provides direct access via sysfs and buffered
104 data via the iio dev interface. 116 data via the iio dev interface.
105 117
118config TI_ADC081C
119 tristate "Texas Instruments ADC081C021/027"
120 depends on I2C
121 help
122 If you say yes here you get support for Texas Instruments ADC081C021
123 and ADC081C027 ADC chips.
124
125 This driver can also be built as a module. If so, the module will be
126 called ti-adc081c.
127
106endmenu 128endmenu
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 3256dc64a466..472fd7cd2417 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -7,7 +7,10 @@ obj-$(CONFIG_AD7266) += ad7266.o
7obj-$(CONFIG_AD7298) += ad7298.o 7obj-$(CONFIG_AD7298) += ad7298.o
8obj-$(CONFIG_AD7476) += ad7476.o 8obj-$(CONFIG_AD7476) += ad7476.o
9obj-$(CONFIG_AD7791) += ad7791.o 9obj-$(CONFIG_AD7791) += ad7791.o
10obj-$(CONFIG_AD7793) += ad7793.o
10obj-$(CONFIG_AD7887) += ad7887.o 11obj-$(CONFIG_AD7887) += ad7887.o
11obj-$(CONFIG_AT91_ADC) += at91_adc.o 12obj-$(CONFIG_AT91_ADC) += at91_adc.o
12obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o 13obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
13obj-$(CONFIG_MAX1363) += max1363.o 14obj-$(CONFIG_MAX1363) += max1363.o
15obj-$(CONFIG_TI_ADC081C) += ti-adc081c.o
16
diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c
new file mode 100644
index 000000000000..334e31ff7a4e
--- /dev/null
+++ b/drivers/iio/adc/ad7793.c
@@ -0,0 +1,876 @@
1/*
2 * AD7785/AD7792/AD7793/AD7794/AD7795 SPI ADC driver
3 *
4 * Copyright 2011-2012 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/sysfs.h>
14#include <linux/spi/spi.h>
15#include <linux/regulator/consumer.h>
16#include <linux/err.h>
17#include <linux/sched.h>
18#include <linux/delay.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include <linux/iio/buffer.h>
24#include <linux/iio/trigger.h>
25#include <linux/iio/trigger_consumer.h>
26#include <linux/iio/triggered_buffer.h>
27#include <linux/iio/adc/ad_sigma_delta.h>
28#include <linux/platform_data/ad7793.h>
29
30/* Registers */
31#define AD7793_REG_COMM 0 /* Communications Register (WO, 8-bit) */
32#define AD7793_REG_STAT 0 /* Status Register (RO, 8-bit) */
33#define AD7793_REG_MODE 1 /* Mode Register (RW, 16-bit */
34#define AD7793_REG_CONF 2 /* Configuration Register (RW, 16-bit) */
35#define AD7793_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
36#define AD7793_REG_ID 4 /* ID Register (RO, 8-bit) */
37#define AD7793_REG_IO 5 /* IO Register (RO, 8-bit) */
38#define AD7793_REG_OFFSET 6 /* Offset Register (RW, 16-bit
39 * (AD7792)/24-bit (AD7793)) */
40#define AD7793_REG_FULLSALE 7 /* Full-Scale Register
41 * (RW, 16-bit (AD7792)/24-bit (AD7793)) */
42
43/* Communications Register Bit Designations (AD7793_REG_COMM) */
44#define AD7793_COMM_WEN (1 << 7) /* Write Enable */
45#define AD7793_COMM_WRITE (0 << 6) /* Write Operation */
46#define AD7793_COMM_READ (1 << 6) /* Read Operation */
47#define AD7793_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
48#define AD7793_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
49
50/* Status Register Bit Designations (AD7793_REG_STAT) */
51#define AD7793_STAT_RDY (1 << 7) /* Ready */
52#define AD7793_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
53#define AD7793_STAT_CH3 (1 << 2) /* Channel 3 */
54#define AD7793_STAT_CH2 (1 << 1) /* Channel 2 */
55#define AD7793_STAT_CH1 (1 << 0) /* Channel 1 */
56
57/* Mode Register Bit Designations (AD7793_REG_MODE) */
58#define AD7793_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */
59#define AD7793_MODE_SEL_MASK (0x7 << 13) /* Operation Mode Select mask */
60#define AD7793_MODE_CLKSRC(x) (((x) & 0x3) << 6) /* ADC Clock Source Select */
61#define AD7793_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */
62
63#define AD7793_MODE_CONT 0 /* Continuous Conversion Mode */
64#define AD7793_MODE_SINGLE 1 /* Single Conversion Mode */
65#define AD7793_MODE_IDLE 2 /* Idle Mode */
66#define AD7793_MODE_PWRDN 3 /* Power-Down Mode */
67#define AD7793_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */
68#define AD7793_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */
69#define AD7793_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */
70#define AD7793_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */
71
72#define AD7793_CLK_INT 0 /* Internal 64 kHz Clock not
73 * available at the CLK pin */
74#define AD7793_CLK_INT_CO 1 /* Internal 64 kHz Clock available
75 * at the CLK pin */
76#define AD7793_CLK_EXT 2 /* External 64 kHz Clock */
77#define AD7793_CLK_EXT_DIV2 3 /* External Clock divided by 2 */
78
79/* Configuration Register Bit Designations (AD7793_REG_CONF) */
80#define AD7793_CONF_VBIAS(x) (((x) & 0x3) << 14) /* Bias Voltage
81 * Generator Enable */
82#define AD7793_CONF_BO_EN (1 << 13) /* Burnout Current Enable */
83#define AD7793_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */
84#define AD7793_CONF_BOOST (1 << 11) /* Boost Enable */
85#define AD7793_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */
86#define AD7793_CONF_REFSEL(x) ((x) << 6) /* INT/EXT Reference Select */
87#define AD7793_CONF_BUF (1 << 4) /* Buffered Mode Enable */
88#define AD7793_CONF_CHAN(x) ((x) & 0xf) /* Channel select */
89#define AD7793_CONF_CHAN_MASK 0xf /* Channel select mask */
90
91#define AD7793_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */
92#define AD7793_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */
93#define AD7793_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */
94#define AD7793_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */
95#define AD7793_CH_TEMP 6 /* Temp Sensor */
96#define AD7793_CH_AVDD_MONITOR 7 /* AVDD Monitor */
97
98#define AD7795_CH_AIN4P_AIN4M 4 /* AIN4(+) - AIN4(-) */
99#define AD7795_CH_AIN5P_AIN5M 5 /* AIN5(+) - AIN5(-) */
100#define AD7795_CH_AIN6P_AIN6M 6 /* AIN6(+) - AIN6(-) */
101#define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */
102
103/* ID Register Bit Designations (AD7793_REG_ID) */
104#define AD7785_ID 0xB
105#define AD7792_ID 0xA
106#define AD7793_ID 0xB
107#define AD7794_ID 0xF
108#define AD7795_ID 0xF
109#define AD7796_ID 0xA
110#define AD7797_ID 0xB
111#define AD7798_ID 0x8
112#define AD7799_ID 0x9
113#define AD7793_ID_MASK 0xF
114
115/* IO (Excitation Current Sources) Register Bit Designations (AD7793_REG_IO) */
116#define AD7793_IO_IEXC1_IOUT1_IEXC2_IOUT2 0 /* IEXC1 connect to IOUT1,
117 * IEXC2 connect to IOUT2 */
118#define AD7793_IO_IEXC1_IOUT2_IEXC2_IOUT1 1 /* IEXC1 connect to IOUT2,
119 * IEXC2 connect to IOUT1 */
120#define AD7793_IO_IEXC1_IEXC2_IOUT1 2 /* Both current sources
121 * IEXC1,2 connect to IOUT1 */
122#define AD7793_IO_IEXC1_IEXC2_IOUT2 3 /* Both current sources
123 * IEXC1,2 connect to IOUT2 */
124
125#define AD7793_IO_IXCEN_10uA (1 << 0) /* Excitation Current 10uA */
126#define AD7793_IO_IXCEN_210uA (2 << 0) /* Excitation Current 210uA */
127#define AD7793_IO_IXCEN_1mA (3 << 0) /* Excitation Current 1mA */
128
129/* NOTE:
130 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
131 * In order to avoid contentions on the SPI bus, it's therefore necessary
132 * to use spi bus locking.
133 *
134 * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
135 */
136
137#define AD7793_FLAG_HAS_CLKSEL BIT(0)
138#define AD7793_FLAG_HAS_REFSEL BIT(1)
139#define AD7793_FLAG_HAS_VBIAS BIT(2)
140#define AD7793_HAS_EXITATION_CURRENT BIT(3)
141#define AD7793_FLAG_HAS_GAIN BIT(4)
142#define AD7793_FLAG_HAS_BUFFER BIT(5)
143
144struct ad7793_chip_info {
145 unsigned int id;
146 const struct iio_chan_spec *channels;
147 unsigned int num_channels;
148 unsigned int flags;
149
150 const struct iio_info *iio_info;
151 const u16 *sample_freq_avail;
152};
153
154struct ad7793_state {
155 const struct ad7793_chip_info *chip_info;
156 struct regulator *reg;
157 u16 int_vref_mv;
158 u16 mode;
159 u16 conf;
160 u32 scale_avail[8][2];
161
162 struct ad_sigma_delta sd;
163
164};
165
166enum ad7793_supported_device_ids {
167 ID_AD7785,
168 ID_AD7792,
169 ID_AD7793,
170 ID_AD7794,
171 ID_AD7795,
172 ID_AD7796,
173 ID_AD7797,
174 ID_AD7798,
175 ID_AD7799,
176};
177
178static struct ad7793_state *ad_sigma_delta_to_ad7793(struct ad_sigma_delta *sd)
179{
180 return container_of(sd, struct ad7793_state, sd);
181}
182
183static int ad7793_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
184{
185 struct ad7793_state *st = ad_sigma_delta_to_ad7793(sd);
186
187 st->conf &= ~AD7793_CONF_CHAN_MASK;
188 st->conf |= AD7793_CONF_CHAN(channel);
189
190 return ad_sd_write_reg(&st->sd, AD7793_REG_CONF, 2, st->conf);
191}
192
193static int ad7793_set_mode(struct ad_sigma_delta *sd,
194 enum ad_sigma_delta_mode mode)
195{
196 struct ad7793_state *st = ad_sigma_delta_to_ad7793(sd);
197
198 st->mode &= ~AD7793_MODE_SEL_MASK;
199 st->mode |= AD7793_MODE_SEL(mode);
200
201 return ad_sd_write_reg(&st->sd, AD7793_REG_MODE, 2, st->mode);
202}
203
204static const struct ad_sigma_delta_info ad7793_sigma_delta_info = {
205 .set_channel = ad7793_set_channel,
206 .set_mode = ad7793_set_mode,
207 .has_registers = true,
208 .addr_shift = 3,
209 .read_mask = BIT(6),
210};
211
212static const struct ad_sd_calib_data ad7793_calib_arr[6] = {
213 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
214 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
215 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
216 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
217 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
218 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
219};
220
221static int ad7793_calibrate_all(struct ad7793_state *st)
222{
223 return ad_sd_calibrate_all(&st->sd, ad7793_calib_arr,
224 ARRAY_SIZE(ad7793_calib_arr));
225}
226
227static int ad7793_check_platform_data(struct ad7793_state *st,
228 const struct ad7793_platform_data *pdata)
229{
230 if ((pdata->current_source_direction == AD7793_IEXEC1_IEXEC2_IOUT1 ||
231 pdata->current_source_direction == AD7793_IEXEC1_IEXEC2_IOUT2) &&
232 ((pdata->exitation_current != AD7793_IX_10uA) &&
233 (pdata->exitation_current != AD7793_IX_210uA)))
234 return -EINVAL;
235
236 if (!(st->chip_info->flags & AD7793_FLAG_HAS_CLKSEL) &&
237 pdata->clock_src != AD7793_CLK_SRC_INT)
238 return -EINVAL;
239
240 if (!(st->chip_info->flags & AD7793_FLAG_HAS_REFSEL) &&
241 pdata->refsel != AD7793_REFSEL_REFIN1)
242 return -EINVAL;
243
244 if (!(st->chip_info->flags & AD7793_FLAG_HAS_VBIAS) &&
245 pdata->bias_voltage != AD7793_BIAS_VOLTAGE_DISABLED)
246 return -EINVAL;
247
248 if (!(st->chip_info->flags & AD7793_HAS_EXITATION_CURRENT) &&
249 pdata->exitation_current != AD7793_IX_DISABLED)
250 return -EINVAL;
251
252 return 0;
253}
254
255static int ad7793_setup(struct iio_dev *indio_dev,
256 const struct ad7793_platform_data *pdata,
257 unsigned int vref_mv)
258{
259 struct ad7793_state *st = iio_priv(indio_dev);
260 int i, ret = -1;
261 unsigned long long scale_uv;
262 u32 id;
263
264 ret = ad7793_check_platform_data(st, pdata);
265 if (ret)
266 return ret;
267
268 /* reset the serial interface */
269 ret = spi_write(st->sd.spi, (u8 *)&ret, sizeof(ret));
270 if (ret < 0)
271 goto out;
272 usleep_range(500, 2000); /* Wait for at least 500us */
273
274 /* write/read test for device presence */
275 ret = ad_sd_read_reg(&st->sd, AD7793_REG_ID, 1, &id);
276 if (ret)
277 goto out;
278
279 id &= AD7793_ID_MASK;
280
281 if (id != st->chip_info->id) {
282 dev_err(&st->sd.spi->dev, "device ID query failed\n");
283 goto out;
284 }
285
286 st->mode = AD7793_MODE_RATE(1);
287 st->conf = 0;
288
289 if (st->chip_info->flags & AD7793_FLAG_HAS_CLKSEL)
290 st->mode |= AD7793_MODE_CLKSRC(pdata->clock_src);
291 if (st->chip_info->flags & AD7793_FLAG_HAS_REFSEL)
292 st->conf |= AD7793_CONF_REFSEL(pdata->refsel);
293 if (st->chip_info->flags & AD7793_FLAG_HAS_VBIAS)
294 st->conf |= AD7793_CONF_VBIAS(pdata->bias_voltage);
295 if (pdata->buffered || !(st->chip_info->flags & AD7793_FLAG_HAS_BUFFER))
296 st->conf |= AD7793_CONF_BUF;
297 if (pdata->boost_enable &&
298 (st->chip_info->flags & AD7793_FLAG_HAS_VBIAS))
299 st->conf |= AD7793_CONF_BOOST;
300 if (pdata->burnout_current)
301 st->conf |= AD7793_CONF_BO_EN;
302 if (pdata->unipolar)
303 st->conf |= AD7793_CONF_UNIPOLAR;
304
305 if (!(st->chip_info->flags & AD7793_FLAG_HAS_GAIN))
306 st->conf |= AD7793_CONF_GAIN(7);
307
308 ret = ad7793_set_mode(&st->sd, AD_SD_MODE_IDLE);
309 if (ret)
310 goto out;
311
312 ret = ad7793_set_channel(&st->sd, 0);
313 if (ret)
314 goto out;
315
316 if (st->chip_info->flags & AD7793_HAS_EXITATION_CURRENT) {
317 ret = ad_sd_write_reg(&st->sd, AD7793_REG_IO, 1,
318 pdata->exitation_current |
319 (pdata->current_source_direction << 2));
320 if (ret)
321 goto out;
322 }
323
324 ret = ad7793_calibrate_all(st);
325 if (ret)
326 goto out;
327
328 /* Populate available ADC input ranges */
329 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
330 scale_uv = ((u64)vref_mv * 100000000)
331 >> (st->chip_info->channels[0].scan_type.realbits -
332 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
333 scale_uv >>= i;
334
335 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
336 st->scale_avail[i][0] = scale_uv;
337 }
338
339 return 0;
340out:
341 dev_err(&st->sd.spi->dev, "setup failed\n");
342 return ret;
343}
344
345static const u16 ad7793_sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39,
346 33, 19, 17, 16, 12, 10, 8, 6, 4};
347
348static const u16 ad7797_sample_freq_avail[16] = {0, 0, 0, 123, 62, 50, 0,
349 33, 0, 17, 16, 12, 10, 8, 6, 4};
350
351static ssize_t ad7793_read_frequency(struct device *dev,
352 struct device_attribute *attr,
353 char *buf)
354{
355 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
356 struct ad7793_state *st = iio_priv(indio_dev);
357
358 return sprintf(buf, "%d\n",
359 st->chip_info->sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
360}
361
362static ssize_t ad7793_write_frequency(struct device *dev,
363 struct device_attribute *attr,
364 const char *buf,
365 size_t len)
366{
367 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
368 struct ad7793_state *st = iio_priv(indio_dev);
369 long lval;
370 int i, ret;
371
372 mutex_lock(&indio_dev->mlock);
373 if (iio_buffer_enabled(indio_dev)) {
374 mutex_unlock(&indio_dev->mlock);
375 return -EBUSY;
376 }
377 mutex_unlock(&indio_dev->mlock);
378
379 ret = kstrtol(buf, 10, &lval);
380 if (ret)
381 return ret;
382
383 if (lval == 0)
384 return -EINVAL;
385
386 ret = -EINVAL;
387
388 for (i = 0; i < 16; i++)
389 if (lval == st->chip_info->sample_freq_avail[i]) {
390 mutex_lock(&indio_dev->mlock);
391 st->mode &= ~AD7793_MODE_RATE(-1);
392 st->mode |= AD7793_MODE_RATE(i);
393 ad_sd_write_reg(&st->sd, AD7793_REG_MODE,
394 sizeof(st->mode), st->mode);
395 mutex_unlock(&indio_dev->mlock);
396 ret = 0;
397 }
398
399 return ret ? ret : len;
400}
401
402static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
403 ad7793_read_frequency,
404 ad7793_write_frequency);
405
406static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
407 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
408
409static IIO_CONST_ATTR_NAMED(sampling_frequency_available_ad7797,
410 sampling_frequency_available, "123 62 50 33 17 16 12 10 8 6 4");
411
412static ssize_t ad7793_show_scale_available(struct device *dev,
413 struct device_attribute *attr, char *buf)
414{
415 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
416 struct ad7793_state *st = iio_priv(indio_dev);
417 int i, len = 0;
418
419 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
420 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
421 st->scale_avail[i][1]);
422
423 len += sprintf(buf + len, "\n");
424
425 return len;
426}
427
428static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available,
429 in_voltage-voltage_scale_available, S_IRUGO,
430 ad7793_show_scale_available, NULL, 0);
431
432static struct attribute *ad7793_attributes[] = {
433 &iio_dev_attr_sampling_frequency.dev_attr.attr,
434 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
435 &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
436 NULL
437};
438
439static const struct attribute_group ad7793_attribute_group = {
440 .attrs = ad7793_attributes,
441};
442
443static struct attribute *ad7797_attributes[] = {
444 &iio_dev_attr_sampling_frequency.dev_attr.attr,
445 &iio_const_attr_sampling_frequency_available_ad7797.dev_attr.attr,
446 NULL
447};
448
449static const struct attribute_group ad7797_attribute_group = {
450 .attrs = ad7797_attributes,
451};
452
453static int ad7793_read_raw(struct iio_dev *indio_dev,
454 struct iio_chan_spec const *chan,
455 int *val,
456 int *val2,
457 long m)
458{
459 struct ad7793_state *st = iio_priv(indio_dev);
460 int ret;
461 unsigned long long scale_uv;
462 bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
463
464 switch (m) {
465 case IIO_CHAN_INFO_RAW:
466 ret = ad_sigma_delta_single_conversion(indio_dev, chan, val);
467 if (ret < 0)
468 return ret;
469
470 return IIO_VAL_INT;
471
472 case IIO_CHAN_INFO_SCALE:
473 switch (chan->type) {
474 case IIO_VOLTAGE:
475 if (chan->differential) {
476 *val = st->
477 scale_avail[(st->conf >> 8) & 0x7][0];
478 *val2 = st->
479 scale_avail[(st->conf >> 8) & 0x7][1];
480 return IIO_VAL_INT_PLUS_NANO;
481 } else {
482 /* 1170mV / 2^23 * 6 */
483 scale_uv = (1170ULL * 1000000000ULL * 6ULL);
484 }
485 break;
486 case IIO_TEMP:
487 /* 1170mV / 0.81 mV/C / 2^23 */
488 scale_uv = 1444444444444444ULL;
489 break;
490 default:
491 return -EINVAL;
492 }
493
494 scale_uv >>= (chan->scan_type.realbits - (unipolar ? 0 : 1));
495 *val = 0;
496 *val2 = scale_uv;
497 return IIO_VAL_INT_PLUS_NANO;
498 case IIO_CHAN_INFO_OFFSET:
499 if (!unipolar)
500 *val = -(1 << (chan->scan_type.realbits - 1));
501 else
502 *val = 0;
503
504 /* Kelvin to Celsius */
505 if (chan->type == IIO_TEMP) {
506 unsigned long long offset;
507 unsigned int shift;
508
509 shift = chan->scan_type.realbits - (unipolar ? 0 : 1);
510 offset = 273ULL << shift;
511 do_div(offset, 1444);
512 *val -= offset;
513 }
514 return IIO_VAL_INT;
515 }
516 return -EINVAL;
517}
518
519static int ad7793_write_raw(struct iio_dev *indio_dev,
520 struct iio_chan_spec const *chan,
521 int val,
522 int val2,
523 long mask)
524{
525 struct ad7793_state *st = iio_priv(indio_dev);
526 int ret, i;
527 unsigned int tmp;
528
529 mutex_lock(&indio_dev->mlock);
530 if (iio_buffer_enabled(indio_dev)) {
531 mutex_unlock(&indio_dev->mlock);
532 return -EBUSY;
533 }
534
535 switch (mask) {
536 case IIO_CHAN_INFO_SCALE:
537 ret = -EINVAL;
538 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
539 if (val2 == st->scale_avail[i][1]) {
540 ret = 0;
541 tmp = st->conf;
542 st->conf &= ~AD7793_CONF_GAIN(-1);
543 st->conf |= AD7793_CONF_GAIN(i);
544
545 if (tmp == st->conf)
546 break;
547
548 ad_sd_write_reg(&st->sd, AD7793_REG_CONF,
549 sizeof(st->conf), st->conf);
550 ad7793_calibrate_all(st);
551 break;
552 }
553 break;
554 default:
555 ret = -EINVAL;
556 }
557
558 mutex_unlock(&indio_dev->mlock);
559 return ret;
560}
561
562static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
563 struct iio_chan_spec const *chan,
564 long mask)
565{
566 return IIO_VAL_INT_PLUS_NANO;
567}
568
569static const struct iio_info ad7793_info = {
570 .read_raw = &ad7793_read_raw,
571 .write_raw = &ad7793_write_raw,
572 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
573 .attrs = &ad7793_attribute_group,
574 .validate_trigger = ad_sd_validate_trigger,
575 .driver_module = THIS_MODULE,
576};
577
578static const struct iio_info ad7797_info = {
579 .read_raw = &ad7793_read_raw,
580 .write_raw = &ad7793_write_raw,
581 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
582 .attrs = &ad7793_attribute_group,
583 .validate_trigger = ad_sd_validate_trigger,
584 .driver_module = THIS_MODULE,
585};
586
587#define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \
588const struct iio_chan_spec _name##_channels[] = { \
589 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \
590 AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), (_s)), \
591 AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), (_s)), \
592 AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), (_s)), \
593 AD_SD_TEMP_CHANNEL(4, AD7793_CH_TEMP, (_b), (_sb), (_s)), \
594 AD_SD_SUPPLY_CHANNEL(5, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), (_s)), \
595 IIO_CHAN_SOFT_TIMESTAMP(6), \
596}
597
598#define DECLARE_AD7795_CHANNELS(_name, _b, _sb) \
599const struct iio_chan_spec _name##_channels[] = { \
600 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
601 AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \
602 AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \
603 AD_SD_DIFF_CHANNEL(3, 3, 3, AD7795_CH_AIN4P_AIN4M, (_b), (_sb), 0), \
604 AD_SD_DIFF_CHANNEL(4, 4, 4, AD7795_CH_AIN5P_AIN5M, (_b), (_sb), 0), \
605 AD_SD_DIFF_CHANNEL(5, 5, 5, AD7795_CH_AIN6P_AIN6M, (_b), (_sb), 0), \
606 AD_SD_SHORTED_CHANNEL(6, 0, AD7795_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
607 AD_SD_TEMP_CHANNEL(7, AD7793_CH_TEMP, (_b), (_sb), 0), \
608 AD_SD_SUPPLY_CHANNEL(8, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
609 IIO_CHAN_SOFT_TIMESTAMP(9), \
610}
611
612#define DECLARE_AD7797_CHANNELS(_name, _b, _sb) \
613const struct iio_chan_spec _name##_channels[] = { \
614 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
615 AD_SD_SHORTED_CHANNEL(1, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
616 AD_SD_TEMP_CHANNEL(2, AD7793_CH_TEMP, (_b), (_sb), 0), \
617 AD_SD_SUPPLY_CHANNEL(3, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
618 IIO_CHAN_SOFT_TIMESTAMP(4), \
619}
620
621#define DECLARE_AD7799_CHANNELS(_name, _b, _sb) \
622const struct iio_chan_spec _name##_channels[] = { \
623 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
624 AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \
625 AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \
626 AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
627 AD_SD_SUPPLY_CHANNEL(4, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
628 IIO_CHAN_SOFT_TIMESTAMP(5), \
629}
630
631static DECLARE_AD7793_CHANNELS(ad7785, 20, 32, 4);
632static DECLARE_AD7793_CHANNELS(ad7792, 16, 32, 0);
633static DECLARE_AD7793_CHANNELS(ad7793, 24, 32, 0);
634static DECLARE_AD7795_CHANNELS(ad7794, 16, 32);
635static DECLARE_AD7795_CHANNELS(ad7795, 24, 32);
636static DECLARE_AD7797_CHANNELS(ad7796, 16, 16);
637static DECLARE_AD7797_CHANNELS(ad7797, 24, 32);
638static DECLARE_AD7799_CHANNELS(ad7798, 16, 16);
639static DECLARE_AD7799_CHANNELS(ad7799, 24, 32);
640
641static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
642 [ID_AD7785] = {
643 .id = AD7785_ID,
644 .channels = ad7785_channels,
645 .num_channels = ARRAY_SIZE(ad7785_channels),
646 .iio_info = &ad7793_info,
647 .sample_freq_avail = ad7793_sample_freq_avail,
648 .flags = AD7793_FLAG_HAS_CLKSEL |
649 AD7793_FLAG_HAS_REFSEL |
650 AD7793_FLAG_HAS_VBIAS |
651 AD7793_HAS_EXITATION_CURRENT |
652 AD7793_FLAG_HAS_GAIN |
653 AD7793_FLAG_HAS_BUFFER,
654 },
655 [ID_AD7792] = {
656 .id = AD7792_ID,
657 .channels = ad7792_channels,
658 .num_channels = ARRAY_SIZE(ad7792_channels),
659 .iio_info = &ad7793_info,
660 .sample_freq_avail = ad7793_sample_freq_avail,
661 .flags = AD7793_FLAG_HAS_CLKSEL |
662 AD7793_FLAG_HAS_REFSEL |
663 AD7793_FLAG_HAS_VBIAS |
664 AD7793_HAS_EXITATION_CURRENT |
665 AD7793_FLAG_HAS_GAIN |
666 AD7793_FLAG_HAS_BUFFER,
667 },
668 [ID_AD7793] = {
669 .id = AD7793_ID,
670 .channels = ad7793_channels,
671 .num_channels = ARRAY_SIZE(ad7793_channels),
672 .iio_info = &ad7793_info,
673 .sample_freq_avail = ad7793_sample_freq_avail,
674 .flags = AD7793_FLAG_HAS_CLKSEL |
675 AD7793_FLAG_HAS_REFSEL |
676 AD7793_FLAG_HAS_VBIAS |
677 AD7793_HAS_EXITATION_CURRENT |
678 AD7793_FLAG_HAS_GAIN |
679 AD7793_FLAG_HAS_BUFFER,
680 },
681 [ID_AD7794] = {
682 .id = AD7794_ID,
683 .channels = ad7794_channels,
684 .num_channels = ARRAY_SIZE(ad7794_channels),
685 .iio_info = &ad7793_info,
686 .sample_freq_avail = ad7793_sample_freq_avail,
687 .flags = AD7793_FLAG_HAS_CLKSEL |
688 AD7793_FLAG_HAS_REFSEL |
689 AD7793_FLAG_HAS_VBIAS |
690 AD7793_HAS_EXITATION_CURRENT |
691 AD7793_FLAG_HAS_GAIN |
692 AD7793_FLAG_HAS_BUFFER,
693 },
694 [ID_AD7795] = {
695 .id = AD7795_ID,
696 .channels = ad7795_channels,
697 .num_channels = ARRAY_SIZE(ad7795_channels),
698 .iio_info = &ad7793_info,
699 .sample_freq_avail = ad7793_sample_freq_avail,
700 .flags = AD7793_FLAG_HAS_CLKSEL |
701 AD7793_FLAG_HAS_REFSEL |
702 AD7793_FLAG_HAS_VBIAS |
703 AD7793_HAS_EXITATION_CURRENT |
704 AD7793_FLAG_HAS_GAIN |
705 AD7793_FLAG_HAS_BUFFER,
706 },
707 [ID_AD7796] = {
708 .id = AD7796_ID,
709 .channels = ad7796_channels,
710 .num_channels = ARRAY_SIZE(ad7796_channels),
711 .iio_info = &ad7797_info,
712 .sample_freq_avail = ad7797_sample_freq_avail,
713 .flags = AD7793_FLAG_HAS_CLKSEL,
714 },
715 [ID_AD7797] = {
716 .id = AD7797_ID,
717 .channels = ad7797_channels,
718 .num_channels = ARRAY_SIZE(ad7797_channels),
719 .iio_info = &ad7797_info,
720 .sample_freq_avail = ad7797_sample_freq_avail,
721 .flags = AD7793_FLAG_HAS_CLKSEL,
722 },
723 [ID_AD7798] = {
724 .id = AD7798_ID,
725 .channels = ad7798_channels,
726 .num_channels = ARRAY_SIZE(ad7798_channels),
727 .iio_info = &ad7793_info,
728 .sample_freq_avail = ad7793_sample_freq_avail,
729 .flags = AD7793_FLAG_HAS_GAIN |
730 AD7793_FLAG_HAS_BUFFER,
731 },
732 [ID_AD7799] = {
733 .id = AD7799_ID,
734 .channels = ad7799_channels,
735 .num_channels = ARRAY_SIZE(ad7799_channels),
736 .iio_info = &ad7793_info,
737 .sample_freq_avail = ad7793_sample_freq_avail,
738 .flags = AD7793_FLAG_HAS_GAIN |
739 AD7793_FLAG_HAS_BUFFER,
740 },
741};
742
743static int ad7793_probe(struct spi_device *spi)
744{
745 const struct ad7793_platform_data *pdata = spi->dev.platform_data;
746 struct ad7793_state *st;
747 struct iio_dev *indio_dev;
748 int ret, vref_mv = 0;
749
750 if (!pdata) {
751 dev_err(&spi->dev, "no platform data?\n");
752 return -ENODEV;
753 }
754
755 if (!spi->irq) {
756 dev_err(&spi->dev, "no IRQ?\n");
757 return -ENODEV;
758 }
759
760 indio_dev = iio_device_alloc(sizeof(*st));
761 if (indio_dev == NULL)
762 return -ENOMEM;
763
764 st = iio_priv(indio_dev);
765
766 ad_sd_init(&st->sd, indio_dev, spi, &ad7793_sigma_delta_info);
767
768 if (pdata->refsel != AD7793_REFSEL_INTERNAL) {
769 st->reg = regulator_get(&spi->dev, "refin");
770 if (IS_ERR(st->reg)) {
771 ret = PTR_ERR(st->reg);
772 goto error_device_free;
773 }
774
775 ret = regulator_enable(st->reg);
776 if (ret)
777 goto error_put_reg;
778
779 vref_mv = regulator_get_voltage(st->reg);
780 if (vref_mv < 0) {
781 ret = vref_mv;
782 goto error_disable_reg;
783 }
784
785 vref_mv /= 1000;
786 } else {
787 vref_mv = 1170; /* Build-in ref */
788 }
789
790 st->chip_info =
791 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
792
793 spi_set_drvdata(spi, indio_dev);
794
795 indio_dev->dev.parent = &spi->dev;
796 indio_dev->name = spi_get_device_id(spi)->name;
797 indio_dev->modes = INDIO_DIRECT_MODE;
798 indio_dev->channels = st->chip_info->channels;
799 indio_dev->num_channels = st->chip_info->num_channels;
800 indio_dev->info = st->chip_info->iio_info;
801
802 ret = ad_sd_setup_buffer_and_trigger(indio_dev);
803 if (ret)
804 goto error_disable_reg;
805
806 ret = ad7793_setup(indio_dev, pdata, vref_mv);
807 if (ret)
808 goto error_remove_trigger;
809
810 ret = iio_device_register(indio_dev);
811 if (ret)
812 goto error_remove_trigger;
813
814 return 0;
815
816error_remove_trigger:
817 ad_sd_cleanup_buffer_and_trigger(indio_dev);
818error_disable_reg:
819 if (pdata->refsel != AD7793_REFSEL_INTERNAL)
820 regulator_disable(st->reg);
821error_put_reg:
822 if (pdata->refsel != AD7793_REFSEL_INTERNAL)
823 regulator_put(st->reg);
824error_device_free:
825 iio_device_free(indio_dev);
826
827 return ret;
828}
829
830static int ad7793_remove(struct spi_device *spi)
831{
832 const struct ad7793_platform_data *pdata = spi->dev.platform_data;
833 struct iio_dev *indio_dev = spi_get_drvdata(spi);
834 struct ad7793_state *st = iio_priv(indio_dev);
835
836 iio_device_unregister(indio_dev);
837 ad_sd_cleanup_buffer_and_trigger(indio_dev);
838
839 if (pdata->refsel != AD7793_REFSEL_INTERNAL) {
840 regulator_disable(st->reg);
841 regulator_put(st->reg);
842 }
843
844 iio_device_free(indio_dev);
845
846 return 0;
847}
848
849static const struct spi_device_id ad7793_id[] = {
850 {"ad7785", ID_AD7785},
851 {"ad7792", ID_AD7792},
852 {"ad7793", ID_AD7793},
853 {"ad7794", ID_AD7794},
854 {"ad7795", ID_AD7795},
855 {"ad7796", ID_AD7796},
856 {"ad7797", ID_AD7797},
857 {"ad7798", ID_AD7798},
858 {"ad7799", ID_AD7799},
859 {}
860};
861MODULE_DEVICE_TABLE(spi, ad7793_id);
862
863static struct spi_driver ad7793_driver = {
864 .driver = {
865 .name = "ad7793",
866 .owner = THIS_MODULE,
867 },
868 .probe = ad7793_probe,
869 .remove = ad7793_remove,
870 .id_table = ad7793_id,
871};
872module_spi_driver(ad7793_driver);
873
874MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
875MODULE_DESCRIPTION("Analog Devices AD7793 and simialr ADCs");
876MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/ti-adc081c.c b/drivers/iio/adc/ti-adc081c.c
new file mode 100644
index 000000000000..f4a46dd8f43b
--- /dev/null
+++ b/drivers/iio/adc/ti-adc081c.c
@@ -0,0 +1,161 @@
1/*
2 * Copyright (C) 2012 Avionic Design GmbH
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/err.h>
10#include <linux/i2c.h>
11#include <linux/module.h>
12
13#include <linux/iio/iio.h>
14#include <linux/regulator/consumer.h>
15
16struct adc081c {
17 struct i2c_client *i2c;
18 struct regulator *ref;
19};
20
21#define REG_CONV_RES 0x00
22
23static int adc081c_read_raw(struct iio_dev *iio,
24 struct iio_chan_spec const *channel, int *value,
25 int *shift, long mask)
26{
27 struct adc081c *adc = iio_priv(iio);
28 int err;
29
30 switch (mask) {
31 case IIO_CHAN_INFO_RAW:
32 err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES);
33 if (err < 0)
34 return err;
35
36 *value = (err >> 4) & 0xff;
37 return IIO_VAL_INT;
38
39 case IIO_CHAN_INFO_SCALE:
40 err = regulator_get_voltage(adc->ref);
41 if (err < 0)
42 return err;
43
44 *value = err / 1000;
45 *shift = 8;
46
47 return IIO_VAL_FRACTIONAL_LOG2;
48
49 default:
50 break;
51 }
52
53 return -EINVAL;
54}
55
56static const struct iio_chan_spec adc081c_channel = {
57 .type = IIO_VOLTAGE,
58 .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT |
59 IIO_CHAN_INFO_RAW_SEPARATE_BIT,
60};
61
62static const struct iio_info adc081c_info = {
63 .read_raw = adc081c_read_raw,
64 .driver_module = THIS_MODULE,
65};
66
67static int adc081c_probe(struct i2c_client *client,
68 const struct i2c_device_id *id)
69{
70 struct iio_dev *iio;
71 struct adc081c *adc;
72 int err;
73
74 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
75 return -ENODEV;
76
77 iio = iio_device_alloc(sizeof(*adc));
78 if (!iio)
79 return -ENOMEM;
80
81 adc = iio_priv(iio);
82 adc->i2c = client;
83
84 adc->ref = regulator_get(&client->dev, "vref");
85 if (IS_ERR(adc->ref)) {
86 err = PTR_ERR(adc->ref);
87 goto iio_free;
88 }
89
90 err = regulator_enable(adc->ref);
91 if (err < 0)
92 goto regulator_put;
93
94 iio->dev.parent = &client->dev;
95 iio->name = dev_name(&client->dev);
96 iio->modes = INDIO_DIRECT_MODE;
97 iio->info = &adc081c_info;
98
99 iio->channels = &adc081c_channel;
100 iio->num_channels = 1;
101
102 err = iio_device_register(iio);
103 if (err < 0)
104 goto regulator_disable;
105
106 i2c_set_clientdata(client, iio);
107
108 return 0;
109
110regulator_disable:
111 regulator_disable(adc->ref);
112regulator_put:
113 regulator_put(adc->ref);
114iio_free:
115 iio_device_free(iio);
116
117 return err;
118}
119
120static int adc081c_remove(struct i2c_client *client)
121{
122 struct iio_dev *iio = i2c_get_clientdata(client);
123 struct adc081c *adc = iio_priv(iio);
124
125 iio_device_unregister(iio);
126 regulator_disable(adc->ref);
127 regulator_put(adc->ref);
128 iio_device_free(iio);
129
130 return 0;
131}
132
133static const struct i2c_device_id adc081c_id[] = {
134 { "adc081c", 0 },
135 { }
136};
137MODULE_DEVICE_TABLE(i2c, adc081c_id);
138
139#ifdef CONFIG_OF
140static const struct of_device_id adc081c_of_match[] = {
141 { .compatible = "ti,adc081c" },
142 { }
143};
144MODULE_DEVICE_TABLE(of, adc081c_of_match);
145#endif
146
147static struct i2c_driver adc081c_driver = {
148 .driver = {
149 .name = "adc081c",
150 .owner = THIS_MODULE,
151 .of_match_table = of_match_ptr(adc081c_of_match),
152 },
153 .probe = adc081c_probe,
154 .remove = adc081c_remove,
155 .id_table = adc081c_id,
156};
157module_i2c_driver(adc081c_driver);
158
159MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
160MODULE_DESCRIPTION("Texas Instruments ADC081C021/027 driver");
161MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/gyro/adis16136.c b/drivers/iio/gyro/adis16136.c
index 05486dfd721b..8cb0bcbfd609 100644
--- a/drivers/iio/gyro/adis16136.c
+++ b/drivers/iio/gyro/adis16136.c
@@ -22,7 +22,6 @@
22#include <linux/iio/buffer.h> 22#include <linux/iio/buffer.h>
23#include <linux/iio/imu/adis.h> 23#include <linux/iio/imu/adis.h>
24 24
25#include <linux/iio/iio.h>
26#include <linux/debugfs.h> 25#include <linux/debugfs.h>
27 26
28#define ADIS16136_REG_FLASH_CNT 0x00 27#define ADIS16136_REG_FLASH_CNT 0x00
@@ -203,10 +202,10 @@ static ssize_t adis16136_write_frequency(struct device *dev,
203{ 202{
204 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 203 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
205 struct adis16136 *adis16136 = iio_priv(indio_dev); 204 struct adis16136 *adis16136 = iio_priv(indio_dev);
206 long val; 205 unsigned int val;
207 int ret; 206 int ret;
208 207
209 ret = kstrtol(buf, 10, &val); 208 ret = kstrtouint(buf, 10, &val);
210 if (ret) 209 if (ret)
211 return ret; 210 return ret;
212 211
diff --git a/drivers/iio/imu/adis16480.c b/drivers/iio/imu/adis16480.c
index a080b3515015..8c26a5f7cd5d 100644
--- a/drivers/iio/imu/adis16480.c
+++ b/drivers/iio/imu/adis16480.c
@@ -24,7 +24,6 @@
24#include <linux/iio/buffer.h> 24#include <linux/iio/buffer.h>
25#include <linux/iio/imu/adis.h> 25#include <linux/iio/imu/adis.h>
26 26
27#include <linux/iio/iio.h>
28#include <linux/debugfs.h> 27#include <linux/debugfs.h>
29 28
30#define ADIS16480_PAGE_SIZE 0x80 29#define ADIS16480_PAGE_SIZE 0x80
@@ -125,7 +124,7 @@ static ssize_t adis16480_show_firmware_revision(struct file *file,
125 char __user *userbuf, size_t count, loff_t *ppos) 124 char __user *userbuf, size_t count, loff_t *ppos)
126{ 125{
127 struct adis16480 *adis16480 = file->private_data; 126 struct adis16480 *adis16480 = file->private_data;
128 char buf[6]; 127 char buf[7];
129 size_t len; 128 size_t len;
130 u16 rev; 129 u16 rev;
131 int ret; 130 int ret;
@@ -134,7 +133,7 @@ static ssize_t adis16480_show_firmware_revision(struct file *file,
134 if (ret < 0) 133 if (ret < 0)
135 return ret; 134 return ret;
136 135
137 len = snprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff); 136 len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
138 137
139 return simple_read_from_buffer(userbuf, count, ppos, buf, len); 138 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
140} 139}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 09:40:59 -0500