diff options
Diffstat (limited to 'drivers/iio/dac/ad5686.c')
-rw-r--r-- | drivers/iio/dac/ad5686.c | 418 |
1 files changed, 418 insertions, 0 deletions
diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c new file mode 100644 index 000000000000..6948d75e1036 --- /dev/null +++ b/drivers/iio/dac/ad5686.c | |||
@@ -0,0 +1,418 @@ | |||
1 | /* | ||
2 | * AD5686R, AD5685R, AD5684R Digital to analog converters driver | ||
3 | * | ||
4 | * Copyright 2011 Analog Devices Inc. | ||
5 | * | ||
6 | * Licensed under the GPL-2. | ||
7 | */ | ||
8 | |||
9 | #include <linux/interrupt.h> | ||
10 | #include <linux/fs.h> | ||
11 | #include <linux/device.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/spi/spi.h> | ||
15 | #include <linux/slab.h> | ||
16 | #include <linux/sysfs.h> | ||
17 | #include <linux/regulator/consumer.h> | ||
18 | |||
19 | #include <linux/iio/iio.h> | ||
20 | #include <linux/iio/sysfs.h> | ||
21 | |||
22 | #define AD5686_DAC_CHANNELS 4 | ||
23 | |||
24 | #define AD5686_ADDR(x) ((x) << 16) | ||
25 | #define AD5686_CMD(x) ((x) << 20) | ||
26 | |||
27 | #define AD5686_ADDR_DAC(chan) (0x1 << (chan)) | ||
28 | #define AD5686_ADDR_ALL_DAC 0xF | ||
29 | |||
30 | #define AD5686_CMD_NOOP 0x0 | ||
31 | #define AD5686_CMD_WRITE_INPUT_N 0x1 | ||
32 | #define AD5686_CMD_UPDATE_DAC_N 0x2 | ||
33 | #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3 | ||
34 | #define AD5686_CMD_POWERDOWN_DAC 0x4 | ||
35 | #define AD5686_CMD_LDAC_MASK 0x5 | ||
36 | #define AD5686_CMD_RESET 0x6 | ||
37 | #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7 | ||
38 | #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8 | ||
39 | #define AD5686_CMD_READBACK_ENABLE 0x9 | ||
40 | |||
41 | #define AD5686_LDAC_PWRDN_NONE 0x0 | ||
42 | #define AD5686_LDAC_PWRDN_1K 0x1 | ||
43 | #define AD5686_LDAC_PWRDN_100K 0x2 | ||
44 | #define AD5686_LDAC_PWRDN_3STATE 0x3 | ||
45 | |||
46 | /** | ||
47 | * struct ad5686_chip_info - chip specific information | ||
48 | * @int_vref_mv: AD5620/40/60: the internal reference voltage | ||
49 | * @channel: channel specification | ||
50 | */ | ||
51 | |||
52 | struct ad5686_chip_info { | ||
53 | u16 int_vref_mv; | ||
54 | struct iio_chan_spec channel[AD5686_DAC_CHANNELS]; | ||
55 | }; | ||
56 | |||
57 | /** | ||
58 | * struct ad5446_state - driver instance specific data | ||
59 | * @spi: spi_device | ||
60 | * @chip_info: chip model specific constants, available modes etc | ||
61 | * @reg: supply regulator | ||
62 | * @vref_mv: actual reference voltage used | ||
63 | * @pwr_down_mask: power down mask | ||
64 | * @pwr_down_mode: current power down mode | ||
65 | * @data: spi transfer buffers | ||
66 | */ | ||
67 | |||
68 | struct ad5686_state { | ||
69 | struct spi_device *spi; | ||
70 | const struct ad5686_chip_info *chip_info; | ||
71 | struct regulator *reg; | ||
72 | unsigned short vref_mv; | ||
73 | unsigned pwr_down_mask; | ||
74 | unsigned pwr_down_mode; | ||
75 | /* | ||
76 | * DMA (thus cache coherency maintenance) requires the | ||
77 | * transfer buffers to live in their own cache lines. | ||
78 | */ | ||
79 | |||
80 | union { | ||
81 | u32 d32; | ||
82 | u8 d8[4]; | ||
83 | } data[3] ____cacheline_aligned; | ||
84 | }; | ||
85 | |||
86 | /** | ||
87 | * ad5686_supported_device_ids: | ||
88 | */ | ||
89 | |||
90 | enum ad5686_supported_device_ids { | ||
91 | ID_AD5684, | ||
92 | ID_AD5685, | ||
93 | ID_AD5686, | ||
94 | }; | ||
95 | static int ad5686_spi_write(struct ad5686_state *st, | ||
96 | u8 cmd, u8 addr, u16 val, u8 shift) | ||
97 | { | ||
98 | val <<= shift; | ||
99 | |||
100 | st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) | | ||
101 | AD5686_ADDR(addr) | | ||
102 | val); | ||
103 | |||
104 | return spi_write(st->spi, &st->data[0].d8[1], 3); | ||
105 | } | ||
106 | |||
107 | static int ad5686_spi_read(struct ad5686_state *st, u8 addr) | ||
108 | { | ||
109 | struct spi_transfer t[] = { | ||
110 | { | ||
111 | .tx_buf = &st->data[0].d8[1], | ||
112 | .len = 3, | ||
113 | .cs_change = 1, | ||
114 | }, { | ||
115 | .tx_buf = &st->data[1].d8[1], | ||
116 | .rx_buf = &st->data[2].d8[1], | ||
117 | .len = 3, | ||
118 | }, | ||
119 | }; | ||
120 | struct spi_message m; | ||
121 | int ret; | ||
122 | |||
123 | spi_message_init(&m); | ||
124 | spi_message_add_tail(&t[0], &m); | ||
125 | spi_message_add_tail(&t[1], &m); | ||
126 | |||
127 | st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) | | ||
128 | AD5686_ADDR(addr)); | ||
129 | st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP)); | ||
130 | |||
131 | ret = spi_sync(st->spi, &m); | ||
132 | if (ret < 0) | ||
133 | return ret; | ||
134 | |||
135 | return be32_to_cpu(st->data[2].d32); | ||
136 | } | ||
137 | |||
138 | static const char * const ad5686_powerdown_modes[] = { | ||
139 | "1kohm_to_gnd", | ||
140 | "100kohm_to_gnd", | ||
141 | "three_state" | ||
142 | }; | ||
143 | |||
144 | static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev, | ||
145 | const struct iio_chan_spec *chan) | ||
146 | { | ||
147 | struct ad5686_state *st = iio_priv(indio_dev); | ||
148 | |||
149 | return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1; | ||
150 | } | ||
151 | |||
152 | static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev, | ||
153 | const struct iio_chan_spec *chan, unsigned int mode) | ||
154 | { | ||
155 | struct ad5686_state *st = iio_priv(indio_dev); | ||
156 | |||
157 | st->pwr_down_mode &= ~(0x3 << (chan->channel * 2)); | ||
158 | st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2)); | ||
159 | |||
160 | return 0; | ||
161 | } | ||
162 | |||
163 | static const struct iio_enum ad5686_powerdown_mode_enum = { | ||
164 | .items = ad5686_powerdown_modes, | ||
165 | .num_items = ARRAY_SIZE(ad5686_powerdown_modes), | ||
166 | .get = ad5686_get_powerdown_mode, | ||
167 | .set = ad5686_set_powerdown_mode, | ||
168 | }; | ||
169 | |||
170 | static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev, | ||
171 | uintptr_t private, const struct iio_chan_spec *chan, char *buf) | ||
172 | { | ||
173 | struct ad5686_state *st = iio_priv(indio_dev); | ||
174 | |||
175 | return sprintf(buf, "%d\n", !!(st->pwr_down_mask & | ||
176 | (0x3 << (chan->channel * 2)))); | ||
177 | } | ||
178 | |||
179 | static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, | ||
180 | uintptr_t private, const struct iio_chan_spec *chan, const char *buf, | ||
181 | size_t len) | ||
182 | { | ||
183 | bool readin; | ||
184 | int ret; | ||
185 | struct ad5686_state *st = iio_priv(indio_dev); | ||
186 | |||
187 | ret = strtobool(buf, &readin); | ||
188 | if (ret) | ||
189 | return ret; | ||
190 | |||
191 | if (readin == true) | ||
192 | st->pwr_down_mask |= (0x3 << (chan->channel * 2)); | ||
193 | else | ||
194 | st->pwr_down_mask &= ~(0x3 << (chan->channel * 2)); | ||
195 | |||
196 | ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0, | ||
197 | st->pwr_down_mask & st->pwr_down_mode, 0); | ||
198 | |||
199 | return ret ? ret : len; | ||
200 | } | ||
201 | |||
202 | static int ad5686_read_raw(struct iio_dev *indio_dev, | ||
203 | struct iio_chan_spec const *chan, | ||
204 | int *val, | ||
205 | int *val2, | ||
206 | long m) | ||
207 | { | ||
208 | struct ad5686_state *st = iio_priv(indio_dev); | ||
209 | unsigned long scale_uv; | ||
210 | int ret; | ||
211 | |||
212 | switch (m) { | ||
213 | case IIO_CHAN_INFO_RAW: | ||
214 | mutex_lock(&indio_dev->mlock); | ||
215 | ret = ad5686_spi_read(st, chan->address); | ||
216 | mutex_unlock(&indio_dev->mlock); | ||
217 | if (ret < 0) | ||
218 | return ret; | ||
219 | *val = ret; | ||
220 | return IIO_VAL_INT; | ||
221 | break; | ||
222 | case IIO_CHAN_INFO_SCALE: | ||
223 | scale_uv = (st->vref_mv * 100000) | ||
224 | >> (chan->scan_type.realbits); | ||
225 | *val = scale_uv / 100000; | ||
226 | *val2 = (scale_uv % 100000) * 10; | ||
227 | return IIO_VAL_INT_PLUS_MICRO; | ||
228 | |||
229 | } | ||
230 | return -EINVAL; | ||
231 | } | ||
232 | |||
233 | static int ad5686_write_raw(struct iio_dev *indio_dev, | ||
234 | struct iio_chan_spec const *chan, | ||
235 | int val, | ||
236 | int val2, | ||
237 | long mask) | ||
238 | { | ||
239 | struct ad5686_state *st = iio_priv(indio_dev); | ||
240 | int ret; | ||
241 | |||
242 | switch (mask) { | ||
243 | case IIO_CHAN_INFO_RAW: | ||
244 | if (val > (1 << chan->scan_type.realbits) || val < 0) | ||
245 | return -EINVAL; | ||
246 | |||
247 | mutex_lock(&indio_dev->mlock); | ||
248 | ret = ad5686_spi_write(st, | ||
249 | AD5686_CMD_WRITE_INPUT_N_UPDATE_N, | ||
250 | chan->address, | ||
251 | val, | ||
252 | chan->scan_type.shift); | ||
253 | mutex_unlock(&indio_dev->mlock); | ||
254 | break; | ||
255 | default: | ||
256 | ret = -EINVAL; | ||
257 | } | ||
258 | |||
259 | return ret; | ||
260 | } | ||
261 | |||
262 | static const struct iio_info ad5686_info = { | ||
263 | .read_raw = ad5686_read_raw, | ||
264 | .write_raw = ad5686_write_raw, | ||
265 | .driver_module = THIS_MODULE, | ||
266 | }; | ||
267 | |||
268 | static const struct iio_chan_spec_ext_info ad5686_ext_info[] = { | ||
269 | { | ||
270 | .name = "powerdown", | ||
271 | .read = ad5686_read_dac_powerdown, | ||
272 | .write = ad5686_write_dac_powerdown, | ||
273 | }, | ||
274 | IIO_ENUM("powerdown_mode", false, &ad5686_powerdown_mode_enum), | ||
275 | IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum), | ||
276 | { }, | ||
277 | }; | ||
278 | |||
279 | #define AD5868_CHANNEL(chan, bits, shift) { \ | ||
280 | .type = IIO_VOLTAGE, \ | ||
281 | .indexed = 1, \ | ||
282 | .output = 1, \ | ||
283 | .channel = chan, \ | ||
284 | .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ | ||
285 | IIO_CHAN_INFO_SCALE_SHARED_BIT, \ | ||
286 | .address = AD5686_ADDR_DAC(chan), \ | ||
287 | .scan_type = IIO_ST('u', bits, 16, shift), \ | ||
288 | .ext_info = ad5686_ext_info, \ | ||
289 | } | ||
290 | |||
291 | static const struct ad5686_chip_info ad5686_chip_info_tbl[] = { | ||
292 | [ID_AD5684] = { | ||
293 | .channel[0] = AD5868_CHANNEL(0, 12, 4), | ||
294 | .channel[1] = AD5868_CHANNEL(1, 12, 4), | ||
295 | .channel[2] = AD5868_CHANNEL(2, 12, 4), | ||
296 | .channel[3] = AD5868_CHANNEL(3, 12, 4), | ||
297 | .int_vref_mv = 2500, | ||
298 | }, | ||
299 | [ID_AD5685] = { | ||
300 | .channel[0] = AD5868_CHANNEL(0, 14, 2), | ||
301 | .channel[1] = AD5868_CHANNEL(1, 14, 2), | ||
302 | .channel[2] = AD5868_CHANNEL(2, 14, 2), | ||
303 | .channel[3] = AD5868_CHANNEL(3, 14, 2), | ||
304 | .int_vref_mv = 2500, | ||
305 | }, | ||
306 | [ID_AD5686] = { | ||
307 | .channel[0] = AD5868_CHANNEL(0, 16, 0), | ||
308 | .channel[1] = AD5868_CHANNEL(1, 16, 0), | ||
309 | .channel[2] = AD5868_CHANNEL(2, 16, 0), | ||
310 | .channel[3] = AD5868_CHANNEL(3, 16, 0), | ||
311 | .int_vref_mv = 2500, | ||
312 | }, | ||
313 | }; | ||
314 | |||
315 | |||
316 | static int __devinit ad5686_probe(struct spi_device *spi) | ||
317 | { | ||
318 | struct ad5686_state *st; | ||
319 | struct iio_dev *indio_dev; | ||
320 | int ret, regdone = 0, voltage_uv = 0; | ||
321 | |||
322 | indio_dev = iio_device_alloc(sizeof(*st)); | ||
323 | if (indio_dev == NULL) | ||
324 | return -ENOMEM; | ||
325 | |||
326 | st = iio_priv(indio_dev); | ||
327 | spi_set_drvdata(spi, indio_dev); | ||
328 | |||
329 | st->reg = regulator_get(&spi->dev, "vcc"); | ||
330 | if (!IS_ERR(st->reg)) { | ||
331 | ret = regulator_enable(st->reg); | ||
332 | if (ret) | ||
333 | goto error_put_reg; | ||
334 | |||
335 | voltage_uv = regulator_get_voltage(st->reg); | ||
336 | } | ||
337 | |||
338 | st->chip_info = | ||
339 | &ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data]; | ||
340 | |||
341 | if (voltage_uv) | ||
342 | st->vref_mv = voltage_uv / 1000; | ||
343 | else | ||
344 | st->vref_mv = st->chip_info->int_vref_mv; | ||
345 | |||
346 | st->spi = spi; | ||
347 | |||
348 | /* Set all the power down mode for all channels to 1K pulldown */ | ||
349 | st->pwr_down_mode = 0x55; | ||
350 | |||
351 | indio_dev->dev.parent = &spi->dev; | ||
352 | indio_dev->name = spi_get_device_id(spi)->name; | ||
353 | indio_dev->info = &ad5686_info; | ||
354 | indio_dev->modes = INDIO_DIRECT_MODE; | ||
355 | indio_dev->channels = st->chip_info->channel; | ||
356 | indio_dev->num_channels = AD5686_DAC_CHANNELS; | ||
357 | |||
358 | regdone = 1; | ||
359 | ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0, | ||
360 | !!voltage_uv, 0); | ||
361 | if (ret) | ||
362 | goto error_disable_reg; | ||
363 | |||
364 | ret = iio_device_register(indio_dev); | ||
365 | if (ret) | ||
366 | goto error_disable_reg; | ||
367 | |||
368 | return 0; | ||
369 | |||
370 | error_disable_reg: | ||
371 | if (!IS_ERR(st->reg)) | ||
372 | regulator_disable(st->reg); | ||
373 | error_put_reg: | ||
374 | if (!IS_ERR(st->reg)) | ||
375 | regulator_put(st->reg); | ||
376 | |||
377 | iio_device_free(indio_dev); | ||
378 | |||
379 | return ret; | ||
380 | } | ||
381 | |||
382 | static int __devexit ad5686_remove(struct spi_device *spi) | ||
383 | { | ||
384 | struct iio_dev *indio_dev = spi_get_drvdata(spi); | ||
385 | struct ad5686_state *st = iio_priv(indio_dev); | ||
386 | |||
387 | iio_device_unregister(indio_dev); | ||
388 | if (!IS_ERR(st->reg)) { | ||
389 | regulator_disable(st->reg); | ||
390 | regulator_put(st->reg); | ||
391 | } | ||
392 | iio_device_free(indio_dev); | ||
393 | |||
394 | return 0; | ||
395 | } | ||
396 | |||
397 | static const struct spi_device_id ad5686_id[] = { | ||
398 | {"ad5684", ID_AD5684}, | ||
399 | {"ad5685", ID_AD5685}, | ||
400 | {"ad5686", ID_AD5686}, | ||
401 | {} | ||
402 | }; | ||
403 | MODULE_DEVICE_TABLE(spi, ad5686_id); | ||
404 | |||
405 | static struct spi_driver ad5686_driver = { | ||
406 | .driver = { | ||
407 | .name = "ad5686", | ||
408 | .owner = THIS_MODULE, | ||
409 | }, | ||
410 | .probe = ad5686_probe, | ||
411 | .remove = __devexit_p(ad5686_remove), | ||
412 | .id_table = ad5686_id, | ||
413 | }; | ||
414 | module_spi_driver(ad5686_driver); | ||
415 | |||
416 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | ||
417 | MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC"); | ||
418 | MODULE_LICENSE("GPL v2"); | ||