1 files changed, 249 insertions, 86 deletions

diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 010578f1d762..fc9dfc23ecb7 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -24,6 +24,7 @@
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
+#include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/io.h>
@@ -39,11 +40,6 @@
 #include <linux/iio/machine.h>
 #include <linux/iio/driver.h>
 
-enum adc_version {
-        ADC_V1,
-        ADC_V2
-};
-
 /* EXYNOS4412/5250 ADC_V1 registers definitions */
 #define ADC_V1_CON(x)           ((x) + 0x00)
 #define ADC_V1_DLY(x)           ((x) + 0x08)
@@ -75,8 +71,9 @@ enum adc_version {
 #define ADC_V2_CON2_ACH_SEL(x)  (((x) & 0xF) << 0)
 #define ADC_V2_CON2_ACH_MASK    0xF
 
-#define MAX_ADC_V2_CHANNELS     10
-#define MAX_ADC_V1_CHANNELS     8
+#define MAX_ADC_V2_CHANNELS             10
+#define MAX_ADC_V1_CHANNELS             8
+#define MAX_EXYNOS3250_ADC_CHANNELS     2
 
 /* Bit definitions common for ADC_V1 and ADC_V2 */
 #define ADC_CON_EN_START        (1u << 0)
@@ -85,9 +82,12 @@ enum adc_version {
 #define EXYNOS_ADC_TIMEOUT      (msecs_to_jiffies(100))
 
 struct exynos_adc {
+        struct exynos_adc_data  *data;
+        struct device           *dev;
         void __iomem            *regs;
         void __iomem            *enable_reg;
         struct clk              *clk;
+        struct clk              *sclk;
         unsigned int            irq;
         struct regulator        *vdd;
 
@@ -97,43 +97,213 @@ struct exynos_adc {
         unsigned int            version;
 };
 
-static const struct of_device_id exynos_adc_match[] = {
-        { .compatible = "samsung,exynos-adc-v1", .data = (void *)ADC_V1 },
-        { .compatible = "samsung,exynos-adc-v2", .data = (void *)ADC_V2 },
-        {},
+struct exynos_adc_data {
+        int num_channels;
+        bool needs_sclk;
+
+        void (*init_hw)(struct exynos_adc *info);
+        void (*exit_hw)(struct exynos_adc *info);
+        void (*clear_irq)(struct exynos_adc *info);
+        void (*start_conv)(struct exynos_adc *info, unsigned long addr);
 };
-MODULE_DEVICE_TABLE(of, exynos_adc_match);
 
-static inline unsigned int exynos_adc_get_version(struct platform_device *pdev)
+static void exynos_adc_unprepare_clk(struct exynos_adc *info)
 {
-        const struct of_device_id *match;
+        if (info->data->needs_sclk)
+                clk_unprepare(info->sclk);
+        clk_unprepare(info->clk);
+}
 
-        match = of_match_node(exynos_adc_match, pdev->dev.of_node);
-        return (unsigned int)match->data;
+static int exynos_adc_prepare_clk(struct exynos_adc *info)
+{
+        int ret;
+
+        ret = clk_prepare(info->clk);
+        if (ret) {
+                dev_err(info->dev, "failed preparing adc clock: %d\n", ret);
+                return ret;
+        }
+
+        if (info->data->needs_sclk) {
+                ret = clk_prepare(info->sclk);
+                if (ret) {
+                        clk_unprepare(info->clk);
+                        dev_err(info->dev,
+                                "failed preparing sclk_adc clock: %d\n", ret);
+                        return ret;
+                }
+        }
+
+        return 0;
+}
+
+static void exynos_adc_disable_clk(struct exynos_adc *info)
+{
+        if (info->data->needs_sclk)
+                clk_disable(info->sclk);
+        clk_disable(info->clk);
+}
+
+static int exynos_adc_enable_clk(struct exynos_adc *info)
+{
+        int ret;
+
+        ret = clk_enable(info->clk);
+        if (ret) {
+                dev_err(info->dev, "failed enabling adc clock: %d\n", ret);
+                return ret;
+        }
+
+        if (info->data->needs_sclk) {
+                ret = clk_enable(info->sclk);
+                if (ret) {
+                        clk_disable(info->clk);
+                        dev_err(info->dev,
+                                "failed enabling sclk_adc clock: %d\n", ret);
+                        return ret;
+                }
+        }
+
+        return 0;
+}
+
+static void exynos_adc_v1_init_hw(struct exynos_adc *info)
+{
+        u32 con1;
+
+        writel(1, info->enable_reg);
+
+        /* set default prescaler values and Enable prescaler */
+        con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+
+        /* Enable 12-bit ADC resolution */
+        con1 |= ADC_V1_CON_RES;
+        writel(con1, ADC_V1_CON(info->regs));
+}
+
+static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
+{
+        u32 con;
+
+        writel(0, info->enable_reg);
+
+        con = readl(ADC_V1_CON(info->regs));
+        con |= ADC_V1_CON_STANDBY;
+        writel(con, ADC_V1_CON(info->regs));
+}
+
+static void exynos_adc_v1_clear_irq(struct exynos_adc *info)
+{
+        writel(1, ADC_V1_INTCLR(info->regs));
+}
+
+static void exynos_adc_v1_start_conv(struct exynos_adc *info,
+                                     unsigned long addr)
+{
+        u32 con1;
+
+        writel(addr, ADC_V1_MUX(info->regs));
+
+        con1 = readl(ADC_V1_CON(info->regs));
+        writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
+}
+
+static const struct exynos_adc_data exynos_adc_v1_data = {
+        .num_channels   = MAX_ADC_V1_CHANNELS,
+
+        .init_hw        = exynos_adc_v1_init_hw,
+        .exit_hw        = exynos_adc_v1_exit_hw,
+        .clear_irq      = exynos_adc_v1_clear_irq,
+        .start_conv     = exynos_adc_v1_start_conv,
+};
+
+static void exynos_adc_v2_init_hw(struct exynos_adc *info)
+{
+        u32 con1, con2;
+
+        writel(1, info->enable_reg);
+
+        con1 = ADC_V2_CON1_SOFT_RESET;
+        writel(con1, ADC_V2_CON1(info->regs));
+
+        con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
+                ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
+        writel(con2, ADC_V2_CON2(info->regs));
+
+        /* Enable interrupts */
+        writel(1, ADC_V2_INT_EN(info->regs));
+}
+
+static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
+{
+        u32 con;
+
+        writel(0, info->enable_reg);
+
+        con = readl(ADC_V2_CON1(info->regs));
+        con &= ~ADC_CON_EN_START;
+        writel(con, ADC_V2_CON1(info->regs));
 }
 
-static void exynos_adc_hw_init(struct exynos_adc *info)
+static void exynos_adc_v2_clear_irq(struct exynos_adc *info)
+{
+        writel(1, ADC_V2_INT_ST(info->regs));
+}
+
+static void exynos_adc_v2_start_conv(struct exynos_adc *info,
+                                     unsigned long addr)
 {
         u32 con1, con2;
 
-        if (info->version == ADC_V2) {
-                con1 = ADC_V2_CON1_SOFT_RESET;
-                writel(con1, ADC_V2_CON1(info->regs));
+        con2 = readl(ADC_V2_CON2(info->regs));
+        con2 &= ~ADC_V2_CON2_ACH_MASK;
+        con2 |= ADC_V2_CON2_ACH_SEL(addr);
+        writel(con2, ADC_V2_CON2(info->regs));
 
-                con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
-                        ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
-                writel(con2, ADC_V2_CON2(info->regs));
+        con1 = readl(ADC_V2_CON1(info->regs));
+        writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info->regs));
+}
 
-                /* Enable interrupts */
-                writel(1, ADC_V2_INT_EN(info->regs));
-        } else {
-                /* set default prescaler values and Enable prescaler */
-                con1 =  ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
+static const struct exynos_adc_data exynos_adc_v2_data = {
+        .num_channels   = MAX_ADC_V2_CHANNELS,
 
-                /* Enable 12-bit ADC resolution */
-                con1 |= ADC_V1_CON_RES;
-                writel(con1, ADC_V1_CON(info->regs));
-        }
+        .init_hw        = exynos_adc_v2_init_hw,
+        .exit_hw        = exynos_adc_v2_exit_hw,
+        .clear_irq      = exynos_adc_v2_clear_irq,
+        .start_conv     = exynos_adc_v2_start_conv,
+};
+
+static const struct exynos_adc_data exynos3250_adc_data = {
+        .num_channels   = MAX_EXYNOS3250_ADC_CHANNELS,
+        .needs_sclk     = true,
+
+        .init_hw        = exynos_adc_v2_init_hw,
+        .exit_hw        = exynos_adc_v2_exit_hw,
+        .clear_irq      = exynos_adc_v2_clear_irq,
+        .start_conv     = exynos_adc_v2_start_conv,
+};
+
+static const struct of_device_id exynos_adc_match[] = {
+        {
+                .compatible = "samsung,exynos-adc-v1",
+                .data = &exynos_adc_v1_data,
+        }, {
+                .compatible = "samsung,exynos-adc-v2",
+                .data = &exynos_adc_v2_data,
+        }, {
+                .compatible = "samsung,exynos3250-adc",
+                .data = &exynos3250_adc_data,
+        },
+        {},
+};
+MODULE_DEVICE_TABLE(of, exynos_adc_match);
+
+static struct exynos_adc_data *exynos_adc_get_data(struct platform_device *pdev)
+{
+        const struct of_device_id *match;
+
+        match = of_match_node(exynos_adc_match, pdev->dev.of_node);
+        return (struct exynos_adc_data *)match->data;
 }
 
 static int exynos_read_raw(struct iio_dev *indio_dev,
@@ -144,7 +314,6 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
 {
         struct exynos_adc *info = iio_priv(indio_dev);
         unsigned long timeout;
-        u32 con1, con2;
         int ret;
 
         if (mask != IIO_CHAN_INFO_RAW)
@@ -154,28 +323,15 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
         reinit_completion(&info->completion);
 
         /* Select the channel to be used and Trigger conversion */
-        if (info->version == ADC_V2) {
-                con2 = readl(ADC_V2_CON2(info->regs));
-                con2 &= ~ADC_V2_CON2_ACH_MASK;
-                con2 |= ADC_V2_CON2_ACH_SEL(chan->address);
-                writel(con2, ADC_V2_CON2(info->regs));
-
-                con1 = readl(ADC_V2_CON1(info->regs));
-                writel(con1 | ADC_CON_EN_START,
-                                ADC_V2_CON1(info->regs));
-        } else {
-                writel(chan->address, ADC_V1_MUX(info->regs));
-
-                con1 = readl(ADC_V1_CON(info->regs));
-                writel(con1 | ADC_CON_EN_START,
-                                ADC_V1_CON(info->regs));
-        }
+        if (info->data->start_conv)
+                info->data->start_conv(info, chan->address);
 
         timeout = wait_for_completion_timeout
                         (&info->completion, EXYNOS_ADC_TIMEOUT);
         if (timeout == 0) {
                 dev_warn(&indio_dev->dev, "Conversion timed out! Resetting\n");
-                exynos_adc_hw_init(info);
+                if (info->data->init_hw)
+                        info->data->init_hw(info);
                 ret = -ETIMEDOUT;
         } else {
                 *val = info->value;
@@ -193,13 +349,11 @@ static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
         struct exynos_adc *info = (struct exynos_adc *)dev_id;
 
         /* Read value */
-        info->value = readl(ADC_V1_DATX(info->regs)) &
-                                                ADC_DATX_MASK;
+        info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK;
+
         /* clear irq */
-        if (info->version == ADC_V2)
-                writel(1, ADC_V2_INT_ST(info->regs));
-        else
-                writel(1, ADC_V1_INTCLR(info->regs));
+        if (info->data->clear_irq)
+                info->data->clear_irq(info);
 
         complete(&info->completion);
 
@@ -277,6 +431,12 @@ static int exynos_adc_probe(struct platform_device *pdev)
 
         info = iio_priv(indio_dev);
 
+        info->data = exynos_adc_get_data(pdev);
+        if (!info->data) {
+                dev_err(&pdev->dev, "failed getting exynos_adc_data\n");
+                return -EINVAL;
+        }
+
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         info->regs = devm_ioremap_resource(&pdev->dev, mem);
         if (IS_ERR(info->regs))
@@ -294,6 +454,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
         }
 
         info->irq = irq;
+        info->dev = &pdev->dev;
 
         init_completion(&info->completion);
 
@@ -304,6 +465,16 @@ static int exynos_adc_probe(struct platform_device *pdev)
                 return PTR_ERR(info->clk);
         }
 
+        if (info->data->needs_sclk) {
+                info->sclk = devm_clk_get(&pdev->dev, "sclk");
+                if (IS_ERR(info->sclk)) {
+                        dev_err(&pdev->dev,
+                                "failed getting sclk clock, err = %ld\n",
+                                PTR_ERR(info->sclk));
+                        return PTR_ERR(info->sclk);
+                }
+        }
+
         info->vdd = devm_regulator_get(&pdev->dev, "vdd");
         if (IS_ERR(info->vdd)) {
                 dev_err(&pdev->dev, "failed getting regulator, err = %ld\n",
@@ -315,13 +486,13 @@ static int exynos_adc_probe(struct platform_device *pdev)
         if (ret)
                 return ret;
 
-        ret = clk_prepare_enable(info->clk);
+        ret = exynos_adc_prepare_clk(info);
         if (ret)
                 goto err_disable_reg;
 
-        writel(1, info->enable_reg);
-
-        info->version = exynos_adc_get_version(pdev);
+        ret = exynos_adc_enable_clk(info);
+        if (ret)
+                goto err_unprepare_clk;
 
         platform_set_drvdata(pdev, indio_dev);
 
@@ -331,11 +502,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
         indio_dev->info = &exynos_adc_iio_info;
         indio_dev->modes = INDIO_DIRECT_MODE;
         indio_dev->channels = exynos_adc_iio_channels;
-
-        if (info->version == ADC_V1)
-                indio_dev->num_channels = MAX_ADC_V1_CHANNELS;
-        else
-                indio_dev->num_channels = MAX_ADC_V2_CHANNELS;
+        indio_dev->num_channels = info->data->num_channels;
 
         ret = request_irq(info->irq, exynos_adc_isr,
                                         0, dev_name(&pdev->dev), info);
@@ -349,7 +516,8 @@ static int exynos_adc_probe(struct platform_device *pdev)
         if (ret)
                 goto err_irq;
 
-        exynos_adc_hw_init(info);
+        if (info->data->init_hw)
+                info->data->init_hw(info);
 
         ret = of_platform_populate(np, exynos_adc_match, NULL, &indio_dev->dev);
         if (ret < 0) {
@@ -366,8 +534,11 @@ err_of_populate:
 err_irq:
         free_irq(info->irq, info);
 err_disable_clk:
-        writel(0, info->enable_reg);
-        clk_disable_unprepare(info->clk);
+        if (info->data->exit_hw)
+                info->data->exit_hw(info);
+        exynos_adc_disable_clk(info);
+err_unprepare_clk:
+        exynos_adc_unprepare_clk(info);
 err_disable_reg:
         regulator_disable(info->vdd);
         return ret;
@@ -382,8 +553,10 @@ static int exynos_adc_remove(struct platform_device *pdev)
                                 exynos_adc_remove_devices);
         iio_device_unregister(indio_dev);
         free_irq(info->irq, info);
-        writel(0, info->enable_reg);
-        clk_disable_unprepare(info->clk);
+        if (info->data->exit_hw)
+                info->data->exit_hw(info);
+        exynos_adc_disable_clk(info);
+        exynos_adc_unprepare_clk(info);
         regulator_disable(info->vdd);
 
         return 0;
@@ -394,20 +567,10 @@ static int exynos_adc_suspend(struct device *dev)
 {
         struct iio_dev *indio_dev = dev_get_drvdata(dev);
         struct exynos_adc *info = iio_priv(indio_dev);
-        u32 con;
 
-        if (info->version == ADC_V2) {
-                con = readl(ADC_V2_CON1(info->regs));
-                con &= ~ADC_CON_EN_START;
-                writel(con, ADC_V2_CON1(info->regs));
-        } else {
-                con = readl(ADC_V1_CON(info->regs));
-                con |= ADC_V1_CON_STANDBY;
-                writel(con, ADC_V1_CON(info->regs));
-        }
-
-        writel(0, info->enable_reg);
-        clk_disable_unprepare(info->clk);
+        if (info->data->exit_hw)
+                info->data->exit_hw(info);
+        exynos_adc_disable_clk(info);
         regulator_disable(info->vdd);
 
         return 0;
@@ -423,12 +586,12 @@ static int exynos_adc_resume(struct device *dev)
         if (ret)
                 return ret;
 
-        ret = clk_prepare_enable(info->clk);
+        ret = exynos_adc_enable_clk(info);
         if (ret)
                 return ret;
 
-        writel(1, info->enable_reg);
-        exynos_adc_hw_init(info);
+        if (info->data->init_hw)
+                info->data->init_hw(info);
 
         return 0;
 }