diff options
Diffstat (limited to 'drivers/idle/intel_idle.c')
-rw-r--r-- | drivers/idle/intel_idle.c | 44 |
1 files changed, 33 insertions, 11 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index fa6964d8681a..92d1206482a6 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * intel_idle.c - native hardware idle loop for modern Intel processors | 2 | * intel_idle.c - native hardware idle loop for modern Intel processors |
3 | * | 3 | * |
4 | * Copyright (c) 2010, Intel Corporation. | 4 | * Copyright (c) 2013, Intel Corporation. |
5 | * Len Brown <len.brown@intel.com> | 5 | * Len Brown <len.brown@intel.com> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -123,7 +123,7 @@ static struct cpuidle_state *cpuidle_state_table; | |||
123 | * which is also the index into the MWAIT hint array. | 123 | * which is also the index into the MWAIT hint array. |
124 | * Thus C0 is a dummy. | 124 | * Thus C0 is a dummy. |
125 | */ | 125 | */ |
126 | static struct cpuidle_state nehalem_cstates[CPUIDLE_STATE_MAX] = { | 126 | static struct cpuidle_state nehalem_cstates[] __initdata = { |
127 | { | 127 | { |
128 | .name = "C1-NHM", | 128 | .name = "C1-NHM", |
129 | .desc = "MWAIT 0x00", | 129 | .desc = "MWAIT 0x00", |
@@ -156,7 +156,7 @@ static struct cpuidle_state nehalem_cstates[CPUIDLE_STATE_MAX] = { | |||
156 | .enter = NULL } | 156 | .enter = NULL } |
157 | }; | 157 | }; |
158 | 158 | ||
159 | static struct cpuidle_state snb_cstates[CPUIDLE_STATE_MAX] = { | 159 | static struct cpuidle_state snb_cstates[] __initdata = { |
160 | { | 160 | { |
161 | .name = "C1-SNB", | 161 | .name = "C1-SNB", |
162 | .desc = "MWAIT 0x00", | 162 | .desc = "MWAIT 0x00", |
@@ -196,7 +196,7 @@ static struct cpuidle_state snb_cstates[CPUIDLE_STATE_MAX] = { | |||
196 | .enter = NULL } | 196 | .enter = NULL } |
197 | }; | 197 | }; |
198 | 198 | ||
199 | static struct cpuidle_state ivb_cstates[CPUIDLE_STATE_MAX] = { | 199 | static struct cpuidle_state ivb_cstates[] __initdata = { |
200 | { | 200 | { |
201 | .name = "C1-IVB", | 201 | .name = "C1-IVB", |
202 | .desc = "MWAIT 0x00", | 202 | .desc = "MWAIT 0x00", |
@@ -236,7 +236,7 @@ static struct cpuidle_state ivb_cstates[CPUIDLE_STATE_MAX] = { | |||
236 | .enter = NULL } | 236 | .enter = NULL } |
237 | }; | 237 | }; |
238 | 238 | ||
239 | static struct cpuidle_state hsw_cstates[CPUIDLE_STATE_MAX] = { | 239 | static struct cpuidle_state hsw_cstates[] __initdata = { |
240 | { | 240 | { |
241 | .name = "C1-HSW", | 241 | .name = "C1-HSW", |
242 | .desc = "MWAIT 0x00", | 242 | .desc = "MWAIT 0x00", |
@@ -297,7 +297,7 @@ static struct cpuidle_state hsw_cstates[CPUIDLE_STATE_MAX] = { | |||
297 | .enter = NULL } | 297 | .enter = NULL } |
298 | }; | 298 | }; |
299 | 299 | ||
300 | static struct cpuidle_state atom_cstates[CPUIDLE_STATE_MAX] = { | 300 | static struct cpuidle_state atom_cstates[] __initdata = { |
301 | { | 301 | { |
302 | .name = "C1E-ATM", | 302 | .name = "C1E-ATM", |
303 | .desc = "MWAIT 0x00", | 303 | .desc = "MWAIT 0x00", |
@@ -329,6 +329,22 @@ static struct cpuidle_state atom_cstates[CPUIDLE_STATE_MAX] = { | |||
329 | { | 329 | { |
330 | .enter = NULL } | 330 | .enter = NULL } |
331 | }; | 331 | }; |
332 | static struct cpuidle_state avn_cstates[] __initdata = { | ||
333 | { | ||
334 | .name = "C1-AVN", | ||
335 | .desc = "MWAIT 0x00", | ||
336 | .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID, | ||
337 | .exit_latency = 2, | ||
338 | .target_residency = 2, | ||
339 | .enter = &intel_idle }, | ||
340 | { | ||
341 | .name = "C6-AVN", | ||
342 | .desc = "MWAIT 0x51", | ||
343 | .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | ||
344 | .exit_latency = 15, | ||
345 | .target_residency = 45, | ||
346 | .enter = &intel_idle }, | ||
347 | }; | ||
332 | 348 | ||
333 | /** | 349 | /** |
334 | * intel_idle | 350 | * intel_idle |
@@ -359,7 +375,7 @@ static int intel_idle(struct cpuidle_device *dev, | |||
359 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) | 375 | if (!(lapic_timer_reliable_states & (1 << (cstate)))) |
360 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); | 376 | clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); |
361 | 377 | ||
362 | if (!need_resched()) { | 378 | if (!current_set_polling_and_test()) { |
363 | 379 | ||
364 | __monitor((void *)¤t_thread_info()->flags, 0, 0); | 380 | __monitor((void *)¤t_thread_info()->flags, 0, 0); |
365 | smp_mb(); | 381 | smp_mb(); |
@@ -390,7 +406,7 @@ static int cpu_hotplug_notify(struct notifier_block *n, | |||
390 | int hotcpu = (unsigned long)hcpu; | 406 | int hotcpu = (unsigned long)hcpu; |
391 | struct cpuidle_device *dev; | 407 | struct cpuidle_device *dev; |
392 | 408 | ||
393 | switch (action & 0xf) { | 409 | switch (action & ~CPU_TASKS_FROZEN) { |
394 | case CPU_ONLINE: | 410 | case CPU_ONLINE: |
395 | 411 | ||
396 | if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) | 412 | if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE) |
@@ -462,6 +478,11 @@ static const struct idle_cpu idle_cpu_hsw = { | |||
462 | .disable_promotion_to_c1e = true, | 478 | .disable_promotion_to_c1e = true, |
463 | }; | 479 | }; |
464 | 480 | ||
481 | static const struct idle_cpu idle_cpu_avn = { | ||
482 | .state_table = avn_cstates, | ||
483 | .disable_promotion_to_c1e = true, | ||
484 | }; | ||
485 | |||
465 | #define ICPU(model, cpu) \ | 486 | #define ICPU(model, cpu) \ |
466 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } | 487 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu } |
467 | 488 | ||
@@ -483,6 +504,7 @@ static const struct x86_cpu_id intel_idle_ids[] = { | |||
483 | ICPU(0x3f, idle_cpu_hsw), | 504 | ICPU(0x3f, idle_cpu_hsw), |
484 | ICPU(0x45, idle_cpu_hsw), | 505 | ICPU(0x45, idle_cpu_hsw), |
485 | ICPU(0x46, idle_cpu_hsw), | 506 | ICPU(0x46, idle_cpu_hsw), |
507 | ICPU(0x4D, idle_cpu_avn), | ||
486 | {} | 508 | {} |
487 | }; | 509 | }; |
488 | MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); | 510 | MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); |
@@ -490,7 +512,7 @@ MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids); | |||
490 | /* | 512 | /* |
491 | * intel_idle_probe() | 513 | * intel_idle_probe() |
492 | */ | 514 | */ |
493 | static int intel_idle_probe(void) | 515 | static int __init intel_idle_probe(void) |
494 | { | 516 | { |
495 | unsigned int eax, ebx, ecx; | 517 | unsigned int eax, ebx, ecx; |
496 | const struct x86_cpu_id *id; | 518 | const struct x86_cpu_id *id; |
@@ -558,7 +580,7 @@ static void intel_idle_cpuidle_devices_uninit(void) | |||
558 | * intel_idle_cpuidle_driver_init() | 580 | * intel_idle_cpuidle_driver_init() |
559 | * allocate, initialize cpuidle_states | 581 | * allocate, initialize cpuidle_states |
560 | */ | 582 | */ |
561 | static int intel_idle_cpuidle_driver_init(void) | 583 | static int __init intel_idle_cpuidle_driver_init(void) |
562 | { | 584 | { |
563 | int cstate; | 585 | int cstate; |
564 | struct cpuidle_driver *drv = &intel_idle_driver; | 586 | struct cpuidle_driver *drv = &intel_idle_driver; |
@@ -628,7 +650,7 @@ static int intel_idle_cpu_init(int cpu) | |||
628 | int num_substates, mwait_hint, mwait_cstate, mwait_substate; | 650 | int num_substates, mwait_hint, mwait_cstate, mwait_substate; |
629 | 651 | ||
630 | if (cpuidle_state_table[cstate].enter == NULL) | 652 | if (cpuidle_state_table[cstate].enter == NULL) |
631 | continue; | 653 | break; |
632 | 654 | ||
633 | if (cstate + 1 > max_cstate) { | 655 | if (cstate + 1 > max_cstate) { |
634 | printk(PREFIX "max_cstate %d reached\n", max_cstate); | 656 | printk(PREFIX "max_cstate %d reached\n", max_cstate); |