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-rw-r--r--drivers/ide/pci/sgiioc4.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 16a0bce17d69..c1b667c53f2b 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -369,8 +369,7 @@ ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
369 hwif->sg_max_nents = IOC4_PRD_ENTRIES; 369 hwif->sg_max_nents = IOC4_PRD_ENTRIES;
370 370
371 pad = pci_alloc_consistent(dev, IOC4_IDE_CACHELINE_SIZE, 371 pad = pci_alloc_consistent(dev, IOC4_IDE_CACHELINE_SIZE,
372 (dma_addr_t *) &(hwif->dma_status)); 372 (dma_addr_t *)&hwif->extra_base);
373
374 if (pad) { 373 if (pad) {
375 ide_set_hwifdata(hwif, pad); 374 ide_set_hwifdata(hwif, pad);
376 return 0; 375 return 0;
@@ -439,7 +438,7 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
439 438
440 /* Address of the Ending DMA */ 439 /* Address of the Ending DMA */
441 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE); 440 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE);
442 ending_dma_addr = cpu_to_le32(hwif->dma_status); 441 ending_dma_addr = cpu_to_le32(hwif->extra_base);
443 writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4)); 442 writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4));
444 443
445 writel(dma_direction, (void __iomem *)ioc4_dma_addr); 444 writel(dma_direction, (void __iomem *)ioc4_dma_addr);