7 files changed, 68 insertions, 81 deletions

diff --git a/drivers/ide/cs5536.c b/drivers/ide/cs5536.c
index 353a35bbba63..0332a95eefd4 100644
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -236,6 +236,7 @@ static const struct ide_dma_ops cs5536_dma_ops = {
         .dma_test_irq           = ide_dma_test_irq,
         .dma_lost_irq           = ide_dma_lost_irq,
         .dma_timer_expiry       = ide_dma_sff_timer_expiry,
+        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
 static const struct ide_port_info cs5536_info = {
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
index a0eb87f59134..0feb66c720e1 100644
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -3,7 +3,7 @@
  * Portions Copyright (C) 2001          Sun Microsystems, Inc.
  * Portions Copyright (C) 2003          Red Hat Inc
  * Portions Copyright (C) 2007          Bartlomiej Zolnierkiewicz
- * Portions Copyright (C) 2005-2008     MontaVista Software, Inc.
+ * Portions Copyright (C) 2005-2009     MontaVista Software, Inc.
  *
  * Thanks to HighPoint Technologies for their assistance, and hardware.
  * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
@@ -114,6 +114,8 @@
  *   the register setting lists into the table indexed by the clock selected
  * - set the correct hwif->ultra_mask for each individual chip
  * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
+ * - stop resetting HPT370's state machine before each DMA transfer as that has
+ *   caused more harm than good
  *      Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
  */
 
@@ -133,7 +135,7 @@
 #define DRV_NAME "hpt366"
 
 /* various tuning parameters */
-#define HPT_RESET_STATE_ENGINE
+#undef  HPT_RESET_STATE_ENGINE
 #undef  HPT_DELAY_INTERRUPT
 
 static const char *quirk_drives[] = {
@@ -808,7 +810,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
         /* get DMA command mode */
         dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
         /* stop DMA */
-        outb(dma_cmd & ~0x1, hwif->dma_base + ATA_DMA_CMD);
+        outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
         hpt370_clear_engine(drive);
 }
 
@@ -825,11 +827,11 @@ static int hpt370_dma_end(ide_drive_t *drive)
         ide_hwif_t *hwif        = drive->hwif;
         u8  dma_stat            = inb(hwif->dma_base + ATA_DMA_STATUS);
 
-        if (dma_stat & 0x01) {
+        if (dma_stat & ATA_DMA_ACTIVE) {
                 /* wait a little */
                 udelay(20);
                 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
-                if (dma_stat & 0x01)
+                if (dma_stat & ATA_DMA_ACTIVE)
                         hpt370_irq_timeout(drive);
         }
         return ide_dma_end(drive);
@@ -851,7 +853,7 @@ static int hpt374_dma_test_irq(ide_drive_t *drive)
 
         dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
         /* return 1 if INTR asserted */
-        if (dma_stat & 4)
+        if (dma_stat & ATA_DMA_INTR)
                 return 1;
 
         return 0;
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 3aec19d1fdfc..925eb9e245d1 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -312,7 +312,6 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
         ide_hwif_t *hwif = drive->hwif;
         struct request *rq = hwif->rq;
         int err, sense_key, do_end_request = 0;
-        u8 quiet = rq->cmd_flags & REQ_QUIET;
 
         /* get the IDE error register */
         err = ide_read_error(drive);
@@ -347,7 +346,7 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
                 } else {
                         cdrom_saw_media_change(drive);
 
-                        if (blk_fs_request(rq) && !quiet)
+                        if (blk_fs_request(rq) && !blk_rq_quiet(rq))
                                 printk(KERN_ERR PFX "%s: tray open\n",
                                         drive->name);
                 }
@@ -382,7 +381,7 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
                  * No point in retrying after an illegal request or data
                  * protect error.
                  */
-                if (!quiet)
+                if (!blk_rq_quiet(rq))
                         ide_dump_status(drive, "command error", stat);
                 do_end_request = 1;
                 break;
@@ -391,14 +390,14 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
                  * No point in re-trying a zillion times on a bad sector.
                  * If we got here the error is not correctable.
                  */
-                if (!quiet)
+                if (!blk_rq_quiet(rq))
                         ide_dump_status(drive, "media error "
                                         "(bad sector)", stat);
                 do_end_request = 1;
                 break;
         case BLANK_CHECK:
                 /* disk appears blank? */
-                if (!quiet)
+                if (!blk_rq_quiet(rq))
                         ide_dump_status(drive, "media error (blank)",
                                         stat);
                 do_end_request = 1;
@@ -609,7 +608,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
         struct request *rq = hwif->rq;
         ide_expiry_t *expiry = NULL;
         int dma_error = 0, dma, thislen, uptodate = 0;
-        int write = (rq_data_dir(rq) == WRITE) ? 1 : 0, rc, nsectors;
+        int write = (rq_data_dir(rq) == WRITE) ? 1 : 0, rc = 0, nsectors;
         int sense = blk_sense_request(rq);
         unsigned int timeout;
         u16 len;
diff --git a/drivers/ide/ide-gd.c b/drivers/ide/ide-gd.c
index 1aebdf1a4f58..4b6b71e2cdf5 100644
--- a/drivers/ide/ide-gd.c
+++ b/drivers/ide/ide-gd.c
@@ -7,6 +7,7 @@
 #include <linux/mutex.h>
 #include <linux/ide.h>
 #include <linux/hdreg.h>
+#include <linux/dmi.h>
 
 #if !defined(CONFIG_DEBUG_BLOCK_EXT_DEVT)
 #define IDE_DISK_MINORS         (1 << PARTN_BITS)
@@ -99,6 +100,19 @@ static void ide_gd_resume(ide_drive_t *drive)
                 (void)drive->disk_ops->get_capacity(drive);
 }
 
+static const struct dmi_system_id ide_coldreboot_table[] = {
+        {
+                /* Acer TravelMate 66x cuts power during reboot */
+                .ident   = "Acer TravelMate 660",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 660"),
+                },
+        },
+
+        { }     /* terminate list */
+};
+
 static void ide_gd_shutdown(ide_drive_t *drive)
 {
 #ifdef  CONFIG_ALPHA
@@ -115,7 +129,8 @@ static void ide_gd_shutdown(ide_drive_t *drive)
            the disk to expire its write cache. */
         if (system_state != SYSTEM_POWER_OFF) {
 #else
-        if (system_state == SYSTEM_RESTART) {
+        if (system_state == SYSTEM_RESTART &&
+                !dmi_check_system(ide_coldreboot_table)) {
 #endif
                 drive->disk_ops->flush(drive);
                 return;
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index 2ae02b8d7f8e..35dc38d3b2c5 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -102,11 +102,14 @@ void ide_complete_cmd(ide_drive_t *drive, struct ide_cmd *cmd, u8 stat, u8 err)
                         drive->dev_flags |= IDE_DFLAG_PARKED;
         }
 
-        if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE)
-                memcpy(rq->special, cmd, sizeof(*cmd));
+        if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE) {
+                struct ide_cmd *orig_cmd = rq->special;
 
-        if (cmd->tf_flags & IDE_TFLAG_DYN)
-                kfree(cmd);
+                if (cmd->tf_flags & IDE_TFLAG_DYN)
+                        kfree(orig_cmd);
+                else
+                        memcpy(orig_cmd, cmd, sizeof(*cmd));
+        }
 }
 
 /* obsolete, blk_rq_bytes() should be used instead */
diff --git a/drivers/ide/palm_bk3710.c b/drivers/ide/palm_bk3710.c
index c7acca0b8733..09d813d313f4 100644
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -39,27 +39,12 @@
 /* Primary Control Offset */
 #define IDE_PALM_ATA_PRI_CTL_OFFSET 0x3F6
 
-/*
- * PalmChip 3710 IDE Controller UDMA timing structure Definition
- */
-struct palm_bk3710_udmatiming {
-        unsigned int rptime;    /* Ready to pause time  */
-        unsigned int cycletime; /* Cycle Time           */
-};
-
 #define BK3710_BMICP            0x00
 #define BK3710_BMISP            0x02
 #define BK3710_BMIDTP           0x04
-#define BK3710_BMICS            0x08
-#define BK3710_BMISS            0x0A
-#define BK3710_BMIDTS           0x0C
 #define BK3710_IDETIMP          0x40
-#define BK3710_IDETIMS          0x42
-#define BK3710_SIDETIM          0x44
-#define BK3710_SLEWCTL          0x45
 #define BK3710_IDESTATUS        0x47
 #define BK3710_UDMACTL          0x48
-#define BK3710_UDMATIM          0x4A
 #define BK3710_MISCCTL          0x50
 #define BK3710_REGSTB           0x54
 #define BK3710_REGRCVR          0x58
@@ -71,17 +56,22 @@ struct palm_bk3710_udmatiming {
 #define BK3710_UDMATRP          0x70
 #define BK3710_UDMAENV          0x74
 #define BK3710_IORDYTMP         0x78
-#define BK3710_IORDYTMS         0x7C
 
 static unsigned ideclk_period; /* in nanoseconds */
 
+struct palm_bk3710_udmatiming {
+        unsigned int rptime;    /* tRP -- Ready to pause time (nsec) */
+        unsigned int cycletime; /* tCYCTYP2/2 -- avg Cycle Time (nsec) */
+                                /* tENV is always a minimum of 20 nsec */
+};
+
 static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = {
-        {160, 240},             /* UDMA Mode 0 */
-        {125, 160},             /* UDMA Mode 1 */
-        {100, 120},             /* UDMA Mode 2 */
-        {100, 90},              /* UDMA Mode 3 */
-        {100, 60},              /* UDMA Mode 4 */
-        {85,  40},              /* UDMA Mode 5 */
+        { 160, 240 / 2 },       /* UDMA Mode 0 */
+        { 125, 160 / 2 },       /* UDMA Mode 1 */
+        { 100, 120 / 2 },       /* UDMA Mode 2 */
+        { 100,  90 / 2 },       /* UDMA Mode 3 */
+        { 100,  60 / 2 },       /* UDMA Mode 4 */
+        {  85,  40 / 2 },       /* UDMA Mode 5 */
 };
 
 static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
@@ -98,11 +88,6 @@ static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
         trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime,
                            ideclk_period) - 1;
 
-        /* udmatim Register */
-        val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0);
-        val16 |= (mode << (dev ? 4 : 0));
-        writew(val16, base + BK3710_UDMATIM);
-
         /* udmastb Ultra DMA Access Strobe Width */
         val32 = readl(base + BK3710_UDMASTB) & (0xFF << (dev ? 0 : 8));
         val32 |= (t0 << (dev ? 8 : 0));
@@ -163,10 +148,11 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
         u32 val32;
         struct ide_timing *t;
 
+        t = ide_timing_find_mode(XFER_PIO_0 + mode);
+
         /* PIO Data Setup */
         t0 = DIV_ROUND_UP(cycletime, ideclk_period);
-        t2 = DIV_ROUND_UP(ide_timing_find_mode(XFER_PIO_0 + mode)->active,
-                          ideclk_period);
+        t2 = DIV_ROUND_UP(t->active, ideclk_period);
 
         t2i = t0 - t2 - 1;
         t2 -= 1;
@@ -187,7 +173,6 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
         }
 
         /* TASKFILE Setup */
-        t = ide_timing_find_mode(XFER_PIO_0 + mode);
         t0 = DIV_ROUND_UP(t->cyc8b, ideclk_period);
         t2 = DIV_ROUND_UP(t->act8b, ideclk_period);
 
@@ -236,42 +221,23 @@ static void palm_bk3710_set_pio_mode(ide_drive_t *drive, u8 pio)
 static void __devinit palm_bk3710_chipinit(void __iomem *base)
 {
         /*
-         * enable the reset_en of ATA controller so that when ata signals
-         * are brought out, by writing into device config. at that
-         * time por_n signal should not be 'Z' and have a stable value.
+         * REVISIT:  the ATA reset signal needs to be managed through a
+         * GPIO, which means it should come from platform_data.  Until
+         * we get and use such information, we have to trust that things
+         * have been reset before we get here.
          */
-        writel(0x0300, base + BK3710_MISCCTL);
-
-        /* wait for some time and deassert the reset of ATA Device. */
-        mdelay(100);
-
-        /* Deassert the Reset */
-        writel(0x0200, base + BK3710_MISCCTL);
 
         /*
          * Program the IDETIMP Register Value based on the following assumptions
          *
          * (ATA_IDETIMP_IDEEN           , ENABLE ) |
-         * (ATA_IDETIMP_SLVTIMEN        , DISABLE) |
-         * (ATA_IDETIMP_RDYSMPL         , 70NS)    |
-         * (ATA_IDETIMP_RDYRCVRY        , 50NS)    |
-         * (ATA_IDETIMP_DMAFTIM1        , PIOCOMP) |
          * (ATA_IDETIMP_PREPOST1        , DISABLE) |
-         * (ATA_IDETIMP_RDYSEN1         , DISABLE) |
-         * (ATA_IDETIMP_PIOFTIM1        , DISABLE) |
-         * (ATA_IDETIMP_DMAFTIM0        , PIOCOMP) |
          * (ATA_IDETIMP_PREPOST0        , DISABLE) |
-         * (ATA_IDETIMP_RDYSEN0         , DISABLE) |
-         * (ATA_IDETIMP_PIOFTIM0        , DISABLE)
-         */
-        writew(0xB388, base + BK3710_IDETIMP);
-
-        /*
-         * Configure  SIDETIM  Register
-         * (ATA_SIDETIM_RDYSMPS1        ,120NS ) |
-         * (ATA_SIDETIM_RDYRCYS1        ,120NS )
+         *
+         * DM6446 silicon rev 2.1 and earlier have no observed net benefit
+         * from enabling prefetch/postwrite.
          */
-        writeb(0, base + BK3710_SIDETIM);
+        writew(BIT(15), base + BK3710_IDETIMP);
 
         /*
          * UDMACTL Ultra-ATA DMA Control
@@ -283,11 +249,11 @@ static void __devinit palm_bk3710_chipinit(void __iomem *base)
 
         /*
          * MISCCTL Miscellaneous Conrol Register
-         * (ATA_MISCCTL_RSTMODEP        , 1) |
-         * (ATA_MISCCTL_RESETP          , 0) |
+         * (ATA_MISCCTL_HWNHLD1P        , 1 cycle)
+         * (ATA_MISCCTL_HWNHLD0P        , 1 cycle)
          * (ATA_MISCCTL_TIMORIDE        , 1)
          */
-        writel(0x201, base + BK3710_MISCCTL);
+        writel(0x001, base + BK3710_MISCCTL);
 
         /*
          * IORDYTMP IORDY Timer for Primary Register
@@ -357,10 +323,9 @@ static int __init palm_bk3710_probe(struct platform_device *pdev)
 
         clk_enable(clk);
         rate = clk_get_rate(clk);
-        ideclk_period = 1000000000UL / rate;
 
-        /* Register the IDE interface with Linux ATA Interface */
-        memset(&hw, 0, sizeof(hw));
+        /* NOTE:  round *down* to meet minimum timings; we count in clocks */
+        ideclk_period = 1000000000UL / rate;
 
         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (mem == NULL) {
@@ -390,6 +355,7 @@ static int __init palm_bk3710_probe(struct platform_device *pdev)
         /* Configure the Palm Chip controller */
         palm_bk3710_chipinit(base);
 
+        memset(&hw, 0, sizeof(hw));
         for (i = 0; i < IDE_NR_PORTS - 2; i++)
                 hw.io_ports_array[i] = (unsigned long)
                                 (base + IDE_PALM_ATA_PRI_REG_OFFSET + i);
@@ -402,6 +368,7 @@ static int __init palm_bk3710_probe(struct platform_device *pdev)
         palm_bk3710_port_info.udma_mask = rate < 100000000 ? ATA_UDMA4 :
                                                              ATA_UDMA5;
 
+        /* Register the IDE interface with Linux */
         rc = ide_host_add(&palm_bk3710_port_info, hws, NULL);
         if (rc)
                 goto out;
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index 052b9bf1f8fb..f76e4e6b408f 100644
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -1682,7 +1682,7 @@ static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
          * The +2 is +1 for the stop command and +1 to allow for
          * aligning the start address to a multiple of 16 bytes.
          */
-        pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
+        pmif->dma_table_cpu = pci_alloc_consistent(
                 dev,
                 (MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
                 &hwif->dmatable_dma);