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-rw-r--r--drivers/ide/ide-timing.h1
-rw-r--r--drivers/ide/pci/amd74xx.c14
-rw-r--r--drivers/ide/pci/via82cxxx.c14
3 files changed, 14 insertions, 15 deletions
diff --git a/drivers/ide/ide-timing.h b/drivers/ide/ide-timing.h
index 3b12ffe77071..2e91c5870b4c 100644
--- a/drivers/ide/ide-timing.h
+++ b/drivers/ide/ide-timing.h
@@ -95,7 +95,6 @@ static struct ide_timing ide_timing[] = {
95#define IDE_TIMING_UDMA 0x80 95#define IDE_TIMING_UDMA 0x80
96#define IDE_TIMING_ALL 0xff 96#define IDE_TIMING_ALL 0xff
97 97
98#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
99#define ENOUGH(v,unit) (((v)-1)/(unit)+1) 98#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
100#define EZ(v,unit) ((v)?ENOUGH(v,unit):0) 99#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
101 100
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index efcf54338be7..a373101747b6 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -53,20 +53,20 @@ static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask,
53 u8 t = 0, offset = amd_offset(dev); 53 u8 t = 0, offset = amd_offset(dev);
54 54
55 pci_read_config_byte(dev, AMD_ADDRESS_SETUP + offset, &t); 55 pci_read_config_byte(dev, AMD_ADDRESS_SETUP + offset, &t);
56 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1)); 56 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
57 pci_write_config_byte(dev, AMD_ADDRESS_SETUP + offset, t); 57 pci_write_config_byte(dev, AMD_ADDRESS_SETUP + offset, t);
58 58
59 pci_write_config_byte(dev, AMD_8BIT_TIMING + offset + (1 - (dn >> 1)), 59 pci_write_config_byte(dev, AMD_8BIT_TIMING + offset + (1 - (dn >> 1)),
60 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1)); 60 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
61 61
62 pci_write_config_byte(dev, AMD_DRIVE_TIMING + offset + (3 - dn), 62 pci_write_config_byte(dev, AMD_DRIVE_TIMING + offset + (3 - dn),
63 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); 63 ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
64 64
65 switch (udma_mask) { 65 switch (udma_mask) {
66 case ATA_UDMA2: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; 66 case ATA_UDMA2: t = timing->udma ? (0xc0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
67 case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; 67 case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 2, 10)]) : 0x03; break;
68 case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; 68 case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 10)]) : 0x03; break;
69 case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; 69 case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 15)]) : 0x03; break;
70 default: return; 70 default: return;
71 } 71 }
72 72
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index 566e0ecb8db1..e8c2570003ff 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -120,21 +120,21 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
120 120
121 if (~vdev->via_config->flags & VIA_BAD_AST) { 121 if (~vdev->via_config->flags & VIA_BAD_AST) {
122 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t); 122 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
123 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1)); 123 t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
124 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t); 124 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
125 } 125 }
126 126
127 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)), 127 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
128 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1)); 128 ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
129 129
130 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), 130 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
131 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); 131 ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
132 132
133 switch (vdev->via_config->udma_mask) { 133 switch (vdev->via_config->udma_mask) {
134 case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; 134 case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
135 case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; 135 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
136 case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; 136 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
137 case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; 137 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
138 default: return; 138 default: return;
139 } 139 }
140 140