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-rw-r--r--drivers/ide/arm/icside.c16
-rw-r--r--drivers/ide/cris/ide-cris.c2
-rw-r--r--drivers/ide/ide-cd.c6
-rw-r--r--drivers/ide/ide-cd.h2
-rw-r--r--drivers/ide/ide-disk.c8
-rw-r--r--drivers/ide/ide-dma.c110
-rw-r--r--drivers/ide/ide-io.c4
-rw-r--r--drivers/ide/ide-iops.c8
-rw-r--r--drivers/ide/ide-probe.c10
-rw-r--r--drivers/ide/ide-proc.c34
-rw-r--r--drivers/ide/ide-timing.h56
-rw-r--r--drivers/ide/ide.c33
-rw-r--r--drivers/ide/legacy/hd.c78
-rw-r--r--drivers/ide/legacy/macide.c14
-rw-r--r--drivers/ide/mips/au1xxx-ide.c24
-rw-r--r--drivers/ide/pci/aec62xx.c119
-rw-r--r--drivers/ide/pci/alim15x3.c80
-rw-r--r--drivers/ide/pci/amd74xx.c133
-rw-r--r--drivers/ide/pci/atiixp.c5
-rw-r--r--drivers/ide/pci/cmd64x.c139
-rw-r--r--drivers/ide/pci/cs5530.c2
-rw-r--r--drivers/ide/pci/cs5535.c6
-rw-r--r--drivers/ide/pci/hpt366.c188
-rw-r--r--drivers/ide/pci/it8213.c8
-rw-r--r--drivers/ide/pci/it821x.c9
-rw-r--r--drivers/ide/pci/jmicron.c20
-rw-r--r--drivers/ide/pci/pdc202xx_new.c9
-rw-r--r--drivers/ide/pci/pdc202xx_old.c35
-rw-r--r--drivers/ide/pci/piix.c51
-rw-r--r--drivers/ide/pci/scc_pata.c2
-rw-r--r--drivers/ide/pci/serverworks.c116
-rw-r--r--drivers/ide/pci/sgiioc4.c20
-rw-r--r--drivers/ide/pci/siimage.c18
-rw-r--r--drivers/ide/pci/sis5513.c42
-rw-r--r--drivers/ide/pci/sl82c105.c24
-rw-r--r--drivers/ide/pci/slc90e66.c5
-rw-r--r--drivers/ide/pci/tc86c001.c4
-rw-r--r--drivers/ide/pci/via82cxxx.c184
-rw-r--r--drivers/ide/ppc/pmac.c42
39 files changed, 744 insertions, 922 deletions
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index 66f826252aee..444a0b84f5bd 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -448,23 +448,21 @@ static int icside_dma_test_irq(ide_drive_t *drive)
448 ICS_ARCIN_V6_INTRSTAT_1)) & 1; 448 ICS_ARCIN_V6_INTRSTAT_1)) & 1;
449} 449}
450 450
451static int icside_dma_timeout(ide_drive_t *drive) 451static void icside_dma_timeout(ide_drive_t *drive)
452{ 452{
453 printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name); 453 printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name);
454 454
455 if (icside_dma_test_irq(drive)) 455 if (icside_dma_test_irq(drive))
456 return 0; 456 return;
457 457
458 ide_dump_status(drive, "DMA timeout", 458 ide_dump_status(drive, "DMA timeout", HWIF(drive)->INB(IDE_STATUS_REG));
459 HWIF(drive)->INB(IDE_STATUS_REG));
460 459
461 return icside_dma_end(drive); 460 icside_dma_end(drive);
462} 461}
463 462
464static int icside_dma_lostirq(ide_drive_t *drive) 463static void icside_dma_lost_irq(ide_drive_t *drive)
465{ 464{
466 printk(KERN_ERR "%s: IRQ lost\n", drive->name); 465 printk(KERN_ERR "%s: IRQ lost\n", drive->name);
467 return 1;
468} 466}
469 467
470static void icside_dma_init(ide_hwif_t *hwif) 468static void icside_dma_init(ide_hwif_t *hwif)
@@ -490,8 +488,8 @@ static void icside_dma_init(ide_hwif_t *hwif)
490 hwif->dma_start = icside_dma_start; 488 hwif->dma_start = icside_dma_start;
491 hwif->ide_dma_end = icside_dma_end; 489 hwif->ide_dma_end = icside_dma_end;
492 hwif->ide_dma_test_irq = icside_dma_test_irq; 490 hwif->ide_dma_test_irq = icside_dma_test_irq;
493 hwif->ide_dma_timeout = icside_dma_timeout; 491 hwif->dma_timeout = icside_dma_timeout;
494 hwif->ide_dma_lostirq = icside_dma_lostirq; 492 hwif->dma_lost_irq = icside_dma_lost_irq;
495 493
496 hwif->drives[0].autodma = hwif->autodma; 494 hwif->drives[0].autodma = hwif->autodma;
497 hwif->drives[1].autodma = hwif->autodma; 495 hwif->drives[1].autodma = hwif->autodma;
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index ca0341c05e55..886091bc7db0 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -819,7 +819,7 @@ init_e100_ide (void)
819 hwif->dma_host_off = &cris_dma_off; 819 hwif->dma_host_off = &cris_dma_off;
820 hwif->dma_host_on = &cris_dma_on; 820 hwif->dma_host_on = &cris_dma_on;
821 hwif->dma_off_quietly = &cris_dma_off; 821 hwif->dma_off_quietly = &cris_dma_off;
822 hwif->udma_four = 0; 822 hwif->cbl = ATA_CBL_PATA40;
823 hwif->ultra_mask = cris_ultra_mask; 823 hwif->ultra_mask = cris_ultra_mask;
824 hwif->mwdma_mask = 0x07; /* Multiword DMA 0-2 */ 824 hwif->mwdma_mask = 0x07; /* Multiword DMA 0-2 */
825 hwif->autodma = 1; 825 hwif->autodma = 1;
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c
index 252ab8295edf..1486eb212ccc 100644
--- a/drivers/ide/ide-cd.c
+++ b/drivers/ide/ide-cd.c
@@ -481,7 +481,7 @@ void cdrom_analyze_sense_data(ide_drive_t *drive,
481 else 481 else
482 printk(" Unknown Error Type: "); 482 printk(" Unknown Error Type: ");
483 483
484 if (sense->sense_key < ARY_LEN(sense_key_texts)) 484 if (sense->sense_key < ARRAY_SIZE(sense_key_texts))
485 s = sense_key_texts[sense->sense_key]; 485 s = sense_key_texts[sense->sense_key];
486 486
487 printk("%s -- (Sense key=0x%02x)\n", s, sense->sense_key); 487 printk("%s -- (Sense key=0x%02x)\n", s, sense->sense_key);
@@ -491,7 +491,7 @@ void cdrom_analyze_sense_data(ide_drive_t *drive,
491 sense->ascq); 491 sense->ascq);
492 s = buf; 492 s = buf;
493 } else { 493 } else {
494 int lo = 0, mid, hi = ARY_LEN(sense_data_texts); 494 int lo = 0, mid, hi = ARRAY_SIZE(sense_data_texts);
495 unsigned long key = (sense->sense_key << 16); 495 unsigned long key = (sense->sense_key << 16);
496 key |= (sense->asc << 8); 496 key |= (sense->asc << 8);
497 if (!(sense->ascq >= 0x80 && sense->ascq <= 0xdd)) 497 if (!(sense->ascq >= 0x80 && sense->ascq <= 0xdd))
@@ -524,7 +524,7 @@ void cdrom_analyze_sense_data(ide_drive_t *drive,
524 524
525 if (failed_command != NULL) { 525 if (failed_command != NULL) {
526 526
527 int lo=0, mid, hi= ARY_LEN (packet_command_texts); 527 int lo=0, mid, hi= ARRAY_SIZE(packet_command_texts);
528 s = NULL; 528 s = NULL;
529 529
530 while (hi > lo) { 530 while (hi > lo) {
diff --git a/drivers/ide/ide-cd.h b/drivers/ide/ide-cd.h
index ad1f2ed14a37..228b29c5d2e4 100644
--- a/drivers/ide/ide-cd.h
+++ b/drivers/ide/ide-cd.h
@@ -498,8 +498,6 @@ struct cdrom_info {
498 * Descriptions of ATAPI error codes. 498 * Descriptions of ATAPI error codes.
499 */ 499 */
500 500
501#define ARY_LEN(a) ((sizeof(a) / sizeof(a[0])))
502
503/* This stuff should be in cdrom.h, since it is now generic... */ 501/* This stuff should be in cdrom.h, since it is now generic... */
504 502
505/* ATAPI sense keys (from table 140 of ATAPI 2.6) */ 503/* ATAPI sense keys (from table 140 of ATAPI 2.6) */
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
index dc2175c81f5e..b1304a7f3e0a 100644
--- a/drivers/ide/ide-disk.c
+++ b/drivers/ide/ide-disk.c
@@ -1190,11 +1190,11 @@ static int idedisk_ioctl(struct inode *inode, struct file *file,
1190 return generic_ide_ioctl(drive, file, bdev, cmd, arg); 1190 return generic_ide_ioctl(drive, file, bdev, cmd, arg);
1191 1191
1192read_val: 1192read_val:
1193 down(&ide_setting_sem); 1193 mutex_lock(&ide_setting_mtx);
1194 spin_lock_irqsave(&ide_lock, flags); 1194 spin_lock_irqsave(&ide_lock, flags);
1195 err = *val; 1195 err = *val;
1196 spin_unlock_irqrestore(&ide_lock, flags); 1196 spin_unlock_irqrestore(&ide_lock, flags);
1197 up(&ide_setting_sem); 1197 mutex_unlock(&ide_setting_mtx);
1198 return err >= 0 ? put_user(err, (long __user *)arg) : err; 1198 return err >= 0 ? put_user(err, (long __user *)arg) : err;
1199 1199
1200set_val: 1200set_val:
@@ -1204,9 +1204,9 @@ set_val:
1204 if (!capable(CAP_SYS_ADMIN)) 1204 if (!capable(CAP_SYS_ADMIN))
1205 err = -EACCES; 1205 err = -EACCES;
1206 else { 1206 else {
1207 down(&ide_setting_sem); 1207 mutex_lock(&ide_setting_mtx);
1208 err = setfunc(drive, arg); 1208 err = setfunc(drive, arg);
1209 up(&ide_setting_sem); 1209 mutex_unlock(&ide_setting_mtx);
1210 } 1210 }
1211 } 1211 }
1212 return err; 1212 return err;
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index ead141e2db9e..5fe1d72ab451 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -91,45 +91,45 @@
91 91
92static const struct drive_list_entry drive_whitelist [] = { 92static const struct drive_list_entry drive_whitelist [] = {
93 93
94 { "Micropolis 2112A" , "ALL" }, 94 { "Micropolis 2112A" , NULL },
95 { "CONNER CTMA 4000" , "ALL" }, 95 { "CONNER CTMA 4000" , NULL },
96 { "CONNER CTT8000-A" , "ALL" }, 96 { "CONNER CTT8000-A" , NULL },
97 { "ST34342A" , "ALL" }, 97 { "ST34342A" , NULL },
98 { NULL , NULL } 98 { NULL , NULL }
99}; 99};
100 100
101static const struct drive_list_entry drive_blacklist [] = { 101static const struct drive_list_entry drive_blacklist [] = {
102 102
103 { "WDC AC11000H" , "ALL" }, 103 { "WDC AC11000H" , NULL },
104 { "WDC AC22100H" , "ALL" }, 104 { "WDC AC22100H" , NULL },
105 { "WDC AC32500H" , "ALL" }, 105 { "WDC AC32500H" , NULL },
106 { "WDC AC33100H" , "ALL" }, 106 { "WDC AC33100H" , NULL },
107 { "WDC AC31600H" , "ALL" }, 107 { "WDC AC31600H" , NULL },
108 { "WDC AC32100H" , "24.09P07" }, 108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" }, 109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , "ALL" }, 110 { "Compaq CRD-8241B" , NULL },
111 { "CRD-8400B" , "ALL" }, 111 { "CRD-8400B" , NULL },
112 { "CRD-8480B", "ALL" }, 112 { "CRD-8480B", NULL },
113 { "CRD-8482B", "ALL" }, 113 { "CRD-8482B", NULL },
114 { "CRD-84" , "ALL" }, 114 { "CRD-84" , NULL },
115 { "SanDisk SDP3B" , "ALL" }, 115 { "SanDisk SDP3B" , NULL },
116 { "SanDisk SDP3B-64" , "ALL" }, 116 { "SanDisk SDP3B-64" , NULL },
117 { "SANYO CD-ROM CRD" , "ALL" }, 117 { "SANYO CD-ROM CRD" , NULL },
118 { "HITACHI CDR-8" , "ALL" }, 118 { "HITACHI CDR-8" , NULL },
119 { "HITACHI CDR-8335" , "ALL" }, 119 { "HITACHI CDR-8335" , NULL },
120 { "HITACHI CDR-8435" , "ALL" }, 120 { "HITACHI CDR-8435" , NULL },
121 { "Toshiba CD-ROM XM-6202B" , "ALL" }, 121 { "Toshiba CD-ROM XM-6202B" , NULL },
122 { "TOSHIBA CD-ROM XM-1702BC", "ALL" }, 122 { "TOSHIBA CD-ROM XM-1702BC", NULL },
123 { "CD-532E-A" , "ALL" }, 123 { "CD-532E-A" , NULL },
124 { "E-IDE CD-ROM CR-840", "ALL" }, 124 { "E-IDE CD-ROM CR-840", NULL },
125 { "CD-ROM Drive/F5A", "ALL" }, 125 { "CD-ROM Drive/F5A", NULL },
126 { "WPI CDD-820", "ALL" }, 126 { "WPI CDD-820", NULL },
127 { "SAMSUNG CD-ROM SC-148C", "ALL" }, 127 { "SAMSUNG CD-ROM SC-148C", NULL },
128 { "SAMSUNG CD-ROM SC", "ALL" }, 128 { "SAMSUNG CD-ROM SC", NULL },
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" }, 129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
130 { "_NEC DV5800A", "ALL" }, 130 { "_NEC DV5800A", NULL },
131 { "SAMSUNG CD-ROM SN-124", "N001" }, 131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", "ALL" }, 132 { "Seagate STT20000A", NULL },
133 { NULL , NULL } 133 { NULL , NULL }
134 134
135}; 135};
@@ -147,8 +147,8 @@ int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *driv
147{ 147{
148 for ( ; drive_table->id_model ; drive_table++) 148 for ( ; drive_table->id_model ; drive_table++)
149 if ((!strcmp(drive_table->id_model, id->model)) && 149 if ((!strcmp(drive_table->id_model, id->model)) &&
150 ((strstr(id->fw_rev, drive_table->id_firmware)) || 150 (!drive_table->id_firmware ||
151 (!strcmp(drive_table->id_firmware, "ALL")))) 151 strstr(id->fw_rev, drive_table->id_firmware)))
152 return 1; 152 return 1;
153 return 0; 153 return 0;
154} 154}
@@ -702,8 +702,22 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
702 mask = id->dma_mword & hwif->mwdma_mask; 702 mask = id->dma_mword & hwif->mwdma_mask;
703 break; 703 break;
704 case XFER_SW_DMA_0: 704 case XFER_SW_DMA_0:
705 if (id->field_valid & 2) 705 if (id->field_valid & 2) {
706 mask = id->dma_1word & hwif->swdma_mask; 706 mask = id->dma_1word & hwif->swdma_mask;
707 } else if (id->tDMA) {
708 /*
709 * ide_fix_driveid() doesn't convert ->tDMA to the
710 * CPU endianness so we need to do it here
711 */
712 u8 mode = le16_to_cpu(id->tDMA);
713
714 /*
715 * if the mode is valid convert it to the mask
716 * (the maximum allowed mode is XFER_SW_DMA_2)
717 */
718 if (mode <= 2)
719 mask = ((2 << mode) - 1) & hwif->swdma_mask;
720 }
707 break; 721 break;
708 default: 722 default:
709 BUG(); 723 BUG();
@@ -847,27 +861,27 @@ int ide_set_dma(ide_drive_t *drive)
847 return rc; 861 return rc;
848} 862}
849 863
850EXPORT_SYMBOL_GPL(ide_set_dma);
851
852#ifdef CONFIG_BLK_DEV_IDEDMA_PCI 864#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
853int __ide_dma_lostirq (ide_drive_t *drive) 865void ide_dma_lost_irq (ide_drive_t *drive)
854{ 866{
855 printk("%s: DMA interrupt recovery\n", drive->name); 867 printk("%s: DMA interrupt recovery\n", drive->name);
856 return 1;
857} 868}
858 869
859EXPORT_SYMBOL(__ide_dma_lostirq); 870EXPORT_SYMBOL(ide_dma_lost_irq);
860 871
861int __ide_dma_timeout (ide_drive_t *drive) 872void ide_dma_timeout (ide_drive_t *drive)
862{ 873{
874 ide_hwif_t *hwif = HWIF(drive);
875
863 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name); 876 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
864 if (HWIF(drive)->ide_dma_test_irq(drive))
865 return 0;
866 877
867 return HWIF(drive)->ide_dma_end(drive); 878 if (hwif->ide_dma_test_irq(drive))
879 return;
880
881 hwif->ide_dma_end(drive);
868} 882}
869 883
870EXPORT_SYMBOL(__ide_dma_timeout); 884EXPORT_SYMBOL(ide_dma_timeout);
871 885
872/* 886/*
873 * Needed for allowing full modular support of ide-driver 887 * Needed for allowing full modular support of ide-driver
@@ -1018,10 +1032,10 @@ void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_p
1018 hwif->ide_dma_end = &__ide_dma_end; 1032 hwif->ide_dma_end = &__ide_dma_end;
1019 if (!hwif->ide_dma_test_irq) 1033 if (!hwif->ide_dma_test_irq)
1020 hwif->ide_dma_test_irq = &__ide_dma_test_irq; 1034 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
1021 if (!hwif->ide_dma_timeout) 1035 if (!hwif->dma_timeout)
1022 hwif->ide_dma_timeout = &__ide_dma_timeout; 1036 hwif->dma_timeout = &ide_dma_timeout;
1023 if (!hwif->ide_dma_lostirq) 1037 if (!hwif->dma_lost_irq)
1024 hwif->ide_dma_lostirq = &__ide_dma_lostirq; 1038 hwif->dma_lost_irq = &ide_dma_lost_irq;
1025 1039
1026 if (hwif->chipset != ide_trm290) { 1040 if (hwif->chipset != ide_trm290) {
1027 u8 dma_stat = hwif->INB(hwif->dma_status); 1041 u8 dma_stat = hwif->INB(hwif->dma_status);
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index bfe8f1b712ba..c5b5011da56e 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -1350,7 +1350,7 @@ static ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
1350 hwif->INB(IDE_STATUS_REG)); 1350 hwif->INB(IDE_STATUS_REG));
1351 } else { 1351 } else {
1352 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name); 1352 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
1353 (void) hwif->ide_dma_timeout(drive); 1353 hwif->dma_timeout(drive);
1354 } 1354 }
1355 1355
1356 /* 1356 /*
@@ -1466,7 +1466,7 @@ void ide_timer_expiry (unsigned long data)
1466 startstop = handler(drive); 1466 startstop = handler(drive);
1467 } else if (drive_is_ready(drive)) { 1467 } else if (drive_is_ready(drive)) {
1468 if (drive->waiting_for_dma) 1468 if (drive->waiting_for_dma)
1469 (void) hwgroup->hwif->ide_dma_lostirq(drive); 1469 hwgroup->hwif->dma_lost_irq(drive);
1470 (void)ide_ack_intr(hwif); 1470 (void)ide_ack_intr(hwif);
1471 printk(KERN_WARNING "%s: lost interrupt\n", drive->name); 1471 printk(KERN_WARNING "%s: lost interrupt\n", drive->name);
1472 startstop = handler(drive); 1472 startstop = handler(drive);
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index f0be5f665a0e..92578b6832e9 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -574,7 +574,10 @@ u8 eighty_ninty_three (ide_drive_t *drive)
574 ide_hwif_t *hwif = drive->hwif; 574 ide_hwif_t *hwif = drive->hwif;
575 struct hd_driveid *id = drive->id; 575 struct hd_driveid *id = drive->id;
576 576
577 if (hwif->udma_four == 0) 577 if (hwif->cbl == ATA_CBL_PATA40_SHORT)
578 return 1;
579
580 if (hwif->cbl != ATA_CBL_PATA80)
578 goto no_80w; 581 goto no_80w;
579 582
580 /* Check for SATA but only if we are ATA5 or higher */ 583 /* Check for SATA but only if we are ATA5 or higher */
@@ -600,7 +603,8 @@ no_80w:
600 603
601 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " 604 printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
602 "limiting max speed to UDMA33\n", 605 "limiting max speed to UDMA33\n",
603 drive->name, hwif->udma_four ? "drive" : "host"); 606 drive->name,
607 hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
604 608
605 drive->udma33_warned = 1; 609 drive->udma33_warned = 1;
606 610
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index f5ce22c38f82..cc5801399467 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -144,7 +144,7 @@ static inline void do_identify (ide_drive_t *drive, u8 cmd)
144 local_irq_enable(); 144 local_irq_enable();
145 ide_fix_driveid(id); 145 ide_fix_driveid(id);
146 146
147#if defined (CONFIG_SCSI_EATA_DMA) || defined (CONFIG_SCSI_EATA_PIO) || defined (CONFIG_SCSI_EATA) 147#if defined (CONFIG_SCSI_EATA_PIO) || defined (CONFIG_SCSI_EATA)
148 /* 148 /*
149 * EATA SCSI controllers do a hardware ATA emulation: 149 * EATA SCSI controllers do a hardware ATA emulation:
150 * Ignore them if there is a driver for them available. 150 * Ignore them if there is a driver for them available.
@@ -154,7 +154,7 @@ static inline void do_identify (ide_drive_t *drive, u8 cmd)
154 printk("%s: EATA SCSI HBA %.10s\n", drive->name, id->model); 154 printk("%s: EATA SCSI HBA %.10s\n", drive->name, id->model);
155 goto err_misc; 155 goto err_misc;
156 } 156 }
157#endif /* CONFIG_SCSI_EATA_DMA || CONFIG_SCSI_EATA_PIO */ 157#endif /* CONFIG_SCSI_EATA || CONFIG_SCSI_EATA_PIO */
158 158
159 /* 159 /*
160 * WIN_IDENTIFY returns little-endian info, 160 * WIN_IDENTIFY returns little-endian info,
@@ -1025,7 +1025,7 @@ static int init_irq (ide_hwif_t *hwif)
1025 BUG_ON(irqs_disabled()); 1025 BUG_ON(irqs_disabled());
1026 BUG_ON(hwif == NULL); 1026 BUG_ON(hwif == NULL);
1027 1027
1028 down(&ide_cfg_sem); 1028 mutex_lock(&ide_cfg_mtx);
1029 hwif->hwgroup = NULL; 1029 hwif->hwgroup = NULL;
1030#if MAX_HWIFS > 1 1030#if MAX_HWIFS > 1
1031 /* 1031 /*
@@ -1154,7 +1154,7 @@ static int init_irq (ide_hwif_t *hwif)
1154 printk(" (%sed with %s)", 1154 printk(" (%sed with %s)",
1155 hwif->sharing_irq ? "shar" : "serializ", match->name); 1155 hwif->sharing_irq ? "shar" : "serializ", match->name);
1156 printk("\n"); 1156 printk("\n");
1157 up(&ide_cfg_sem); 1157 mutex_unlock(&ide_cfg_mtx);
1158 return 0; 1158 return 0;
1159out_unlink: 1159out_unlink:
1160 spin_lock_irq(&ide_lock); 1160 spin_lock_irq(&ide_lock);
@@ -1177,7 +1177,7 @@ out_unlink:
1177 } 1177 }
1178 spin_unlock_irq(&ide_lock); 1178 spin_unlock_irq(&ide_lock);
1179out_up: 1179out_up:
1180 up(&ide_cfg_sem); 1180 mutex_unlock(&ide_cfg_mtx);
1181 return 1; 1181 return 1;
1182} 1182}
1183 1183
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c
index ea94c9aa1220..fc1d8ae6a803 100644
--- a/drivers/ide/ide-proc.c
+++ b/drivers/ide/ide-proc.c
@@ -156,7 +156,7 @@ static int __ide_add_setting(ide_drive_t *drive, const char *name, int rw, int d
156{ 156{
157 ide_settings_t **p = (ide_settings_t **) &drive->settings, *setting = NULL; 157 ide_settings_t **p = (ide_settings_t **) &drive->settings, *setting = NULL;
158 158
159 down(&ide_setting_sem); 159 mutex_lock(&ide_setting_mtx);
160 while ((*p) && strcmp((*p)->name, name) < 0) 160 while ((*p) && strcmp((*p)->name, name) < 0)
161 p = &((*p)->next); 161 p = &((*p)->next);
162 if ((setting = kzalloc(sizeof(*setting), GFP_KERNEL)) == NULL) 162 if ((setting = kzalloc(sizeof(*setting), GFP_KERNEL)) == NULL)
@@ -177,10 +177,10 @@ static int __ide_add_setting(ide_drive_t *drive, const char *name, int rw, int d
177 if (auto_remove) 177 if (auto_remove)
178 setting->auto_remove = 1; 178 setting->auto_remove = 1;
179 *p = setting; 179 *p = setting;
180 up(&ide_setting_sem); 180 mutex_unlock(&ide_setting_mtx);
181 return 0; 181 return 0;
182abort: 182abort:
183 up(&ide_setting_sem); 183 mutex_unlock(&ide_setting_mtx);
184 kfree(setting); 184 kfree(setting);
185 return -1; 185 return -1;
186} 186}
@@ -224,7 +224,7 @@ static void __ide_remove_setting (ide_drive_t *drive, char *name)
224 * 224 *
225 * Automatically remove all the driver specific settings for this 225 * Automatically remove all the driver specific settings for this
226 * drive. This function may not be called from IRQ context. The 226 * drive. This function may not be called from IRQ context. The
227 * caller must hold ide_setting_sem. 227 * caller must hold ide_setting_mtx.
228 */ 228 */
229 229
230static void auto_remove_settings (ide_drive_t *drive) 230static void auto_remove_settings (ide_drive_t *drive)
@@ -269,7 +269,7 @@ static ide_settings_t *ide_find_setting_by_name(ide_drive_t *drive, char *name)
269 * @setting: drive setting 269 * @setting: drive setting
270 * 270 *
271 * Read a drive setting and return the value. The caller 271 * Read a drive setting and return the value. The caller
272 * must hold the ide_setting_sem when making this call. 272 * must hold the ide_setting_mtx when making this call.
273 * 273 *
274 * BUGS: the data return and error are the same return value 274 * BUGS: the data return and error are the same return value
275 * so an error -EINVAL and true return of the same value cannot 275 * so an error -EINVAL and true return of the same value cannot
@@ -306,7 +306,7 @@ static int ide_read_setting(ide_drive_t *drive, ide_settings_t *setting)
306 * @val: value 306 * @val: value
307 * 307 *
308 * Write a drive setting if it is possible. The caller 308 * Write a drive setting if it is possible. The caller
309 * must hold the ide_setting_sem when making this call. 309 * must hold the ide_setting_mtx when making this call.
310 * 310 *
311 * BUGS: the data return and error are the same return value 311 * BUGS: the data return and error are the same return value
312 * so an error -EINVAL and true return of the same value cannot 312 * so an error -EINVAL and true return of the same value cannot
@@ -367,7 +367,7 @@ static int set_xfer_rate (ide_drive_t *drive, int arg)
367 * @drive: drive being configured 367 * @drive: drive being configured
368 * 368 *
369 * Add the generic parts of the system settings to the /proc files. 369 * Add the generic parts of the system settings to the /proc files.
370 * The caller must not be holding the ide_setting_sem. 370 * The caller must not be holding the ide_setting_mtx.
371 */ 371 */
372 372
373void ide_add_generic_settings (ide_drive_t *drive) 373void ide_add_generic_settings (ide_drive_t *drive)
@@ -408,7 +408,7 @@ static int proc_ide_read_settings
408 408
409 proc_ide_settings_warn(); 409 proc_ide_settings_warn();
410 410
411 down(&ide_setting_sem); 411 mutex_lock(&ide_setting_mtx);
412 out += sprintf(out, "name\t\t\tvalue\t\tmin\t\tmax\t\tmode\n"); 412 out += sprintf(out, "name\t\t\tvalue\t\tmin\t\tmax\t\tmode\n");
413 out += sprintf(out, "----\t\t\t-----\t\t---\t\t---\t\t----\n"); 413 out += sprintf(out, "----\t\t\t-----\t\t---\t\t---\t\t----\n");
414 while(setting) { 414 while(setting) {
@@ -428,7 +428,7 @@ static int proc_ide_read_settings
428 setting = setting->next; 428 setting = setting->next;
429 } 429 }
430 len = out - page; 430 len = out - page;
431 up(&ide_setting_sem); 431 mutex_unlock(&ide_setting_mtx);
432 PROC_IDE_READ_RETURN(page,start,off,count,eof,len); 432 PROC_IDE_READ_RETURN(page,start,off,count,eof,len);
433} 433}
434 434
@@ -508,16 +508,16 @@ static int proc_ide_write_settings(struct file *file, const char __user *buffer,
508 ++p; 508 ++p;
509 } 509 }
510 510
511 down(&ide_setting_sem); 511 mutex_lock(&ide_setting_mtx);
512 setting = ide_find_setting_by_name(drive, name); 512 setting = ide_find_setting_by_name(drive, name);
513 if (!setting) 513 if (!setting)
514 { 514 {
515 up(&ide_setting_sem); 515 mutex_unlock(&ide_setting_mtx);
516 goto parse_error; 516 goto parse_error;
517 } 517 }
518 if (for_real) 518 if (for_real)
519 ide_write_setting(drive, setting, val * setting->div_factor / setting->mul_factor); 519 ide_write_setting(drive, setting, val * setting->div_factor / setting->mul_factor);
520 up(&ide_setting_sem); 520 mutex_unlock(&ide_setting_mtx);
521 } 521 }
522 } while (!for_real++); 522 } while (!for_real++);
523 free_page((unsigned long)buf); 523 free_page((unsigned long)buf);
@@ -705,7 +705,7 @@ EXPORT_SYMBOL(ide_proc_register_driver);
705 * Clean up the driver specific /proc files and IDE settings 705 * Clean up the driver specific /proc files and IDE settings
706 * for a given drive. 706 * for a given drive.
707 * 707 *
708 * Takes ide_setting_sem and ide_lock. 708 * Takes ide_setting_mtx and ide_lock.
709 * Caller must hold none of the locks. 709 * Caller must hold none of the locks.
710 */ 710 */
711 711
@@ -715,10 +715,10 @@ void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver)
715 715
716 ide_remove_proc_entries(drive->proc, driver->proc); 716 ide_remove_proc_entries(drive->proc, driver->proc);
717 717
718 down(&ide_setting_sem); 718 mutex_lock(&ide_setting_mtx);
719 spin_lock_irqsave(&ide_lock, flags); 719 spin_lock_irqsave(&ide_lock, flags);
720 /* 720 /*
721 * ide_setting_sem protects the settings list 721 * ide_setting_mtx protects the settings list
722 * ide_lock protects the use of settings 722 * ide_lock protects the use of settings
723 * 723 *
724 * so we need to hold both, ide_settings_sem because we want to 724 * so we need to hold both, ide_settings_sem because we want to
@@ -726,11 +726,11 @@ void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver)
726 * a setting out that is being used. 726 * a setting out that is being used.
727 * 727 *
728 * OTOH both ide_{read,write}_setting are only ever used under 728 * OTOH both ide_{read,write}_setting are only ever used under
729 * ide_setting_sem. 729 * ide_setting_mtx.
730 */ 730 */
731 auto_remove_settings(drive); 731 auto_remove_settings(drive);
732 spin_unlock_irqrestore(&ide_lock, flags); 732 spin_unlock_irqrestore(&ide_lock, flags);
733 up(&ide_setting_sem); 733 mutex_unlock(&ide_setting_mtx);
734} 734}
735 735
736EXPORT_SYMBOL(ide_proc_unregister_driver); 736EXPORT_SYMBOL(ide_proc_unregister_driver);
diff --git a/drivers/ide/ide-timing.h b/drivers/ide/ide-timing.h
index c0864b1e9228..e6cb8593b5ba 100644
--- a/drivers/ide/ide-timing.h
+++ b/drivers/ide/ide-timing.h
@@ -102,66 +102,16 @@ static struct ide_timing ide_timing[] = {
102#define EZ(v,unit) ((v)?ENOUGH(v,unit):0) 102#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
103 103
104#define XFER_MODE 0xf0 104#define XFER_MODE 0xf0
105#define XFER_UDMA_133 0x48
106#define XFER_UDMA_100 0x44
107#define XFER_UDMA_66 0x42
108#define XFER_UDMA 0x40
109#define XFER_MWDMA 0x20 105#define XFER_MWDMA 0x20
110#define XFER_SWDMA 0x10
111#define XFER_EPIO 0x01 106#define XFER_EPIO 0x01
112#define XFER_PIO 0x00 107#define XFER_PIO 0x00
113 108
114static short ide_find_best_mode(ide_drive_t *drive, int map) 109static short ide_find_best_pio_mode(ide_drive_t *drive)
115{ 110{
116 struct hd_driveid *id = drive->id; 111 struct hd_driveid *id = drive->id;
117 short best = 0; 112 short best = 0;
118 113
119 if (!id) 114 if (id->field_valid & 2) { /* EIDE PIO modes */
120 return XFER_PIO_SLOW;
121
122 if ((map & XFER_UDMA) && (id->field_valid & 4)) { /* Want UDMA and UDMA bitmap valid */
123
124 if ((map & XFER_UDMA_133) == XFER_UDMA_133)
125 if ((best = (id->dma_ultra & 0x0040) ? XFER_UDMA_6 : 0)) return best;
126
127 if ((map & XFER_UDMA_100) == XFER_UDMA_100)
128 if ((best = (id->dma_ultra & 0x0020) ? XFER_UDMA_5 : 0)) return best;
129
130 if ((map & XFER_UDMA_66) == XFER_UDMA_66)
131 if ((best = (id->dma_ultra & 0x0010) ? XFER_UDMA_4 :
132 (id->dma_ultra & 0x0008) ? XFER_UDMA_3 : 0)) return best;
133
134 if ((best = (id->dma_ultra & 0x0004) ? XFER_UDMA_2 :
135 (id->dma_ultra & 0x0002) ? XFER_UDMA_1 :
136 (id->dma_ultra & 0x0001) ? XFER_UDMA_0 : 0)) return best;
137 }
138
139 if ((map & XFER_MWDMA) && (id->field_valid & 2)) { /* Want MWDMA and drive has EIDE fields */
140
141 if ((best = (id->dma_mword & 0x0004) ? XFER_MW_DMA_2 :
142 (id->dma_mword & 0x0002) ? XFER_MW_DMA_1 :
143 (id->dma_mword & 0x0001) ? XFER_MW_DMA_0 : 0)) return best;
144 }
145
146 if (map & XFER_SWDMA) { /* Want SWDMA */
147
148 if (id->field_valid & 2) { /* EIDE SWDMA */
149
150 if ((best = (id->dma_1word & 0x0004) ? XFER_SW_DMA_2 :
151 (id->dma_1word & 0x0002) ? XFER_SW_DMA_1 :
152 (id->dma_1word & 0x0001) ? XFER_SW_DMA_0 : 0)) return best;
153 }
154
155 if (id->capability & 1) { /* Pre-EIDE style SWDMA */
156
157 if ((best = (id->tDMA == 2) ? XFER_SW_DMA_2 :
158 (id->tDMA == 1) ? XFER_SW_DMA_1 :
159 (id->tDMA == 0) ? XFER_SW_DMA_0 : 0)) return best;
160 }
161 }
162
163
164 if ((map & XFER_EPIO) && (id->field_valid & 2)) { /* EIDE PIO modes */
165 115
166 if ((best = (drive->id->eide_pio_modes & 4) ? XFER_PIO_5 : 116 if ((best = (drive->id->eide_pio_modes & 4) ? XFER_PIO_5 :
167 (drive->id->eide_pio_modes & 2) ? XFER_PIO_4 : 117 (drive->id->eide_pio_modes & 2) ? XFER_PIO_4 :
@@ -262,7 +212,7 @@ static int ide_timing_compute(ide_drive_t *drive, short speed, struct ide_timing
262 */ 212 */
263 213
264 if ((speed & XFER_MODE) != XFER_PIO) { 214 if ((speed & XFER_MODE) != XFER_PIO) {
265 ide_timing_compute(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO), &p, T, UT); 215 ide_timing_compute(drive, ide_find_best_pio_mode(drive), &p, T, UT);
266 ide_timing_merge(&p, t, t, IDE_TIMING_ALL); 216 ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
267 } 217 }
268 218
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index 0cd76bf66833..c948a5c17a5d 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -169,7 +169,7 @@ static const u8 ide_hwif_to_major[] = { IDE0_MAJOR, IDE1_MAJOR,
169static int idebus_parameter; /* holds the "idebus=" parameter */ 169static int idebus_parameter; /* holds the "idebus=" parameter */
170static int system_bus_speed; /* holds what we think is VESA/PCI bus speed */ 170static int system_bus_speed; /* holds what we think is VESA/PCI bus speed */
171 171
172DECLARE_MUTEX(ide_cfg_sem); 172DEFINE_MUTEX(ide_cfg_mtx);
173 __cacheline_aligned_in_smp DEFINE_SPINLOCK(ide_lock); 173 __cacheline_aligned_in_smp DEFINE_SPINLOCK(ide_lock);
174 174
175#ifdef CONFIG_IDEPCI_PCIBUS_ORDER 175#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
@@ -460,6 +460,8 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
460 hwif->mwdma_mask = tmp_hwif->mwdma_mask; 460 hwif->mwdma_mask = tmp_hwif->mwdma_mask;
461 hwif->swdma_mask = tmp_hwif->swdma_mask; 461 hwif->swdma_mask = tmp_hwif->swdma_mask;
462 462
463 hwif->cbl = tmp_hwif->cbl;
464
463 hwif->chipset = tmp_hwif->chipset; 465 hwif->chipset = tmp_hwif->chipset;
464 hwif->hold = tmp_hwif->hold; 466 hwif->hold = tmp_hwif->hold;
465 467
@@ -496,8 +498,8 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
496 hwif->ide_dma_clear_irq = tmp_hwif->ide_dma_clear_irq; 498 hwif->ide_dma_clear_irq = tmp_hwif->ide_dma_clear_irq;
497 hwif->dma_host_on = tmp_hwif->dma_host_on; 499 hwif->dma_host_on = tmp_hwif->dma_host_on;
498 hwif->dma_host_off = tmp_hwif->dma_host_off; 500 hwif->dma_host_off = tmp_hwif->dma_host_off;
499 hwif->ide_dma_lostirq = tmp_hwif->ide_dma_lostirq; 501 hwif->dma_lost_irq = tmp_hwif->dma_lost_irq;
500 hwif->ide_dma_timeout = tmp_hwif->ide_dma_timeout; 502 hwif->dma_timeout = tmp_hwif->dma_timeout;
501 503
502 hwif->OUTB = tmp_hwif->OUTB; 504 hwif->OUTB = tmp_hwif->OUTB;
503 hwif->OUTBSYNC = tmp_hwif->OUTBSYNC; 505 hwif->OUTBSYNC = tmp_hwif->OUTBSYNC;
@@ -533,7 +535,6 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
533 hwif->extra_base = tmp_hwif->extra_base; 535 hwif->extra_base = tmp_hwif->extra_base;
534 hwif->extra_ports = tmp_hwif->extra_ports; 536 hwif->extra_ports = tmp_hwif->extra_ports;
535 hwif->autodma = tmp_hwif->autodma; 537 hwif->autodma = tmp_hwif->autodma;
536 hwif->udma_four = tmp_hwif->udma_four;
537 538
538 hwif->hwif_data = tmp_hwif->hwif_data; 539 hwif->hwif_data = tmp_hwif->hwif_data;
539} 540}
@@ -564,7 +565,7 @@ void ide_unregister(unsigned int index)
564{ 565{
565 ide_drive_t *drive; 566 ide_drive_t *drive;
566 ide_hwif_t *hwif, *g; 567 ide_hwif_t *hwif, *g;
567 static ide_hwif_t tmp_hwif; /* protected by ide_cfg_sem */ 568 static ide_hwif_t tmp_hwif; /* protected by ide_cfg_mtx */
568 ide_hwgroup_t *hwgroup; 569 ide_hwgroup_t *hwgroup;
569 int irq_count = 0, unit; 570 int irq_count = 0, unit;
570 571
@@ -572,7 +573,7 @@ void ide_unregister(unsigned int index)
572 573
573 BUG_ON(in_interrupt()); 574 BUG_ON(in_interrupt());
574 BUG_ON(irqs_disabled()); 575 BUG_ON(irqs_disabled());
575 down(&ide_cfg_sem); 576 mutex_lock(&ide_cfg_mtx);
576 spin_lock_irq(&ide_lock); 577 spin_lock_irq(&ide_lock);
577 hwif = &ide_hwifs[index]; 578 hwif = &ide_hwifs[index];
578 if (!hwif->present) 579 if (!hwif->present)
@@ -679,7 +680,7 @@ void ide_unregister(unsigned int index)
679 680
680abort: 681abort:
681 spin_unlock_irq(&ide_lock); 682 spin_unlock_irq(&ide_lock);
682 up(&ide_cfg_sem); 683 mutex_unlock(&ide_cfg_mtx);
683} 684}
684 685
685EXPORT_SYMBOL(ide_unregister); 686EXPORT_SYMBOL(ide_unregister);
@@ -817,9 +818,9 @@ EXPORT_SYMBOL(ide_register_hw);
817 * Locks for IDE setting functionality 818 * Locks for IDE setting functionality
818 */ 819 */
819 820
820DECLARE_MUTEX(ide_setting_sem); 821DEFINE_MUTEX(ide_setting_mtx);
821 822
822EXPORT_SYMBOL_GPL(ide_setting_sem); 823EXPORT_SYMBOL_GPL(ide_setting_mtx);
823 824
824/** 825/**
825 * ide_spin_wait_hwgroup - wait for group 826 * ide_spin_wait_hwgroup - wait for group
@@ -1192,11 +1193,11 @@ int generic_ide_ioctl(ide_drive_t *drive, struct file *file, struct block_device
1192 } 1193 }
1193 1194
1194read_val: 1195read_val:
1195 down(&ide_setting_sem); 1196 mutex_lock(&ide_setting_mtx);
1196 spin_lock_irqsave(&ide_lock, flags); 1197 spin_lock_irqsave(&ide_lock, flags);
1197 err = *val; 1198 err = *val;
1198 spin_unlock_irqrestore(&ide_lock, flags); 1199 spin_unlock_irqrestore(&ide_lock, flags);
1199 up(&ide_setting_sem); 1200 mutex_unlock(&ide_setting_mtx);
1200 return err >= 0 ? put_user(err, (long __user *)arg) : err; 1201 return err >= 0 ? put_user(err, (long __user *)arg) : err;
1201 1202
1202set_val: 1203set_val:
@@ -1206,9 +1207,9 @@ set_val:
1206 if (!capable(CAP_SYS_ADMIN)) 1207 if (!capable(CAP_SYS_ADMIN))
1207 err = -EACCES; 1208 err = -EACCES;
1208 else { 1209 else {
1209 down(&ide_setting_sem); 1210 mutex_lock(&ide_setting_mtx);
1210 err = setfunc(drive, arg); 1211 err = setfunc(drive, arg);
1211 up(&ide_setting_sem); 1212 mutex_unlock(&ide_setting_mtx);
1212 } 1213 }
1213 } 1214 }
1214 return err; 1215 return err;
@@ -1548,7 +1549,11 @@ static int __init ide_setup(char *s)
1548 goto bad_option; 1549 goto bad_option;
1549 case -7: /* ata66 */ 1550 case -7: /* ata66 */
1550#ifdef CONFIG_BLK_DEV_IDEPCI 1551#ifdef CONFIG_BLK_DEV_IDEPCI
1551 hwif->udma_four = 1; 1552 /*
1553 * Use ATA_CBL_PATA40_SHORT so drive side
1554 * cable detection is also overriden.
1555 */
1556 hwif->cbl = ATA_CBL_PATA40_SHORT;
1552 goto obsolete_option; 1557 goto obsolete_option;
1553#else 1558#else
1554 goto bad_hwif; 1559 goto bad_hwif;
diff --git a/drivers/ide/legacy/hd.c b/drivers/ide/legacy/hd.c
index 45ed03591cd8..8f2db8dd35f7 100644
--- a/drivers/ide/legacy/hd.c
+++ b/drivers/ide/legacy/hd.c
@@ -130,7 +130,7 @@ struct hd_i_struct {
130 130
131#ifdef HD_TYPE 131#ifdef HD_TYPE
132static struct hd_i_struct hd_info[] = { HD_TYPE }; 132static struct hd_i_struct hd_info[] = { HD_TYPE };
133static int NR_HD = ((sizeof (hd_info))/(sizeof (struct hd_i_struct))); 133static int NR_HD = ARRAY_SIZE(hd_info);
134#else 134#else
135static struct hd_i_struct hd_info[MAX_HD]; 135static struct hd_i_struct hd_info[MAX_HD];
136static int NR_HD; 136static int NR_HD;
@@ -623,7 +623,8 @@ repeat:
623 cyl = track / disk->head; 623 cyl = track / disk->head;
624#ifdef DEBUG 624#ifdef DEBUG
625 printk("%s: %sing: CHS=%d/%d/%d, sectors=%d, buffer=%p\n", 625 printk("%s: %sing: CHS=%d/%d/%d, sectors=%d, buffer=%p\n",
626 req->rq_disk->disk_name, (req->cmd == READ)?"read":"writ", 626 req->rq_disk->disk_name,
627 req_data_dir(req) == READ ? "read" : "writ",
627 cyl, head, sec, nsect, req->buffer); 628 cyl, head, sec, nsect, req->buffer);
628#endif 629#endif
629 if (blk_fs_request(req)) { 630 if (blk_fs_request(req)) {
@@ -718,74 +719,25 @@ static int __init hd_init(void)
718 device_timer.function = hd_times_out; 719 device_timer.function = hd_times_out;
719 blk_queue_hardsect_size(hd_queue, 512); 720 blk_queue_hardsect_size(hd_queue, 512);
720 721
721#ifdef __i386__
722 if (!NR_HD) { 722 if (!NR_HD) {
723 extern struct drive_info drive_info; 723 /*
724 unsigned char *BIOS = (unsigned char *) &drive_info; 724 * We don't know anything about the drive. This means
725 unsigned long flags;
726 int cmos_disks;
727
728 for (drive=0 ; drive<2 ; drive++) {
729 hd_info[drive].cyl = *(unsigned short *) BIOS;
730 hd_info[drive].head = *(2+BIOS);
731 hd_info[drive].wpcom = *(unsigned short *) (5+BIOS);
732 hd_info[drive].ctl = *(8+BIOS);
733 hd_info[drive].lzone = *(unsigned short *) (12+BIOS);
734 hd_info[drive].sect = *(14+BIOS);
735#ifdef does_not_work_for_everybody_with_scsi_but_helps_ibm_vp
736 if (hd_info[drive].cyl && NR_HD == drive)
737 NR_HD++;
738#endif
739 BIOS += 16;
740 }
741
742 /*
743 We query CMOS about hard disks : it could be that
744 we have a SCSI/ESDI/etc controller that is BIOS
745 compatible with ST-506, and thus showing up in our
746 BIOS table, but not register compatible, and therefore
747 not present in CMOS.
748
749 Furthermore, we will assume that our ST-506 drives
750 <if any> are the primary drives in the system, and
751 the ones reflected as drive 1 or 2.
752
753 The first drive is stored in the high nibble of CMOS
754 byte 0x12, the second in the low nibble. This will be
755 either a 4 bit drive type or 0xf indicating use byte 0x19
756 for an 8 bit type, drive 1, 0x1a for drive 2 in CMOS.
757
758 Needless to say, a non-zero value means we have
759 an AT controller hard disk for that drive.
760
761 Currently the rtc_lock is a bit academic since this
762 driver is non-modular, but someday... ? Paul G.
763 */
764
765 spin_lock_irqsave(&rtc_lock, flags);
766 cmos_disks = CMOS_READ(0x12);
767 spin_unlock_irqrestore(&rtc_lock, flags);
768
769 if (cmos_disks & 0xf0) {
770 if (cmos_disks & 0x0f)
771 NR_HD = 2;
772 else
773 NR_HD = 1;
774 }
775 }
776#endif /* __i386__ */
777#ifdef __arm__
778 if (!NR_HD) {
779 /* We don't know anything about the drive. This means
780 * that you *MUST* specify the drive parameters to the 725 * that you *MUST* specify the drive parameters to the
781 * kernel yourself. 726 * kernel yourself.
727 *
728 * If we were on an i386, we used to read this info from
729 * the BIOS or CMOS. This doesn't work all that well,
730 * since this assumes that this is a primary or secondary
731 * drive, and if we're using this legacy driver, it's
732 * probably an auxilliary controller added to recover
733 * legacy data off an ST-506 drive. Either way, it's
734 * definitely safest to have the user explicitly specify
735 * the information.
782 */ 736 */
783 printk("hd: no drives specified - use hd=cyl,head,sectors" 737 printk("hd: no drives specified - use hd=cyl,head,sectors"
784 " on kernel command line\n"); 738 " on kernel command line\n");
785 }
786#endif
787 if (!NR_HD)
788 goto out; 739 goto out;
740 }
789 741
790 for (drive=0 ; drive < NR_HD ; drive++) { 742 for (drive=0 ; drive < NR_HD ; drive++) {
791 struct gendisk *disk = alloc_disk(64); 743 struct gendisk *disk = alloc_disk(64);
diff --git a/drivers/ide/legacy/macide.c b/drivers/ide/legacy/macide.c
index c211fc78345d..b557c45a5a9d 100644
--- a/drivers/ide/legacy/macide.c
+++ b/drivers/ide/legacy/macide.c
@@ -77,15 +77,6 @@ int macide_ack_intr(ide_hwif_t* hwif)
77 return 0; 77 return 0;
78} 78}
79 79
80#ifdef CONFIG_BLK_DEV_MAC_MEDIABAY
81static void macide_mediabay_interrupt(int irq, void *dev_id)
82{
83 int state = baboon->mb_status & 0x04;
84
85 printk(KERN_INFO "macide: media bay %s detected\n", state? "removal":"insertion");
86}
87#endif
88
89/* 80/*
90 * Probe for a Macintosh IDE interface 81 * Probe for a Macintosh IDE interface
91 */ 82 */
@@ -128,11 +119,6 @@ void macide_init(void)
128 ide_drive_t *drive = &ide_hwifs[index].drives[0]; 119 ide_drive_t *drive = &ide_hwifs[index].drives[0];
129 drive->capacity64 = drive->cyl*drive->head*drive->sect; 120 drive->capacity64 = drive->cyl*drive->head*drive->sect;
130 121
131#ifdef CONFIG_BLK_DEV_MAC_MEDIABAY
132 request_irq(IRQ_BABOON_2, macide_mediabay_interrupt,
133 IRQ_FLG_FAST, "mediabay",
134 macide_mediabay_interrupt);
135#endif
136 } 122 }
137 break; 123 break;
138 124
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index ca95e990862e..2e7013a2a7f6 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -381,9 +381,7 @@ static int auide_dma_setup(ide_drive_t *drive)
381 381
382static int auide_dma_check(ide_drive_t *drive) 382static int auide_dma_check(ide_drive_t *drive)
383{ 383{
384 u8 speed; 384 u8 speed = ide_max_dma_mode(drive);
385
386#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
387 385
388 if( dbdma_init_done == 0 ){ 386 if( dbdma_init_done == 0 ){
389 auide_hwif.white_list = ide_in_drive_list(drive->id, 387 auide_hwif.white_list = ide_in_drive_list(drive->id,
@@ -394,7 +392,6 @@ static int auide_dma_check(ide_drive_t *drive)
394 auide_ddma_init(&auide_hwif); 392 auide_ddma_init(&auide_hwif);
395 dbdma_init_done = 1; 393 dbdma_init_done = 1;
396 } 394 }
397#endif
398 395
399 /* Is the drive in our DMA black list? */ 396 /* Is the drive in our DMA black list? */
400 397
@@ -409,8 +406,6 @@ static int auide_dma_check(ide_drive_t *drive)
409 else 406 else
410 drive->using_dma = 1; 407 drive->using_dma = 1;
411 408
412 speed = ide_find_best_mode(drive, XFER_PIO | XFER_MWDMA);
413
414 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO) 409 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
415 return 0; 410 return 0;
416 411
@@ -456,10 +451,9 @@ static void auide_dma_off_quietly(ide_drive_t *drive)
456 drive->using_dma = 0; 451 drive->using_dma = 0;
457} 452}
458 453
459static int auide_dma_lostirq(ide_drive_t *drive) 454static void auide_dma_lost_irq(ide_drive_t *drive)
460{ 455{
461 printk(KERN_ERR "%s: IRQ lost\n", drive->name); 456 printk(KERN_ERR "%s: IRQ lost\n", drive->name);
462 return 0;
463} 457}
464 458
465static void auide_ddma_tx_callback(int irq, void *param) 459static void auide_ddma_tx_callback(int irq, void *param)
@@ -489,16 +483,16 @@ static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 de
489 483
490#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA) 484#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
491 485
492static int auide_dma_timeout(ide_drive_t *drive) 486static void auide_dma_timeout(ide_drive_t *drive)
493{ 487{
494// printk("%s\n", __FUNCTION__); 488 ide_hwif_t *hwif = HWIF(drive);
495 489
496 printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name); 490 printk(KERN_ERR "%s: DMA timeout occurred: ", drive->name);
497 491
498 if (HWIF(drive)->ide_dma_test_irq(drive)) 492 if (hwif->ide_dma_test_irq(drive))
499 return 0; 493 return;
500 494
501 return HWIF(drive)->ide_dma_end(drive); 495 hwif->ide_dma_end(drive);
502} 496}
503 497
504 498
@@ -721,7 +715,7 @@ static int au_ide_probe(struct device *dev)
721 715
722#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 716#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
723 hwif->dma_off_quietly = &auide_dma_off_quietly; 717 hwif->dma_off_quietly = &auide_dma_off_quietly;
724 hwif->ide_dma_timeout = &auide_dma_timeout; 718 hwif->dma_timeout = &auide_dma_timeout;
725 719
726 hwif->ide_dma_check = &auide_dma_check; 720 hwif->ide_dma_check = &auide_dma_check;
727 hwif->dma_exec_cmd = &auide_dma_exec_cmd; 721 hwif->dma_exec_cmd = &auide_dma_exec_cmd;
@@ -731,7 +725,7 @@ static int au_ide_probe(struct device *dev)
731 hwif->ide_dma_test_irq = &auide_dma_test_irq; 725 hwif->ide_dma_test_irq = &auide_dma_test_irq;
732 hwif->dma_host_off = &auide_dma_host_off; 726 hwif->dma_host_off = &auide_dma_host_off;
733 hwif->dma_host_on = &auide_dma_host_on; 727 hwif->dma_host_on = &auide_dma_host_on;
734 hwif->ide_dma_lostirq = &auide_dma_lostirq; 728 hwif->dma_lost_irq = &auide_dma_lost_irq;
735 hwif->ide_dma_on = &auide_dma_on; 729 hwif->ide_dma_on = &auide_dma_on;
736 730
737 hwif->autodma = 1; 731 hwif->autodma = 1;
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index b173bc66ce1e..e5d09367627e 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/aec62xx.c Version 0.21 Apr 21, 2007 2 * linux/drivers/ide/pci/aec62xx.c Version 0.24 May 24, 2007
3 * 3 *
4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
@@ -140,25 +140,10 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
140 return(ide_config_drive_speed(drive, speed)); 140 return(ide_config_drive_speed(drive, speed));
141} 141}
142 142
143static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed)
144{
145 switch (HWIF(drive)->pci_dev->device) {
146 case PCI_DEVICE_ID_ARTOP_ATP865:
147 case PCI_DEVICE_ID_ARTOP_ATP865R:
148 case PCI_DEVICE_ID_ARTOP_ATP860:
149 case PCI_DEVICE_ID_ARTOP_ATP860R:
150 return ((int) aec6260_tune_chipset(drive, speed));
151 case PCI_DEVICE_ID_ARTOP_ATP850UF:
152 return ((int) aec6210_tune_chipset(drive, speed));
153 default:
154 return -1;
155 }
156}
157
158static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) 143static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
159{ 144{
160 pio = ide_get_best_pio_mode(drive, pio, 4, NULL); 145 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
161 (void) aec62xx_tune_chipset(drive, pio + XFER_PIO_0); 146 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0);
162} 147}
163 148
164static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) 149static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
@@ -172,12 +157,9 @@ static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
172 return -1; 157 return -1;
173} 158}
174 159
175static int aec62xx_irq_timeout (ide_drive_t *drive) 160static void aec62xx_dma_lost_irq (ide_drive_t *drive)
176{ 161{
177 ide_hwif_t *hwif = HWIF(drive); 162 switch (HWIF(drive)->pci_dev->device) {
178 struct pci_dev *dev = hwif->pci_dev;
179
180 switch(dev->device) {
181 case PCI_DEVICE_ID_ARTOP_ATP860: 163 case PCI_DEVICE_ID_ARTOP_ATP860:
182 case PCI_DEVICE_ID_ARTOP_ATP860R: 164 case PCI_DEVICE_ID_ARTOP_ATP860R:
183 case PCI_DEVICE_ID_ARTOP_ATP865: 165 case PCI_DEVICE_ID_ARTOP_ATP865:
@@ -186,7 +168,6 @@ static int aec62xx_irq_timeout (ide_drive_t *drive)
186 default: 168 default:
187 break; 169 break;
188 } 170 }
189 return 0;
190} 171}
191 172
192static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) 173static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
@@ -224,64 +205,46 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
224 205
225static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) 206static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
226{ 207{
227 struct pci_dev *dev = hwif->pci_dev; 208 struct pci_dev *dev = hwif->pci_dev;
209 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f;
210 unsigned long flags;
228 211
229 hwif->autodma = 0;
230 hwif->tuneproc = &aec62xx_tune_drive; 212 hwif->tuneproc = &aec62xx_tune_drive;
231 hwif->speedproc = &aec62xx_tune_chipset;
232 213
233 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) 214 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
234 hwif->serialized = hwif->channel; 215 if(hwif->mate)
235 216 hwif->mate->serialized = hwif->serialized = 1;
236 if (hwif->mate) 217 hwif->speedproc = &aec6210_tune_chipset;
237 hwif->mate->serialized = hwif->serialized; 218 } else
219 hwif->speedproc = &aec6260_tune_chipset;
238 220
239 if (!hwif->dma_base) { 221 if (!hwif->dma_base) {
240 hwif->drives[0].autotune = 1; 222 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
241 hwif->drives[1].autotune = 1;
242 return; 223 return;
243 } 224 }
244 225
245 hwif->ultra_mask = hwif->cds->udma_mask; 226 hwif->ultra_mask = hwif->cds->udma_mask;
246
247 /* atp865 and atp865r */
248 if (hwif->ultra_mask == 0x3f) {
249 /* check bit 0x10 of DMA status register */
250 if (inb(pci_resource_start(dev, 4) + 2) & 0x10)
251 hwif->ultra_mask = 0x7f; /* udma0-6 */
252 }
253
254 hwif->mwdma_mask = 0x07; 227 hwif->mwdma_mask = 0x07;
255 228
256 hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate; 229 hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate;
257 hwif->ide_dma_lostirq = &aec62xx_irq_timeout; 230 hwif->dma_lost_irq = &aec62xx_dma_lost_irq;
258
259 if (!noautodma)
260 hwif->autodma = 1;
261 hwif->drives[0].autodma = hwif->autodma;
262 hwif->drives[1].autodma = hwif->autodma;
263}
264
265static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase)
266{
267 struct pci_dev *dev = hwif->pci_dev;
268 231
269 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 232 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
270 u8 reg54h = 0;
271 unsigned long flags;
272
273 spin_lock_irqsave(&ide_lock, flags); 233 spin_lock_irqsave(&ide_lock, flags);
274 pci_read_config_byte(dev, 0x54, &reg54h); 234 pci_read_config_byte (dev, 0x54, &reg54);
275 pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F)); 235 pci_write_config_byte(dev, 0x54, (reg54 & ~mask));
276 spin_unlock_irqrestore(&ide_lock, flags); 236 spin_unlock_irqrestore(&ide_lock, flags);
277 } else { 237 } else if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
278 u8 ata66 = 0; 238 u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
239
279 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); 240 pci_read_config_byte(hwif->pci_dev, 0x49, &ata66);
280 if (!(hwif->udma_four)) 241
281 hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1; 242 hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
282 } 243 }
283 244
284 ide_setup_dma(hwif, dmabase, 8); 245 if (!noautodma)
246 hwif->autodma = 1;
247 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
285} 248}
286 249
287static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d) 250static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
@@ -291,16 +254,12 @@ static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d
291 254
292static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d) 255static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
293{ 256{
294 unsigned long bar4reg = pci_resource_start(dev, 4); 257 unsigned long dma_base = pci_resource_start(dev, 4);
295 258
296 if (inb(bar4reg+2) & 0x10) { 259 if (inb(dma_base + 2) & 0x10) {
297 strcpy(d->name, "AEC6880"); 260 d->name = (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) ?
298 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) 261 "AEC6880R" : "AEC6880";
299 strcpy(d->name, "AEC6880R"); 262 d->udma_mask = 0x7f; /* udma0-6 */
300 } else {
301 strcpy(d->name, "AEC6280");
302 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)
303 strcpy(d->name, "AEC6280R");
304 } 263 }
305 264
306 return ide_setup_pci_device(dev, d); 265 return ide_setup_pci_device(dev, d);
@@ -312,7 +271,6 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
312 .init_setup = init_setup_aec62xx, 271 .init_setup = init_setup_aec62xx,
313 .init_chipset = init_chipset_aec62xx, 272 .init_chipset = init_chipset_aec62xx,
314 .init_hwif = init_hwif_aec62xx, 273 .init_hwif = init_hwif_aec62xx,
315 .init_dma = init_dma_aec62xx,
316 .channels = 2, 274 .channels = 2,
317 .autodma = AUTODMA, 275 .autodma = AUTODMA,
318 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 276 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
@@ -323,7 +281,6 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
323 .init_setup = init_setup_aec62xx, 281 .init_setup = init_setup_aec62xx,
324 .init_chipset = init_chipset_aec62xx, 282 .init_chipset = init_chipset_aec62xx,
325 .init_hwif = init_hwif_aec62xx, 283 .init_hwif = init_hwif_aec62xx,
326 .init_dma = init_dma_aec62xx,
327 .channels = 2, 284 .channels = 2,
328 .autodma = NOAUTODMA, 285 .autodma = NOAUTODMA,
329 .bootable = OFF_BOARD, 286 .bootable = OFF_BOARD,
@@ -333,28 +290,25 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
333 .init_setup = init_setup_aec62xx, 290 .init_setup = init_setup_aec62xx,
334 .init_chipset = init_chipset_aec62xx, 291 .init_chipset = init_chipset_aec62xx,
335 .init_hwif = init_hwif_aec62xx, 292 .init_hwif = init_hwif_aec62xx,
336 .init_dma = init_dma_aec62xx,
337 .channels = 2, 293 .channels = 2,
338 .autodma = AUTODMA, 294 .autodma = AUTODMA,
339 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 295 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
340 .bootable = NEVER_BOARD, 296 .bootable = NEVER_BOARD,
341 .udma_mask = 0x1f, /* udma0-4 */ 297 .udma_mask = 0x1f, /* udma0-4 */
342 },{ /* 3 */ 298 },{ /* 3 */
343 .name = "AEC6X80", 299 .name = "AEC6280",
344 .init_setup = init_setup_aec6x80, 300 .init_setup = init_setup_aec6x80,
345 .init_chipset = init_chipset_aec62xx, 301 .init_chipset = init_chipset_aec62xx,
346 .init_hwif = init_hwif_aec62xx, 302 .init_hwif = init_hwif_aec62xx,
347 .init_dma = init_dma_aec62xx,
348 .channels = 2, 303 .channels = 2,
349 .autodma = AUTODMA, 304 .autodma = AUTODMA,
350 .bootable = OFF_BOARD, 305 .bootable = OFF_BOARD,
351 .udma_mask = 0x3f, /* udma0-5 */ 306 .udma_mask = 0x3f, /* udma0-5 */
352 },{ /* 4 */ 307 },{ /* 4 */
353 .name = "AEC6X80R", 308 .name = "AEC6280R",
354 .init_setup = init_setup_aec6x80, 309 .init_setup = init_setup_aec6x80,
355 .init_chipset = init_chipset_aec62xx, 310 .init_chipset = init_chipset_aec62xx,
356 .init_hwif = init_hwif_aec62xx, 311 .init_hwif = init_hwif_aec62xx,
357 .init_dma = init_dma_aec62xx,
358 .channels = 2, 312 .channels = 2,
359 .autodma = AUTODMA, 313 .autodma = AUTODMA,
360 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 314 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
@@ -370,13 +324,16 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
370 * 324 *
371 * Called when the PCI registration layer (or the IDE initialization) 325 * Called when the PCI registration layer (or the IDE initialization)
372 * finds a device matching our IDE device tables. 326 * finds a device matching our IDE device tables.
327 *
328 * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R]
329 * chips, pass a local copy of 'struct pci_device_id' down the call chain.
373 */ 330 */
374 331
375static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 332static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
376{ 333{
377 ide_pci_device_t *d = &aec62xx_chipsets[id->driver_data]; 334 ide_pci_device_t d = aec62xx_chipsets[id->driver_data];
378 335
379 return d->init_setup(dev, d); 336 return d.init_setup(dev, &d);
380} 337}
381 338
382static struct pci_device_id aec62xx_pci_tbl[] = { 339static struct pci_device_id aec62xx_pci_tbl[] = {
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 27525ec2e19a..ba0fb92b0417 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/alim15x3.c Version 0.21 2007/02/03 2 * linux/drivers/ide/pci/alim15x3.c Version 0.25 Jun 9 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
@@ -10,6 +10,7 @@
10 * Copyright (C) 2002 Alan Cox <alan@redhat.com> 10 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
11 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> 11 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
12 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 12 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
13 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
13 * 14 *
14 * (U)DMA capable version of ali 1533/1543(C), 1535(D) 15 * (U)DMA capable version of ali 1533/1543(C), 1535(D)
15 * 16 *
@@ -36,6 +37,7 @@
36#include <linux/hdreg.h> 37#include <linux/hdreg.h>
37#include <linux/ide.h> 38#include <linux/ide.h>
38#include <linux/init.h> 39#include <linux/init.h>
40#include <linux/dmi.h>
39 41
40#include <asm/io.h> 42#include <asm/io.h>
41 43
@@ -506,7 +508,7 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
506 u8 tmpbyte; 508 u8 tmpbyte;
507 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); 509 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
508 510
509 pci_read_config_byte(dev, PCI_REVISION_ID, &m5229_revision); 511 m5229_revision = dev->revision;
510 512
511 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 513 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
512 514
@@ -583,6 +585,35 @@ out:
583 return 0; 585 return 0;
584} 586}
585 587
588/*
589 * Cable special cases
590 */
591
592static struct dmi_system_id cable_dmi_table[] = {
593 {
594 .ident = "HP Pavilion N5430",
595 .matches = {
596 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
597 DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
598 },
599 },
600 { }
601};
602
603static int ali_cable_override(struct pci_dev *pdev)
604{
605 /* Fujitsu P2000 */
606 if (pdev->subsystem_vendor == 0x10CF &&
607 pdev->subsystem_device == 0x10AF)
608 return 1;
609
610 /* Systems by DMI */
611 if (dmi_check_system(cable_dmi_table))
612 return 1;
613
614 return 0;
615}
616
586/** 617/**
587 * ata66_ali15x3 - check for UDMA 66 support 618 * ata66_ali15x3 - check for UDMA 66 support
588 * @hwif: IDE interface 619 * @hwif: IDE interface
@@ -594,37 +625,31 @@ out:
594 * FIXME: frobs bits that are not defined on newer ALi devicea 625 * FIXME: frobs bits that are not defined on newer ALi devicea
595 */ 626 */
596 627
597static unsigned int __devinit ata66_ali15x3 (ide_hwif_t *hwif) 628static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
598{ 629{
599 struct pci_dev *dev = hwif->pci_dev; 630 struct pci_dev *dev = hwif->pci_dev;
600 unsigned int ata66 = 0;
601 u8 cable_80_pin[2] = { 0, 0 };
602
603 unsigned long flags; 631 unsigned long flags;
604 u8 tmpbyte; 632 u8 cbl = ATA_CBL_PATA40, tmpbyte;
605 633
606 local_irq_save(flags); 634 local_irq_save(flags);
607 635
608 if (m5229_revision >= 0xC2) { 636 if (m5229_revision >= 0xC2) {
609 /* 637 /*
610 * Ultra66 cable detection (from Host View) 638 * m5229 80-pin cable detection (from Host View)
611 * m5229, 0x4a, bit0: primary, bit1: secondary 80 pin 639 *
612 */ 640 * 0x4a bit0 is 0 => primary channel has 80-pin
613 pci_read_config_byte(dev, 0x4a, &tmpbyte); 641 * 0x4a bit1 is 0 => secondary channel has 80-pin
614 /* 642 *
615 * 0x4a, bit0 is 0 => primary channel 643 * Certain laptops use short but suitable cables
616 * has 80-pin (from host view) 644 * and don't implement the detect logic.
617 */
618 if (!(tmpbyte & 0x01)) cable_80_pin[0] = 1;
619 /*
620 * 0x4a, bit1 is 0 => secondary channel
621 * has 80-pin (from host view)
622 */
623 if (!(tmpbyte & 0x02)) cable_80_pin[1] = 1;
624 /*
625 * Allow ata66 if cable of current channel has 80 pins
626 */ 645 */
627 ata66 = (hwif->channel)?cable_80_pin[1]:cable_80_pin[0]; 646 if (ali_cable_override(dev))
647 cbl = ATA_CBL_PATA40_SHORT;
648 else {
649 pci_read_config_byte(dev, 0x4a, &tmpbyte);
650 if ((tmpbyte & (1 << hwif->channel)) == 0)
651 cbl = ATA_CBL_PATA80;
652 }
628 } else { 653 } else {
629 /* 654 /*
630 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 655 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
@@ -657,7 +682,7 @@ static unsigned int __devinit ata66_ali15x3 (ide_hwif_t *hwif)
657 682
658 local_irq_restore(flags); 683 local_irq_restore(flags);
659 684
660 return(ata66); 685 return cbl;
661} 686}
662 687
663/** 688/**
@@ -708,8 +733,9 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
708 hwif->dma_setup = &ali15x3_dma_setup; 733 hwif->dma_setup = &ali15x3_dma_setup;
709 if (!noautodma) 734 if (!noautodma)
710 hwif->autodma = 1; 735 hwif->autodma = 1;
711 if (!(hwif->udma_four)) 736
712 hwif->udma_four = ata66_ali15x3(hwif); 737 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
738 hwif->cbl = ata66_ali15x3(hwif);
713 } 739 }
714 hwif->drives[0].autodma = hwif->autodma; 740 hwif->drives[0].autodma = hwif->autodma;
715 hwif->drives[1].autodma = hwif->autodma; 741 hwif->drives[1].autodma = hwif->autodma;
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index a2be65fcf89c..8d30b99a54d8 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -1,10 +1,11 @@
1/* 1/*
2 * Version 2.16 2 * Version 2.20
3 * 3 *
4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
5 * IDE driver for Linux. 5 * IDE driver for Linux.
6 * 6 *
7 * Copyright (c) 2000-2002 Vojtech Pavlik 7 * Copyright (c) 2000-2002 Vojtech Pavlik
8 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
8 * 9 *
9 * Based on the work of: 10 * Based on the work of:
10 * Andre Hedrick 11 * Andre Hedrick
@@ -37,11 +38,6 @@
37#define AMD_ADDRESS_SETUP (0x0c + amd_config->base) 38#define AMD_ADDRESS_SETUP (0x0c + amd_config->base)
38#define AMD_UDMA_TIMING (0x10 + amd_config->base) 39#define AMD_UDMA_TIMING (0x10 + amd_config->base)
39 40
40#define AMD_UDMA 0x07
41#define AMD_UDMA_33 0x01
42#define AMD_UDMA_66 0x02
43#define AMD_UDMA_100 0x03
44#define AMD_UDMA_133 0x04
45#define AMD_CHECK_SWDMA 0x08 41#define AMD_CHECK_SWDMA 0x08
46#define AMD_BAD_SWDMA 0x10 42#define AMD_BAD_SWDMA 0x10
47#define AMD_BAD_FIFO 0x20 43#define AMD_BAD_FIFO 0x20
@@ -53,32 +49,33 @@
53 49
54static struct amd_ide_chip { 50static struct amd_ide_chip {
55 unsigned short id; 51 unsigned short id;
56 unsigned long base; 52 u8 base;
57 unsigned char flags; 53 u8 udma_mask;
54 u8 flags;
58} amd_ide_chips[] = { 55} amd_ide_chips[] = {
59 { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA }, 56 { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, ATA_UDMA2, AMD_BAD_SWDMA },
60 { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA }, 57 { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, ATA_UDMA4, AMD_CHECK_SWDMA },
61 { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO }, 58 { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, ATA_UDMA5, AMD_BAD_FIFO },
62 { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 }, 59 { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, ATA_UDMA5, },
63 { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE }, 60 { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, ATA_UDMA6, AMD_CHECK_SERENADE },
64 { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 }, 61 { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, ATA_UDMA5, },
65 { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 }, 62 { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, ATA_UDMA6, },
66 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 }, 63 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, ATA_UDMA6, },
67 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 }, 64 { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, ATA_UDMA6, },
68 { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 }, 65 { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, ATA_UDMA6, },
69 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 }, 66 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, ATA_UDMA6, },
70 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 }, 67 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, ATA_UDMA6, },
71 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 }, 68 { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, ATA_UDMA6, },
72 { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 }, 69 { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, ATA_UDMA6, },
73 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 }, 70 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, ATA_UDMA6, },
74 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 }, 71 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, ATA_UDMA6, },
75 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 }, 72 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, ATA_UDMA6, },
76 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 }, 73 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, ATA_UDMA6, },
77 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, AMD_UDMA_133 }, 74 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, ATA_UDMA6, },
78 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, AMD_UDMA_133 }, 75 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, ATA_UDMA6, },
79 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, AMD_UDMA_133 }, 76 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, ATA_UDMA6, },
80 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, AMD_UDMA_133 }, 77 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, ATA_UDMA6, },
81 { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 }, 78 { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, ATA_UDMA5, },
82 { 0 } 79 { 0 }
83}; 80};
84 81
@@ -87,7 +84,7 @@ static ide_pci_device_t *amd_chipset;
87static unsigned int amd_80w; 84static unsigned int amd_80w;
88static unsigned int amd_clock; 85static unsigned int amd_clock;
89 86
90static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; 87static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
91static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; 88static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
92 89
93/* 90/*
@@ -126,9 +123,8 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count)
126 amd_print("Driver Version: 2.13"); 123 amd_print("Driver Version: 2.13");
127 amd_print("South Bridge: %s", pci_name(bmide_dev)); 124 amd_print("South Bridge: %s", pci_name(bmide_dev));
128 125
129 pci_read_config_byte(dev, PCI_REVISION_ID, &t); 126 amd_print("Revision: IDE %#x", dev->revision);
130 amd_print("Revision: IDE %#x", t); 127 amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]);
131 amd_print("Highest DMA rate: %s", amd_dma[amd_config->flags & AMD_UDMA]);
132 128
133 amd_print("BM-DMA base: %#lx", amd_base); 129 amd_print("BM-DMA base: %#lx", amd_base);
134 amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); 130 amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10);
@@ -221,12 +217,12 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
221 pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn), 217 pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn),
222 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); 218 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
223 219
224 switch (amd_config->flags & AMD_UDMA) { 220 switch (amd_config->udma_mask) {
225 case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; 221 case ATA_UDMA2: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
226 case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; 222 case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break;
227 case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; 223 case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break;
228 case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; 224 case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break;
229 default: return; 225 default: return;
230 } 226 }
231 227
232 pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t); 228 pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t);
@@ -248,7 +244,7 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
248 ide_config_drive_speed(drive, speed); 244 ide_config_drive_speed(drive, speed);
249 245
250 T = 1000000000 / amd_clock; 246 T = 1000000000 / amd_clock;
251 UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2); 247 UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2);
252 248
253 ide_timing_compute(drive, speed, &t, T, UT); 249 ide_timing_compute(drive, speed, &t, T, UT);
254 250
@@ -277,29 +273,19 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
277static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) 273static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio)
278{ 274{
279 if (pio == 255) { 275 if (pio == 255) {
280 amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO)); 276 amd_set_drive(drive, ide_find_best_pio_mode(drive));
281 return; 277 return;
282 } 278 }
283 279
284 amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5)); 280 amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
285} 281}
286 282
287/*
288 * amd74xx_dmaproc() is a callback from upper layers that can do
289 * a lot, but we use it for DMA/PIO tuning only, delegating everything
290 * else to the default ide_dmaproc().
291 */
292
293static int amd74xx_ide_dma_check(ide_drive_t *drive) 283static int amd74xx_ide_dma_check(ide_drive_t *drive)
294{ 284{
295 int w80 = HWIF(drive)->udma_four; 285 u8 speed = ide_max_dma_mode(drive);
296 286
297 u8 speed = ide_find_best_mode(drive, 287 if (speed == 0)
298 XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA | 288 speed = ide_find_best_pio_mode(drive);
299 ((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) |
300 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) |
301 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) |
302 (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0));
303 289
304 amd_set_drive(drive, speed); 290 amd_set_drive(drive, speed);
305 291
@@ -325,8 +311,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
325 */ 311 */
326 312
327 if (amd_config->flags & AMD_CHECK_SWDMA) { 313 if (amd_config->flags & AMD_CHECK_SWDMA) {
328 pci_read_config_byte(dev, PCI_REVISION_ID, &t); 314 if (dev->revision <= 7)
329 if (t <= 7)
330 amd_config->flags |= AMD_BAD_SWDMA; 315 amd_config->flags |= AMD_BAD_SWDMA;
331 } 316 }
332 317
@@ -334,10 +319,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
334 * Check 80-wire cable presence. 319 * Check 80-wire cable presence.
335 */ 320 */
336 321
337 switch (amd_config->flags & AMD_UDMA) { 322 switch (amd_config->udma_mask) {
338 323
339 case AMD_UDMA_133: 324 case ATA_UDMA6:
340 case AMD_UDMA_100: 325 case ATA_UDMA5:
341 pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); 326 pci_read_config_byte(dev, AMD_CABLE_DETECT, &t);
342 pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); 327 pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
343 amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0); 328 amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0);
@@ -349,7 +334,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
349 } 334 }
350 break; 335 break;
351 336
352 case AMD_UDMA_66: 337 case ATA_UDMA4:
353 /* no host side cable detection */ 338 /* no host side cable detection */
354 amd_80w = 0x03; 339 amd_80w = 0x03;
355 break; 340 break;
@@ -370,7 +355,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
370 if ((amd_config->flags & AMD_CHECK_SERENADE) && 355 if ((amd_config->flags & AMD_CHECK_SERENADE) &&
371 dev->subsystem_vendor == PCI_VENDOR_ID_AMD && 356 dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
372 dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) 357 dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
373 amd_config->flags = AMD_UDMA_100; 358 amd_config->udma_mask = ATA_UDMA5;
374 359
375/* 360/*
376 * Determine the system bus clock. 361 * Determine the system bus clock.
@@ -395,8 +380,9 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
395 */ 380 */
396 381
397 pci_read_config_byte(dev, PCI_REVISION_ID, &t); 382 pci_read_config_byte(dev, PCI_REVISION_ID, &t);
398 printk(KERN_INFO "%s: %s (rev %02x) %s controller\n", 383 printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n",
399 amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]); 384 amd_chipset->name, pci_name(dev), dev->revision,
385 amd_dma[fls(amd_config->udma_mask) - 1]);
400 386
401/* 387/*
402 * Register /proc/ide/amd74xx entry 388 * Register /proc/ide/amd74xx entry
@@ -437,12 +423,19 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
437 return; 423 return;
438 424
439 hwif->atapi_dma = 1; 425 hwif->atapi_dma = 1;
440 hwif->ultra_mask = 0x7f;
441 hwif->mwdma_mask = 0x07;
442 hwif->swdma_mask = 0x07;
443 426
444 if (!hwif->udma_four) 427 hwif->ultra_mask = amd_config->udma_mask;
445 hwif->udma_four = (amd_80w >> hwif->channel) & 1; 428 hwif->mwdma_mask = 0x07;
429 if ((amd_config->flags & AMD_BAD_SWDMA) == 0)
430 hwif->swdma_mask = 0x07;
431
432 if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
433 if ((amd_80w >> hwif->channel) & 1)
434 hwif->cbl = ATA_CBL_PATA80;
435 else
436 hwif->cbl = ATA_CBL_PATA40;
437 }
438
446 hwif->ide_dma_check = &amd74xx_ide_dma_check; 439 hwif->ide_dma_check = &amd74xx_ide_dma_check;
447 if (!noautodma) 440 if (!noautodma)
448 hwif->autodma = 1; 441 hwif->autodma = 1;
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 8ab33faf6f76..2761510309b3 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -264,10 +264,11 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
264 hwif->swdma_mask = 0x04; 264 hwif->swdma_mask = 0x04;
265 265
266 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); 266 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
267
267 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) 268 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
268 hwif->udma_four = 1; 269 hwif->cbl = ATA_CBL_PATA80;
269 else 270 else
270 hwif->udma_four = 0; 271 hwif->cbl = ATA_CBL_PATA40;
271 272
272 hwif->dma_host_on = &atiixp_dma_host_on; 273 hwif->dma_host_on = &atiixp_dma_host_on;
273 hwif->dma_host_off = &atiixp_dma_host_off; 274 hwif->dma_host_off = &atiixp_dma_host_off;
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 7c57dc696f52..1e89dd6e5bbf 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/cmd64x.c Version 1.47 Mar 19, 2007 2 * linux/drivers/ide/pci/cmd64x.c Version 1.50 May 10, 2007
3 * 3 *
4 * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines. 4 * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
5 * Due to massive hardware bugs, UltraDMA is only supported 5 * Due to massive hardware bugs, UltraDMA is only supported
@@ -52,9 +52,6 @@
52#define ARTTIM23_DIS_RA2 0x04 52#define ARTTIM23_DIS_RA2 0x04
53#define ARTTIM23_DIS_RA3 0x08 53#define ARTTIM23_DIS_RA3 0x08
54#define ARTTIM23_INTR_CH1 0x10 54#define ARTTIM23_INTR_CH1 0x10
55#define ARTTIM2 0x57
56#define ARTTIM3 0x57
57#define DRWTIM23 0x58
58#define DRWTIM2 0x58 55#define DRWTIM2 0x58
59#define BRST 0x59 56#define BRST 0x59
60#define DRWTIM3 0x5b 57#define DRWTIM3 0x5b
@@ -91,7 +88,6 @@ static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index)
91 u8 reg72 = 0, reg73 = 0; /* primary */ 88 u8 reg72 = 0, reg73 = 0; /* primary */
92 u8 reg7a = 0, reg7b = 0; /* secondary */ 89 u8 reg7a = 0, reg7b = 0; /* secondary */
93 u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */ 90 u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */
94 u8 rev = 0;
95 91
96 p += sprintf(p, "\nController: %d\n", index); 92 p += sprintf(p, "\nController: %d\n", index);
97 p += sprintf(p, "PCI-%x Chipset.\n", dev->device); 93 p += sprintf(p, "PCI-%x Chipset.\n", dev->device);
@@ -106,9 +102,8 @@ static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index)
106 (void) pci_read_config_byte(dev, UDIDETCR1, &reg7b); 102 (void) pci_read_config_byte(dev, UDIDETCR1, &reg7b);
107 103
108 /* PCI0643/6 originally didn't have the primary channel enable bit */ 104 /* PCI0643/6 originally didn't have the primary channel enable bit */
109 (void) pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
110 if ((dev->device == PCI_DEVICE_ID_CMD_643) || 105 if ((dev->device == PCI_DEVICE_ID_CMD_643) ||
111 (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 3)) 106 (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 3))
112 reg51 |= CNTRL_ENA_1ST; 107 reg51 |= CNTRL_ENA_1ST;
113 108
114 p += sprintf(p, "---------------- Primary Channel " 109 p += sprintf(p, "---------------- Primary Channel "
@@ -469,71 +464,43 @@ static int cmd646_1_ide_dma_end (ide_drive_t *drive)
469 464
470static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const char *name) 465static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const char *name)
471{ 466{
472 u32 class_rev = 0;
473 u8 mrdmode = 0; 467 u8 mrdmode = 0;
474 468
475 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 469 if (dev->device == PCI_DEVICE_ID_CMD_646) {
476 class_rev &= 0xff; 470 u8 rev = 0;
477 471
478 switch(dev->device) { 472 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
479 case PCI_DEVICE_ID_CMD_643: 473
480 break; 474 switch (rev) {
481 case PCI_DEVICE_ID_CMD_646: 475 case 0x07:
482 printk(KERN_INFO "%s: chipset revision 0x%02X, ", name, class_rev); 476 case 0x05:
483 switch(class_rev) { 477 printk("%s: UltraDMA capable", name);
484 case 0x07:
485 case 0x05:
486 printk("UltraDMA Capable");
487 break;
488 case 0x03:
489 printk("MultiWord DMA Force Limited");
490 break;
491 case 0x01:
492 default:
493 printk("MultiWord DMA Limited, IRQ workaround enabled");
494 break;
495 }
496 printk("\n");
497 break;
498 case PCI_DEVICE_ID_CMD_648:
499 case PCI_DEVICE_ID_CMD_649:
500 break; 478 break;
479 case 0x03:
501 default: 480 default:
481 printk("%s: MultiWord DMA force limited", name);
482 break;
483 case 0x01:
484 printk("%s: MultiWord DMA limited, "
485 "IRQ workaround enabled\n", name);
502 break; 486 break;
487 }
503 } 488 }
504 489
505 /* Set a good latency timer and cache line size value. */ 490 /* Set a good latency timer and cache line size value. */
506 (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 491 (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
507 /* FIXME: pci_set_master() to ensure a good latency timer value */ 492 /* FIXME: pci_set_master() to ensure a good latency timer value */
508 493
509 /* Setup interrupts. */ 494 /*
510 (void) pci_read_config_byte(dev, MRDMODE, &mrdmode); 495 * Enable interrupts, select MEMORY READ LINE for reads.
511 mrdmode &= ~(0x30); 496 *
512 (void) pci_write_config_byte(dev, MRDMODE, mrdmode); 497 * NOTE: although not mentioned in the PCI0646U specs,
513 498 * bits 0-1 are write only and won't be read back as
514 /* Use MEMORY READ LINE for reads. 499 * set or not -- PCI0646U2 specs clarify this point.
515 * NOTE: Although not mentioned in the PCI0646U specs,
516 * these bits are write only and won't be read
517 * back as set or not. The PCI0646U2 specs clarify
518 * this point.
519 */ 500 */
520 (void) pci_write_config_byte(dev, MRDMODE, mrdmode | 0x02); 501 (void) pci_read_config_byte (dev, MRDMODE, &mrdmode);
521 502 mrdmode &= ~0x30;
522 /* Set reasonable active/recovery/address-setup values. */ 503 (void) pci_write_config_byte(dev, MRDMODE, (mrdmode | 0x02));
523 (void) pci_write_config_byte(dev, ARTTIM0, 0x40);
524 (void) pci_write_config_byte(dev, DRWTIM0, 0x3f);
525 (void) pci_write_config_byte(dev, ARTTIM1, 0x40);
526 (void) pci_write_config_byte(dev, DRWTIM1, 0x3f);
527#ifdef __i386__
528 (void) pci_write_config_byte(dev, ARTTIM23, 0x1c);
529#else
530 (void) pci_write_config_byte(dev, ARTTIM23, 0x5c);
531#endif
532 (void) pci_write_config_byte(dev, DRWTIM23, 0x3f);
533 (void) pci_write_config_byte(dev, DRWTIM3, 0x3f);
534#ifdef CONFIG_PPC
535 (void) pci_write_config_byte(dev, UDIDETCR0, 0xf0);
536#endif /* CONFIG_PPC */
537 504
538#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) 505#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
539 506
@@ -548,29 +515,27 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
548 return 0; 515 return 0;
549} 516}
550 517
551static unsigned int __devinit ata66_cmd64x(ide_hwif_t *hwif) 518static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
552{ 519{
553 u8 ata66 = 0, mask = (hwif->channel) ? 0x02 : 0x01; 520 struct pci_dev *dev = hwif->pci_dev;
521 u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
554 522
555 switch(hwif->pci_dev->device) { 523 switch (dev->device) {
556 case PCI_DEVICE_ID_CMD_643: 524 case PCI_DEVICE_ID_CMD_648:
557 case PCI_DEVICE_ID_CMD_646: 525 case PCI_DEVICE_ID_CMD_649:
558 return ata66; 526 pci_read_config_byte(dev, BMIDECSR, &bmidecsr);
559 default: 527 return (bmidecsr & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
560 break; 528 default:
529 return ATA_CBL_PATA40;
561 } 530 }
562 pci_read_config_byte(hwif->pci_dev, BMIDECSR, &ata66);
563 return (ata66 & mask) ? 1 : 0;
564} 531}
565 532
566static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) 533static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
567{ 534{
568 struct pci_dev *dev = hwif->pci_dev; 535 struct pci_dev *dev = hwif->pci_dev;
569 unsigned int class_rev; 536 u8 rev = 0;
570 537
571 hwif->autodma = 0; 538 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
572 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
573 class_rev &= 0xff;
574 539
575 hwif->tuneproc = &cmd64x_tune_drive; 540 hwif->tuneproc = &cmd64x_tune_drive;
576 hwif->speedproc = &cmd64x_tune_chipset; 541 hwif->speedproc = &cmd64x_tune_chipset;
@@ -580,8 +545,8 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
580 if (!hwif->dma_base) 545 if (!hwif->dma_base)
581 return; 546 return;
582 547
583 hwif->atapi_dma = 1; 548 hwif->atapi_dma = 1;
584 549 hwif->mwdma_mask = 0x07;
585 hwif->ultra_mask = hwif->cds->udma_mask; 550 hwif->ultra_mask = hwif->cds->udma_mask;
586 551
587 /* 552 /*
@@ -596,16 +561,15 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
596 * 561 *
597 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. 562 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
598 */ 563 */
599 if (dev->device == PCI_DEVICE_ID_CMD_646 && class_rev < 5) 564 if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5)
600 hwif->ultra_mask = 0x00; 565 hwif->ultra_mask = 0x00;
601 566
602 hwif->mwdma_mask = 0x07;
603
604 hwif->ide_dma_check = &cmd64x_config_drive_for_dma; 567 hwif->ide_dma_check = &cmd64x_config_drive_for_dma;
605 if (!(hwif->udma_four))
606 hwif->udma_four = ata66_cmd64x(hwif);
607 568
608 switch(dev->device) { 569 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
570 hwif->cbl = ata66_cmd64x(hwif);
571
572 switch (dev->device) {
609 case PCI_DEVICE_ID_CMD_648: 573 case PCI_DEVICE_ID_CMD_648:
610 case PCI_DEVICE_ID_CMD_649: 574 case PCI_DEVICE_ID_CMD_649:
611 alt_irq_bits: 575 alt_irq_bits:
@@ -614,10 +578,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
614 break; 578 break;
615 case PCI_DEVICE_ID_CMD_646: 579 case PCI_DEVICE_ID_CMD_646:
616 hwif->chipset = ide_cmd646; 580 hwif->chipset = ide_cmd646;
617 if (class_rev == 0x01) { 581 if (rev == 0x01) {
618 hwif->ide_dma_end = &cmd646_1_ide_dma_end; 582 hwif->ide_dma_end = &cmd646_1_ide_dma_end;
619 break; 583 break;
620 } else if (class_rev >= 0x03) 584 } else if (rev >= 0x03)
621 goto alt_irq_bits; 585 goto alt_irq_bits;
622 /* fall thru */ 586 /* fall thru */
623 default: 587 default:
@@ -626,11 +590,9 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
626 break; 590 break;
627 } 591 }
628 592
629
630 if (!noautodma) 593 if (!noautodma)
631 hwif->autodma = 1; 594 hwif->autodma = 1;
632 hwif->drives[0].autodma = hwif->autodma; 595 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
633 hwif->drives[1].autodma = hwif->autodma;
634} 596}
635 597
636static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) 598static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d)
@@ -640,14 +602,11 @@ static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d)
640 602
641static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) 603static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d)
642{ 604{
643 u8 rev = 0;
644
645 /* 605 /*
646 * The original PCI0646 didn't have the primary channel enable bit, 606 * The original PCI0646 didn't have the primary channel enable bit,
647 * it appeared starting with PCI0646U (i.e. revision ID 3). 607 * it appeared starting with PCI0646U (i.e. revision ID 3).
648 */ 608 */
649 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 609 if (dev->revision < 3)
650 if (rev < 3)
651 d->enablebits[0].reg = 0; 610 d->enablebits[0].reg = 0;
652 611
653 return ide_setup_pci_device(dev, d); 612 return ide_setup_pci_device(dev, d);
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 1eec1f308d16..b5c00d15a704 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -236,7 +236,7 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
236 */ 236 */
237 237
238 pci_set_master(cs5530_0); 238 pci_set_master(cs5530_0);
239 pci_set_mwi(cs5530_0); 239 pci_try_set_mwi(cs5530_0);
240 240
241 /* 241 /*
242 * Set PCI CacheLineSize to 16-bytes: 242 * Set PCI CacheLineSize to 16-bytes:
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 41925c47ef05..10f61f38243c 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -187,7 +187,8 @@ static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)
187 187
188 /* if a 80 wire cable was detected */ 188 /* if a 80 wire cable was detected */
189 pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit); 189 pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit);
190 return (bit & 1); 190
191 return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
191} 192}
192 193
193/**** 194/****
@@ -212,8 +213,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
212 hwif->ultra_mask = 0x1F; 213 hwif->ultra_mask = 0x1F;
213 hwif->mwdma_mask = 0x07; 214 hwif->mwdma_mask = 0x07;
214 215
215 216 hwif->cbl = cs5535_cable_detect(hwif->pci_dev);
216 hwif->udma_four = cs5535_cable_detect(hwif->pci_dev);
217 217
218 if (!noautodma) 218 if (!noautodma)
219 hwif->autodma = 1; 219 hwif->autodma = 1;
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index c33d0b0f11c9..e9b07a97c340 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/hpt366.c Version 1.06 Jun 27, 2007 2 * linux/drivers/ide/pci/hpt366.c Version 1.10 Jun 29, 2007
3 * 3 *
4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
5 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 5 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
@@ -77,7 +77,7 @@
77 * since they may tamper with its fields 77 * since they may tamper with its fields
78 * - prefix the driver startup messages with the real chip name 78 * - prefix the driver startup messages with the real chip name
79 * - claim the extra 240 bytes of I/O space for all chips 79 * - claim the extra 240 bytes of I/O space for all chips
80 * - optimize the rate masking/filtering and the drive list lookup code 80 * - optimize the UltraDMA filtering and the drive list lookup code
81 * - use pci_get_slot() to get to the function 1 of HPT36x/374 81 * - use pci_get_slot() to get to the function 1 of HPT36x/374
82 * - cache offset of the channel's misc. control registers (MCRs) being used 82 * - cache offset of the channel's misc. control registers (MCRs) being used
83 * throughout the driver 83 * throughout the driver
@@ -99,9 +99,9 @@
99 * stop duplicating it for each channel by storing the pointer in the pci_dev 99 * stop duplicating it for each channel by storing the pointer in the pci_dev
100 * structure: first, at the init_setup stage, point it to a static "template" 100 * structure: first, at the init_setup stage, point it to a static "template"
101 * with only the chip type and its specific base DPLL frequency, the highest 101 * with only the chip type and its specific base DPLL frequency, the highest
102 * supported DMA mode, and the chip settings table pointer filled, then, at 102 * UltraDMA mode, and the chip settings table pointer filled, then, at the
103 * the init_chipset stage, allocate per-chip instance and fill it with the 103 * init_chipset stage, allocate per-chip instance and fill it with the rest
104 * rest of the necessary information 104 * of the necessary information
105 * - get rid of the constant thresholds in the HPT37x PCI clock detection code, 105 * - get rid of the constant thresholds in the HPT37x PCI clock detection code,
106 * switch to calculating PCI clock frequency based on the chip's base DPLL 106 * switch to calculating PCI clock frequency based on the chip's base DPLL
107 * frequency 107 * frequency
@@ -112,6 +112,7 @@
112 * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips; 112 * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
113 * unify HPT36x/37x timing setup code and the speedproc handlers by joining 113 * unify HPT36x/37x timing setup code and the speedproc handlers by joining
114 * the register setting lists into the table indexed by the clock selected 114 * the register setting lists into the table indexed by the clock selected
115 * - set the correct hwif->ultra_mask for each individual chip
115 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 116 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
116 */ 117 */
117 118
@@ -391,7 +392,7 @@ enum ata_clock {
391 392
392struct hpt_info { 393struct hpt_info {
393 u8 chip_type; /* Chip type */ 394 u8 chip_type; /* Chip type */
394 u8 max_mode; /* Speeds allowed */ 395 u8 max_ultra; /* Max. UltraDMA mode allowed */
395 u8 dpll_clk; /* DPLL clock in MHz */ 396 u8 dpll_clk; /* DPLL clock in MHz */
396 u8 pci_clk; /* PCI clock in MHz */ 397 u8 pci_clk; /* PCI clock in MHz */
397 u32 **settings; /* Chipset settings table */ 398 u32 **settings; /* Chipset settings table */
@@ -430,77 +431,77 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = {
430 431
431static struct hpt_info hpt36x __devinitdata = { 432static struct hpt_info hpt36x __devinitdata = {
432 .chip_type = HPT36x, 433 .chip_type = HPT36x,
433 .max_mode = (HPT366_ALLOW_ATA66_4 || HPT366_ALLOW_ATA66_3) ? 2 : 1, 434 .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2,
434 .dpll_clk = 0, /* no DPLL */ 435 .dpll_clk = 0, /* no DPLL */
435 .settings = hpt36x_settings 436 .settings = hpt36x_settings
436}; 437};
437 438
438static struct hpt_info hpt370 __devinitdata = { 439static struct hpt_info hpt370 __devinitdata = {
439 .chip_type = HPT370, 440 .chip_type = HPT370,
440 .max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2, 441 .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4,
441 .dpll_clk = 48, 442 .dpll_clk = 48,
442 .settings = hpt37x_settings 443 .settings = hpt37x_settings
443}; 444};
444 445
445static struct hpt_info hpt370a __devinitdata = { 446static struct hpt_info hpt370a __devinitdata = {
446 .chip_type = HPT370A, 447 .chip_type = HPT370A,
447 .max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2, 448 .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4,
448 .dpll_clk = 48, 449 .dpll_clk = 48,
449 .settings = hpt37x_settings 450 .settings = hpt37x_settings
450}; 451};
451 452
452static struct hpt_info hpt374 __devinitdata = { 453static struct hpt_info hpt374 __devinitdata = {
453 .chip_type = HPT374, 454 .chip_type = HPT374,
454 .max_mode = 3, 455 .max_ultra = 5,
455 .dpll_clk = 48, 456 .dpll_clk = 48,
456 .settings = hpt37x_settings 457 .settings = hpt37x_settings
457}; 458};
458 459
459static struct hpt_info hpt372 __devinitdata = { 460static struct hpt_info hpt372 __devinitdata = {
460 .chip_type = HPT372, 461 .chip_type = HPT372,
461 .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, 462 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
462 .dpll_clk = 55, 463 .dpll_clk = 55,
463 .settings = hpt37x_settings 464 .settings = hpt37x_settings
464}; 465};
465 466
466static struct hpt_info hpt372a __devinitdata = { 467static struct hpt_info hpt372a __devinitdata = {
467 .chip_type = HPT372A, 468 .chip_type = HPT372A,
468 .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, 469 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
469 .dpll_clk = 66, 470 .dpll_clk = 66,
470 .settings = hpt37x_settings 471 .settings = hpt37x_settings
471}; 472};
472 473
473static struct hpt_info hpt302 __devinitdata = { 474static struct hpt_info hpt302 __devinitdata = {
474 .chip_type = HPT302, 475 .chip_type = HPT302,
475 .max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3, 476 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
476 .dpll_clk = 66, 477 .dpll_clk = 66,
477 .settings = hpt37x_settings 478 .settings = hpt37x_settings
478}; 479};
479 480
480static struct hpt_info hpt371 __devinitdata = { 481static struct hpt_info hpt371 __devinitdata = {
481 .chip_type = HPT371, 482 .chip_type = HPT371,
482 .max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3, 483 .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5,
483 .dpll_clk = 66, 484 .dpll_clk = 66,
484 .settings = hpt37x_settings 485 .settings = hpt37x_settings
485}; 486};
486 487
487static struct hpt_info hpt372n __devinitdata = { 488static struct hpt_info hpt372n __devinitdata = {
488 .chip_type = HPT372N, 489 .chip_type = HPT372N,
489 .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, 490 .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5,
490 .dpll_clk = 77, 491 .dpll_clk = 77,
491 .settings = hpt37x_settings 492 .settings = hpt37x_settings
492}; 493};
493 494
494static struct hpt_info hpt302n __devinitdata = { 495static struct hpt_info hpt302n __devinitdata = {
495 .chip_type = HPT302N, 496 .chip_type = HPT302N,
496 .max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3, 497 .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5,
497 .dpll_clk = 77, 498 .dpll_clk = 77,
498 .settings = hpt37x_settings 499 .settings = hpt37x_settings
499}; 500};
500 501
501static struct hpt_info hpt371n __devinitdata = { 502static struct hpt_info hpt371n __devinitdata = {
502 .chip_type = HPT371N, 503 .chip_type = HPT371N,
503 .max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3, 504 .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5,
504 .dpll_clk = 77, 505 .dpll_clk = 77,
505 .settings = hpt37x_settings 506 .settings = hpt37x_settings
506}; 507};
@@ -523,53 +524,38 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list)
523static u8 hpt3xx_udma_filter(ide_drive_t *drive) 524static u8 hpt3xx_udma_filter(ide_drive_t *drive)
524{ 525{
525 struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev); 526 struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev);
526 u8 chip_type = info->chip_type;
527 u8 mode = info->max_mode;
528 u8 mask; 527 u8 mask;
529 528
530 switch (mode) { 529 switch (info->chip_type) {
531 case 0x04: 530 case HPT370A:
532 mask = 0x7f; 531 if (!HPT370_ALLOW_ATA100_5 ||
533 break; 532 check_in_drive_list(drive, bad_ata100_5))
534 case 0x03: 533 return 0x1f;
534 else
535 return 0x3f;
536 case HPT370:
537 if (!HPT370_ALLOW_ATA100_5 ||
538 check_in_drive_list(drive, bad_ata100_5))
539 mask = 0x1f;
540 else
535 mask = 0x3f; 541 mask = 0x3f;
536 if (chip_type >= HPT374) 542 break;
537 break; 543 case HPT36x:
538 if (!check_in_drive_list(drive, bad_ata100_5)) 544 if (!HPT366_ALLOW_ATA66_4 ||
539 goto check_bad_ata33; 545 check_in_drive_list(drive, bad_ata66_4))
540 /* fall thru */ 546 mask = 0x0f;
541 case 0x02: 547 else
542 mask = 0x1f; 548 mask = 0x1f;
543 549
544 /* 550 if (!HPT366_ALLOW_ATA66_3 ||
545 * CHECK ME, Does this need to be changed to HPT374 ?? 551 check_in_drive_list(drive, bad_ata66_3))
546 */
547 if (chip_type >= HPT370)
548 goto check_bad_ata33;
549 if (HPT366_ALLOW_ATA66_4 &&
550 !check_in_drive_list(drive, bad_ata66_4))
551 goto check_bad_ata33;
552
553 mask = 0x0f;
554 if (HPT366_ALLOW_ATA66_3 &&
555 !check_in_drive_list(drive, bad_ata66_3))
556 goto check_bad_ata33;
557 /* fall thru */
558 case 0x01:
559 mask = 0x07; 552 mask = 0x07;
560 553 break;
561 check_bad_ata33: 554 default:
562 if (chip_type >= HPT370A) 555 return 0x7f;
563 break;
564 if (!check_in_drive_list(drive, bad_ata33))
565 break;
566 /* fall thru */
567 case 0x00:
568 default:
569 mask = 0x00;
570 break;
571 } 556 }
572 return mask; 557
558 return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask;
573} 559}
574 560
575static u32 get_speed_setting(u8 speed, struct hpt_info *info) 561static u32 get_speed_setting(u8 speed, struct hpt_info *info)
@@ -737,7 +723,7 @@ static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
737 * This is specific to the HPT366 UDMA chipset 723 * This is specific to the HPT366 UDMA chipset
738 * by HighPoint|Triones Technologies, Inc. 724 * by HighPoint|Triones Technologies, Inc.
739 */ 725 */
740static int hpt366_ide_dma_lostirq(ide_drive_t *drive) 726static void hpt366_dma_lost_irq(ide_drive_t *drive)
741{ 727{
742 struct pci_dev *dev = HWIF(drive)->pci_dev; 728 struct pci_dev *dev = HWIF(drive)->pci_dev;
743 u8 mcr1 = 0, mcr3 = 0, scr1 = 0; 729 u8 mcr1 = 0, mcr3 = 0, scr1 = 0;
@@ -749,7 +735,7 @@ static int hpt366_ide_dma_lostirq(ide_drive_t *drive)
749 drive->name, __FUNCTION__, mcr1, mcr3, scr1); 735 drive->name, __FUNCTION__, mcr1, mcr3, scr1);
750 if (scr1 & 0x10) 736 if (scr1 & 0x10)
751 pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); 737 pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
752 return __ide_dma_lostirq(drive); 738 ide_dma_lost_irq(drive);
753} 739}
754 740
755static void hpt370_clear_engine(ide_drive_t *drive) 741static void hpt370_clear_engine(ide_drive_t *drive)
@@ -799,10 +785,10 @@ static int hpt370_ide_dma_end(ide_drive_t *drive)
799 return __ide_dma_end(drive); 785 return __ide_dma_end(drive);
800} 786}
801 787
802static int hpt370_ide_dma_timeout(ide_drive_t *drive) 788static void hpt370_dma_timeout(ide_drive_t *drive)
803{ 789{
804 hpt370_irq_timeout(drive); 790 hpt370_irq_timeout(drive);
805 return __ide_dma_timeout(drive); 791 ide_dma_timeout(drive);
806} 792}
807 793
808/* returns 1 if DMA IRQ issued, 0 otherwise */ 794/* returns 1 if DMA IRQ issued, 0 otherwise */
@@ -1150,7 +1136,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha
1150 * Select 66 MHz DPLL clock only if UltraATA/133 mode is 1136 * Select 66 MHz DPLL clock only if UltraATA/133 mode is
1151 * supported/enabled, use 50 MHz DPLL clock otherwise... 1137 * supported/enabled, use 50 MHz DPLL clock otherwise...
1152 */ 1138 */
1153 if (info->max_mode == 0x04) { 1139 if (info->max_ultra == 6) {
1154 dpll_clk = 66; 1140 dpll_clk = 66;
1155 clock = ATA_CLOCK_66MHZ; 1141 clock = ATA_CLOCK_66MHZ;
1156 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ 1142 } else if (dpll_clk) { /* HPT36x chips don't have DPLL */
@@ -1243,7 +1229,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1243 struct pci_dev *dev = hwif->pci_dev; 1229 struct pci_dev *dev = hwif->pci_dev;
1244 struct hpt_info *info = pci_get_drvdata(dev); 1230 struct hpt_info *info = pci_get_drvdata(dev);
1245 int serialize = HPT_SERIALIZE_IO; 1231 int serialize = HPT_SERIALIZE_IO;
1246 u8 scr1 = 0, ata66 = (hwif->channel) ? 0x01 : 0x02; 1232 u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
1247 u8 chip_type = info->chip_type; 1233 u8 chip_type = info->chip_type;
1248 u8 new_mcr, old_mcr = 0; 1234 u8 new_mcr, old_mcr = 0;
1249 1235
@@ -1256,7 +1242,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1256 hwif->intrproc = &hpt3xx_intrproc; 1242 hwif->intrproc = &hpt3xx_intrproc;
1257 hwif->maskproc = &hpt3xx_maskproc; 1243 hwif->maskproc = &hpt3xx_maskproc;
1258 hwif->busproc = &hpt3xx_busproc; 1244 hwif->busproc = &hpt3xx_busproc;
1259 hwif->udma_filter = &hpt3xx_udma_filter; 1245
1246 if (chip_type <= HPT370A)
1247 hwif->udma_filter = &hpt3xx_udma_filter;
1260 1248
1261 /* 1249 /*
1262 * HPT3xxN chips have some complications: 1250 * HPT3xxN chips have some complications:
@@ -1305,7 +1293,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1305 return; 1293 return;
1306 } 1294 }
1307 1295
1308 hwif->ultra_mask = 0x7f; 1296 hwif->ultra_mask = hwif->cds->udma_mask;
1309 hwif->mwdma_mask = 0x07; 1297 hwif->mwdma_mask = 0x07;
1310 1298
1311 /* 1299 /*
@@ -1342,8 +1330,8 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1342 } else 1330 } else
1343 pci_read_config_byte (dev, 0x5a, &scr1); 1331 pci_read_config_byte (dev, 0x5a, &scr1);
1344 1332
1345 if (!hwif->udma_four) 1333 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
1346 hwif->udma_four = (scr1 & ata66) ? 0 : 1; 1334 hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
1347 1335
1348 hwif->ide_dma_check = &hpt366_config_drive_xfer_rate; 1336 hwif->ide_dma_check = &hpt366_config_drive_xfer_rate;
1349 1337
@@ -1353,9 +1341,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1353 } else if (chip_type >= HPT370) { 1341 } else if (chip_type >= HPT370) {
1354 hwif->dma_start = &hpt370_ide_dma_start; 1342 hwif->dma_start = &hpt370_ide_dma_start;
1355 hwif->ide_dma_end = &hpt370_ide_dma_end; 1343 hwif->ide_dma_end = &hpt370_ide_dma_end;
1356 hwif->ide_dma_timeout = &hpt370_ide_dma_timeout; 1344 hwif->dma_timeout = &hpt370_dma_timeout;
1357 } else 1345 } else
1358 hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq; 1346 hwif->dma_lost_irq = &hpt366_dma_lost_irq;
1359 1347
1360 if (!noautodma) 1348 if (!noautodma)
1361 hwif->autodma = 1; 1349 hwif->autodma = 1;
@@ -1425,11 +1413,9 @@ static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d
1425static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) 1413static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d)
1426{ 1414{
1427 struct hpt_info *info; 1415 struct hpt_info *info;
1428 u8 rev = 0, mcr1 = 0; 1416 u8 mcr1 = 0;
1429 1417
1430 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1418 if (dev->revision > 1) {
1431
1432 if (rev > 1) {
1433 d->name = "HPT371N"; 1419 d->name = "HPT371N";
1434 1420
1435 info = &hpt371n; 1421 info = &hpt371n;
@@ -1454,11 +1440,8 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d)
1454static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) 1440static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d)
1455{ 1441{
1456 struct hpt_info *info; 1442 struct hpt_info *info;
1457 u8 rev = 0;
1458
1459 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
1460 1443
1461 if (rev > 1) { 1444 if (dev->revision > 1) {
1462 d->name = "HPT372N"; 1445 d->name = "HPT372N";
1463 1446
1464 info = &hpt372n; 1447 info = &hpt372n;
@@ -1472,11 +1455,8 @@ static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d
1472static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) 1455static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d)
1473{ 1456{
1474 struct hpt_info *info; 1457 struct hpt_info *info;
1475 u8 rev = 0;
1476 1458
1477 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1459 if (dev->revision > 1) {
1478
1479 if (rev > 1) {
1480 d->name = "HPT302N"; 1460 d->name = "HPT302N";
1481 1461
1482 info = &hpt302n; 1462 info = &hpt302n;
@@ -1490,7 +1470,7 @@ static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d)
1490static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) 1470static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
1491{ 1471{
1492 struct pci_dev *dev2; 1472 struct pci_dev *dev2;
1493 u8 rev = 0; 1473 u8 rev = dev->revision;
1494 static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", 1474 static char *chipset_names[] = { "HPT366", "HPT366", "HPT368",
1495 "HPT370", "HPT370A", "HPT372", 1475 "HPT370", "HPT370A", "HPT372",
1496 "HPT372N" }; 1476 "HPT372N" };
@@ -1501,11 +1481,35 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
1501 if (PCI_FUNC(dev->devfn) & 1) 1481 if (PCI_FUNC(dev->devfn) & 1)
1502 return -ENODEV; 1482 return -ENODEV;
1503 1483
1504 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 1484 switch (rev) {
1485 case 0:
1486 case 1:
1487 case 2:
1488 /*
1489 * HPT36x chips have one channel per function and have
1490 * both channel enable bits located differently and visible
1491 * to both functions -- really stupid design decision... :-(
1492 * Bit 4 is for the primary channel, bit 5 for the secondary.
1493 */
1494 d->channels = 1;
1495 d->enablebits[0].mask = d->enablebits[0].val = 0x10;
1505 1496
1506 if (rev > 6) 1497 d->udma_mask = HPT366_ALLOW_ATA66_3 ?
1498 (HPT366_ALLOW_ATA66_4 ? 0x1f : 0x0f) : 0x07;
1499 break;
1500 case 3:
1501 case 4:
1502 d->udma_mask = HPT370_ALLOW_ATA100_5 ? 0x3f : 0x1f;
1503 break;
1504 default:
1507 rev = 6; 1505 rev = 6;
1508 1506 /* fall thru */
1507 case 5:
1508 case 6:
1509 d->udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f;
1510 break;
1511 }
1512
1509 d->name = chipset_names[rev]; 1513 d->name = chipset_names[rev];
1510 1514
1511 pci_set_drvdata(dev, info[rev]); 1515 pci_set_drvdata(dev, info[rev]);
@@ -1513,15 +1517,6 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d)
1513 if (rev > 2) 1517 if (rev > 2)
1514 goto init_single; 1518 goto init_single;
1515 1519
1516 /*
1517 * HPT36x chips have one channel per function and have
1518 * both channel enable bits located differently and visible
1519 * to both functions -- really stupid design decision... :-(
1520 * Bit 4 is for the primary channel, bit 5 for the secondary.
1521 */
1522 d->channels = 1;
1523 d->enablebits[0].mask = d->enablebits[0].val = 0x10;
1524
1525 if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { 1520 if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) {
1526 u8 mcr1 = 0, pin1 = 0, pin2 = 0; 1521 u8 mcr1 = 0, pin1 = 0, pin2 = 0;
1527 int ret; 1522 int ret;
@@ -1573,6 +1568,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1573 .channels = 2, 1568 .channels = 2,
1574 .autodma = AUTODMA, 1569 .autodma = AUTODMA,
1575 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1570 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1571 .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f,
1576 .bootable = OFF_BOARD, 1572 .bootable = OFF_BOARD,
1577 .extra = 240 1573 .extra = 240
1578 },{ /* 2 */ 1574 },{ /* 2 */
@@ -1584,6 +1580,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1584 .channels = 2, 1580 .channels = 2,
1585 .autodma = AUTODMA, 1581 .autodma = AUTODMA,
1586 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1582 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1583 .udma_mask = HPT302_ALLOW_ATA133_6 ? 0x7f : 0x3f,
1587 .bootable = OFF_BOARD, 1584 .bootable = OFF_BOARD,
1588 .extra = 240 1585 .extra = 240
1589 },{ /* 3 */ 1586 },{ /* 3 */
@@ -1595,6 +1592,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1595 .channels = 2, 1592 .channels = 2,
1596 .autodma = AUTODMA, 1593 .autodma = AUTODMA,
1597 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1594 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1595 .udma_mask = HPT371_ALLOW_ATA133_6 ? 0x7f : 0x3f,
1598 .bootable = OFF_BOARD, 1596 .bootable = OFF_BOARD,
1599 .extra = 240 1597 .extra = 240
1600 },{ /* 4 */ 1598 },{ /* 4 */
@@ -1606,6 +1604,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1606 .channels = 2, /* 4 */ 1604 .channels = 2, /* 4 */
1607 .autodma = AUTODMA, 1605 .autodma = AUTODMA,
1608 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1606 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1607 .udma_mask = 0x3f,
1609 .bootable = OFF_BOARD, 1608 .bootable = OFF_BOARD,
1610 .extra = 240 1609 .extra = 240
1611 },{ /* 5 */ 1610 },{ /* 5 */
@@ -1617,6 +1616,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = {
1617 .channels = 2, /* 4 */ 1616 .channels = 2, /* 4 */
1618 .autodma = AUTODMA, 1617 .autodma = AUTODMA,
1619 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1618 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1619 .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f,
1620 .bootable = OFF_BOARD, 1620 .bootable = OFF_BOARD,
1621 .extra = 240 1621 .extra = 240
1622 } 1622 }
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index c04a02687b95..ff48c23e571e 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -231,7 +231,7 @@ static int it8213_config_drive_for_dma (ide_drive_t *drive)
231 231
232static void __devinit init_hwif_it8213(ide_hwif_t *hwif) 232static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
233{ 233{
234 u8 reg42h = 0, ata66 = 0; 234 u8 reg42h = 0;
235 235
236 hwif->speedproc = &it8213_tune_chipset; 236 hwif->speedproc = &it8213_tune_chipset;
237 hwif->tuneproc = &it8213_tuneproc; 237 hwif->tuneproc = &it8213_tuneproc;
@@ -250,11 +250,11 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
250 hwif->swdma_mask = 0x04; 250 hwif->swdma_mask = 0x04;
251 251
252 pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h); 252 pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
253 ata66 = (reg42h & 0x02) ? 0 : 1;
254 253
255 hwif->ide_dma_check = &it8213_config_drive_for_dma; 254 hwif->ide_dma_check = &it8213_config_drive_for_dma;
256 if (!(hwif->udma_four)) 255
257 hwif->udma_four = ata66; 256 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
257 hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
258 258
259 /* 259 /*
260 * The BIOS often doesn't set up DMA on this controller 260 * The BIOS often doesn't set up DMA on this controller
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 3aeb7f1b7916..8197b653ba1e 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -491,10 +491,10 @@ static int it821x_config_drive_for_dma (ide_drive_t *drive)
491 * the needed logic onboard. 491 * the needed logic onboard.
492 */ 492 */
493 493
494static unsigned int __devinit ata66_it821x(ide_hwif_t *hwif) 494static u8 __devinit ata66_it821x(ide_hwif_t *hwif)
495{ 495{
496 /* The reference driver also only does disk side */ 496 /* The reference driver also only does disk side */
497 return 1; 497 return ATA_CBL_PATA80;
498} 498}
499 499
500/** 500/**
@@ -662,8 +662,9 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
662 hwif->mwdma_mask = 0x07; 662 hwif->mwdma_mask = 0x07;
663 663
664 hwif->ide_dma_check = &it821x_config_drive_for_dma; 664 hwif->ide_dma_check = &it821x_config_drive_for_dma;
665 if (!(hwif->udma_four)) 665
666 hwif->udma_four = ata66_it821x(hwif); 666 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
667 hwif->cbl = ata66_it821x(hwif);
667 668
668 /* 669 /*
669 * The BIOS often doesn't set up DMA on this controller 670 * The BIOS often doesn't set up DMA on this controller
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 76ed25147229..a6008f63e71e 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -25,10 +25,10 @@ typedef enum {
25 * ata66_jmicron - Cable check 25 * ata66_jmicron - Cable check
26 * @hwif: IDE port 26 * @hwif: IDE port
27 * 27 *
28 * Return 1 if the cable is 80pin 28 * Returns the cable type.
29 */ 29 */
30 30
31static int __devinit ata66_jmicron(ide_hwif_t *hwif) 31static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
32{ 32{
33 struct pci_dev *pdev = hwif->pci_dev; 33 struct pci_dev *pdev = hwif->pci_dev;
34 34
@@ -70,16 +70,17 @@ static int __devinit ata66_jmicron(ide_hwif_t *hwif)
70 { 70 {
71 case PORT_PATA0: 71 case PORT_PATA0:
72 if (control & (1 << 3)) /* 40/80 pin primary */ 72 if (control & (1 << 3)) /* 40/80 pin primary */
73 return 0; 73 return ATA_CBL_PATA40;
74 return 1; 74 return ATA_CBL_PATA80;
75 case PORT_PATA1: 75 case PORT_PATA1:
76 if (control5 & (1 << 19)) /* 40/80 pin secondary */ 76 if (control5 & (1 << 19)) /* 40/80 pin secondary */
77 return 0; 77 return ATA_CBL_PATA40;
78 return 1; 78 return ATA_CBL_PATA80;
79 case PORT_SATA: 79 case PORT_SATA:
80 break; 80 break;
81 } 81 }
82 return 1; /* Avoid bogus "control reaches end of non-void function" */ 82 /* Avoid bogus "control reaches end of non-void function" */
83 return ATA_CBL_PATA80;
83} 84}
84 85
85static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted) 86static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted)
@@ -159,8 +160,9 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
159 hwif->mwdma_mask = 0x07; 160 hwif->mwdma_mask = 0x07;
160 161
161 hwif->ide_dma_check = &jmicron_config_drive_for_dma; 162 hwif->ide_dma_check = &jmicron_config_drive_for_dma;
162 if (!(hwif->udma_four)) 163
163 hwif->udma_four = ata66_jmicron(hwif); 164 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
165 hwif->cbl = ata66_jmicron(hwif);
164 166
165 hwif->autodma = 1; 167 hwif->autodma = 1;
166 hwif->drives[0].autodma = hwif->autodma; 168 hwif->drives[0].autodma = hwif->autodma;
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 0765dce6948e..ee5020df005d 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -225,7 +225,10 @@ static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
225 225
226static u8 pdcnew_cable_detect(ide_hwif_t *hwif) 226static u8 pdcnew_cable_detect(ide_hwif_t *hwif)
227{ 227{
228 return get_indexed_reg(hwif, 0x0b) & 0x04; 228 if (get_indexed_reg(hwif, 0x0b) & 0x04)
229 return ATA_CBL_PATA40;
230 else
231 return ATA_CBL_PATA80;
229} 232}
230 233
231static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive) 234static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive)
@@ -509,8 +512,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
509 512
510 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate; 513 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
511 514
512 if (!hwif->udma_four) 515 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
513 hwif->udma_four = pdcnew_cable_detect(hwif) ? 0 : 1; 516 hwif->cbl = pdcnew_cable_detect(hwif);
514 517
515 if (!noautodma) 518 if (!noautodma)
516 hwif->autodma = 1; 519 hwif->autodma = 1;
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 23844687deea..41ac4a94959f 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -152,8 +152,10 @@ static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio)
152static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) 152static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
153{ 153{
154 u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10); 154 u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10);
155
155 pci_read_config_word(hwif->pci_dev, 0x50, &CIS); 156 pci_read_config_word(hwif->pci_dev, 0x50, &CIS);
156 return (CIS & mask) ? 1 : 0; 157
158 return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
157} 159}
158 160
159/* 161/*
@@ -267,18 +269,24 @@ somebody_else:
267 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */ 269 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
268} 270}
269 271
270static int pdc202xx_ide_dma_lostirq(ide_drive_t *drive) 272static void pdc202xx_dma_lost_irq(ide_drive_t *drive)
271{ 273{
272 if (HWIF(drive)->resetproc != NULL) 274 ide_hwif_t *hwif = HWIF(drive);
273 HWIF(drive)->resetproc(drive); 275
274 return __ide_dma_lostirq(drive); 276 if (hwif->resetproc != NULL)
277 hwif->resetproc(drive);
278
279 ide_dma_lost_irq(drive);
275} 280}
276 281
277static int pdc202xx_ide_dma_timeout(ide_drive_t *drive) 282static void pdc202xx_dma_timeout(ide_drive_t *drive)
278{ 283{
279 if (HWIF(drive)->resetproc != NULL) 284 ide_hwif_t *hwif = HWIF(drive);
280 HWIF(drive)->resetproc(drive); 285
281 return __ide_dma_timeout(drive); 286 if (hwif->resetproc != NULL)
287 hwif->resetproc(drive);
288
289 ide_dma_timeout(drive);
282} 290}
283 291
284static void pdc202xx_reset_host (ide_hwif_t *hwif) 292static void pdc202xx_reset_host (ide_hwif_t *hwif)
@@ -347,12 +355,13 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
347 hwif->err_stops_fifo = 1; 355 hwif->err_stops_fifo = 1;
348 356
349 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate; 357 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
350 hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq; 358 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
351 hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout; 359 hwif->dma_timeout = &pdc202xx_dma_timeout;
352 360
353 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) { 361 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) {
354 if (!(hwif->udma_four)) 362 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
355 hwif->udma_four = (pdc202xx_old_cable_detect(hwif)) ? 0 : 1; 363 hwif->cbl = pdc202xx_old_cable_detect(hwif);
364
356 hwif->dma_start = &pdc202xx_old_ide_dma_start; 365 hwif->dma_start = &pdc202xx_old_ide_dma_start;
357 hwif->ide_dma_end = &pdc202xx_old_ide_dma_end; 366 hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
358 } 367 }
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 8b219dd63024..1372c35be035 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/piix.c Version 0.47 February 8, 2007 2 * linux/drivers/ide/pci/piix.c Version 0.50 Jun 10, 2007
3 * 3 *
4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
@@ -394,14 +394,45 @@ static void piix_dma_clear_irq(ide_drive_t *drive)
394 hwif->OUTB(dma_stat, hwif->dma_status); 394 hwif->OUTB(dma_stat, hwif->dma_status);
395} 395}
396 396
397static int __devinit piix_cable_detect(ide_hwif_t *hwif) 397struct ich_laptop {
398 u16 device;
399 u16 subvendor;
400 u16 subdevice;
401};
402
403/*
404 * List of laptops that use short cables rather than 80 wire
405 */
406
407static const struct ich_laptop ich_laptop[] = {
408 /* devid, subvendor, subdev */
409 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
410 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
411 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
412 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
413 /* end marker */
414 { 0, }
415};
416
417static u8 __devinit piix_cable_detect(ide_hwif_t *hwif)
398{ 418{
399 struct pci_dev *dev = hwif->pci_dev; 419 struct pci_dev *pdev = hwif->pci_dev;
420 const struct ich_laptop *lap = &ich_laptop[0];
400 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30; 421 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
401 422
402 pci_read_config_byte(dev, 0x54, &reg54h); 423 /* check for specials */
424 while (lap->device) {
425 if (lap->device == pdev->device &&
426 lap->subvendor == pdev->subsystem_vendor &&
427 lap->subdevice == pdev->subsystem_device) {
428 return ATA_CBL_PATA40_SHORT;
429 }
430 lap++;
431 }
432
433 pci_read_config_byte(pdev, 0x54, &reg54h);
403 434
404 return (reg54h & mask) ? 1 : 0; 435 return (reg54h & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
405} 436}
406 437
407/** 438/**
@@ -444,8 +475,8 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
444 hwif->swdma_mask = 0x04; 475 hwif->swdma_mask = 0x04;
445 476
446 if (hwif->ultra_mask & 0x78) { 477 if (hwif->ultra_mask & 0x78) {
447 if (!hwif->udma_four) 478 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
448 hwif->udma_four = piix_cable_detect(hwif); 479 hwif->cbl = piix_cable_detect(hwif);
449 } 480 }
450 481
451 if (no_piix_dma) 482 if (no_piix_dma)
@@ -541,18 +572,16 @@ static void __devinit piix_check_450nx(void)
541{ 572{
542 struct pci_dev *pdev = NULL; 573 struct pci_dev *pdev = NULL;
543 u16 cfg; 574 u16 cfg;
544 u8 rev;
545 while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL) 575 while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL)
546 { 576 {
547 /* Look for 450NX PXB. Check for problem configurations 577 /* Look for 450NX PXB. Check for problem configurations
548 A PCI quirk checks bit 6 already */ 578 A PCI quirk checks bit 6 already */
549 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
550 pci_read_config_word(pdev, 0x41, &cfg); 579 pci_read_config_word(pdev, 0x41, &cfg);
551 /* Only on the original revision: IDE DMA can hang */ 580 /* Only on the original revision: IDE DMA can hang */
552 if(rev == 0x00) 581 if (pdev->revision == 0x00)
553 no_piix_dma = 1; 582 no_piix_dma = 1;
554 /* On all revisions below 5 PXB bus lock must be disabled for IDE */ 583 /* On all revisions below 5 PXB bus lock must be disabled for IDE */
555 else if(cfg & (1<<14) && rev < 5) 584 else if (cfg & (1<<14) && pdev->revision < 5)
556 no_piix_dma = 2; 585 no_piix_dma = 2;
557 } 586 }
558 if(no_piix_dma) 587 if(no_piix_dma)
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 55bc0a32e34f..7b87488e3daa 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -716,7 +716,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
716 hwif->atapi_dma = 1; 716 hwif->atapi_dma = 1;
717 717
718 /* we support 80c cable only. */ 718 /* we support 80c cable only. */
719 hwif->udma_four = 1; 719 hwif->cbl = ATA_CBL_PATA80;
720 720
721 hwif->autodma = 0; 721 hwif->autodma = 0;
722 if (!noautodma) 722 if (!noautodma)
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index d9c4fd1ae996..ed04e0c8dd4c 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/serverworks.c Version 0.11 Jun 2 2007 2 * linux/drivers/ide/pci/serverworks.c Version 0.20 Jun 3 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry 4 * Copyright (C) 1998-2000 Michel Aubry
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
@@ -55,7 +55,6 @@ static const char *svwks_bad_ata100[] = {
55 NULL 55 NULL
56}; 56};
57 57
58static u8 svwks_revision = 0;
59static struct pci_dev *isa_dev; 58static struct pci_dev *isa_dev;
60 59
61static int check_in_drive_lists (ide_drive_t *drive, const char **list) 60static int check_in_drive_lists (ide_drive_t *drive, const char **list)
@@ -71,9 +70,6 @@ static u8 svwks_udma_filter(ide_drive_t *drive)
71 struct pci_dev *dev = HWIF(drive)->pci_dev; 70 struct pci_dev *dev = HWIF(drive)->pci_dev;
72 u8 mask = 0; 71 u8 mask = 0;
73 72
74 if (!svwks_revision)
75 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
76
77 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) 73 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
78 return 0x1f; 74 return 0x1f;
79 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 75 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
@@ -88,9 +84,9 @@ static u8 svwks_udma_filter(ide_drive_t *drive)
88 return 0; 84 return 0;
89 /* Check the OSB4 DMA33 enable bit */ 85 /* Check the OSB4 DMA33 enable bit */
90 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0; 86 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
91 } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) { 87 } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
92 return 0x07; 88 return 0x07;
93 } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { 89 } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
94 u8 btr = 0, mode; 90 u8 btr = 0, mode;
95 pci_read_config_byte(dev, 0x5A, &btr); 91 pci_read_config_byte(dev, 0x5A, &btr);
96 mode = btr & 0x3; 92 mode = btr & 0x3;
@@ -151,84 +147,11 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
151 if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 && 147 if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 &&
152 drive->media == ide_disk && speed >= XFER_UDMA_0) 148 drive->media == ide_disk && speed >= XFER_UDMA_0)
153 BUG(); 149 BUG();
154 150
155 pci_read_config_byte(dev, drive_pci[drive->dn], &pio_timing);
156 pci_read_config_byte(dev, drive_pci2[drive->dn], &dma_timing);
157 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing); 151 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
158 pci_read_config_word(dev, 0x4A, &csb5_pio); 152 pci_read_config_word(dev, 0x4A, &csb5_pio);
159 pci_read_config_byte(dev, 0x54, &ultra_enable); 153 pci_read_config_byte(dev, 0x54, &ultra_enable);
160 154
161 /* If we are in RAID mode (eg AMI MegaIDE) then we can't it
162 turns out trust the firmware configuration */
163
164 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
165 goto oem_setup_failed;
166
167 /* Per Specified Design by OEM, and ASIC Architect */
168 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
169 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
170 if (!drive->init_speed) {
171 u8 dma_stat = inb(hwif->dma_status);
172
173 if (((ultra_enable << (7-drive->dn) & 0x80) == 0x80) &&
174 ((dma_stat & (1<<(5+unit))) == (1<<(5+unit)))) {
175 drive->current_speed = drive->init_speed = XFER_UDMA_0 + udma_modes[(ultra_timing >> (4*unit)) & ~(0xF0)];
176 return 0;
177 } else if ((dma_timing) &&
178 ((dma_stat&(1<<(5+unit)))==(1<<(5+unit)))) {
179 u8 dmaspeed;
180
181 switch (dma_timing & 0x77) {
182 case 0x20:
183 dmaspeed = XFER_MW_DMA_2;
184 break;
185 case 0x21:
186 dmaspeed = XFER_MW_DMA_1;
187 break;
188 case 0x77:
189 dmaspeed = XFER_MW_DMA_0;
190 break;
191 default:
192 goto dma_pio;
193 }
194
195 drive->current_speed = drive->init_speed = dmaspeed;
196 return 0;
197 }
198dma_pio:
199 if (pio_timing) {
200 u8 piospeed;
201
202 switch (pio_timing & 0x7f) {
203 case 0x20:
204 piospeed = XFER_PIO_4;
205 break;
206 case 0x22:
207 piospeed = XFER_PIO_3;
208 break;
209 case 0x34:
210 piospeed = XFER_PIO_2;
211 break;
212 case 0x47:
213 piospeed = XFER_PIO_1;
214 break;
215 case 0x5d:
216 piospeed = XFER_PIO_0;
217 break;
218 default:
219 goto oem_setup_failed;
220 }
221
222 drive->current_speed = drive->init_speed = piospeed;
223 return 0;
224 }
225 }
226 }
227
228oem_setup_failed:
229
230 pio_timing = 0;
231 dma_timing = 0;
232 ultra_timing &= ~(0x0F << (4*unit)); 155 ultra_timing &= ~(0x0F << (4*unit));
233 ultra_enable &= ~(0x01 << drive->dn); 156 ultra_enable &= ~(0x01 << drive->dn);
234 csb5_pio &= ~(0x0F << (4*drive->dn)); 157 csb5_pio &= ~(0x0F << (4*drive->dn));
@@ -307,9 +230,6 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
307 unsigned int reg; 230 unsigned int reg;
308 u8 btr; 231 u8 btr;
309 232
310 /* save revision id to determine DMA capability */
311 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
312
313 /* force Master Latency Timer value to 64 PCICLKs */ 233 /* force Master Latency Timer value to 64 PCICLKs */
314 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40); 234 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
315 235
@@ -388,7 +308,7 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
388 if (!(PCI_FUNC(dev->devfn) & 1)) 308 if (!(PCI_FUNC(dev->devfn) & 1))
389 btr |= 0x2; 309 btr |= 0x2;
390 else 310 else
391 btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 311 btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
392 pci_write_config_byte(dev, 0x5A, btr); 312 pci_write_config_byte(dev, 0x5A, btr);
393 } 313 }
394 /* Setup HT1000 SouthBridge Controller - Single Channel Only */ 314 /* Setup HT1000 SouthBridge Controller - Single Channel Only */
@@ -402,9 +322,9 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
402 return dev->irq; 322 return dev->irq;
403} 323}
404 324
405static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif) 325static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif)
406{ 326{
407 return 1; 327 return ATA_CBL_PATA80;
408} 328}
409 329
410/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits 330/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits
@@ -414,7 +334,7 @@ static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif)
414 * Bit 14 clear = primary IDE channel does not have 80-pin cable. 334 * Bit 14 clear = primary IDE channel does not have 80-pin cable.
415 * Bit 14 set = primary IDE channel has 80-pin cable. 335 * Bit 14 set = primary IDE channel has 80-pin cable.
416 */ 336 */
417static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif) 337static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
418{ 338{
419 struct pci_dev *dev = hwif->pci_dev; 339 struct pci_dev *dev = hwif->pci_dev;
420 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL && 340 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
@@ -422,8 +342,8 @@ static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif)
422 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE || 342 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
423 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE)) 343 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE))
424 return ((1 << (hwif->channel + 14)) & 344 return ((1 << (hwif->channel + 14)) &
425 dev->subsystem_device) ? 1 : 0; 345 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
426 return 0; 346 return ATA_CBL_PATA40;
427} 347}
428 348
429/* Sun Cobalt Alpine hardware avoids the 80-pin cable 349/* Sun Cobalt Alpine hardware avoids the 80-pin cable
@@ -432,18 +352,18 @@ static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif)
432 * 352 *
433 * WARNING: this only works on Alpine hardware! 353 * WARNING: this only works on Alpine hardware!
434 */ 354 */
435static unsigned int __devinit ata66_svwks_cobalt (ide_hwif_t *hwif) 355static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
436{ 356{
437 struct pci_dev *dev = hwif->pci_dev; 357 struct pci_dev *dev = hwif->pci_dev;
438 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN && 358 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
439 dev->vendor == PCI_VENDOR_ID_SERVERWORKS && 359 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
440 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) 360 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
441 return ((1 << (hwif->channel + 14)) & 361 return ((1 << (hwif->channel + 14)) &
442 dev->subsystem_device) ? 1 : 0; 362 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
443 return 0; 363 return ATA_CBL_PATA40;
444} 364}
445 365
446static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif) 366static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
447{ 367{
448 struct pci_dev *dev = hwif->pci_dev; 368 struct pci_dev *dev = hwif->pci_dev;
449 369
@@ -462,9 +382,9 @@ static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif)
462 /* Per Specified Design by OEM, and ASIC Architect */ 382 /* Per Specified Design by OEM, and ASIC Architect */
463 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || 383 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
464 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) 384 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
465 return 1; 385 return ATA_CBL_PATA80;
466 386
467 return 0; 387 return ATA_CBL_PATA40;
468} 388}
469 389
470static void __devinit init_hwif_svwks (ide_hwif_t *hwif) 390static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
@@ -495,8 +415,8 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
495 415
496 hwif->ide_dma_check = &svwks_config_drive_xfer_rate; 416 hwif->ide_dma_check = &svwks_config_drive_xfer_rate;
497 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 417 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
498 if (!hwif->udma_four) 418 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
499 hwif->udma_four = ata66_svwks(hwif); 419 hwif->cbl = ata66_svwks(hwif);
500 } 420 }
501 if (!noautodma) 421 if (!noautodma)
502 hwif->autodma = 1; 422 hwif->autodma = 1;
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index d3185e29a38e..d396b2929ed8 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -316,14 +316,6 @@ static void sgiioc4_dma_host_off(ide_drive_t * drive)
316 sgiioc4_clearirq(drive); 316 sgiioc4_clearirq(drive);
317} 317}
318 318
319static int
320sgiioc4_ide_dma_lostirq(ide_drive_t * drive)
321{
322 HWIF(drive)->resetproc(drive);
323
324 return __ide_dma_lostirq(drive);
325}
326
327static void 319static void
328sgiioc4_resetproc(ide_drive_t * drive) 320sgiioc4_resetproc(ide_drive_t * drive)
329{ 321{
@@ -331,6 +323,14 @@ sgiioc4_resetproc(ide_drive_t * drive)
331 sgiioc4_clearirq(drive); 323 sgiioc4_clearirq(drive);
332} 324}
333 325
326static void
327sgiioc4_dma_lost_irq(ide_drive_t * drive)
328{
329 sgiioc4_resetproc(drive);
330
331 ide_dma_lost_irq(drive);
332}
333
334static u8 334static u8
335sgiioc4_INB(unsigned long port) 335sgiioc4_INB(unsigned long port)
336{ 336{
@@ -607,8 +607,8 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
607 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; 607 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
608 hwif->dma_host_on = &sgiioc4_dma_host_on; 608 hwif->dma_host_on = &sgiioc4_dma_host_on;
609 hwif->dma_host_off = &sgiioc4_dma_host_off; 609 hwif->dma_host_off = &sgiioc4_dma_host_off;
610 hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq; 610 hwif->dma_lost_irq = &sgiioc4_dma_lost_irq;
611 hwif->ide_dma_timeout = &__ide_dma_timeout; 611 hwif->dma_timeout = &ide_dma_timeout;
612 612
613 hwif->INB = &sgiioc4_INB; 613 hwif->INB = &sgiioc4_INB;
614} 614}
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 1a4444e7226a..1c3e35487893 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -933,16 +933,17 @@ static void __devinit init_iops_siimage(ide_hwif_t *hwif)
933 * interface. 933 * interface.
934 */ 934 */
935 935
936static unsigned int __devinit ata66_siimage(ide_hwif_t *hwif) 936static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
937{ 937{
938 unsigned long addr = siimage_selreg(hwif, 0); 938 unsigned long addr = siimage_selreg(hwif, 0);
939 if (pci_get_drvdata(hwif->pci_dev) == NULL) { 939 u8 ata66 = 0;
940 u8 ata66 = 0; 940
941 if (pci_get_drvdata(hwif->pci_dev) == NULL)
941 pci_read_config_byte(hwif->pci_dev, addr, &ata66); 942 pci_read_config_byte(hwif->pci_dev, addr, &ata66);
942 return (ata66 & 0x01) ? 1 : 0; 943 else
943 } 944 ata66 = hwif->INB(addr);
944 945
945 return (hwif->INB(addr) & 0x01) ? 1 : 0; 946 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
946} 947}
947 948
948/** 949/**
@@ -988,8 +989,9 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
988 hwif->atapi_dma = 1; 989 hwif->atapi_dma = 1;
989 990
990 hwif->ide_dma_check = &siimage_config_drive_for_dma; 991 hwif->ide_dma_check = &siimage_config_drive_for_dma;
991 if (!(hwif->udma_four)) 992
992 hwif->udma_four = ata66_siimage(hwif); 993 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
994 hwif->cbl = ata66_siimage(hwif);
993 995
994 if (hwif->mmio) { 996 if (hwif->mmio) {
995 hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq; 997 hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq;
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index ec0adad9ef61..756a9b6eb462 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/sis5513.c Version 0.20 Mar 4, 2007 2 * linux/drivers/ide/pci/sis5513.c Version 0.25 Jun 10, 2007
3 * 3 *
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
@@ -659,9 +659,7 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
659 659
660 /* Special case for SiS630 : 630S/ET is ATA_100a */ 660 /* Special case for SiS630 : 630S/ET is ATA_100a */
661 if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) { 661 if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) {
662 u8 hostrev; 662 if (host->revision >= 0x30)
663 pci_read_config_byte(host, PCI_REVISION_ID, &hostrev);
664 if (hostrev >= 0x30)
665 chipset_family = ATA_100a; 663 chipset_family = ATA_100a;
666 } 664 }
667 pci_dev_put(host); 665 pci_dev_put(host);
@@ -702,7 +700,6 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
702 u16 trueid; 700 u16 trueid;
703 u8 prefctl; 701 u8 prefctl;
704 u8 idecfg; 702 u8 idecfg;
705 u8 sbrev;
706 703
707 pci_read_config_byte(dev, 0x4a, &idecfg); 704 pci_read_config_byte(dev, 0x4a, &idecfg);
708 pci_write_config_byte(dev, 0x4a, idecfg | 0x10); 705 pci_write_config_byte(dev, 0x4a, idecfg | 0x10);
@@ -712,11 +709,10 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
712 if (trueid == 0x5517) { /* SiS 961/961B */ 709 if (trueid == 0x5517) { /* SiS 961/961B */
713 710
714 lpc_bridge = pci_get_slot(dev->bus, 0x10); /* Bus 0, Dev 2, Fn 0 */ 711 lpc_bridge = pci_get_slot(dev->bus, 0x10); /* Bus 0, Dev 2, Fn 0 */
715 pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev);
716 pci_read_config_byte(dev, 0x49, &prefctl); 712 pci_read_config_byte(dev, 0x49, &prefctl);
717 pci_dev_put(lpc_bridge); 713 pci_dev_put(lpc_bridge);
718 714
719 if (sbrev == 0x10 && (prefctl & 0x80)) { 715 if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) {
720 printk(KERN_INFO "SIS5513: SiS 961B MuTIOL IDE UDMA133 controller\n"); 716 printk(KERN_INFO "SIS5513: SiS 961B MuTIOL IDE UDMA133 controller\n");
721 chipset_family = ATA_133a; 717 chipset_family = ATA_133a;
722 } else { 718 } else {
@@ -796,10 +792,33 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
796 return 0; 792 return 0;
797} 793}
798 794
799static unsigned int __devinit ata66_sis5513 (ide_hwif_t *hwif) 795struct sis_laptop {
796 u16 device;
797 u16 subvendor;
798 u16 subdevice;
799};
800
801static const struct sis_laptop sis_laptop[] = {
802 /* devid, subvendor, subdev */
803 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
804 /* end marker */
805 { 0, }
806};
807
808static u8 __devinit ata66_sis5513(ide_hwif_t *hwif)
800{ 809{
810 struct pci_dev *pdev = hwif->pci_dev;
811 const struct sis_laptop *lap = &sis_laptop[0];
801 u8 ata66 = 0; 812 u8 ata66 = 0;
802 813
814 while (lap->device) {
815 if (lap->device == pdev->device &&
816 lap->subvendor == pdev->subsystem_vendor &&
817 lap->subdevice == pdev->subsystem_device)
818 return ATA_CBL_PATA40_SHORT;
819 lap++;
820 }
821
803 if (chipset_family >= ATA_133) { 822 if (chipset_family >= ATA_133) {
804 u16 regw = 0; 823 u16 regw = 0;
805 u16 reg_addr = hwif->channel ? 0x52: 0x50; 824 u16 reg_addr = hwif->channel ? 0x52: 0x50;
@@ -811,7 +830,8 @@ static unsigned int __devinit ata66_sis5513 (ide_hwif_t *hwif)
811 pci_read_config_byte(hwif->pci_dev, 0x48, &reg48h); 830 pci_read_config_byte(hwif->pci_dev, 0x48, &reg48h);
812 ata66 = (reg48h & mask) ? 0 : 1; 831 ata66 = (reg48h & mask) ? 0 : 1;
813 } 832 }
814 return ata66; 833
834 return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
815} 835}
816 836
817static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) 837static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
@@ -841,8 +861,8 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
841 if (!chipset_family) 861 if (!chipset_family)
842 return; 862 return;
843 863
844 if (!(hwif->udma_four)) 864 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
845 hwif->udma_four = ata66_sis5513(hwif); 865 hwif->cbl = ata66_sis5513(hwif);
846 866
847 if (chipset_family > ATA_16) { 867 if (chipset_family > ATA_16) {
848 hwif->ide_dma_check = &sis5513_config_xfer_rate; 868 hwif->ide_dma_check = &sis5513_config_xfer_rate;
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 7c383d9cc472..a7323d278c49 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -195,7 +195,7 @@ static inline void sl82c105_reset_host(struct pci_dev *dev)
195 * This function is called when the IDE timer expires, the drive 195 * This function is called when the IDE timer expires, the drive
196 * indicates that it is READY, and we were waiting for DMA to complete. 196 * indicates that it is READY, and we were waiting for DMA to complete.
197 */ 197 */
198static int sl82c105_ide_dma_lostirq(ide_drive_t *drive) 198static void sl82c105_dma_lost_irq(ide_drive_t *drive)
199{ 199{
200 ide_hwif_t *hwif = HWIF(drive); 200 ide_hwif_t *hwif = HWIF(drive);
201 struct pci_dev *dev = hwif->pci_dev; 201 struct pci_dev *dev = hwif->pci_dev;
@@ -222,9 +222,6 @@ static int sl82c105_ide_dma_lostirq(ide_drive_t *drive)
222 } 222 }
223 223
224 sl82c105_reset_host(dev); 224 sl82c105_reset_host(dev);
225
226 /* __ide_dma_lostirq would return 1, so we do as well */
227 return 1;
228} 225}
229 226
230/* 227/*
@@ -244,15 +241,12 @@ static void sl82c105_dma_start(ide_drive_t *drive)
244 ide_dma_start(drive); 241 ide_dma_start(drive);
245} 242}
246 243
247static int sl82c105_ide_dma_timeout(ide_drive_t *drive) 244static void sl82c105_dma_timeout(ide_drive_t *drive)
248{ 245{
249 ide_hwif_t *hwif = HWIF(drive); 246 DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name));
250 struct pci_dev *dev = hwif->pci_dev;
251 247
252 DBG(("sl82c105_ide_dma_timeout(drive:%s)\n", drive->name)); 248 sl82c105_reset_host(HWIF(drive)->pci_dev);
253 249 ide_dma_timeout(drive);
254 sl82c105_reset_host(dev);
255 return __ide_dma_timeout(drive);
256} 250}
257 251
258static int sl82c105_ide_dma_on(ide_drive_t *drive) 252static int sl82c105_ide_dma_on(ide_drive_t *drive)
@@ -344,7 +338,6 @@ static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio)
344static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) 338static unsigned int sl82c105_bridge_revision(struct pci_dev *dev)
345{ 339{
346 struct pci_dev *bridge; 340 struct pci_dev *bridge;
347 u8 rev;
348 341
349 /* 342 /*
350 * The bridge should be part of the same device, but function 0. 343 * The bridge should be part of the same device, but function 0.
@@ -366,10 +359,9 @@ static unsigned int sl82c105_bridge_revision(struct pci_dev *dev)
366 /* 359 /*
367 * We need to find function 0's revision, not function 1 360 * We need to find function 0's revision, not function 1
368 */ 361 */
369 pci_read_config_byte(bridge, PCI_REVISION_ID, &rev);
370 pci_dev_put(bridge); 362 pci_dev_put(bridge);
371 363
372 return rev; 364 return bridge->revision;
373} 365}
374 366
375/* 367/*
@@ -441,9 +433,9 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
441 hwif->ide_dma_check = &sl82c105_ide_dma_check; 433 hwif->ide_dma_check = &sl82c105_ide_dma_check;
442 hwif->ide_dma_on = &sl82c105_ide_dma_on; 434 hwif->ide_dma_on = &sl82c105_ide_dma_on;
443 hwif->dma_off_quietly = &sl82c105_dma_off_quietly; 435 hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
444 hwif->ide_dma_lostirq = &sl82c105_ide_dma_lostirq; 436 hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
445 hwif->dma_start = &sl82c105_dma_start; 437 hwif->dma_start = &sl82c105_dma_start;
446 hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout; 438 hwif->dma_timeout = &sl82c105_dma_timeout;
447 439
448 if (!noautodma) 440 if (!noautodma)
449 hwif->autodma = 1; 441 hwif->autodma = 1;
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index c40f291f91e0..575dbbd8b482 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -199,10 +199,9 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
199 hwif->mwdma_mask = 0x06; 199 hwif->mwdma_mask = 0x06;
200 hwif->swdma_mask = 0x04; 200 hwif->swdma_mask = 0x04;
201 201
202 if (!hwif->udma_four) { 202 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
203 /* bit[0(1)]: 0:80, 1:40 */ 203 /* bit[0(1)]: 0:80, 1:40 */
204 hwif->udma_four = (reg47 & mask) ? 0 : 1; 204 hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
205 }
206 205
207 hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate; 206 hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate;
208 207
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index cee619bb2eaf..8de1f8e22494 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -220,13 +220,13 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
220 hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate; 220 hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate;
221 hwif->dma_start = &tc86c001_dma_start; 221 hwif->dma_start = &tc86c001_dma_start;
222 222
223 if (!hwif->udma_four) { 223 if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
224 /* 224 /*
225 * System Control 1 Register bit 13 (PDIAGN): 225 * System Control 1 Register bit 13 (PDIAGN):
226 * 0=80-pin cable, 1=40-pin cable 226 * 0=80-pin cable, 1=40-pin cable
227 */ 227 */
228 scr1 = hwif->INW(sc_base + 0x00); 228 scr1 = hwif->INW(sc_base + 0x00);
229 hwif->udma_four = (scr1 & 0x2000) ? 0 : 1; 229 hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
230 } 230 }
231 231
232 if (!noautodma) 232 if (!noautodma)
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index a508550c4095..27e92fb9f95e 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * 2 *
3 * Version 3.38 3 * Version 3.45
4 * 4 *
5 * VIA IDE driver for Linux. Supported southbridges: 5 * VIA IDE driver for Linux. Supported southbridges:
6 * 6 *
@@ -9,6 +9,7 @@
9 * vt8235, vt8237, vt8237a 9 * vt8235, vt8237, vt8237a
10 * 10 *
11 * Copyright (c) 2000-2002 Vojtech Pavlik 11 * Copyright (c) 2000-2002 Vojtech Pavlik
12 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
12 * 13 *
13 * Based on the work of: 14 * Based on the work of:
14 * Michel Aubry 15 * Michel Aubry
@@ -33,6 +34,8 @@
33#include <linux/pci.h> 34#include <linux/pci.h>
34#include <linux/init.h> 35#include <linux/init.h>
35#include <linux/ide.h> 36#include <linux/ide.h>
37#include <linux/dmi.h>
38
36#include <asm/io.h> 39#include <asm/io.h>
37 40
38#ifdef CONFIG_PPC_CHRP 41#ifdef CONFIG_PPC_CHRP
@@ -41,8 +44,6 @@
41 44
42#include "ide-timing.h" 45#include "ide-timing.h"
43 46
44#define DISPLAY_VIA_TIMINGS
45
46#define VIA_IDE_ENABLE 0x40 47#define VIA_IDE_ENABLE 0x40
47#define VIA_IDE_CONFIG 0x41 48#define VIA_IDE_CONFIG 0x41
48#define VIA_FIFO_CONFIG 0x43 49#define VIA_FIFO_CONFIG 0x43
@@ -54,18 +55,12 @@
54#define VIA_ADDRESS_SETUP 0x4c 55#define VIA_ADDRESS_SETUP 0x4c
55#define VIA_UDMA_TIMING 0x50 56#define VIA_UDMA_TIMING 0x50
56 57
57#define VIA_UDMA 0x007 58#define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
58#define VIA_UDMA_NONE 0x000 59#define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
59#define VIA_UDMA_33 0x001 60#define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
60#define VIA_UDMA_66 0x002 61#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
61#define VIA_UDMA_100 0x003 62#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
62#define VIA_UDMA_133 0x004 63#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
63#define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
64#define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
65#define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
66#define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
67#define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
68#define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
69 64
70/* 65/*
71 * VIA SouthBridge chips. 66 * VIA SouthBridge chips.
@@ -76,36 +71,37 @@ static struct via_isa_bridge {
76 u16 id; 71 u16 id;
77 u8 rev_min; 72 u8 rev_min;
78 u8 rev_max; 73 u8 rev_max;
79 u16 flags; 74 u8 udma_mask;
75 u8 flags;
80} via_isa_bridges[] = { 76} via_isa_bridges[] = {
81 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 77 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
82 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 78 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
83 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 79 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
84 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 80 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
85 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 81 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
86 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 82 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
87 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 83 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
88 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 84 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
89 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, 85 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
90 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, 86 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
91 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, 87 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
92 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, 88 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
93 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, 89 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
94 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 90 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
95 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, 91 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
96 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 92 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, 93 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
98 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, 94 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
99 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, 95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
100 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, 96 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
101 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, 97 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
102 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, 98 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
103 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, 99 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
104 { NULL } 100 { NULL }
105}; 101};
106 102
107static unsigned int via_clock; 103static unsigned int via_clock;
108static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; 104static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
109 105
110struct via82cxxx_dev 106struct via82cxxx_dev
111{ 107{
@@ -140,12 +136,12 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
140 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), 136 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
141 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); 137 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
142 138
143 switch (vdev->via_config->flags & VIA_UDMA) { 139 switch (vdev->via_config->udma_mask) {
144 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; 140 case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
145 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; 141 case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
146 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; 142 case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
147 case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; 143 case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
148 default: return; 144 default: return;
149 } 145 }
150 146
151 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); 147 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
@@ -173,12 +169,12 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
173 169
174 T = 1000000000 / via_clock; 170 T = 1000000000 / via_clock;
175 171
176 switch (vdev->via_config->flags & VIA_UDMA) { 172 switch (vdev->via_config->udma_mask) {
177 case VIA_UDMA_33: UT = T; break; 173 case ATA_UDMA2: UT = T; break;
178 case VIA_UDMA_66: UT = T/2; break; 174 case ATA_UDMA4: UT = T/2; break;
179 case VIA_UDMA_100: UT = T/3; break; 175 case ATA_UDMA5: UT = T/3; break;
180 case VIA_UDMA_133: UT = T/4; break; 176 case ATA_UDMA6: UT = T/4; break;
181 default: UT = T; 177 default: UT = T;
182 } 178 }
183 179
184 ide_timing_compute(drive, speed, &t, T, UT); 180 ide_timing_compute(drive, speed, &t, T, UT);
@@ -208,8 +204,7 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
208static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) 204static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
209{ 205{
210 if (pio == 255) { 206 if (pio == 255) {
211 via_set_drive(drive, 207 via_set_drive(drive, ide_find_best_pio_mode(drive));
212 ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
213 return; 208 return;
214 } 209 }
215 210
@@ -226,16 +221,10 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
226 221
227static int via82cxxx_ide_dma_check (ide_drive_t *drive) 222static int via82cxxx_ide_dma_check (ide_drive_t *drive)
228{ 223{
229 ide_hwif_t *hwif = HWIF(drive); 224 u8 speed = ide_max_dma_mode(drive);
230 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
231 u16 w80 = hwif->udma_four;
232 225
233 u16 speed = ide_find_best_mode(drive, 226 if (speed == 0)
234 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA | 227 speed = ide_find_best_pio_mode(drive);
235 (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
236 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
237 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
238 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
239 228
240 via_set_drive(drive, speed); 229 via_set_drive(drive, speed);
241 230
@@ -248,16 +237,14 @@ static int via82cxxx_ide_dma_check (ide_drive_t *drive)
248static struct via_isa_bridge *via_config_find(struct pci_dev **isa) 237static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
249{ 238{
250 struct via_isa_bridge *via_config; 239 struct via_isa_bridge *via_config;
251 u8 t;
252 240
253 for (via_config = via_isa_bridges; via_config->id; via_config++) 241 for (via_config = via_isa_bridges; via_config->id; via_config++)
254 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA + 242 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
255 !!(via_config->flags & VIA_BAD_ID), 243 !!(via_config->flags & VIA_BAD_ID),
256 via_config->id, NULL))) { 244 via_config->id, NULL))) {
257 245
258 pci_read_config_byte(*isa, PCI_REVISION_ID, &t); 246 if ((*isa)->revision >= via_config->rev_min &&
259 if (t >= via_config->rev_min && 247 (*isa)->revision <= via_config->rev_max)
260 t <= via_config->rev_max)
261 break; 248 break;
262 pci_dev_put(*isa); 249 pci_dev_put(*isa);
263 } 250 }
@@ -272,8 +259,8 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
272{ 259{
273 int i; 260 int i;
274 261
275 switch (vdev->via_config->flags & VIA_UDMA) { 262 switch (vdev->via_config->udma_mask) {
276 case VIA_UDMA_66: 263 case ATA_UDMA4:
277 for (i = 24; i >= 0; i -= 8) 264 for (i = 24; i >= 0; i -= 8)
278 if (((u >> (i & 16)) & 8) && 265 if (((u >> (i & 16)) & 8) &&
279 ((u >> i) & 0x20) && 266 ((u >> i) & 0x20) &&
@@ -286,7 +273,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
286 } 273 }
287 break; 274 break;
288 275
289 case VIA_UDMA_100: 276 case ATA_UDMA5:
290 for (i = 24; i >= 0; i -= 8) 277 for (i = 24; i >= 0; i -= 8)
291 if (((u >> i) & 0x10) || 278 if (((u >> i) & 0x10) ||
292 (((u >> i) & 0x20) && 279 (((u >> i) & 0x20) &&
@@ -298,7 +285,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
298 } 285 }
299 break; 286 break;
300 287
301 case VIA_UDMA_133: 288 case ATA_UDMA6:
302 for (i = 24; i >= 0; i -= 8) 289 for (i = 24; i >= 0; i -= 8)
303 if (((u >> i) & 0x10) || 290 if (((u >> i) & 0x10) ||
304 (((u >> i) & 0x20) && 291 (((u >> i) & 0x20) &&
@@ -353,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
353 340
354 via_cable_detect(vdev, u); 341 via_cable_detect(vdev, u);
355 342
356 if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) { 343 if (via_config->udma_mask == ATA_UDMA4) {
357 /* Enable Clk66 */ 344 /* Enable Clk66 */
358 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); 345 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
359 } else if (via_config->flags & VIA_BAD_CLK66) { 346 } else if (via_config->flags & VIA_BAD_CLK66) {
@@ -415,17 +402,54 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
415 * Print the boot message. 402 * Print the boot message.
416 */ 403 */
417 404
418 pci_read_config_byte(isa, PCI_REVISION_ID, &t); 405 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
419 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
420 "controller on pci%s\n", 406 "controller on pci%s\n",
421 via_config->name, t, 407 via_config->name, isa->revision,
422 via_dma[via_config->flags & VIA_UDMA], 408 via_config->udma_mask ? "U" : "MW",
409 via_dma[via_config->udma_mask ?
410 (fls(via_config->udma_mask) - 1) : 0],
423 pci_name(dev)); 411 pci_name(dev));
424 412
425 pci_dev_put(isa); 413 pci_dev_put(isa);
426 return 0; 414 return 0;
427} 415}
428 416
417/*
418 * Cable special cases
419 */
420
421static struct dmi_system_id cable_dmi_table[] = {
422 {
423 .ident = "Acer Ferrari 3400",
424 .matches = {
425 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
426 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
427 },
428 },
429 { }
430};
431
432static int via_cable_override(void)
433{
434 /* Systems by DMI */
435 if (dmi_check_system(cable_dmi_table))
436 return 1;
437 return 0;
438}
439
440static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
441{
442 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
443
444 if (via_cable_override())
445 return ATA_CBL_PATA40_SHORT;
446
447 if ((vdev->via_80w >> hwif->channel) & 1)
448 return ATA_CBL_PATA80;
449 else
450 return ATA_CBL_PATA40;
451}
452
429static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) 453static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
430{ 454{
431 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); 455 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
@@ -454,12 +478,14 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
454 return; 478 return;
455 479
456 hwif->atapi_dma = 1; 480 hwif->atapi_dma = 1;
457 hwif->ultra_mask = 0x7f; 481
482 hwif->ultra_mask = vdev->via_config->udma_mask;
458 hwif->mwdma_mask = 0x07; 483 hwif->mwdma_mask = 0x07;
459 hwif->swdma_mask = 0x07; 484 hwif->swdma_mask = 0x07;
460 485
461 if (!hwif->udma_four) 486 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
462 hwif->udma_four = (vdev->via_80w >> hwif->channel) & 1; 487 hwif->cbl = via82cxxx_cable_detect(hwif);
488
463 hwif->ide_dma_check = &via82cxxx_ide_dma_check; 489 hwif->ide_dma_check = &via82cxxx_ide_dma_check;
464 if (!noautodma) 490 if (!noautodma)
465 hwif->autodma = 1; 491 hwif->autodma = 1;
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 45fc36f0f219..e46f47206542 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -942,8 +942,8 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
942 return 1; 942 return 1;
943 case XFER_UDMA_4: 943 case XFER_UDMA_4:
944 case XFER_UDMA_3: 944 case XFER_UDMA_3:
945 if (HWIF(drive)->udma_four == 0) 945 if (drive->hwif->cbl != ATA_CBL_PATA80)
946 return 1; 946 return 1;
947 case XFER_UDMA_2: 947 case XFER_UDMA_2:
948 case XFER_UDMA_1: 948 case XFER_UDMA_1:
949 case XFER_UDMA_0: 949 case XFER_UDMA_0:
@@ -1244,7 +1244,7 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1244 hwif->chipset = ide_pmac; 1244 hwif->chipset = ide_pmac;
1245 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET] || pmif->mediabay; 1245 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET] || pmif->mediabay;
1246 hwif->hold = pmif->mediabay; 1246 hwif->hold = pmif->mediabay;
1247 hwif->udma_four = pmif->cable_80; 1247 hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
1248 hwif->drives[0].unmask = 1; 1248 hwif->drives[0].unmask = 1;
1249 hwif->drives[1].unmask = 1; 1249 hwif->drives[1].unmask = 1;
1250 hwif->tuneproc = pmac_ide_tuneproc; 1250 hwif->tuneproc = pmac_ide_tuneproc;
@@ -1821,28 +1821,11 @@ pmac_ide_dma_check(ide_drive_t *drive)
1821 enable = 0; 1821 enable = 0;
1822 1822
1823 if (enable) { 1823 if (enable) {
1824 short mode; 1824 u8 mode = ide_max_dma_mode(drive);
1825 1825
1826 map = XFER_MWDMA; 1826 if (mode >= XFER_UDMA_0)
1827 if (pmif->kind == controller_kl_ata4
1828 || pmif->kind == controller_un_ata6
1829 || pmif->kind == controller_k2_ata6
1830 || pmif->kind == controller_sh_ata6) {
1831 map |= XFER_UDMA;
1832 if (pmif->cable_80) {
1833 map |= XFER_UDMA_66;
1834 if (pmif->kind == controller_un_ata6 ||
1835 pmif->kind == controller_k2_ata6 ||
1836 pmif->kind == controller_sh_ata6)
1837 map |= XFER_UDMA_100;
1838 if (pmif->kind == controller_sh_ata6)
1839 map |= XFER_UDMA_133;
1840 }
1841 }
1842 mode = ide_find_best_mode(drive, map);
1843 if (mode & XFER_UDMA)
1844 drive->using_dma = pmac_ide_udma_enable(drive, mode); 1827 drive->using_dma = pmac_ide_udma_enable(drive, mode);
1845 else if (mode & XFER_MWDMA) 1828 else if (mode >= XFER_MW_DMA_0)
1846 drive->using_dma = pmac_ide_mdma_enable(drive, mode); 1829 drive->using_dma = pmac_ide_mdma_enable(drive, mode);
1847 hwif->OUTB(0, IDE_CONTROL_REG); 1830 hwif->OUTB(0, IDE_CONTROL_REG);
1848 /* Apply settings to controller */ 1831 /* Apply settings to controller */
@@ -2004,20 +1987,19 @@ static void pmac_ide_dma_host_on(ide_drive_t *drive)
2004{ 1987{
2005} 1988}
2006 1989
2007static int 1990static void
2008pmac_ide_dma_lostirq (ide_drive_t *drive) 1991pmac_ide_dma_lost_irq (ide_drive_t *drive)
2009{ 1992{
2010 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data; 1993 pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
2011 volatile struct dbdma_regs __iomem *dma; 1994 volatile struct dbdma_regs __iomem *dma;
2012 unsigned long status; 1995 unsigned long status;
2013 1996
2014 if (pmif == NULL) 1997 if (pmif == NULL)
2015 return 0; 1998 return;
2016 dma = pmif->dma_regs; 1999 dma = pmif->dma_regs;
2017 2000
2018 status = readl(&dma->status); 2001 status = readl(&dma->status);
2019 printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status); 2002 printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status);
2020 return 0;
2021} 2003}
2022 2004
2023/* 2005/*
@@ -2057,8 +2039,8 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
2057 hwif->ide_dma_test_irq = &pmac_ide_dma_test_irq; 2039 hwif->ide_dma_test_irq = &pmac_ide_dma_test_irq;
2058 hwif->dma_host_off = &pmac_ide_dma_host_off; 2040 hwif->dma_host_off = &pmac_ide_dma_host_off;
2059 hwif->dma_host_on = &pmac_ide_dma_host_on; 2041 hwif->dma_host_on = &pmac_ide_dma_host_on;
2060 hwif->ide_dma_timeout = &__ide_dma_timeout; 2042 hwif->dma_timeout = &ide_dma_timeout;
2061 hwif->ide_dma_lostirq = &pmac_ide_dma_lostirq; 2043 hwif->dma_lost_irq = &pmac_ide_dma_lost_irq;
2062 2044
2063 hwif->atapi_dma = 1; 2045 hwif->atapi_dma = 1;
2064 switch(pmif->kind) { 2046 switch(pmif->kind) {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 15:38:53 -0500