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-rw-r--r--drivers/ide/Kconfig9
-rw-r--r--drivers/ide/ide-disk.c2
-rw-r--r--drivers/ide/ide-io.c4
-rw-r--r--drivers/ide/ide-iops.c4
-rw-r--r--drivers/ide/pci/aec62xx.c19
-rw-r--r--drivers/ide/pci/amd74xx.c7
-rw-r--r--drivers/ide/pci/cmd64x.c15
-rw-r--r--drivers/ide/pci/hpt34x.c2
-rw-r--r--drivers/ide/pci/pdc202xx_new.c6
-rw-r--r--drivers/ide/pci/pdc202xx_old.c119
-rw-r--r--drivers/ide/pci/sc1200.c4
-rw-r--r--drivers/ide/pci/serverworks.c53
-rw-r--r--drivers/ide/pci/siimage.c62
-rw-r--r--drivers/ide/pci/sl82c105.c4
-rw-r--r--drivers/ide/pci/slc90e66.c11
-rw-r--r--drivers/ide/ppc/pmac.c125
16 files changed, 75 insertions, 371 deletions
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index d633081fa4c5..d1266fe2d1ab 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -774,11 +774,18 @@ config BLK_DEV_IDEDMA_PMAC
774 performance. 774 performance.
775 775
776config BLK_DEV_IDE_PMAC_BLINK 776config BLK_DEV_IDE_PMAC_BLINK
777 bool "Blink laptop LED on drive activity" 777 bool "Blink laptop LED on drive activity (DEPRECATED)"
778 depends on BLK_DEV_IDE_PMAC && ADB_PMU 778 depends on BLK_DEV_IDE_PMAC && ADB_PMU
779 select ADB_PMU_LED
780 select LEDS_TRIGGERS
781 select LEDS_TRIGGER_IDE_DISK
779 help 782 help
780 This option enables the use of the sleep LED as a hard drive 783 This option enables the use of the sleep LED as a hard drive
781 activity LED. 784 activity LED.
785 This option is deprecated, it only selects ADB_PMU_LED and
786 LEDS_TRIGGER_IDE_DISK and changes the code in the new led class
787 device to default to the ide-disk trigger (which should be set
788 from userspace via sysfs).
782 789
783config BLK_DEV_IDE_SWARM 790config BLK_DEV_IDE_SWARM
784 tristate "IDE for Sibyte evaluation boards" 791 tristate "IDE for Sibyte evaluation boards"
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c
index d79526320717..d0227c39ced1 100644
--- a/drivers/ide/ide-disk.c
+++ b/drivers/ide/ide-disk.c
@@ -37,7 +37,7 @@
37 * Version 1.15 convert all calls to ide_raw_taskfile 37 * Version 1.15 convert all calls to ide_raw_taskfile
38 * since args will return register content. 38 * since args will return register content.
39 * Version 1.16 added suspend-resume-checkpower 39 * Version 1.16 added suspend-resume-checkpower
40 * Version 1.17 do flush on standy, do flush on ATA < ATA6 40 * Version 1.17 do flush on standby, do flush on ATA < ATA6
41 * fix wcache setup. 41 * fix wcache setup.
42 */ 42 */
43 43
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index d2428cef1598..26ceab1e90bb 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -505,7 +505,7 @@ static ide_startstop_t ide_ata_error(ide_drive_t *drive, struct request *rq, u8
505 } 505 }
506 } 506 }
507 507
508 if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ) 508 if ((stat & DRQ_STAT) && rq_data_dir(rq) == READ && hwif->err_stops_fifo == 0)
509 try_to_flush_leftover_data(drive); 509 try_to_flush_leftover_data(drive);
510 510
511 if (hwif->INB(IDE_STATUS_REG) & (BUSY_STAT|DRQ_STAT)) 511 if (hwif->INB(IDE_STATUS_REG) & (BUSY_STAT|DRQ_STAT))
@@ -1665,7 +1665,7 @@ irqreturn_t ide_intr (int irq, void *dev_id, struct pt_regs *regs)
1665 * Initialize a request before we fill it in and send it down to 1665 * Initialize a request before we fill it in and send it down to
1666 * ide_do_drive_cmd. Commands must be set up by this function. Right 1666 * ide_do_drive_cmd. Commands must be set up by this function. Right
1667 * now it doesn't do a lot, but if that changes abusers will have a 1667 * now it doesn't do a lot, but if that changes abusers will have a
1668 * nasty suprise. 1668 * nasty surprise.
1669 */ 1669 */
1670 1670
1671void ide_init_drive_cmd (struct request *rq) 1671void ide_init_drive_cmd (struct request *rq)
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index 97a49e77a8f1..32117f0ec5c0 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -597,6 +597,10 @@ u8 eighty_ninty_three (ide_drive_t *drive)
597{ 597{
598 if(HWIF(drive)->udma_four == 0) 598 if(HWIF(drive)->udma_four == 0)
599 return 0; 599 return 0;
600
601 /* Check for SATA but only if we are ATA5 or higher */
602 if (drive->id->hw_config == 0 && (drive->id->major_rev_num & 0x7FE0))
603 return 1;
600 if (!(drive->id->hw_config & 0x6000)) 604 if (!(drive->id->hw_config & 0x6000))
601 return 0; 605 return 0;
602#ifndef CONFIG_IDEDMA_IVB 606#ifndef CONFIG_IDEDMA_IVB
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index c743e68c33aa..3edd7060510f 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -22,7 +22,7 @@ struct chipset_bus_clock_list_entry {
22 u8 ultra_settings; 22 u8 ultra_settings;
23}; 23};
24 24
25static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = { 25static const struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
26 { XFER_UDMA_6, 0x31, 0x07 }, 26 { XFER_UDMA_6, 0x31, 0x07 },
27 { XFER_UDMA_5, 0x31, 0x06 }, 27 { XFER_UDMA_5, 0x31, 0x06 },
28 { XFER_UDMA_4, 0x31, 0x05 }, 28 { XFER_UDMA_4, 0x31, 0x05 },
@@ -42,7 +42,7 @@ static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
42 { 0, 0x00, 0x00 } 42 { 0, 0x00, 0x00 }
43}; 43};
44 44
45static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = { 45static const struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
46 { XFER_UDMA_6, 0x41, 0x06 }, 46 { XFER_UDMA_6, 0x41, 0x06 },
47 { XFER_UDMA_5, 0x41, 0x05 }, 47 { XFER_UDMA_5, 0x41, 0x05 },
48 { XFER_UDMA_4, 0x41, 0x04 }, 48 { XFER_UDMA_4, 0x41, 0x04 },
@@ -254,7 +254,8 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
254 254
255 if (dev->resource[PCI_ROM_RESOURCE].start) { 255 if (dev->resource[PCI_ROM_RESOURCE].start) {
256 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); 256 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
257 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start); 257 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
258 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
258 } 259 }
259 260
260 if (bus_speed <= 33) 261 if (bus_speed <= 33)
@@ -425,12 +426,12 @@ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_devi
425 return d->init_setup(dev, d); 426 return d->init_setup(dev, d);
426} 427}
427 428
428static struct pci_device_id aec62xx_pci_tbl[] = { 429static const struct pci_device_id aec62xx_pci_tbl[] = {
429 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 430 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF), 0 },
430 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, 431 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860), 1 },
431 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, 432 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R), 2 },
432 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, 433 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865), 3 },
433 { PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, 434 { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R), 4 },
434 { 0, }, 435 { 0, },
435}; 436};
436MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl); 437MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl);
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 6e9dbf4d8077..85007cb12c52 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -75,6 +75,7 @@ static struct amd_ide_chip {
75 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 }, 75 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 },
76 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 }, 76 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 },
77 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 }, 77 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 },
78 { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, AMD_UDMA_133 },
78 { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 }, 79 { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 },
79 { 0 } 80 { 0 }
80}; 81};
@@ -490,7 +491,8 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
490 /* 15 */ DECLARE_NV_DEV("NFORCE-MCP51"), 491 /* 15 */ DECLARE_NV_DEV("NFORCE-MCP51"),
491 /* 16 */ DECLARE_NV_DEV("NFORCE-MCP55"), 492 /* 16 */ DECLARE_NV_DEV("NFORCE-MCP55"),
492 /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61"), 493 /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61"),
493 /* 18 */ DECLARE_AMD_DEV("AMD5536"), 494 /* 18 */ DECLARE_NV_DEV("NFORCE-MCP65"),
495 /* 19 */ DECLARE_AMD_DEV("AMD5536"),
494}; 496};
495 497
496static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) 498static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id)
@@ -528,7 +530,8 @@ static struct pci_device_id amd74xx_pci_tbl[] = {
528 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 }, 530 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 },
529 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 }, 531 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 },
530 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 }, 532 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 },
531 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 }, 533 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 },
534 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19 },
532 { 0, }, 535 { 0, },
533}; 536};
534MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); 537MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 3d9c7afc8695..92b7b1549b16 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -190,14 +190,6 @@ static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
190#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) */ 190#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) */
191 191
192/* 192/*
193 * Registers and masks for easy access by drive index:
194 */
195#if 0
196static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
197static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
198#endif
199
200/*
201 * This routine writes the prepared setup/active/recovery counts 193 * This routine writes the prepared setup/active/recovery counts
202 * for a drive into the cmd646 chipset registers to active them. 194 * for a drive into the cmd646 chipset registers to active them.
203 */ 195 */
@@ -606,13 +598,6 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
606 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 598 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
607 class_rev &= 0xff; 599 class_rev &= 0xff;
608 600
609#ifdef __i386__
610 if (dev->resource[PCI_ROM_RESOURCE].start) {
611 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
612 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
613 }
614#endif
615
616 switch(dev->device) { 601 switch(dev->device) {
617 case PCI_DEVICE_ID_CMD_643: 602 case PCI_DEVICE_ID_CMD_643:
618 break; 603 break;
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index be334da7a754..7da550281cf2 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -176,7 +176,7 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
176 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 176 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
177 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); 177 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
178 printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n", 178 printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
179 dev->resource[PCI_ROM_RESOURCE].start); 179 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
180 } 180 }
181 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0); 181 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
182 } else { 182 } else {
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index acd63173199b..5a8334d134fb 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -313,8 +313,8 @@ static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const cha
313 if (dev->resource[PCI_ROM_RESOURCE].start) { 313 if (dev->resource[PCI_ROM_RESOURCE].start) {
314 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 314 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
315 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); 315 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
316 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", 316 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
317 name, dev->resource[PCI_ROM_RESOURCE].start); 317 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
318 } 318 }
319 319
320#ifdef CONFIG_PPC_PMAC 320#ifdef CONFIG_PPC_PMAC
@@ -338,6 +338,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
338 hwif->ultra_mask = 0x7f; 338 hwif->ultra_mask = 0x7f;
339 hwif->mwdma_mask = 0x07; 339 hwif->mwdma_mask = 0x07;
340 340
341 hwif->err_stops_fifo = 1;
342
341 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate; 343 hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
342 hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq; 344 hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
343 hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout; 345 hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 22d17548ecdb..1e209d8f9437 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -101,31 +101,6 @@ static const char *pdc_quirk_drives[] = {
101#define MC1 0x02 /* DMA"C" timing */ 101#define MC1 0x02 /* DMA"C" timing */
102#define MC0 0x01 /* DMA"C" timing */ 102#define MC0 0x01 /* DMA"C" timing */
103 103
104#if 0
105 unsigned long bibma = pci_resource_start(dev, 4);
106 u8 hi = 0, lo = 0;
107
108 u8 sc1c = inb_p((u16)bibma + 0x1c);
109 u8 sc1e = inb_p((u16)bibma + 0x1e);
110 u8 sc1f = inb_p((u16)bibma + 0x1f);
111
112 p += sprintf(p, "Host Mode : %s\n",
113 (sc1f & 0x08) ? "Tri-Stated" : "Normal");
114 p += sprintf(p, "Bus Clocking : %s\n",
115 ((sc1f & 0xC0) == 0xC0) ? "100 External" :
116 ((sc1f & 0x80) == 0x80) ? "66 External" :
117 ((sc1f & 0x40) == 0x40) ? "33 External" : "33 PCI Internal");
118 p += sprintf(p, "IO pad select : %s mA\n",
119 ((sc1c & 0x03) == 0x03) ? "10" :
120 ((sc1c & 0x02) == 0x02) ? "8" :
121 ((sc1c & 0x01) == 0x01) ? "6" :
122 ((sc1c & 0x00) == 0x00) ? "4" : "??");
123 hi = sc1e >> 4;
124 lo = sc1e & 0xf;
125 p += sprintf(p, "Status Polling Period : %d\n", hi);
126 p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
127#endif
128
129static u8 pdc202xx_ratemask (ide_drive_t *drive) 104static u8 pdc202xx_ratemask (ide_drive_t *drive)
130{ 105{
131 u8 mode; 106 u8 mode;
@@ -505,73 +480,20 @@ static void pdc202xx_reset (ide_drive_t *drive)
505 480
506 pdc202xx_reset_host(hwif); 481 pdc202xx_reset_host(hwif);
507 pdc202xx_reset_host(mate); 482 pdc202xx_reset_host(mate);
508#if 0
509 /*
510 * FIXME: Have to kick all the drives again :-/
511 * What a pain in the ACE!
512 */
513 if (hwif->present) {
514 u16 hunit = 0;
515 for (hunit = 0; hunit < MAX_DRIVES; ++hunit) {
516 ide_drive_t *hdrive = &hwif->drives[hunit];
517 if (hdrive->present) {
518 if (hwif->ide_dma_check)
519 hwif->ide_dma_check(hdrive);
520 else
521 hwif->tuneproc(hdrive, 5);
522 }
523 }
524 }
525 if (mate->present) {
526 u16 munit = 0;
527 for (munit = 0; munit < MAX_DRIVES; ++munit) {
528 ide_drive_t *mdrive = &mate->drives[munit];
529 if (mdrive->present) {
530 if (mate->ide_dma_check)
531 mate->ide_dma_check(mdrive);
532 else
533 mate->tuneproc(mdrive, 5);
534 }
535 }
536 }
537#else
538 hwif->tuneproc(drive, 5); 483 hwif->tuneproc(drive, 5);
539#endif
540} 484}
541 485
542static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name) 486static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
487 const char *name)
543{ 488{
489 /* This doesn't appear needed */
544 if (dev->resource[PCI_ROM_RESOURCE].start) { 490 if (dev->resource[PCI_ROM_RESOURCE].start) {
545 pci_write_config_dword(dev, PCI_ROM_ADDRESS, 491 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
546 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE); 492 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
547 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", 493 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
548 name, dev->resource[PCI_ROM_RESOURCE].start); 494 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
549 }
550
551 /*
552 * software reset - this is required because the bios
553 * will set UDMA timing on if the hdd supports it. The
554 * user may want to turn udma off. A bug in the pdc20262
555 * is that it cannot handle a downgrade in timing from
556 * UDMA to DMA. Disk accesses after issuing a set
557 * feature command will result in errors. A software
558 * reset leaves the timing registers intact,
559 * but resets the drives.
560 */
561#if 0
562 if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
563 (dev->device == PCI_DEVICE_ID_PROMISE_20265) ||
564 (dev->device == PCI_DEVICE_ID_PROMISE_20263) ||
565 (dev->device == PCI_DEVICE_ID_PROMISE_20262)) {
566 unsigned long high_16 = pci_resource_start(dev, 4);
567 byte udma_speed_flag = inb(high_16 + 0x001f);
568 outb(udma_speed_flag | 0x10, high_16 + 0x001f);
569 mdelay(100);
570 outb(udma_speed_flag & ~0x10, high_16 + 0x001f);
571 mdelay(2000); /* 2 seconds ?! */
572 } 495 }
573 496
574#endif
575 return dev->irq; 497 return dev->irq;
576} 498}
577 499
@@ -599,6 +521,8 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
599 hwif->mwdma_mask = 0x07; 521 hwif->mwdma_mask = 0x07;
600 hwif->swdma_mask = 0x07; 522 hwif->swdma_mask = 0x07;
601 523
524 hwif->err_stops_fifo = 1;
525
602 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate; 526 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
603 hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq; 527 hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq;
604 hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout; 528 hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout;
@@ -687,19 +611,6 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
687 "mirror fixed.\n", d->name); 611 "mirror fixed.\n", d->name);
688 } 612 }
689 } 613 }
690
691#if 0
692 if (dev->device == PCI_DEVICE_ID_PROMISE_20262)
693 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
694 (tmp & e->mask) != e->val))
695
696 if (d->enablebits[0].reg != d->enablebits[1].reg) {
697 d->enablebits[0].reg = d->enablebits[1].reg;
698 d->enablebits[0].mask = d->enablebits[1].mask;
699 d->enablebits[0].val = d->enablebits[1].val;
700 }
701#endif
702
703 return ide_setup_pci_device(dev, d); 614 return ide_setup_pci_device(dev, d);
704} 615}
705 616
@@ -714,22 +625,6 @@ static int __devinit init_setup_pdc20265(struct pci_dev *dev,
714 "attached to I2O RAID controller.\n"); 625 "attached to I2O RAID controller.\n");
715 return -ENODEV; 626 return -ENODEV;
716 } 627 }
717
718#if 0
719 {
720 u8 pri = 0, sec = 0;
721
722 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
723 (tmp & e->mask) != e->val))
724
725 if (d->enablebits[0].reg != d->enablebits[1].reg) {
726 d->enablebits[0].reg = d->enablebits[1].reg;
727 d->enablebits[0].mask = d->enablebits[1].mask;
728 d->enablebits[0].val = d->enablebits[1].val;
729 }
730 }
731#endif
732
733 return ide_setup_pci_device(dev, d); 628 return ide_setup_pci_device(dev, d);
734} 629}
735 630
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 24e21b2838c1..778b82ae964d 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -395,7 +395,6 @@ static int sc1200_resume (struct pci_dev *dev)
395{ 395{
396 ide_hwif_t *hwif = NULL; 396 ide_hwif_t *hwif = NULL;
397 397
398printk("SC1200: resume\n");
399 pci_set_power_state(dev, PCI_D0); // bring chip back from sleep state 398 pci_set_power_state(dev, PCI_D0); // bring chip back from sleep state
400 dev->current_state = PM_EVENT_ON; 399 dev->current_state = PM_EVENT_ON;
401 pci_enable_device(dev); 400 pci_enable_device(dev);
@@ -405,7 +404,6 @@ printk("SC1200: resume\n");
405 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) { 404 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
406 unsigned int basereg, r, d, format; 405 unsigned int basereg, r, d, format;
407 sc1200_saved_state_t *ss = (sc1200_saved_state_t *)hwif->config_data; 406 sc1200_saved_state_t *ss = (sc1200_saved_state_t *)hwif->config_data;
408printk("%s: SC1200: resume\n", hwif->name);
409 407
410 // 408 //
411 // Restore timing registers: this may be unnecessary if BIOS also does it 409 // Restore timing registers: this may be unnecessary if BIOS also does it
@@ -493,7 +491,7 @@ static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_devic
493} 491}
494 492
495static struct pci_device_id sc1200_pci_tbl[] = { 493static struct pci_device_id sc1200_pci_tbl[] = {
496 { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 494 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE), 0},
497 { 0, }, 495 { 0, },
498}; 496};
499MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl); 497MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl);
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 0d3073f4eab4..5100b827a935 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -123,11 +123,11 @@ static u8 svwks_csb_check (struct pci_dev *dev)
123} 123}
124static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) 124static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
125{ 125{
126 u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 }; 126 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
127 u8 dma_modes[] = { 0x77, 0x21, 0x20 }; 127 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
128 u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 128 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
129 u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 }; 129 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
130 u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 }; 130 static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
131 131
132 ide_hwif_t *hwif = HWIF(drive); 132 ide_hwif_t *hwif = HWIF(drive);
133 struct pci_dev *dev = hwif->pci_dev; 133 struct pci_dev *dev = hwif->pci_dev;
@@ -392,16 +392,6 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
392 } 392 }
393 outb_p(0x06, 0x0c00); 393 outb_p(0x06, 0x0c00);
394 dev->irq = inb_p(0x0c01); 394 dev->irq = inb_p(0x0c01);
395#if 0
396 printk("%s: device class (0x%04x)\n",
397 name, dev->class);
398 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) {
399 dev->class &= ~0x000F0F00;
400 // dev->class |= ~0x00000400;
401 dev->class |= ~0x00010100;
402 /**/
403 }
404#endif
405 } else { 395 } else {
406 struct pci_dev * findev = NULL; 396 struct pci_dev * findev = NULL;
407 u8 reg41 = 0; 397 u8 reg41 = 0;
@@ -452,7 +442,7 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
452 pci_write_config_byte(dev, 0x5A, btr); 442 pci_write_config_byte(dev, 0x5A, btr);
453 } 443 }
454 444
455 return (dev->irq) ? dev->irq : 0; 445 return dev->irq;
456} 446}
457 447
458static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif) 448static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif)
@@ -500,11 +490,6 @@ static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif)
500{ 490{
501 struct pci_dev *dev = hwif->pci_dev; 491 struct pci_dev *dev = hwif->pci_dev;
502 492
503 /* Per Specified Design by OEM, and ASIC Architect */
504 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
505 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
506 return 1;
507
508 /* Server Works */ 493 /* Server Works */
509 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS) 494 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
510 return ata66_svwks_svwks (hwif); 495 return ata66_svwks_svwks (hwif);
@@ -517,10 +502,14 @@ static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif)
517 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN) 502 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN)
518 return ata66_svwks_cobalt (hwif); 503 return ata66_svwks_cobalt (hwif);
519 504
505 /* Per Specified Design by OEM, and ASIC Architect */
506 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
507 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
508 return 1;
509
520 return 0; 510 return 0;
521} 511}
522 512
523#undef CAN_SW_DMA
524static void __devinit init_hwif_svwks (ide_hwif_t *hwif) 513static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
525{ 514{
526 u8 dma_stat = 0; 515 u8 dma_stat = 0;
@@ -537,9 +526,6 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
537 hwif->ultra_mask = 0x3f; 526 hwif->ultra_mask = 0x3f;
538 527
539 hwif->mwdma_mask = 0x07; 528 hwif->mwdma_mask = 0x07;
540#ifdef CAN_SW_DMA
541 hwif->swdma_mask = 0x07;
542#endif /* CAN_SW_DMA */
543 529
544 hwif->autodma = 0; 530 hwif->autodma = 0;
545 531
@@ -562,8 +548,6 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
562 hwif->drives[1].autodma = (dma_stat & 0x40); 548 hwif->drives[1].autodma = (dma_stat & 0x40);
563 hwif->drives[0].autotune = (!(dma_stat & 0x20)); 549 hwif->drives[0].autotune = (!(dma_stat & 0x20));
564 hwif->drives[1].autotune = (!(dma_stat & 0x40)); 550 hwif->drives[1].autotune = (!(dma_stat & 0x40));
565// hwif->drives[0].autodma = hwif->autodma;
566// hwif->drives[1].autodma = hwif->autodma;
567} 551}
568 552
569/* 553/*
@@ -593,11 +577,6 @@ static int __devinit init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d)
593 if (dev->resource[0].start == 0x01f1) 577 if (dev->resource[0].start == 0x01f1)
594 d->bootable = ON_BOARD; 578 d->bootable = ON_BOARD;
595 } 579 }
596#if 0
597 if ((IDE_PCI_DEVID_EQ(d->devid, DEVID_CSB6) &&
598 (!(PCI_FUNC(dev->devfn) & 1)))
599 d->autodma = AUTODMA;
600#endif
601 580
602 d->channels = ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE || 581 d->channels = ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE ||
603 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) && 582 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2) &&
@@ -671,11 +650,11 @@ static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device
671} 650}
672 651
673static struct pci_device_id svwks_pci_tbl[] = { 652static struct pci_device_id svwks_pci_tbl[] = {
674 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 653 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE), 0},
675 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 654 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE), 1},
676 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, 655 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE), 2},
677 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, 656 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2), 3},
678 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, 657 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE), 4},
679 { 0, }, 658 { 0, },
680}; 659};
681MODULE_DEVICE_TABLE(pci, svwks_pci_tbl); 660MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index f1ca154dd52c..72dade14c725 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -38,9 +38,6 @@
38 38
39#include <asm/io.h> 39#include <asm/io.h>
40 40
41#undef SIIMAGE_VIRTUAL_DMAPIO
42#undef SIIMAGE_LARGE_DMA
43
44/** 41/**
45 * pdev_is_sata - check if device is SATA 42 * pdev_is_sata - check if device is SATA
46 * @pdev: PCI device to check 43 * @pdev: PCI device to check
@@ -461,36 +458,6 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
461 return 0; 458 return 0;
462} 459}
463 460
464#if 0
465/**
466 * siimage_mmio_ide_dma_count - DMA bytes done
467 * @drive
468 *
469 * If we are doing VDMA the CMD680 requires a little bit
470 * of more careful handling and we have to read the counts
471 * off ourselves. For non VDMA life is normal.
472 */
473
474static int siimage_mmio_ide_dma_count (ide_drive_t *drive)
475{
476#ifdef SIIMAGE_VIRTUAL_DMAPIO
477 struct request *rq = HWGROUP(drive)->rq;
478 ide_hwif_t *hwif = HWIF(drive);
479 u32 count = (rq->nr_sectors * SECTOR_SIZE);
480 u32 rcount = 0;
481 unsigned long addr = siimage_selreg(hwif, 0x1C);
482
483 hwif->OUTL(count, addr);
484 rcount = hwif->INL(addr);
485
486 printk("\n%s: count = %d, rcount = %d, nr_sectors = %lu\n",
487 drive->name, count, rcount, rq->nr_sectors);
488
489#endif /* SIIMAGE_VIRTUAL_DMAPIO */
490 return __ide_dma_count(drive);
491}
492#endif
493
494/** 461/**
495 * siimage_mmio_ide_dma_test_irq - check we caused an IRQ 462 * siimage_mmio_ide_dma_test_irq - check we caused an IRQ
496 * @drive: drive we are testing 463 * @drive: drive we are testing
@@ -512,12 +479,10 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
512 u32 sata_error = hwif->INL(SATA_ERROR_REG); 479 u32 sata_error = hwif->INL(SATA_ERROR_REG);
513 hwif->OUTL(sata_error, SATA_ERROR_REG); 480 hwif->OUTL(sata_error, SATA_ERROR_REG);
514 watchdog = (sata_error & 0x00680000) ? 1 : 0; 481 watchdog = (sata_error & 0x00680000) ? 1 : 0;
515#if 1
516 printk(KERN_WARNING "%s: sata_error = 0x%08x, " 482 printk(KERN_WARNING "%s: sata_error = 0x%08x, "
517 "watchdog = %d, %s\n", 483 "watchdog = %d, %s\n",
518 drive->name, sata_error, watchdog, 484 drive->name, sata_error, watchdog,
519 __FUNCTION__); 485 __FUNCTION__);
520#endif
521 486
522 } else { 487 } else {
523 watchdog = (ext_stat & 0x8000) ? 1 : 0; 488 watchdog = (ext_stat & 0x8000) ? 1 : 0;
@@ -863,7 +828,7 @@ static unsigned int __devinit init_chipset_siimage(struct pci_dev *dev, const ch
863 * time. 828 * time.
864 * 829 *
865 * The hardware supports buffered taskfiles and also some rather nice 830 * The hardware supports buffered taskfiles and also some rather nice
866 * extended PRD tables. Unfortunately right now we don't. 831 * extended PRD tables. For better SI3112 support use the libata driver
867 */ 832 */
868 833
869static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif) 834static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
@@ -900,9 +865,6 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
900 * so we can't currently use it sanely since we want to 865 * so we can't currently use it sanely since we want to
901 * use LBA48 mode. 866 * use LBA48 mode.
902 */ 867 */
903// base += 0x10;
904// hwif->no_lba48 = 1;
905
906 hw.io_ports[IDE_DATA_OFFSET] = base; 868 hw.io_ports[IDE_DATA_OFFSET] = base;
907 hw.io_ports[IDE_ERROR_OFFSET] = base + 1; 869 hw.io_ports[IDE_ERROR_OFFSET] = base + 1;
908 hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2; 870 hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2;
@@ -936,15 +898,8 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
936 898
937 base = (unsigned long) addr; 899 base = (unsigned long) addr;
938 900
939#ifdef SIIMAGE_LARGE_DMA
940/* Watch the brackets - even Ken and Dennis get some language design wrong */
941 hwif->dma_base = base + (ch ? 0x18 : 0x10);
942 hwif->dma_base2 = base + (ch ? 0x08 : 0x00);
943 hwif->dma_prdtable = hwif->dma_base2 + 4;
944#else /* ! SIIMAGE_LARGE_DMA */
945 hwif->dma_base = base + (ch ? 0x08 : 0x00); 901 hwif->dma_base = base + (ch ? 0x08 : 0x00);
946 hwif->dma_base2 = base + (ch ? 0x18 : 0x10); 902 hwif->dma_base2 = base + (ch ? 0x18 : 0x10);
947#endif /* SIIMAGE_LARGE_DMA */
948 hwif->mmio = 2; 903 hwif->mmio = 2;
949} 904}
950 905
@@ -1052,9 +1007,16 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
1052 hwif->reset_poll = &siimage_reset_poll; 1007 hwif->reset_poll = &siimage_reset_poll;
1053 hwif->pre_reset = &siimage_pre_reset; 1008 hwif->pre_reset = &siimage_pre_reset;
1054 1009
1055 if(is_sata(hwif)) 1010 if(is_sata(hwif)) {
1011 static int first = 1;
1012
1056 hwif->busproc = &siimage_busproc; 1013 hwif->busproc = &siimage_busproc;
1057 1014
1015 if (first) {
1016 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n");
1017 first = 0;
1018 }
1019 }
1058 if (!hwif->dma_base) { 1020 if (!hwif->dma_base) {
1059 hwif->drives[0].autotune = 1; 1021 hwif->drives[0].autotune = 1;
1060 hwif->drives[1].autotune = 1; 1022 hwif->drives[1].autotune = 1;
@@ -1121,10 +1083,10 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi
1121} 1083}
1122 1084
1123static struct pci_device_id siimage_pci_tbl[] = { 1085static struct pci_device_id siimage_pci_tbl[] = {
1124 { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 1086 { PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680), 0},
1125#ifdef CONFIG_BLK_DEV_IDE_SATA 1087#ifdef CONFIG_BLK_DEV_IDE_SATA
1126 { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 1088 { PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112), 1},
1127 { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, 1089 { PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA), 2},
1128#endif 1090#endif
1129 { 0, }, 1091 { 0, },
1130}; 1092};
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 8a5c7b286b2b..900301e43818 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -447,7 +447,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
447 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n", 447 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
448 hwif->name, rev); 448 hwif->name, rev);
449 } else { 449 } else {
450#ifdef CONFIG_BLK_DEV_IDEDMA
451 dma_state |= 0x60; 450 dma_state |= 0x60;
452 451
453 hwif->atapi_dma = 1; 452 hwif->atapi_dma = 1;
@@ -468,7 +467,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
468 467
469 if (hwif->mate) 468 if (hwif->mate)
470 hwif->serialized = hwif->mate->serialized = 1; 469 hwif->serialized = hwif->mate->serialized = 1;
471#endif /* CONFIG_BLK_DEV_IDEDMA */
472 } 470 }
473 hwif->OUTB(dma_state, hwif->dma_base + 2); 471 hwif->OUTB(dma_state, hwif->dma_base + 2);
474} 472}
@@ -489,7 +487,7 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev
489} 487}
490 488
491static struct pci_device_id sl82c105_pci_tbl[] = { 489static struct pci_device_id sl82c105_pci_tbl[] = {
492 { PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 490 { PCI_DEVICE(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105), 0},
493 { 0, }, 491 { 0, },
494}; 492};
495MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl); 493MODULE_DEVICE_TABLE(pci, sl82c105_pci_tbl);
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 5112c726633b..0968f6bc669a 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -72,7 +72,8 @@ static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
72 u16 master_data; 72 u16 master_data;
73 u8 slave_data; 73 u8 slave_data;
74 /* ISP RTC */ 74 /* ISP RTC */
75 u8 timings[][2] = { { 0, 0 }, 75 static const u8 timings[][2]= {
76 { 0, 0 },
76 { 0, 0 }, 77 { 0, 0 },
77 { 1, 0 }, 78 { 1, 0 },
78 { 2, 1 }, 79 { 2, 1 },
@@ -119,7 +120,6 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
119 pci_read_config_word(dev, 0x4a, &reg4a); 120 pci_read_config_word(dev, 0x4a, &reg4a);
120 121
121 switch(speed) { 122 switch(speed) {
122#ifdef CONFIG_BLK_DEV_IDEDMA
123 case XFER_UDMA_4: u_speed = 4 << (drive->dn * 4); break; 123 case XFER_UDMA_4: u_speed = 4 << (drive->dn * 4); break;
124 case XFER_UDMA_3: u_speed = 3 << (drive->dn * 4); break; 124 case XFER_UDMA_3: u_speed = 3 << (drive->dn * 4); break;
125 case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break; 125 case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
@@ -128,7 +128,6 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
128 case XFER_MW_DMA_2: 128 case XFER_MW_DMA_2:
129 case XFER_MW_DMA_1: 129 case XFER_MW_DMA_1:
130 case XFER_SW_DMA_2: break; 130 case XFER_SW_DMA_2: break;
131#endif /* CONFIG_BLK_DEV_IDEDMA */
132 case XFER_PIO_4: 131 case XFER_PIO_4:
133 case XFER_PIO_3: 132 case XFER_PIO_3:
134 case XFER_PIO_2: 133 case XFER_PIO_2:
@@ -156,7 +155,6 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
156 return (ide_config_drive_speed(drive, speed)); 155 return (ide_config_drive_speed(drive, speed));
157} 156}
158 157
159#ifdef CONFIG_BLK_DEV_IDEDMA
160static int slc90e66_config_drive_for_dma (ide_drive_t *drive) 158static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
161{ 159{
162 u8 speed = ide_dma_speed(drive, slc90e66_ratemask(drive)); 160 u8 speed = ide_dma_speed(drive, slc90e66_ratemask(drive));
@@ -194,7 +192,6 @@ fast_ata_pio:
194 /* IORDY not supported */ 192 /* IORDY not supported */
195 return 0; 193 return 0;
196} 194}
197#endif /* CONFIG_BLK_DEV_IDEDMA */
198 195
199static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) 196static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
200{ 197{
@@ -222,7 +219,6 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
222 hwif->mwdma_mask = 0x07; 219 hwif->mwdma_mask = 0x07;
223 hwif->swdma_mask = 0x07; 220 hwif->swdma_mask = 0x07;
224 221
225#ifdef CONFIG_BLK_DEV_IDEDMA
226 if (!(hwif->udma_four)) 222 if (!(hwif->udma_four))
227 /* bit[0(1)]: 0:80, 1:40 */ 223 /* bit[0(1)]: 0:80, 1:40 */
228 hwif->udma_four = (reg47 & mask) ? 0 : 1; 224 hwif->udma_four = (reg47 & mask) ? 0 : 1;
@@ -232,7 +228,6 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
232 hwif->autodma = 1; 228 hwif->autodma = 1;
233 hwif->drives[0].autodma = hwif->autodma; 229 hwif->drives[0].autodma = hwif->autodma;
234 hwif->drives[1].autodma = hwif->autodma; 230 hwif->drives[1].autodma = hwif->autodma;
235#endif /* !CONFIG_BLK_DEV_IDEDMA */
236} 231}
237 232
238static ide_pci_device_t slc90e66_chipset __devinitdata = { 233static ide_pci_device_t slc90e66_chipset __devinitdata = {
@@ -250,7 +245,7 @@ static int __devinit slc90e66_init_one(struct pci_dev *dev, const struct pci_dev
250} 245}
251 246
252static struct pci_device_id slc90e66_pci_tbl[] = { 247static struct pci_device_id slc90e66_pci_tbl[] = {
253 { PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 248 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1), 0},
254 { 0, }, 249 { 0, },
255}; 250};
256MODULE_DEVICE_TABLE(pci, slc90e66_pci_tbl); 251MODULE_DEVICE_TABLE(pci, slc90e66_pci_tbl);
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index ffca8b63ee79..e8ef3455ec35 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -421,107 +421,6 @@ static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
421#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 421#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
422 422
423/* 423/*
424 * Below is the code for blinking the laptop LED along with hard
425 * disk activity.
426 */
427
428#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
429
430/* Set to 50ms minimum led-on time (also used to limit frequency
431 * of requests sent to the PMU
432 */
433#define PMU_HD_BLINK_TIME (HZ/50)
434
435static struct adb_request pmu_blink_on, pmu_blink_off;
436static spinlock_t pmu_blink_lock;
437static unsigned long pmu_blink_stoptime;
438static int pmu_blink_ledstate;
439static struct timer_list pmu_blink_timer;
440static int pmu_ide_blink_enabled;
441
442
443static void
444pmu_hd_blink_timeout(unsigned long data)
445{
446 unsigned long flags;
447
448 spin_lock_irqsave(&pmu_blink_lock, flags);
449
450 /* We may have been triggered again in a racy way, check
451 * that we really want to switch it off
452 */
453 if (time_after(pmu_blink_stoptime, jiffies))
454 goto done;
455
456 /* Previous req. not complete, try 100ms more */
457 if (pmu_blink_off.complete == 0)
458 mod_timer(&pmu_blink_timer, jiffies + PMU_HD_BLINK_TIME);
459 else if (pmu_blink_ledstate) {
460 pmu_request(&pmu_blink_off, NULL, 4, 0xee, 4, 0, 0);
461 pmu_blink_ledstate = 0;
462 }
463done:
464 spin_unlock_irqrestore(&pmu_blink_lock, flags);
465}
466
467static void
468pmu_hd_kick_blink(void *data, int rw)
469{
470 unsigned long flags;
471
472 pmu_blink_stoptime = jiffies + PMU_HD_BLINK_TIME;
473 wmb();
474 mod_timer(&pmu_blink_timer, pmu_blink_stoptime);
475 /* Fast path when LED is already ON */
476 if (pmu_blink_ledstate == 1)
477 return;
478 spin_lock_irqsave(&pmu_blink_lock, flags);
479 if (pmu_blink_on.complete && !pmu_blink_ledstate) {
480 pmu_request(&pmu_blink_on, NULL, 4, 0xee, 4, 0, 1);
481 pmu_blink_ledstate = 1;
482 }
483 spin_unlock_irqrestore(&pmu_blink_lock, flags);
484}
485
486static int
487pmu_hd_blink_init(void)
488{
489 struct device_node *dt;
490 const char *model;
491
492 /* Currently, I only enable this feature on KeyLargo based laptops,
493 * older laptops may support it (at least heathrow/paddington) but
494 * I don't feel like loading those venerable old machines with so
495 * much additional interrupt & PMU activity...
496 */
497 if (pmu_get_model() != PMU_KEYLARGO_BASED)
498 return 0;
499
500 dt = of_find_node_by_path("/");
501 if (dt == NULL)
502 return 0;
503 model = (const char *)get_property(dt, "model", NULL);
504 if (model == NULL)
505 return 0;
506 if (strncmp(model, "PowerBook", strlen("PowerBook")) != 0 &&
507 strncmp(model, "iBook", strlen("iBook")) != 0) {
508 of_node_put(dt);
509 return 0;
510 }
511 of_node_put(dt);
512
513 pmu_blink_on.complete = 1;
514 pmu_blink_off.complete = 1;
515 spin_lock_init(&pmu_blink_lock);
516 init_timer(&pmu_blink_timer);
517 pmu_blink_timer.function = pmu_hd_blink_timeout;
518
519 return 1;
520}
521
522#endif /* CONFIG_BLK_DEV_IDE_PMAC_BLINK */
523
524/*
525 * N.B. this can't be an initfunc, because the media-bay task can 424 * N.B. this can't be an initfunc, because the media-bay task can
526 * call ide_[un]register at any time. 425 * call ide_[un]register at any time.
527 */ 426 */
@@ -1192,23 +1091,6 @@ pmac_ide_do_suspend(ide_hwif_t *hwif)
1192 pmif->timings[0] = 0; 1091 pmif->timings[0] = 0;
1193 pmif->timings[1] = 0; 1092 pmif->timings[1] = 0;
1194 1093
1195#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
1196 /* Note: This code will be called for every hwif, thus we'll
1197 * try several time to stop the LED blinker timer, but that
1198 * should be harmless
1199 */
1200 if (pmu_ide_blink_enabled) {
1201 unsigned long flags;
1202
1203 /* Make sure we don't hit the PMU blink */
1204 spin_lock_irqsave(&pmu_blink_lock, flags);
1205 if (pmu_blink_ledstate)
1206 del_timer(&pmu_blink_timer);
1207 pmu_blink_ledstate = 0;
1208 spin_unlock_irqrestore(&pmu_blink_lock, flags);
1209 }
1210#endif /* CONFIG_BLK_DEV_IDE_PMAC_BLINK */
1211
1212 disable_irq(pmif->irq); 1094 disable_irq(pmif->irq);
1213 1095
1214 /* The media bay will handle itself just fine */ 1096 /* The media bay will handle itself just fine */
@@ -1376,13 +1258,6 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1376 hwif->selectproc = pmac_ide_selectproc; 1258 hwif->selectproc = pmac_ide_selectproc;
1377 hwif->speedproc = pmac_ide_tune_chipset; 1259 hwif->speedproc = pmac_ide_tune_chipset;
1378 1260
1379#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
1380 pmu_ide_blink_enabled = pmu_hd_blink_init();
1381
1382 if (pmu_ide_blink_enabled)
1383 hwif->led_act = pmu_hd_kick_blink;
1384#endif
1385
1386 printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n", 1261 printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n",
1387 hwif->index, model_name[pmif->kind], pmif->aapl_bus_id, 1262 hwif->index, model_name[pmif->kind], pmif->aapl_bus_id,
1388 pmif->mediabay ? " (mediabay)" : "", hwif->irq); 1263 pmif->mediabay ? " (mediabay)" : "", hwif->irq);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 11:59:53 -0500