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-rw-r--r--drivers/ide/pci/it8213.c44
-rw-r--r--drivers/ide/pci/piix.c44
-rw-r--r--drivers/ide/pci/slc90e66.c33
3 files changed, 33 insertions, 88 deletions
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index ecf4ce078dce..6dab0daf4943 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -18,37 +18,6 @@
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20/** 20/**
21 * it8213_dma_2_pio - return the PIO mode matching DMA
22 * @xfer_rate: transfer speed
23 *
24 * Returns the nearest equivalent PIO timing for the DMA
25 * mode requested by the controller.
26 */
27
28static u8 it8213_dma_2_pio (u8 xfer_rate) {
29 switch(xfer_rate) {
30 case XFER_UDMA_6:
31 case XFER_UDMA_5:
32 case XFER_UDMA_4:
33 case XFER_UDMA_3:
34 case XFER_UDMA_2:
35 case XFER_UDMA_1:
36 case XFER_UDMA_0:
37 case XFER_MW_DMA_2:
38 return 4;
39 case XFER_MW_DMA_1:
40 return 3;
41 case XFER_SW_DMA_2:
42 return 2;
43 case XFER_MW_DMA_0:
44 case XFER_SW_DMA_1:
45 case XFER_SW_DMA_0:
46 default:
47 return 0;
48 }
49}
50
51/**
52 * it8213_set_pio_mode - set host controller for PIO mode 21 * it8213_set_pio_mode - set host controller for PIO mode
53 * @drive: drive 22 * @drive: drive
54 * @pio: PIO mode number 23 * @pio: PIO mode number
@@ -124,7 +93,7 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
124 int w_flag = 0x10 << drive->dn; 93 int w_flag = 0x10 << drive->dn;
125 int u_speed = 0; 94 int u_speed = 0;
126 u16 reg4042, reg4a; 95 u16 reg4042, reg4a;
127 u8 reg48, reg54, reg55; 96 u8 reg48, reg54, reg55, pio;
128 97
129 pci_read_config_word(dev, maslave, &reg4042); 98 pci_read_config_word(dev, maslave, &reg4042);
130 pci_read_config_byte(dev, 0x48, &reg48); 99 pci_read_config_byte(dev, 0x48, &reg48);
@@ -165,7 +134,11 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
165 pci_write_config_byte(dev, 0x54, reg54 | v_flag); 134 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
166 } else 135 } else
167 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); 136 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
137
138 pio = 4;
168 } else { 139 } else {
140 const u8 mwdma_to_pio[] = { 0, 3, 4 };
141
169 if (reg48 & u_flag) 142 if (reg48 & u_flag)
170 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); 143 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
171 if (reg4a & a_speed) 144 if (reg4a & a_speed)
@@ -174,9 +147,14 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
174 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); 147 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
175 if (reg55 & w_flag) 148 if (reg55 & w_flag)
176 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 149 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
150
151 if (speed >= XFER_MW_DMA_0)
152 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
153 else
154 pio = 2; /* only SWDMA2 is allowed */
177 } 155 }
178 156
179 it8213_set_pio_mode(drive, it8213_dma_2_pio(speed)); 157 it8213_set_pio_mode(drive, pio);
180} 158}
181 159
182/** 160/**
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 38c91ba6497b..4b397d641848 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -106,37 +106,6 @@
106static int no_piix_dma; 106static int no_piix_dma;
107 107
108/** 108/**
109 * piix_dma_2_pio - return the PIO mode matching DMA
110 * @xfer_rate: transfer speed
111 *
112 * Returns the nearest equivalent PIO timing for the DMA
113 * mode requested by the controller.
114 */
115
116static u8 piix_dma_2_pio (u8 xfer_rate) {
117 switch(xfer_rate) {
118 case XFER_UDMA_6:
119 case XFER_UDMA_5:
120 case XFER_UDMA_4:
121 case XFER_UDMA_3:
122 case XFER_UDMA_2:
123 case XFER_UDMA_1:
124 case XFER_UDMA_0:
125 case XFER_MW_DMA_2:
126 return 4;
127 case XFER_MW_DMA_1:
128 return 3;
129 case XFER_SW_DMA_2:
130 return 2;
131 case XFER_MW_DMA_0:
132 case XFER_SW_DMA_1:
133 case XFER_SW_DMA_0:
134 default:
135 return 0;
136 }
137}
138
139/**
140 * piix_set_pio_mode - set host controller for PIO mode 109 * piix_set_pio_mode - set host controller for PIO mode
141 * @drive: drive 110 * @drive: drive
142 * @pio: PIO mode number 111 * @pio: PIO mode number
@@ -225,7 +194,7 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
225 int u_speed = 0; 194 int u_speed = 0;
226 int sitre; 195 int sitre;
227 u16 reg4042, reg4a; 196 u16 reg4042, reg4a;
228 u8 reg48, reg54, reg55; 197 u8 reg48, reg54, reg55, pio;
229 198
230 pci_read_config_word(dev, maslave, &reg4042); 199 pci_read_config_word(dev, maslave, &reg4042);
231 sitre = (reg4042 & 0x4000) ? 1 : 0; 200 sitre = (reg4042 & 0x4000) ? 1 : 0;
@@ -262,7 +231,11 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
262 pci_write_config_byte(dev, 0x54, reg54 | v_flag); 231 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
263 } else 232 } else
264 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); 233 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
234
235 pio = 4;
265 } else { 236 } else {
237 const u8 mwdma_to_pio[] = { 0, 3, 4 };
238
266 if (reg48 & u_flag) 239 if (reg48 & u_flag)
267 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag); 240 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
268 if (reg4a & a_speed) 241 if (reg4a & a_speed)
@@ -271,9 +244,14 @@ static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
271 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag); 244 pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
272 if (reg55 & w_flag) 245 if (reg55 & w_flag)
273 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 246 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
247
248 if (speed >= XFER_MW_DMA_0)
249 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
250 else
251 pio = 2; /* only SWDMA2 is allowed */
274 } 252 }
275 253
276 piix_set_pio_mode(drive, piix_dma_2_pio(speed)); 254 piix_set_pio_mode(drive, pio);
277} 255}
278 256
279/** 257/**
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 31cb0263dbd2..772b58671bb2 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -21,27 +21,6 @@
21 21
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
25 switch(xfer_rate) {
26 case XFER_UDMA_4:
27 case XFER_UDMA_3:
28 case XFER_UDMA_2:
29 case XFER_UDMA_1:
30 case XFER_UDMA_0:
31 case XFER_MW_DMA_2:
32 return 4;
33 case XFER_MW_DMA_1:
34 return 3;
35 case XFER_SW_DMA_2:
36 return 2;
37 case XFER_MW_DMA_0:
38 case XFER_SW_DMA_1:
39 case XFER_SW_DMA_0:
40 default:
41 return 0;
42 }
43}
44
45static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 24static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
46{ 25{
47 ide_hwif_t *hwif = HWIF(drive); 26 ide_hwif_t *hwif = HWIF(drive);
@@ -103,6 +82,7 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
103 int sitre = 0, a_speed = 7 << (drive->dn * 4); 82 int sitre = 0, a_speed = 7 << (drive->dn * 4);
104 int u_speed = 0, u_flag = 1 << drive->dn; 83 int u_speed = 0, u_flag = 1 << drive->dn;
105 u16 reg4042, reg44, reg48, reg4a; 84 u16 reg4042, reg44, reg48, reg4a;
85 u8 pio;
106 86
107 pci_read_config_word(dev, maslave, &reg4042); 87 pci_read_config_word(dev, maslave, &reg4042);
108 sitre = (reg4042 & 0x4000) ? 1 : 0; 88 sitre = (reg4042 & 0x4000) ? 1 : 0;
@@ -131,14 +111,23 @@ static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
131 pci_read_config_word(dev, 0x4a, &reg4a); 111 pci_read_config_word(dev, 0x4a, &reg4a);
132 pci_write_config_word(dev, 0x4a, reg4a|u_speed); 112 pci_write_config_word(dev, 0x4a, reg4a|u_speed);
133 } 113 }
114
115 pio = 4;
134 } else { 116 } else {
117 const u8 mwdma_to_pio[] = { 0, 3, 4 };
118
135 if (reg48 & u_flag) 119 if (reg48 & u_flag)
136 pci_write_config_word(dev, 0x48, reg48 & ~u_flag); 120 pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
137 if (reg4a & a_speed) 121 if (reg4a & a_speed)
138 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 122 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
123
124 if (speed >= XFER_MW_DMA_0)
125 pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
126 else
127 pio = 2; /* only SWDMA2 is allowed */
139 } 128 }
140 129
141 slc90e66_set_pio_mode(drive, slc90e66_dma_2_pio(speed)); 130 slc90e66_set_pio_mode(drive, pio);
142} 131}
143 132
144static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive) 133static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 11:48:52 -0500