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path: root/drivers/ide/siimage.c
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Diffstat (limited to 'drivers/ide/siimage.c')
-rw-r--r--drivers/ide/siimage.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ide/siimage.c b/drivers/ide/siimage.c
index 97266958f744..2009ac2ff658 100644
--- a/drivers/ide/siimage.c
+++ b/drivers/ide/siimage.c
@@ -289,19 +289,18 @@ static void sil_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
289 289
290/** 290/**
291 * sil_set_dma_mode - set host controller for DMA mode 291 * sil_set_dma_mode - set host controller for DMA mode
292 * @hwif: port
292 * @drive: drive 293 * @drive: drive
293 * @speed: DMA mode
294 * 294 *
295 * Tune the SiI chipset for the desired DMA mode. 295 * Tune the SiI chipset for the desired DMA mode.
296 */ 296 */
297 297
298static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) 298static void sil_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
299{ 299{
300 static const u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; 300 static const u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
301 static const u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; 301 static const u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
302 static const u16 dma[] = { 0x2208, 0x10C2, 0x10C1 }; 302 static const u16 dma[] = { 0x2208, 0x10C2, 0x10C1 };
303 303
304 ide_hwif_t *hwif = drive->hwif;
305 struct pci_dev *dev = to_pci_dev(hwif->dev); 304 struct pci_dev *dev = to_pci_dev(hwif->dev);
306 unsigned long base = (unsigned long)hwif->hwif_data; 305 unsigned long base = (unsigned long)hwif->hwif_data;
307 u16 ultra = 0, multi = 0; 306 u16 ultra = 0, multi = 0;
@@ -311,6 +310,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
311 : (mmio ? 0xB4 : 0x80); 310 : (mmio ? 0xB4 : 0x80);
312 unsigned long ma = siimage_seldev(drive, 0x08); 311 unsigned long ma = siimage_seldev(drive, 0x08);
313 unsigned long ua = siimage_seldev(drive, 0x0C); 312 unsigned long ua = siimage_seldev(drive, 0x0C);
313 const u8 speed = drive->dma_mode;
314 314
315 scsc = sil_ioread8 (dev, base + (mmio ? 0x4A : 0x8A)); 315 scsc = sil_ioread8 (dev, base + (mmio ? 0x4A : 0x8A));
316 mode = sil_ioread8 (dev, base + addr_mask); 316 mode = sil_ioread8 (dev, base + addr_mask);