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path: root/drivers/ide/setup-pci.c
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Diffstat (limited to 'drivers/ide/setup-pci.c')
-rw-r--r--drivers/ide/setup-pci.c151
1 files changed, 24 insertions, 127 deletions
diff --git a/drivers/ide/setup-pci.c b/drivers/ide/setup-pci.c
index d2cd5a3d38f8..676c66e72881 100644
--- a/drivers/ide/setup-pci.c
+++ b/drivers/ide/setup-pci.c
@@ -165,13 +165,17 @@ static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_
165 165
166 dma_base = pci_resource_start(dev, baridx); 166 dma_base = pci_resource_start(dev, baridx);
167 167
168 if (dma_base == 0) 168 if (dma_base == 0) {
169 printk(KERN_ERR "%s: DMA base is invalid\n", d->name); 169 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
170 return 0;
171 }
170 } 172 }
171 173
172 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) { 174 if (hwif->channel)
175 dma_base += 8;
176
177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0) {
173 u8 simplex_stat = 0; 178 u8 simplex_stat = 0;
174 dma_base += hwif->channel ? 8 : 0;
175 179
176 switch(dev->device) { 180 switch(dev->device) {
177 case PCI_DEVICE_ID_AL_M5219: 181 case PCI_DEVICE_ID_AL_M5219:
@@ -359,6 +363,8 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port
359 unsigned long ctl = 0, base = 0; 363 unsigned long ctl = 0, base = 0;
360 ide_hwif_t *hwif; 364 ide_hwif_t *hwif;
361 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0; 365 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
366 u8 oldnoprobe = 0;
367 struct hw_regs_s hw;
362 368
363 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) { 369 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
364 /* Possibly we should fail if these checks report true */ 370 /* Possibly we should fail if these checks report true */
@@ -381,26 +387,25 @@ static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port
381 } 387 }
382 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL) 388 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
383 return NULL; /* no room in ide_hwifs[] */ 389 return NULL; /* no room in ide_hwifs[] */
384 if (hwif->io_ports[IDE_DATA_OFFSET] != base || 390
385 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) { 391 memset(&hw, 0, sizeof(hw));
386 hw_regs_t hw; 392 hw.irq = hwif->irq ? hwif->irq : irq;
387 393 hw.dev = &dev->dev;
388 memset(&hw, 0, sizeof(hw)); 394 hw.chipset = d->chipset ? d->chipset : ide_pci;
389#ifndef CONFIG_IDE_ARCH_OBSOLETE_INIT 395 ide_std_init_ports(&hw, base, ctl | 2);
390 ide_std_init_ports(&hw, base, ctl | 2); 396
391#else 397 if (hwif->io_ports[IDE_DATA_OFFSET] == base &&
392 ide_init_hwif_ports(&hw, base, ctl | 2, NULL); 398 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2))
393#endif 399 oldnoprobe = hwif->noprobe;
394 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports)); 400
395 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; 401 ide_init_port_hw(hwif, &hw);
396 } 402
397 hwif->chipset = d->chipset ? d->chipset : ide_pci; 403 hwif->noprobe = oldnoprobe;
404
398 hwif->pci_dev = dev; 405 hwif->pci_dev = dev;
399 hwif->cds = d; 406 hwif->cds = d;
400 hwif->channel = port; 407 hwif->channel = port;
401 408
402 if (!hwif->irq)
403 hwif->irq = irq;
404 if (mate) { 409 if (mate) {
405 hwif->mate = mate; 410 hwif->mate = mate;
406 mate->mate = hwif; 411 mate->mate = hwif;
@@ -535,12 +540,8 @@ void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int
535 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL) 540 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
536 continue; 541 continue;
537 542
538 /* setup proper ancestral information */
539 hwif->gendev.parent = &dev->dev;
540
541 *(idx + port) = hwif->index; 543 *(idx + port) = hwif->index;
542 544
543
544 if (d->init_iops) 545 if (d->init_iops)
545 d->init_iops(hwif); 546 d->init_iops(hwif);
546 547
@@ -551,8 +552,6 @@ void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int
551 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS)) 552 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
552 hwif->irq = port ? 15 : 14; 553 hwif->irq = port ? 15 : 14;
553 554
554 hwif->fixup = d->fixup;
555
556 hwif->host_flags = d->host_flags; 555 hwif->host_flags = d->host_flags;
557 hwif->pio_mask = d->pio_mask; 556 hwif->pio_mask = d->pio_mask;
558 557
@@ -699,105 +698,3 @@ out:
699} 698}
700 699
701EXPORT_SYMBOL_GPL(ide_setup_pci_devices); 700EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
702
703#ifdef CONFIG_IDEPCI_PCIBUS_ORDER
704/*
705 * Module interfaces
706 */
707
708static int pre_init = 1; /* Before first ordered IDE scan */
709static LIST_HEAD(ide_pci_drivers);
710
711/*
712 * __ide_pci_register_driver - attach IDE driver
713 * @driver: pci driver
714 * @module: owner module of the driver
715 *
716 * Registers a driver with the IDE layer. The IDE layer arranges that
717 * boot time setup is done in the expected device order and then
718 * hands the controllers off to the core PCI code to do the rest of
719 * the work.
720 *
721 * Returns are the same as for pci_register_driver
722 */
723
724int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
725 const char *mod_name)
726{
727 if (!pre_init)
728 return __pci_register_driver(driver, module, mod_name);
729 driver->driver.owner = module;
730 list_add_tail(&driver->node, &ide_pci_drivers);
731 return 0;
732}
733EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
734
735/**
736 * ide_scan_pcidev - find an IDE driver for a device
737 * @dev: PCI device to check
738 *
739 * Look for an IDE driver to handle the device we are considering.
740 * This is only used during boot up to get the ordering correct. After
741 * boot up the pci layer takes over the job.
742 */
743
744static int __init ide_scan_pcidev(struct pci_dev *dev)
745{
746 struct list_head *l;
747 struct pci_driver *d;
748
749 list_for_each(l, &ide_pci_drivers) {
750 d = list_entry(l, struct pci_driver, node);
751 if (d->id_table) {
752 const struct pci_device_id *id =
753 pci_match_id(d->id_table, dev);
754
755 if (id != NULL && d->probe(dev, id) >= 0) {
756 dev->driver = d;
757 pci_dev_get(dev);
758 return 1;
759 }
760 }
761 }
762 return 0;
763}
764
765/**
766 * ide_scan_pcibus - perform the initial IDE driver scan
767 * @scan_direction: set for reverse order scanning
768 *
769 * Perform the initial bus rather than driver ordered scan of the
770 * PCI drivers. After this all IDE pci handling becomes standard
771 * module ordering not traditionally ordered.
772 */
773
774void __init ide_scan_pcibus (int scan_direction)
775{
776 struct pci_dev *dev = NULL;
777 struct pci_driver *d;
778 struct list_head *l, *n;
779
780 pre_init = 0;
781 if (!scan_direction)
782 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)))
783 ide_scan_pcidev(dev);
784 else
785 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID,
786 dev)))
787 ide_scan_pcidev(dev);
788
789 /*
790 * Hand the drivers over to the PCI layer now we
791 * are post init.
792 */
793
794 list_for_each_safe(l, n, &ide_pci_drivers) {
795 list_del(l);
796 d = list_entry(l, struct pci_driver, node);
797 if (__pci_register_driver(d, d->driver.owner,
798 d->driver.mod_name))
799 printk(KERN_ERR "%s: failed to register %s driver\n",
800 __FUNCTION__, d->driver.mod_name);
801 }
802}
803#endif