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-rw-r--r--drivers/ide/ppc/mpc8xx.c86
1 files changed, 22 insertions, 64 deletions
diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c
index ebaba01c7551..a784a97ca7ec 100644
--- a/drivers/ide/ppc/mpc8xx.c
+++ b/drivers/ide/ppc/mpc8xx.c
@@ -99,32 +99,6 @@ static int _slot_ = -1; /* will be read from PCMCIA registers */
99/* Make clock cycles and always round up */ 99/* Make clock cycles and always round up */
100#define PCMCIA_MK_CLKS( t, T ) (( (t) * ((T)/1000000) + 999U ) / 1000U ) 100#define PCMCIA_MK_CLKS( t, T ) (( (t) * ((T)/1000000) + 999U ) / 1000U )
101 101
102
103
104/*
105 * IDE stuff.
106 */
107static int
108m8xx_ide_default_irq(unsigned long base)
109{
110#ifdef CONFIG_BLK_DEV_MPC8xx_IDE
111 if (base >= MAX_HWIFS)
112 return 0;
113
114 printk("[%d] m8xx_ide_default_irq %d\n",__LINE__,ioport_dsc[base].irq);
115
116 return (ioport_dsc[base].irq);
117#else
118 return 9;
119#endif
120}
121
122static unsigned long
123m8xx_ide_default_io_base(int index)
124{
125 return index;
126}
127
128#define M8XX_PCMCIA_CD2(slot) (0x10000000 >> (slot << 4)) 102#define M8XX_PCMCIA_CD2(slot) (0x10000000 >> (slot << 4))
129#define M8XX_PCMCIA_CD1(slot) (0x08000000 >> (slot << 4)) 103#define M8XX_PCMCIA_CD1(slot) (0x08000000 >> (slot << 4))
130 104
@@ -149,12 +123,11 @@ static int pcmcia_schlvl = PCMCIA_SCHLVL;
149 */ 123 */
150 124
151/* 125/*
152 * m8xx_ide_init_hwif_ports for a direct IDE interface _using_ 126 * m8xx_ide_init_ports() for a direct IDE interface _using_
127 * MPC8xx's internal PCMCIA interface
153 */ 128 */
154#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) 129#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
155static void 130static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
156m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
157 unsigned long ctrl_port, int *irq)
158{ 131{
159 unsigned long *p = hw->io_ports; 132 unsigned long *p = hw->io_ports;
160 int i; 133 int i;
@@ -173,8 +146,6 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
173 unsigned long base; 146 unsigned long base;
174 147
175 *p = 0; 148 *p = 0;
176 if (irq)
177 *irq = 0;
178 149
179 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia)); 150 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia));
180 151
@@ -248,9 +219,6 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
248 } 219 }
249 } 220 }
250 221
251 if (data_port >= MAX_HWIFS)
252 return;
253
254 if (_slot_ == -1) { 222 if (_slot_ == -1) {
255 printk ("PCMCIA slot has not been defined! Using A as default\n"); 223 printk ("PCMCIA slot has not been defined! Using A as default\n");
256 _slot_ = 0; 224 _slot_ = 0;
@@ -292,11 +260,13 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
292 *p++ = base + ioport_dsc[data_port].reg_off[i]; 260 *p++ = base + ioport_dsc[data_port].reg_off[i];
293 } 261 }
294 262
295 if (irq) { 263 hw->irq = ioport_dsc[data_port].irq;
264 hw->ack_intr = (ide_ack_intr_t *)ide_interrupt_ack;
265
296#ifdef CONFIG_IDE_8xx_PCCARD 266#ifdef CONFIG_IDE_8xx_PCCARD
267 {
297 unsigned int reg; 268 unsigned int reg;
298 269
299 *irq = ioport_dsc[data_port].irq;
300 if (_slot_) 270 if (_slot_)
301 pgcrx = &((immap_t *) IMAP_ADDR)->im_pcmcia.pcmc_pgcrb; 271 pgcrx = &((immap_t *) IMAP_ADDR)->im_pcmcia.pcmc_pgcrb;
302 else 272 else
@@ -306,14 +276,11 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
306 reg |= mk_int_int_mask (pcmcia_schlvl) << 24; 276 reg |= mk_int_int_mask (pcmcia_schlvl) << 24;
307 reg |= mk_int_int_mask (pcmcia_schlvl) << 16; 277 reg |= mk_int_int_mask (pcmcia_schlvl) << 16;
308 *pgcrx = reg; 278 *pgcrx = reg;
309#else /* direct connected IDE drive, i.e. external IRQ, not the PCMCIA irq */
310 *irq = ioport_dsc[data_port].irq;
311#endif /* CONFIG_IDE_8xx_PCCARD */
312 } 279 }
280#endif /* CONFIG_IDE_8xx_PCCARD */
313 281
314 ide_hwifs[data_port].pio_mask = ATA_PIO4; 282 ide_hwifs[data_port].pio_mask = ATA_PIO4;
315 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; 283 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
316 ide_hwifs[data_port].ack_intr = (ide_ack_intr_t *)ide_interrupt_ack;
317 284
318 /* Enable Harddisk Interrupt, 285 /* Enable Harddisk Interrupt,
319 * and make it edge sensitive 286 * and make it edge sensitive
@@ -329,16 +296,15 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
329 /* Enable falling edge irq */ 296 /* Enable falling edge irq */
330 pcmp->pcmc_per = 0x100000 >> (16 * _slot_); 297 pcmp->pcmc_per = 0x100000 >> (16 * _slot_);
331#endif /* CONFIG_IDE_8xx_PCCARD */ 298#endif /* CONFIG_IDE_8xx_PCCARD */
332} /* m8xx_ide_init_hwif_ports() using 8xx internal PCMCIA interface */ 299}
333#endif /* CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT */ 300#endif /* CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT */
334 301
335/* 302/*
336 * m8xx_ide_init_hwif_ports for a direct IDE interface _not_ using 303 * m8xx_ide_init_ports() for a direct IDE interface _not_ using
337 * MPC8xx's internal PCMCIA interface 304 * MPC8xx's internal PCMCIA interface
338 */ 305 */
339#if defined(CONFIG_IDE_EXT_DIRECT) 306#if defined(CONFIG_IDE_EXT_DIRECT)
340void m8xx_ide_init_hwif_ports (hw_regs_t *hw, 307static void __init m8xx_ide_init_ports(hw_regs_t *hw, unsigned long data_port)
341 unsigned long data_port, unsigned long ctrl_port, int *irq)
342{ 308{
343 unsigned long *p = hw->io_ports; 309 unsigned long *p = hw->io_ports;
344 int i; 310 int i;
@@ -349,8 +315,6 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
349 unsigned long base; 315 unsigned long base;
350 316
351 *p = 0; 317 *p = 0;
352 if (irq)
353 *irq = 0;
354 318
355 if (!ide_base) { 319 if (!ide_base) {
356 320
@@ -372,9 +336,6 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
372#endif 336#endif
373 } 337 }
374 338
375 if (data_port >= MAX_HWIFS)
376 return;
377
378 base = ide_base + ioport_dsc[data_port].base_off; 339 base = ide_base + ioport_dsc[data_port].base_off;
379#ifdef DEBUG 340#ifdef DEBUG
380 printk ("base: %08x + %08x = %08x\n", 341 printk ("base: %08x + %08x = %08x\n",
@@ -392,14 +353,12 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
392 *p++ = base + ioport_dsc[data_port].reg_off[i]; 353 *p++ = base + ioport_dsc[data_port].reg_off[i];
393 } 354 }
394 355
395 if (irq) { 356 /* direct connected IDE drive, i.e. external IRQ */
396 /* direct connected IDE drive, i.e. external IRQ */ 357 hw->irq = ioport_dsc[data_port].irq;
397 *irq = ioport_dsc[data_port].irq; 358 hw->ack_intr = (ide_ack_intr_t *)ide_interrupt_ack;
398 }
399 359
400 ide_hwifs[data_port].pio_mask = ATA_PIO4; 360 ide_hwifs[data_port].pio_mask = ATA_PIO4;
401 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode; 361 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
402 ide_hwifs[data_port].ack_intr = (ide_ack_intr_t *)ide_interrupt_ack;
403 362
404 /* Enable Harddisk Interrupt, 363 /* Enable Harddisk Interrupt,
405 * and make it edge sensitive 364 * and make it edge sensitive
@@ -407,8 +366,7 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
407 /* (11-18) Set edge detect for irq, no wakeup from low power mode */ 366 /* (11-18) Set edge detect for irq, no wakeup from low power mode */
408 ((immap_t *) IMAP_ADDR)->im_siu_conf.sc_siel |= 367 ((immap_t *) IMAP_ADDR)->im_siu_conf.sc_siel |=
409 (0x80000000 >> ioport_dsc[data_port].irq); 368 (0x80000000 >> ioport_dsc[data_port].irq);
410} /* m8xx_ide_init_hwif_ports() for CONFIG_IDE_8xx_DIRECT */ 369}
411
412#endif /* CONFIG_IDE_8xx_DIRECT */ 370#endif /* CONFIG_IDE_8xx_DIRECT */
413 371
414 372
@@ -829,20 +787,20 @@ static int identify (volatile u8 *p)
829 return (0); /* don't know */ 787 return (0); /* don't know */
830} 788}
831 789
832void m8xx_ide_init(void)
833{
834 ppc_ide_md.default_irq = m8xx_ide_default_irq;
835 ppc_ide_md.default_io_base = m8xx_ide_default_io_base;
836 ppc_ide_md.ide_init_hwif = m8xx_ide_init_hwif_ports;
837}
838
839static int __init mpc8xx_ide_probe(void) 790static int __init mpc8xx_ide_probe(void)
840{ 791{
792 hw_regs_t hw;
841 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 793 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
842 794
843#ifdef IDE0_BASE_OFFSET 795#ifdef IDE0_BASE_OFFSET
796 memset(&hw, 0, sizeof(hw));
797 m8xx_ide_init_ports(&hw, 0);
798 ide_init_port_hw(&ide_hwifs[0], &hw);
844 idx[0] = 0; 799 idx[0] = 0;
845#ifdef IDE1_BASE_OFFSET 800#ifdef IDE1_BASE_OFFSET
801 memset(&hw, 0, sizeof(hw));
802 m8xx_ide_init_ports(&hw, 1);
803 ide_init_port_hw(&ide_hwifs[1], &hw);
846 idx[1] = 1; 804 idx[1] = 1;
847#endif 805#endif
848#endif 806#endif