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path: root/drivers/ide/ppc/pmac.c
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Diffstat (limited to 'drivers/ide/ppc/pmac.c')
-rw-r--r--drivers/ide/ppc/pmac.c13
1 files changed, 1 insertions, 12 deletions
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index f759a5397865..b43457e34311 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -392,6 +392,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
392 for (i=0; table[i].cycle_time; i++) 392 for (i=0; table[i].cycle_time; i++)
393 if (cycle_time > table[i+1].cycle_time) 393 if (cycle_time > table[i+1].cycle_time)
394 return table[i].timing_reg; 394 return table[i].timing_reg;
395 BUG();
395 return 0; 396 return 0;
396} 397}
397 398
@@ -637,8 +638,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
637 case controller_sh_ata6: { 638 case controller_sh_ata6: {
638 /* 133Mhz cell */ 639 /* 133Mhz cell */
639 u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time); 640 u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time);
640 if (tr == 0)
641 return;
642 *timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr; 641 *timings = ((*timings) & ~TR_133_PIOREG_PIO_MASK) | tr;
643 break; 642 break;
644 } 643 }
@@ -646,8 +645,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
646 case controller_k2_ata6: { 645 case controller_k2_ata6: {
647 /* 100Mhz cell */ 646 /* 100Mhz cell */
648 u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time); 647 u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time);
649 if (tr == 0)
650 return;
651 *timings = ((*timings) & ~TR_100_PIOREG_PIO_MASK) | tr; 648 *timings = ((*timings) & ~TR_100_PIOREG_PIO_MASK) | tr;
652 break; 649 break;
653 } 650 }
@@ -746,8 +743,6 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
746 if (speed > XFER_UDMA_5 || t == NULL) 743 if (speed > XFER_UDMA_5 || t == NULL)
747 return 1; 744 return 1;
748 tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma); 745 tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma);
749 if (tr == 0)
750 return 1;
751 *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr; 746 *ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr;
752 *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN; 747 *ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN;
753 748
@@ -766,8 +761,6 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
766 if (speed > XFER_UDMA_6 || t == NULL) 761 if (speed > XFER_UDMA_6 || t == NULL)
767 return 1; 762 return 1;
768 tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma); 763 tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
769 if (tr == 0)
770 return 1;
771 *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr; 764 *ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
772 *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN; 765 *ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;
773 766
@@ -839,8 +832,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
839 case controller_sh_ata6: { 832 case controller_sh_ata6: {
840 /* 133Mhz cell */ 833 /* 133Mhz cell */
841 u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime); 834 u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
842 if (tr == 0)
843 return 1;
844 *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr; 835 *timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
845 *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN; 836 *timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
846 } 837 }
@@ -848,8 +839,6 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
848 case controller_k2_ata6: { 839 case controller_k2_ata6: {
849 /* 100Mhz cell */ 840 /* 100Mhz cell */
850 u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime); 841 u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime);
851 if (tr == 0)
852 return 1;
853 *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr; 842 *timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;
854 *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN; 843 *timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN;
855 } 844 }