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path: root/drivers/ide/ppc/pmac.c
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Diffstat (limited to 'drivers/ide/ppc/pmac.c')
-rw-r--r--drivers/ide/ppc/pmac.c84
1 files changed, 35 insertions, 49 deletions
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 23112ef68f67..12ac3bfb4f9a 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -412,7 +412,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
412 */ 412 */
413#define IDE_WAKEUP_DELAY (1*HZ) 413#define IDE_WAKEUP_DELAY (1*HZ)
414 414
415static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif); 415static int pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif);
416static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); 416static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
417static void pmac_ide_selectproc(ide_drive_t *drive); 417static void pmac_ide_selectproc(ide_drive_t *drive);
418static void pmac_ide_kauai_selectproc(ide_drive_t *drive); 418static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
@@ -1003,6 +1003,17 @@ pmac_ide_do_resume(ide_hwif_t *hwif)
1003 return 0; 1003 return 0;
1004} 1004}
1005 1005
1006static const struct ide_port_info pmac_port_info = {
1007 .chipset = ide_pmac,
1008 .host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
1009 IDE_HFLAG_PIO_NO_DOWNGRADE |
1010 IDE_HFLAG_POST_SET_MODE |
1011 IDE_HFLAG_NO_DMA | /* no SFF-style DMA */
1012 IDE_HFLAG_UNMASK_IRQS,
1013 .pio_mask = ATA_PIO4,
1014 .mwdma_mask = ATA_MWDMA2,
1015};
1016
1006/* 1017/*
1007 * Setup, register & probe an IDE channel driven by this driver, this is 1018 * Setup, register & probe an IDE channel driven by this driver, this is
1008 * called by one of the 2 probe functions (macio or PCI). Note that a channel 1019 * called by one of the 2 probe functions (macio or PCI). Note that a channel
@@ -1016,23 +1027,28 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
1016 struct device_node *np = pmif->node; 1027 struct device_node *np = pmif->node;
1017 const int *bidp; 1028 const int *bidp;
1018 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 1029 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
1030 struct ide_port_info d = pmac_port_info;
1019 1031
1020 pmif->cable_80 = 0; 1032 pmif->cable_80 = 0;
1021 pmif->broken_dma = pmif->broken_dma_warn = 0; 1033 pmif->broken_dma = pmif->broken_dma_warn = 0;
1022 if (of_device_is_compatible(np, "shasta-ata")) 1034 if (of_device_is_compatible(np, "shasta-ata")) {
1023 pmif->kind = controller_sh_ata6; 1035 pmif->kind = controller_sh_ata6;
1024 else if (of_device_is_compatible(np, "kauai-ata")) 1036 d.udma_mask = ATA_UDMA6;
1037 } else if (of_device_is_compatible(np, "kauai-ata")) {
1025 pmif->kind = controller_un_ata6; 1038 pmif->kind = controller_un_ata6;
1026 else if (of_device_is_compatible(np, "K2-UATA")) 1039 d.udma_mask = ATA_UDMA5;
1040 } else if (of_device_is_compatible(np, "K2-UATA")) {
1027 pmif->kind = controller_k2_ata6; 1041 pmif->kind = controller_k2_ata6;
1028 else if (of_device_is_compatible(np, "keylargo-ata")) { 1042 d.udma_mask = ATA_UDMA5;
1029 if (strcmp(np->name, "ata-4") == 0) 1043 } else if (of_device_is_compatible(np, "keylargo-ata")) {
1044 if (strcmp(np->name, "ata-4") == 0) {
1030 pmif->kind = controller_kl_ata4; 1045 pmif->kind = controller_kl_ata4;
1031 else 1046 d.udma_mask = ATA_UDMA4;
1047 } else
1032 pmif->kind = controller_kl_ata3; 1048 pmif->kind = controller_kl_ata3;
1033 } else if (of_device_is_compatible(np, "heathrow-ata")) 1049 } else if (of_device_is_compatible(np, "heathrow-ata")) {
1034 pmif->kind = controller_heathrow; 1050 pmif->kind = controller_heathrow;
1035 else { 1051 } else {
1036 pmif->kind = controller_ohare; 1052 pmif->kind = controller_ohare;
1037 pmif->broken_dma = 1; 1053 pmif->broken_dma = 1;
1038 } 1054 }
@@ -1101,19 +1117,10 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
1101 /* Tell common code _not_ to mess with resources */ 1117 /* Tell common code _not_ to mess with resources */
1102 hwif->mmio = 1; 1118 hwif->mmio = 1;
1103 hwif->hwif_data = pmif; 1119 hwif->hwif_data = pmif;
1104 hw->chipset = ide_pmac;
1105 ide_init_port_hw(hwif, hw); 1120 ide_init_port_hw(hwif, hw);
1106 hwif->noprobe = pmif->mediabay; 1121 hwif->noprobe = pmif->mediabay;
1107 hwif->hold = pmif->mediabay; 1122 hwif->hold = pmif->mediabay;
1108 hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; 1123 hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
1109 hwif->drives[0].unmask = 1;
1110 hwif->drives[1].unmask = 1;
1111 hwif->drives[0].autotune = IDE_TUNE_AUTO;
1112 hwif->drives[1].autotune = IDE_TUNE_AUTO;
1113 hwif->host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
1114 IDE_HFLAG_PIO_NO_DOWNGRADE |
1115 IDE_HFLAG_POST_SET_MODE;
1116 hwif->pio_mask = ATA_PIO4;
1117 hwif->set_pio_mode = pmac_ide_set_pio_mode; 1124 hwif->set_pio_mode = pmac_ide_set_pio_mode;
1118 if (pmif->kind == controller_un_ata6 1125 if (pmif->kind == controller_un_ata6
1119 || pmif->kind == controller_k2_ata6 1126 || pmif->kind == controller_k2_ata6
@@ -1133,14 +1140,16 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
1133#endif /* CONFIG_PMAC_MEDIABAY */ 1140#endif /* CONFIG_PMAC_MEDIABAY */
1134 1141
1135#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 1142#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1143 if (pmif->cable_80 == 0)
1144 d.udma_mask &= ATA_UDMA2;
1136 /* has a DBDMA controller channel */ 1145 /* has a DBDMA controller channel */
1137 if (pmif->dma_regs) 1146 if (pmif->dma_regs == 0 || pmac_ide_setup_dma(pmif, hwif) < 0)
1138 pmac_ide_setup_dma(pmif, hwif); 1147#endif
1139#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 1148 d.udma_mask = d.mwdma_mask = 0;
1140 1149
1141 idx[0] = hwif->index; 1150 idx[0] = hwif->index;
1142 1151
1143 ide_device_add(idx); 1152 ide_device_add(idx, &d);
1144 1153
1145 return 0; 1154 return 0;
1146} 1155}
@@ -1721,8 +1730,7 @@ pmac_ide_dma_lost_irq (ide_drive_t *drive)
1721 * Allocate the data structures needed for using DMA with an interface 1730 * Allocate the data structures needed for using DMA with an interface
1722 * and fill the proper list of functions pointers 1731 * and fill the proper list of functions pointers
1723 */ 1732 */
1724static void __devinit 1733static int __devinit pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1725pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1726{ 1734{
1727 struct pci_dev *dev = to_pci_dev(hwif->dev); 1735 struct pci_dev *dev = to_pci_dev(hwif->dev);
1728 1736
@@ -1730,7 +1738,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1730 * DMA routines ... 1738 * DMA routines ...
1731 */ 1739 */
1732 if (dev == NULL) 1740 if (dev == NULL)
1733 return; 1741 return -ENODEV;
1734 /* 1742 /*
1735 * Allocate space for the DBDMA commands. 1743 * Allocate space for the DBDMA commands.
1736 * The +2 is +1 for the stop command and +1 to allow for 1744 * The +2 is +1 for the stop command and +1 to allow for
@@ -1743,7 +1751,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1743 if (pmif->dma_table_cpu == NULL) { 1751 if (pmif->dma_table_cpu == NULL) {
1744 printk(KERN_ERR "%s: unable to allocate DMA command list\n", 1752 printk(KERN_ERR "%s: unable to allocate DMA command list\n",
1745 hwif->name); 1753 hwif->name);
1746 return; 1754 return -ENOMEM;
1747 } 1755 }
1748 1756
1749 hwif->sg_max_nents = MAX_DCMDS; 1757 hwif->sg_max_nents = MAX_DCMDS;
@@ -1757,29 +1765,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1757 hwif->dma_timeout = &ide_dma_timeout; 1765 hwif->dma_timeout = &ide_dma_timeout;
1758 hwif->dma_lost_irq = &pmac_ide_dma_lost_irq; 1766 hwif->dma_lost_irq = &pmac_ide_dma_lost_irq;
1759 1767
1760 switch(pmif->kind) { 1768 return 0;
1761 case controller_sh_ata6:
1762 hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07;
1763 hwif->mwdma_mask = 0x07;
1764 hwif->swdma_mask = 0x00;
1765 break;
1766 case controller_un_ata6:
1767 case controller_k2_ata6:
1768 hwif->ultra_mask = pmif->cable_80 ? 0x3f : 0x07;
1769 hwif->mwdma_mask = 0x07;
1770 hwif->swdma_mask = 0x00;
1771 break;
1772 case controller_kl_ata4:
1773 hwif->ultra_mask = pmif->cable_80 ? 0x1f : 0x07;
1774 hwif->mwdma_mask = 0x07;
1775 hwif->swdma_mask = 0x00;
1776 break;
1777 default:
1778 hwif->ultra_mask = 0x00;
1779 hwif->mwdma_mask = 0x07;
1780 hwif->swdma_mask = 0x00;
1781 break;
1782 }
1783} 1769}
1784 1770
1785#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 1771#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */