diff options
Diffstat (limited to 'drivers/ide/pmac.c')
-rw-r--r-- | drivers/ide/pmac.c | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c index f5b85f4c1b65..337d2d5b3028 100644 --- a/drivers/ide/pmac.c +++ b/drivers/ide/pmac.c | |||
@@ -404,7 +404,6 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time) | |||
404 | #define IDE_WAKEUP_DELAY (1*HZ) | 404 | #define IDE_WAKEUP_DELAY (1*HZ) |
405 | 405 | ||
406 | static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *); | 406 | static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *); |
407 | static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); | ||
408 | static void pmac_ide_selectproc(ide_drive_t *drive); | 407 | static void pmac_ide_selectproc(ide_drive_t *drive); |
409 | static void pmac_ide_kauai_selectproc(ide_drive_t *drive); | 408 | static void pmac_ide_kauai_selectproc(ide_drive_t *drive); |
410 | 409 | ||
@@ -1422,8 +1421,7 @@ out: | |||
1422 | * pmac_ide_build_dmatable builds the DBDMA command list | 1421 | * pmac_ide_build_dmatable builds the DBDMA command list |
1423 | * for a transfer and sets the DBDMA channel to point to it. | 1422 | * for a transfer and sets the DBDMA channel to point to it. |
1424 | */ | 1423 | */ |
1425 | static int | 1424 | static int pmac_ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd) |
1426 | pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) | ||
1427 | { | 1425 | { |
1428 | ide_hwif_t *hwif = drive->hwif; | 1426 | ide_hwif_t *hwif = drive->hwif; |
1429 | pmac_ide_hwif_t *pmif = | 1427 | pmac_ide_hwif_t *pmif = |
@@ -1431,8 +1429,8 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq) | |||
1431 | struct dbdma_cmd *table; | 1429 | struct dbdma_cmd *table; |
1432 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; | 1430 | volatile struct dbdma_regs __iomem *dma = pmif->dma_regs; |
1433 | struct scatterlist *sg; | 1431 | struct scatterlist *sg; |
1434 | int wr = (rq_data_dir(rq) == WRITE); | 1432 | int wr = !!(cmd->tf_flags & IDE_TFLAG_WRITE); |
1435 | int i = hwif->cmd.sg_nents, count = 0; | 1433 | int i = cmd->sg_nents, count = 0; |
1436 | 1434 | ||
1437 | /* DMA table is already aligned */ | 1435 | /* DMA table is already aligned */ |
1438 | table = (struct dbdma_cmd *) pmif->dma_table_cpu; | 1436 | table = (struct dbdma_cmd *) pmif->dma_table_cpu; |
@@ -1504,23 +1502,22 @@ use_pio_instead: | |||
1504 | * Prepare a DMA transfer. We build the DMA table, adjust the timings for | 1502 | * Prepare a DMA transfer. We build the DMA table, adjust the timings for |
1505 | * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion | 1503 | * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion |
1506 | */ | 1504 | */ |
1507 | static int | 1505 | static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd) |
1508 | pmac_ide_dma_setup(ide_drive_t *drive) | ||
1509 | { | 1506 | { |
1510 | ide_hwif_t *hwif = drive->hwif; | 1507 | ide_hwif_t *hwif = drive->hwif; |
1511 | pmac_ide_hwif_t *pmif = | 1508 | pmac_ide_hwif_t *pmif = |
1512 | (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent); | 1509 | (pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent); |
1513 | struct request *rq = hwif->rq; | ||
1514 | u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4); | 1510 | u8 unit = drive->dn & 1, ata4 = (pmif->kind == controller_kl_ata4); |
1511 | u8 write = !!(cmd->tf_flags & IDE_TFLAG_WRITE); | ||
1515 | 1512 | ||
1516 | if (!pmac_ide_build_dmatable(drive, rq)) { | 1513 | if (pmac_ide_build_dmatable(drive, cmd) == 0) { |
1517 | ide_map_sg(drive, rq); | 1514 | ide_map_sg(drive, cmd); |
1518 | return 1; | 1515 | return 1; |
1519 | } | 1516 | } |
1520 | 1517 | ||
1521 | /* Apple adds 60ns to wrDataSetup on reads */ | 1518 | /* Apple adds 60ns to wrDataSetup on reads */ |
1522 | if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) { | 1519 | if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) { |
1523 | writel(pmif->timings[unit] + (!rq_data_dir(rq) ? 0x00800000UL : 0), | 1520 | writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL), |
1524 | PMAC_IDE_REG(IDE_TIMING_CONFIG)); | 1521 | PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
1525 | (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); | 1522 | (void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG)); |
1526 | } | 1523 | } |