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-rw-r--r--drivers/ide/pci/aec62xx.c25
-rw-r--r--drivers/ide/pci/alim15x3.c109
-rw-r--r--drivers/ide/pci/amd74xx.c29
-rw-r--r--drivers/ide/pci/atiixp.c3
-rw-r--r--drivers/ide/pci/cmd640.c42
-rw-r--r--drivers/ide/pci/cmd64x.c6
-rw-r--r--drivers/ide/pci/cs5520.c26
-rw-r--r--drivers/ide/pci/cs5530.c10
-rw-r--r--drivers/ide/pci/cs5535.c2
-rw-r--r--drivers/ide/pci/cy82c693.c4
-rw-r--r--drivers/ide/pci/delkin_cb.c2
-rw-r--r--drivers/ide/pci/generic.c31
-rw-r--r--drivers/ide/pci/hpt34x.c4
-rw-r--r--drivers/ide/pci/hpt366.c4
-rw-r--r--drivers/ide/pci/it8213.c2
-rw-r--r--drivers/ide/pci/it821x.c2
-rw-r--r--drivers/ide/pci/jmicron.c2
-rw-r--r--drivers/ide/pci/ns87415.c2
-rw-r--r--drivers/ide/pci/opti621.c10
-rw-r--r--drivers/ide/pci/pdc202xx_new.c4
-rw-r--r--drivers/ide/pci/pdc202xx_old.c22
-rw-r--r--drivers/ide/pci/piix.c6
-rw-r--r--drivers/ide/pci/rz1000.c7
-rw-r--r--drivers/ide/pci/sc1200.c2
-rw-r--r--drivers/ide/pci/scc_pata.c11
-rw-r--r--drivers/ide/pci/serverworks.c11
-rw-r--r--drivers/ide/pci/sgiioc4.c16
-rw-r--r--drivers/ide/pci/siimage.c92
-rw-r--r--drivers/ide/pci/sis5513.c4
-rw-r--r--drivers/ide/pci/sl82c105.c14
-rw-r--r--drivers/ide/pci/slc90e66.c10
-rw-r--r--drivers/ide/pci/tc86c001.c2
-rw-r--r--drivers/ide/pci/triflex.c2
-rw-r--r--drivers/ide/pci/trm290.c4
-rw-r--r--drivers/ide/pci/via82cxxx.c81
35 files changed, 259 insertions, 344 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index b3dc12a70d51..19ec421f7b9f 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/aec62xx.c Version 0.26 Sep 1, 2007 2 * linux/drivers/ide/pci/aec62xx.c Version 0.27 Sep 16, 2007
3 * 3 *
4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
@@ -141,19 +141,6 @@ static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
141 drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0); 141 drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0);
142} 142}
143 143
144static void aec62xx_dma_lost_irq (ide_drive_t *drive)
145{
146 switch (HWIF(drive)->pci_dev->device) {
147 case PCI_DEVICE_ID_ARTOP_ATP860:
148 case PCI_DEVICE_ID_ARTOP_ATP860R:
149 case PCI_DEVICE_ID_ARTOP_ATP865:
150 case PCI_DEVICE_ID_ARTOP_ATP865R:
151 printk(" AEC62XX time out ");
152 default:
153 break;
154 }
155}
156
157static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) 144static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
158{ 145{
159 int bus_speed = system_bus_clock(); 146 int bus_speed = system_bus_clock();
@@ -195,8 +182,6 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
195 if (hwif->dma_base == 0) 182 if (hwif->dma_base == 0)
196 return; 183 return;
197 184
198 hwif->dma_lost_irq = &aec62xx_dma_lost_irq;
199
200 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) 185 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
201 return; 186 return;
202 187
@@ -209,7 +194,7 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
209 } 194 }
210} 195}
211 196
212static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { 197static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
213 { /* 0 */ 198 { /* 0 */
214 .name = "AEC6210", 199 .name = "AEC6210",
215 .init_chipset = init_chipset_aec62xx, 200 .init_chipset = init_chipset_aec62xx,
@@ -268,12 +253,12 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
268 * finds a device matching our IDE device tables. 253 * finds a device matching our IDE device tables.
269 * 254 *
270 * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R] 255 * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R]
271 * chips, pass a local copy of 'struct pci_device_id' down the call chain. 256 * chips, pass a local copy of 'struct ide_port_info' down the call chain.
272 */ 257 */
273 258
274static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 259static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
275{ 260{
276 ide_pci_device_t d; 261 struct ide_port_info d;
277 u8 idx = id->driver_data; 262 u8 idx = id->driver_data;
278 263
279 d = aec62xx_chipsets[idx]; 264 d = aec62xx_chipsets[idx];
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 8ee2b48d105d..a607dd31a64c 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/alim15x3.c Version 0.27 Aug 27 2007 2 * linux/drivers/ide/pci/alim15x3.c Version 0.29 Sep 16 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
@@ -492,6 +492,13 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
492 * clear bit 7 492 * clear bit 7
493 */ 493 */
494 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); 494 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
495 /*
496 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
497 */
498 if (m5229_revision >= 0x20 && isa_dev) {
499 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
500 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
501 }
495 goto out; 502 goto out;
496 } 503 }
497 504
@@ -537,7 +544,30 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
537 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); 544 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
538 } 545 }
539 } 546 }
547
540out: 548out:
549 /*
550 * CD_ROM DMA on (m5229, 0x53, bit0)
551 * Enable this bit even if we want to use PIO.
552 * PIO FIFO off (m5229, 0x53, bit1)
553 * The hardware will use 0x54h and 0x55h to control PIO FIFO.
554 * (Not on later devices it seems)
555 *
556 * 0x53 changes meaning on later revs - we must no touch
557 * bit 1 on them. Need to check if 0x20 is the right break.
558 */
559 if (m5229_revision >= 0x20) {
560 pci_read_config_byte(dev, 0x53, &tmpbyte);
561
562 if (m5229_revision <= 0x20)
563 tmpbyte = (tmpbyte & (~0x02)) | 0x01;
564 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
565 tmpbyte |= 0x03;
566 else
567 tmpbyte |= 0x01;
568
569 pci_write_config_byte(dev, 0x53, tmpbyte);
570 }
541 pci_dev_put(north); 571 pci_dev_put(north);
542 pci_dev_put(isa_dev); 572 pci_dev_put(isa_dev);
543 local_irq_restore(flags); 573 local_irq_restore(flags);
@@ -616,36 +646,8 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
616 if ((tmpbyte & (1 << hwif->channel)) == 0) 646 if ((tmpbyte & (1 << hwif->channel)) == 0)
617 cbl = ATA_CBL_PATA80; 647 cbl = ATA_CBL_PATA80;
618 } 648 }
619 } else {
620 /*
621 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
622 */
623 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
624 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
625 } 649 }
626 650
627 /*
628 * CD_ROM DMA on (m5229, 0x53, bit0)
629 * Enable this bit even if we want to use PIO
630 * PIO FIFO off (m5229, 0x53, bit1)
631 * The hardware will use 0x54h and 0x55h to control PIO FIFO
632 * (Not on later devices it seems)
633 *
634 * 0x53 changes meaning on later revs - we must no touch
635 * bit 1 on them. Need to check if 0x20 is the right break
636 */
637
638 pci_read_config_byte(dev, 0x53, &tmpbyte);
639
640 if(m5229_revision <= 0x20)
641 tmpbyte = (tmpbyte & (~0x02)) | 0x01;
642 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
643 tmpbyte |= 0x03;
644 else
645 tmpbyte |= 0x01;
646
647 pci_write_config_byte(dev, 0x53, tmpbyte);
648
649 local_irq_restore(flags); 651 local_irq_restore(flags);
650 652
651 return cbl; 653 return cbl;
@@ -664,31 +666,9 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
664 hwif->set_dma_mode = &ali_set_dma_mode; 666 hwif->set_dma_mode = &ali_set_dma_mode;
665 hwif->udma_filter = &ali_udma_filter; 667 hwif->udma_filter = &ali_udma_filter;
666 668
667 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
668 if (m5229_revision <= 0xC4)
669 hwif->host_flags |= IDE_HFLAG_NO_LBA48_DMA;
670
671 if (hwif->dma_base == 0) 669 if (hwif->dma_base == 0)
672 return; 670 return;
673 671
674 /*
675 * check in ->init_dma guarantees m5229_revision >= 0x20 here
676 */
677
678 if (m5229_revision == 0x20)
679 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
680
681 if (m5229_revision <= 0x20)
682 hwif->ultra_mask = 0x00; /* no udma */
683 else if (m5229_revision < 0xC2)
684 hwif->ultra_mask = ATA_UDMA2;
685 else if (m5229_revision == 0xC2 || m5229_revision == 0xC3)
686 hwif->ultra_mask = ATA_UDMA4;
687 else if (m5229_revision == 0xC4)
688 hwif->ultra_mask = ATA_UDMA5;
689 else
690 hwif->ultra_mask = ATA_UDMA6;
691
692 hwif->dma_setup = &ali15x3_dma_setup; 672 hwif->dma_setup = &ali15x3_dma_setup;
693 673
694 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 674 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
@@ -766,7 +746,7 @@ static void __devinit init_dma_ali15x3 (ide_hwif_t *hwif, unsigned long dmabase)
766 ide_setup_dma(hwif, dmabase, 8); 746 ide_setup_dma(hwif, dmabase, 8);
767} 747}
768 748
769static ide_pci_device_t ali15x3_chipset __devinitdata = { 749static const struct ide_port_info ali15x3_chipset __devinitdata = {
770 .name = "ALI15X3", 750 .name = "ALI15X3",
771 .init_chipset = init_chipset_ali15x3, 751 .init_chipset = init_chipset_ali15x3,
772 .init_hwif = init_hwif_ali15x3, 752 .init_hwif = init_hwif_ali15x3,
@@ -792,15 +772,34 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
792 { }, 772 { },
793 }; 773 };
794 774
795 ide_pci_device_t *d = &ali15x3_chipset; 775 struct ide_port_info d = ali15x3_chipset;
776 u8 rev = dev->revision;
796 777
797 if (pci_dev_present(ati_rs100)) 778 if (pci_dev_present(ati_rs100))
798 printk(KERN_WARNING "alim15x3: ATI Radeon IGP Northbridge is not yet fully tested.\n"); 779 printk(KERN_WARNING "alim15x3: ATI Radeon IGP Northbridge is not yet fully tested.\n");
799 780
781 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
782 if (rev <= 0xC4)
783 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
784
785 if (rev >= 0x20) {
786 if (rev == 0x20)
787 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
788
789 if (rev < 0xC2)
790 d.udma_mask = ATA_UDMA2;
791 else if (rev == 0xC2 || rev == 0xC3)
792 d.udma_mask = ATA_UDMA4;
793 else if (rev == 0xC4)
794 d.udma_mask = ATA_UDMA5;
795 else
796 d.udma_mask = ATA_UDMA6;
797 }
798
800#if defined(CONFIG_SPARC64) 799#if defined(CONFIG_SPARC64)
801 d->init_hwif = init_hwif_common_ali15x3; 800 d.init_hwif = init_hwif_common_ali15x3;
802#endif /* CONFIG_SPARC64 */ 801#endif /* CONFIG_SPARC64 */
803 return ide_setup_pci_device(dev, d); 802 return ide_setup_pci_device(dev, &d);
804} 803}
805 804
806 805
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 7cafefbf6c1b..8d4125ec252c 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -77,7 +77,7 @@ static struct amd_ide_chip {
77}; 77};
78 78
79static struct amd_ide_chip *amd_config; 79static struct amd_ide_chip *amd_config;
80static ide_pci_device_t *amd_chipset; 80static const struct ide_port_info *amd_chipset;
81static unsigned int amd_80w; 81static unsigned int amd_80w;
82static unsigned int amd_clock; 82static unsigned int amd_clock;
83 83
@@ -242,19 +242,12 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
242 242
243static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) 243static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
244{ 244{
245 int i;
246
247 if (hwif->irq == 0) /* 0 is bogus but will do for now */ 245 if (hwif->irq == 0) /* 0 is bogus but will do for now */
248 hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); 246 hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel);
249 247
250 hwif->set_pio_mode = &amd_set_pio_mode; 248 hwif->set_pio_mode = &amd_set_pio_mode;
251 hwif->set_dma_mode = &amd_set_drive; 249 hwif->set_dma_mode = &amd_set_drive;
252 250
253 for (i = 0; i < 2; i++) {
254 hwif->drives[i].io_32bit = 1;
255 hwif->drives[i].unmask = 1;
256 }
257
258 if (!hwif->dma_base) 251 if (!hwif->dma_base)
259 return; 252 return;
260 253
@@ -270,16 +263,21 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
270 } 263 }
271} 264}
272 265
266#define IDE_HFLAGS_AMD \
267 (IDE_HFLAG_PIO_NO_BLACKLIST | \
268 IDE_HFLAG_PIO_NO_DOWNGRADE | \
269 IDE_HFLAG_POST_SET_MODE | \
270 IDE_HFLAG_IO_32BIT | \
271 IDE_HFLAG_UNMASK_IRQS | \
272 IDE_HFLAG_BOOTABLE)
273
273#define DECLARE_AMD_DEV(name_str) \ 274#define DECLARE_AMD_DEV(name_str) \
274 { \ 275 { \
275 .name = name_str, \ 276 .name = name_str, \
276 .init_chipset = init_chipset_amd74xx, \ 277 .init_chipset = init_chipset_amd74xx, \
277 .init_hwif = init_hwif_amd74xx, \ 278 .init_hwif = init_hwif_amd74xx, \
278 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 279 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
279 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \ 280 .host_flags = IDE_HFLAGS_AMD, \
280 IDE_HFLAG_PIO_NO_DOWNGRADE | \
281 IDE_HFLAG_POST_SET_MODE | \
282 IDE_HFLAG_BOOTABLE, \
283 .pio_mask = ATA_PIO5, \ 281 .pio_mask = ATA_PIO5, \
284 .swdma_mask = ATA_SWDMA2, \ 282 .swdma_mask = ATA_SWDMA2, \
285 .mwdma_mask = ATA_MWDMA2, \ 283 .mwdma_mask = ATA_MWDMA2, \
@@ -291,16 +289,13 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
291 .init_chipset = init_chipset_amd74xx, \ 289 .init_chipset = init_chipset_amd74xx, \
292 .init_hwif = init_hwif_amd74xx, \ 290 .init_hwif = init_hwif_amd74xx, \
293 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 291 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
294 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | \ 292 .host_flags = IDE_HFLAGS_AMD, \
295 IDE_HFLAG_PIO_NO_DOWNGRADE | \
296 IDE_HFLAG_POST_SET_MODE | \
297 IDE_HFLAG_BOOTABLE, \
298 .pio_mask = ATA_PIO5, \ 293 .pio_mask = ATA_PIO5, \
299 .swdma_mask = ATA_SWDMA2, \ 294 .swdma_mask = ATA_SWDMA2, \
300 .mwdma_mask = ATA_MWDMA2, \ 295 .mwdma_mask = ATA_MWDMA2, \
301 } 296 }
302 297
303static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { 298static const struct ide_port_info amd74xx_chipsets[] __devinitdata = {
304 /* 0 */ DECLARE_AMD_DEV("AMD7401"), 299 /* 0 */ DECLARE_AMD_DEV("AMD7401"),
305 /* 1 */ DECLARE_AMD_DEV("AMD7409"), 300 /* 1 */ DECLARE_AMD_DEV("AMD7409"),
306 /* 2 */ DECLARE_AMD_DEV("AMD7411"), 301 /* 2 */ DECLARE_AMD_DEV("AMD7411"),
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 307843053078..ef8e0164ef7a 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -189,8 +189,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
189 hwif->dma_host_off = &atiixp_dma_host_off; 189 hwif->dma_host_off = &atiixp_dma_host_off;
190} 190}
191 191
192 192static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
193static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
194 { /* 0 */ 193 { /* 0 */
195 .name = "ATIIXP", 194 .name = "ATIIXP",
196 .init_hwif = init_hwif_atiixp, 195 .init_hwif = init_hwif_atiixp,
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index f369645e4d16..4aa48104e0c1 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -185,6 +185,8 @@ static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
185 185
186#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 186#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
187 187
188static DEFINE_SPINLOCK(cmd640_lock);
189
188/* 190/*
189 * These are initialized to point at the devices we control 191 * These are initialized to point at the devices we control
190 */ 192 */
@@ -258,12 +260,12 @@ static u8 get_cmd640_reg_vlb (u16 reg)
258 260
259static u8 get_cmd640_reg(u16 reg) 261static u8 get_cmd640_reg(u16 reg)
260{ 262{
261 u8 b;
262 unsigned long flags; 263 unsigned long flags;
264 u8 b;
263 265
264 spin_lock_irqsave(&ide_lock, flags); 266 spin_lock_irqsave(&cmd640_lock, flags);
265 b = __get_cmd640_reg(reg); 267 b = __get_cmd640_reg(reg);
266 spin_unlock_irqrestore(&ide_lock, flags); 268 spin_unlock_irqrestore(&cmd640_lock, flags);
267 return b; 269 return b;
268} 270}
269 271
@@ -271,9 +273,9 @@ static void put_cmd640_reg(u16 reg, u8 val)
271{ 273{
272 unsigned long flags; 274 unsigned long flags;
273 275
274 spin_lock_irqsave(&ide_lock, flags); 276 spin_lock_irqsave(&cmd640_lock, flags);
275 __put_cmd640_reg(reg,val); 277 __put_cmd640_reg(reg,val);
276 spin_unlock_irqrestore(&ide_lock, flags); 278 spin_unlock_irqrestore(&cmd640_lock, flags);
277} 279}
278 280
279static int __init match_pci_cmd640_device (void) 281static int __init match_pci_cmd640_device (void)
@@ -351,7 +353,7 @@ static int __init secondary_port_responding (void)
351{ 353{
352 unsigned long flags; 354 unsigned long flags;
353 355
354 spin_lock_irqsave(&ide_lock, flags); 356 spin_lock_irqsave(&cmd640_lock, flags);
355 357
356 outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */ 358 outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */
357 udelay(100); 359 udelay(100);
@@ -359,11 +361,11 @@ static int __init secondary_port_responding (void)
359 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */ 361 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
360 udelay(100); 362 udelay(100);
361 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) { 363 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
362 spin_unlock_irqrestore(&ide_lock, flags); 364 spin_unlock_irqrestore(&cmd640_lock, flags);
363 return 0; /* nothing responded */ 365 return 0; /* nothing responded */
364 } 366 }
365 } 367 }
366 spin_unlock_irqrestore(&ide_lock, flags); 368 spin_unlock_irqrestore(&cmd640_lock, flags);
367 return 1; /* success */ 369 return 1; /* success */
368} 370}
369 371
@@ -440,11 +442,11 @@ static void __init setup_device_ptrs (void)
440static void set_prefetch_mode (unsigned int index, int mode) 442static void set_prefetch_mode (unsigned int index, int mode)
441{ 443{
442 ide_drive_t *drive = cmd_drives[index]; 444 ide_drive_t *drive = cmd_drives[index];
445 unsigned long flags;
443 int reg = prefetch_regs[index]; 446 int reg = prefetch_regs[index];
444 u8 b; 447 u8 b;
445 unsigned long flags;
446 448
447 spin_lock_irqsave(&ide_lock, flags); 449 spin_lock_irqsave(&cmd640_lock, flags);
448 b = __get_cmd640_reg(reg); 450 b = __get_cmd640_reg(reg);
449 if (mode) { /* want prefetch on? */ 451 if (mode) { /* want prefetch on? */
450#if CMD640_PREFETCH_MASKS 452#if CMD640_PREFETCH_MASKS
@@ -460,7 +462,7 @@ static void set_prefetch_mode (unsigned int index, int mode)
460 b |= prefetch_masks[index]; /* disable prefetch */ 462 b |= prefetch_masks[index]; /* disable prefetch */
461 } 463 }
462 __put_cmd640_reg(reg, b); 464 __put_cmd640_reg(reg, b);
463 spin_unlock_irqrestore(&ide_lock, flags); 465 spin_unlock_irqrestore(&cmd640_lock, flags);
464} 466}
465 467
466/* 468/*
@@ -561,7 +563,7 @@ static void program_drive_counts (unsigned int index)
561 /* 563 /*
562 * Now that everything is ready, program the new timings 564 * Now that everything is ready, program the new timings
563 */ 565 */
564 spin_lock_irqsave(&ide_lock, flags); 566 spin_lock_irqsave(&cmd640_lock, flags);
565 /* 567 /*
566 * Program the address_setup clocks into ARTTIM reg, 568 * Program the address_setup clocks into ARTTIM reg,
567 * and then the active/recovery counts into the DRWTIM reg 569 * and then the active/recovery counts into the DRWTIM reg
@@ -570,7 +572,7 @@ static void program_drive_counts (unsigned int index)
570 setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f; 572 setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
571 __put_cmd640_reg(arttim_regs[index], setup_count); 573 __put_cmd640_reg(arttim_regs[index], setup_count);
572 __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count)); 574 __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
573 spin_unlock_irqrestore(&ide_lock, flags); 575 spin_unlock_irqrestore(&cmd640_lock, flags);
574} 576}
575 577
576/* 578/*
@@ -670,20 +672,20 @@ static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
670 672
671static int pci_conf1(void) 673static int pci_conf1(void)
672{ 674{
673 u32 tmp;
674 unsigned long flags; 675 unsigned long flags;
676 u32 tmp;
675 677
676 spin_lock_irqsave(&ide_lock, flags); 678 spin_lock_irqsave(&cmd640_lock, flags);
677 outb(0x01, 0xCFB); 679 outb(0x01, 0xCFB);
678 tmp = inl(0xCF8); 680 tmp = inl(0xCF8);
679 outl(0x80000000, 0xCF8); 681 outl(0x80000000, 0xCF8);
680 if (inl(0xCF8) == 0x80000000) { 682 if (inl(0xCF8) == 0x80000000) {
681 outl(tmp, 0xCF8); 683 outl(tmp, 0xCF8);
682 spin_unlock_irqrestore(&ide_lock, flags); 684 spin_unlock_irqrestore(&cmd640_lock, flags);
683 return 1; 685 return 1;
684 } 686 }
685 outl(tmp, 0xCF8); 687 outl(tmp, 0xCF8);
686 spin_unlock_irqrestore(&ide_lock, flags); 688 spin_unlock_irqrestore(&cmd640_lock, flags);
687 return 0; 689 return 0;
688} 690}
689 691
@@ -691,15 +693,15 @@ static int pci_conf2(void)
691{ 693{
692 unsigned long flags; 694 unsigned long flags;
693 695
694 spin_lock_irqsave(&ide_lock, flags); 696 spin_lock_irqsave(&cmd640_lock, flags);
695 outb(0x00, 0xCFB); 697 outb(0x00, 0xCFB);
696 outb(0x00, 0xCF8); 698 outb(0x00, 0xCF8);
697 outb(0x00, 0xCFA); 699 outb(0x00, 0xCFA);
698 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) { 700 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
699 spin_unlock_irqrestore(&ide_lock, flags); 701 spin_unlock_irqrestore(&cmd640_lock, flags);
700 return 1; 702 return 1;
701 } 703 }
702 spin_unlock_irqrestore(&ide_lock, flags); 704 spin_unlock_irqrestore(&cmd640_lock, flags);
703 return 0; 705 return 0;
704} 706}
705 707
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index adee2ef6fd71..ea0143ef5fe5 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -535,7 +535,6 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
535 hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq; 535 hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq;
536 break; 536 break;
537 case PCI_DEVICE_ID_CMD_646: 537 case PCI_DEVICE_ID_CMD_646:
538 hwif->chipset = ide_cmd646;
539 if (dev->revision == 0x01) { 538 if (dev->revision == 0x01) {
540 hwif->ide_dma_end = &cmd646_1_ide_dma_end; 539 hwif->ide_dma_end = &cmd646_1_ide_dma_end;
541 break; 540 break;
@@ -549,7 +548,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
549 } 548 }
550} 549}
551 550
552static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { 551static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
553 { /* 0 */ 552 { /* 0 */
554 .name = "CMD643", 553 .name = "CMD643",
555 .init_chipset = init_chipset_cmd64x, 554 .init_chipset = init_chipset_cmd64x,
@@ -573,6 +572,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
573 .init_chipset = init_chipset_cmd64x, 572 .init_chipset = init_chipset_cmd64x,
574 .init_hwif = init_hwif_cmd64x, 573 .init_hwif = init_hwif_cmd64x,
575 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 574 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
575 .chipset = ide_cmd646,
576 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, 576 .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE,
577 .pio_mask = ATA_PIO5, 577 .pio_mask = ATA_PIO5,
578 .mwdma_mask = ATA_MWDMA2, 578 .mwdma_mask = ATA_MWDMA2,
@@ -591,7 +591,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
591 591
592static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) 592static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
593{ 593{
594 ide_pci_device_t d; 594 struct ide_port_info d;
595 u8 idx = id->driver_data; 595 u8 idx = id->driver_data;
596 596
597 d = cmd64x_chipsets[idx]; 597 d = cmd64x_chipsets[idx];
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index aa98e817d385..0466462fd21b 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -141,7 +141,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
141 .pio_mask = ATA_PIO4, \ 141 .pio_mask = ATA_PIO4, \
142 } 142 }
143 143
144static ide_pci_device_t cyrix_chipsets[] __devinitdata = { 144static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
145 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"), 145 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
146 /* 1 */ DECLARE_CS_DEV("Cyrix 5520") 146 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
147}; 147};
@@ -154,9 +154,8 @@ static ide_pci_device_t cyrix_chipsets[] __devinitdata = {
154 154
155static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) 155static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
156{ 156{
157 ide_hwif_t *hwif = NULL, *mate = NULL; 157 const struct ide_port_info *d = &cyrix_chipsets[id->driver_data];
158 ata_index_t index; 158 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
159 ide_pci_device_t *d = &cyrix_chipsets[id->driver_data];
160 159
161 ide_setup_pci_noise(dev, d); 160 ide_setup_pci_noise(dev, d);
162 161
@@ -172,29 +171,14 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic
172 return -ENODEV; 171 return -ENODEV;
173 } 172 }
174 173
175 index.all = 0xf0f0;
176
177 /* 174 /*
178 * Now the chipset is configured we can let the core 175 * Now the chipset is configured we can let the core
179 * do all the device setup for us 176 * do all the device setup for us
180 */ 177 */
181 178
182 ide_pci_setup_ports(dev, d, 14, &index); 179 ide_pci_setup_ports(dev, d, 14, &idx[0]);
183
184 if ((index.b.low & 0xf0) != 0xf0)
185 hwif = &ide_hwifs[index.b.low];
186 if ((index.b.high & 0xf0) != 0xf0)
187 mate = &ide_hwifs[index.b.high];
188
189 if (hwif)
190 probe_hwif_init(hwif);
191 if (mate)
192 probe_hwif_init(mate);
193 180
194 if (hwif) 181 ide_device_add(idx);
195 ide_proc_register_port(hwif);
196 if (mate)
197 ide_proc_register_port(mate);
198 182
199 return 0; 183 return 0;
200} 184}
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index ba0c6eba024b..599408952bd4 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/cs5530.c Version 0.76 Aug 3 2007 2 * linux/drivers/ide/pci/cs5530.c Version 0.77 Sep 24 2007
3 * 3 *
4 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2000 Mark Lord <mlord@pobox.com> 5 * Copyright (C) 2000 Mark Lord <mlord@pobox.com>
@@ -146,7 +146,6 @@ static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
146static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const char *name) 146static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const char *name)
147{ 147{
148 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL; 148 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL;
149 unsigned long flags;
150 149
151 if (pci_resource_start(dev, 4) == 0) 150 if (pci_resource_start(dev, 4) == 0)
152 return -EFAULT; 151 return -EFAULT;
@@ -171,9 +170,6 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
171 goto out; 170 goto out;
172 } 171 }
173 172
174 spin_lock_irqsave(&ide_lock, flags);
175 /* all CPUs (there should only be one CPU with this chipset) */
176
177 /* 173 /*
178 * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530: 174 * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530:
179 * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530 175 * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530
@@ -224,8 +220,6 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch
224 pci_write_config_byte(master_0, 0x42, 0x00); 220 pci_write_config_byte(master_0, 0x42, 0x00);
225 pci_write_config_byte(master_0, 0x43, 0xc1); 221 pci_write_config_byte(master_0, 0x43, 0xc1);
226 222
227 spin_unlock_irqrestore(&ide_lock, flags);
228
229out: 223out:
230 pci_dev_put(master_0); 224 pci_dev_put(master_0);
231 pci_dev_put(cs5530_0); 225 pci_dev_put(cs5530_0);
@@ -261,7 +255,7 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
261 hwif->udma_filter = cs5530_udma_filter; 255 hwif->udma_filter = cs5530_udma_filter;
262} 256}
263 257
264static ide_pci_device_t cs5530_chipset __devinitdata = { 258static const struct ide_port_info cs5530_chipset __devinitdata = {
265 .name = "CS5530", 259 .name = "CS5530",
266 .init_chipset = init_chipset_cs5530, 260 .init_chipset = init_chipset_cs5530,
267 .init_hwif = init_hwif_cs5530, 261 .init_hwif = init_hwif_cs5530,
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 5ac82ffa5c09..9094916e3780 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -186,7 +186,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
186 hwif->cbl = cs5535_cable_detect(hwif->pci_dev); 186 hwif->cbl = cs5535_cable_detect(hwif->pci_dev);
187} 187}
188 188
189static ide_pci_device_t cs5535_chipset __devinitdata = { 189static const struct ide_port_info cs5535_chipset __devinitdata = {
190 .name = "CS5535", 190 .name = "CS5535",
191 .init_hwif = init_hwif_cs5535, 191 .init_hwif = init_hwif_cs5535,
192 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | 192 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE |
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index efc20bd97fd5..3ef4fc10fe2c 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -428,7 +428,6 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
428 */ 428 */
429static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif) 429static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
430{ 430{
431 hwif->chipset = ide_cy82c693;
432 hwif->set_pio_mode = &cy82c693_set_pio_mode; 431 hwif->set_pio_mode = &cy82c693_set_pio_mode;
433 432
434 if (hwif->dma_base == 0) 433 if (hwif->dma_base == 0)
@@ -449,11 +448,12 @@ static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
449 } 448 }
450} 449}
451 450
452static ide_pci_device_t cy82c693_chipset __devinitdata = { 451static const struct ide_port_info cy82c693_chipset __devinitdata = {
453 .name = "CY82C693", 452 .name = "CY82C693",
454 .init_chipset = init_chipset_cy82c693, 453 .init_chipset = init_chipset_cy82c693,
455 .init_iops = init_iops_cy82c693, 454 .init_iops = init_iops_cy82c693,
456 .init_hwif = init_hwif_cy82c693, 455 .init_hwif = init_hwif_cy82c693,
456 .chipset = ide_cy82c693,
457 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA | 457 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_TRUST_BIOS_FOR_DMA |
458 IDE_HFLAG_BOOTABLE, 458 IDE_HFLAG_BOOTABLE,
459 .pio_mask = ATA_PIO4, 459 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index 46f4a888c037..83829081640a 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -80,7 +80,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
80 hw.irq = dev->irq; 80 hw.irq = dev->irq;
81 hw.chipset = ide_pci; /* this enables IRQ sharing */ 81 hw.chipset = ide_pci; /* this enables IRQ sharing */
82 82
83 rc = ide_register_hw_with_fixup(&hw, 0, &hwif, ide_undecoded_slave); 83 rc = ide_register_hw(&hw, &ide_undecoded_slave, 0, &hwif);
84 if (rc < 0) { 84 if (rc < 0) {
85 printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc); 85 printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc);
86 pci_disable_device(dev); 86 pci_disable_device(dev);
diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c
index 51165832e7f2..f44d70852c3c 100644
--- a/drivers/ide/pci/generic.c
+++ b/drivers/ide/pci/generic.c
@@ -54,37 +54,24 @@ __setup("all-generic-ide", ide_generic_all_on);
54module_param_named(all_generic_ide, ide_generic_all, bool, 0444); 54module_param_named(all_generic_ide, ide_generic_all, bool, 0444);
55MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers."); 55MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE storage controllers.");
56 56
57static void __devinit init_hwif_generic (ide_hwif_t *hwif) 57#define IDE_HFLAGS_UMC (IDE_HFLAG_NO_DMA | IDE_HFLAG_FORCE_LEGACY_IRQS)
58{
59 switch(hwif->pci_dev->device) {
60 case PCI_DEVICE_ID_UMC_UM8673F:
61 case PCI_DEVICE_ID_UMC_UM8886A:
62 case PCI_DEVICE_ID_UMC_UM8886BF:
63 hwif->irq = hwif->channel ? 15 : 14;
64 break;
65 default:
66 break;
67 }
68}
69 58
70#define DECLARE_GENERIC_PCI_DEV(name_str, dma_setting) \ 59#define DECLARE_GENERIC_PCI_DEV(name_str, extra_flags) \
71 { \ 60 { \
72 .name = name_str, \ 61 .name = name_str, \
73 .init_hwif = init_hwif_generic, \
74 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ 62 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \
75 dma_setting | \ 63 extra_flags | \
76 IDE_HFLAG_BOOTABLE, \ 64 IDE_HFLAG_BOOTABLE, \
77 .swdma_mask = ATA_SWDMA2, \ 65 .swdma_mask = ATA_SWDMA2, \
78 .mwdma_mask = ATA_MWDMA2, \ 66 .mwdma_mask = ATA_MWDMA2, \
79 .udma_mask = ATA_UDMA6, \ 67 .udma_mask = ATA_UDMA6, \
80 } 68 }
81 69
82static ide_pci_device_t generic_chipsets[] __devinitdata = { 70static const struct ide_port_info generic_chipsets[] __devinitdata = {
83 /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0), 71 /* 0 */ DECLARE_GENERIC_PCI_DEV("Unknown", 0),
84 72
85 { /* 1 */ 73 { /* 1 */
86 .name = "NS87410", 74 .name = "NS87410",
87 .init_hwif = init_hwif_generic,
88 .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, 75 .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
89 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 76 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
90 IDE_HFLAG_BOOTABLE, 77 IDE_HFLAG_BOOTABLE,
@@ -95,16 +82,15 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = {
95 82
96 /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0), 83 /* 2 */ DECLARE_GENERIC_PCI_DEV("SAMURAI", 0),
97 /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0), 84 /* 3 */ DECLARE_GENERIC_PCI_DEV("HT6565", 0),
98 /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAG_NO_DMA), 85 /* 4 */ DECLARE_GENERIC_PCI_DEV("UM8673F", IDE_HFLAGS_UMC),
99 /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAG_NO_DMA), 86 /* 5 */ DECLARE_GENERIC_PCI_DEV("UM8886A", IDE_HFLAGS_UMC),
100 /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAG_NO_DMA), 87 /* 6 */ DECLARE_GENERIC_PCI_DEV("UM8886BF", IDE_HFLAGS_UMC),
101 /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0), 88 /* 7 */ DECLARE_GENERIC_PCI_DEV("HINT_IDE", 0),
102 /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA), 89 /* 8 */ DECLARE_GENERIC_PCI_DEV("VIA_IDE", IDE_HFLAG_NO_AUTODMA),
103 /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA), 90 /* 9 */ DECLARE_GENERIC_PCI_DEV("OPTI621V", IDE_HFLAG_NO_AUTODMA),
104 91
105 { /* 10 */ 92 { /* 10 */
106 .name = "VIA8237SATA", 93 .name = "VIA8237SATA",
107 .init_hwif = init_hwif_generic,
108 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 94 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
109 IDE_HFLAG_OFF_BOARD, 95 IDE_HFLAG_OFF_BOARD,
110 .swdma_mask = ATA_SWDMA2, 96 .swdma_mask = ATA_SWDMA2,
@@ -118,7 +104,6 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = {
118 104
119 { /* 14 */ 105 { /* 14 */
120 .name = "Revolution", 106 .name = "Revolution",
121 .init_hwif = init_hwif_generic,
122 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 107 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
123 IDE_HFLAG_OFF_BOARD, 108 IDE_HFLAG_OFF_BOARD,
124 .swdma_mask = ATA_SWDMA2, 109 .swdma_mask = ATA_SWDMA2,
@@ -138,7 +123,7 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = {
138 123
139static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) 124static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
140{ 125{
141 ide_pci_device_t *d = &generic_chipsets[id->driver_data]; 126 const struct ide_port_info *d = &generic_chipsets[id->driver_data];
142 int ret = -ENODEV; 127 int ret = -ENODEV;
143 128
144 /* Don't use the generic entry unless instructed to do so */ 129 /* Don't use the generic entry unless instructed to do so */
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index 67af1a7dde30..ae6307fae4f9 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -129,7 +129,7 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
129 hwif->set_dma_mode = &hpt34x_set_mode; 129 hwif->set_dma_mode = &hpt34x_set_mode;
130} 130}
131 131
132static ide_pci_device_t hpt34x_chipsets[] __devinitdata = { 132static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
133 { /* 0 */ 133 { /* 0 */
134 .name = "HPT343", 134 .name = "HPT343",
135 .init_chipset = init_chipset_hpt34x, 135 .init_chipset = init_chipset_hpt34x,
@@ -158,7 +158,7 @@ static ide_pci_device_t hpt34x_chipsets[] __devinitdata = {
158 158
159static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id) 159static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
160{ 160{
161 ide_pci_device_t *d; 161 const struct ide_port_info *d;
162 u16 pcicmd = 0; 162 u16 pcicmd = 0;
163 163
164 pci_read_config_word(dev, PCI_COMMAND, &pcicmd); 164 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 18f5b7ddaee6..612b795241bf 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1425,7 +1425,7 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
1425 return 0; 1425 return 0;
1426} 1426}
1427 1427
1428static ide_pci_device_t hpt366_chipsets[] __devinitdata = { 1428static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1429 { /* 0 */ 1429 { /* 0 */
1430 .name = "HPT36x", 1430 .name = "HPT36x",
1431 .init_chipset = init_chipset_hpt366, 1431 .init_chipset = init_chipset_hpt366,
@@ -1510,7 +1510,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
1510{ 1510{
1511 struct hpt_info *info = NULL; 1511 struct hpt_info *info = NULL;
1512 struct pci_dev *dev2 = NULL; 1512 struct pci_dev *dev2 = NULL;
1513 ide_pci_device_t d; 1513 struct ide_port_info d;
1514 u8 idx = id->driver_data; 1514 u8 idx = id->driver_data;
1515 u8 rev = dev->revision; 1515 u8 rev = dev->revision;
1516 1516
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index dfbe605120cb..90b52ed37bfc 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -193,7 +193,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
193 .udma_mask = ATA_UDMA6, \ 193 .udma_mask = ATA_UDMA6, \
194 } 194 }
195 195
196static ide_pci_device_t it8213_chipsets[] __devinitdata = { 196static const struct ide_port_info it8213_chipsets[] __devinitdata = {
197 /* 0 */ DECLARE_ITE_DEV("IT8213"), 197 /* 0 */ DECLARE_ITE_DEV("IT8213"),
198}; 198};
199 199
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index ec45b7247209..1a7ddd12e65c 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -638,7 +638,7 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
638 .pio_mask = ATA_PIO4, \ 638 .pio_mask = ATA_PIO4, \
639 } 639 }
640 640
641static ide_pci_device_t it821x_chipsets[] __devinitdata = { 641static const struct ide_port_info it821x_chipsets[] __devinitdata = {
642 /* 0 */ DECLARE_ITE_DEV("IT8212"), 642 /* 0 */ DECLARE_ITE_DEV("IT8212"),
643}; 643};
644 644
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 2eeff670d9a6..bdf64d997708 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -118,7 +118,7 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
118 hwif->cbl = ata66_jmicron(hwif); 118 hwif->cbl = ata66_jmicron(hwif);
119} 119}
120 120
121static ide_pci_device_t jmicron_chipset __devinitdata = { 121static const struct ide_port_info jmicron_chipset __devinitdata = {
122 .name = "JMB", 122 .name = "JMB",
123 .init_hwif = init_hwif_jmicron, 123 .init_hwif = init_hwif_jmicron,
124 .host_flags = IDE_HFLAG_BOOTABLE, 124 .host_flags = IDE_HFLAG_BOOTABLE,
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index d21b58923829..d4df4642dbb5 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -260,7 +260,7 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
260 hwif->ide_dma_end = &ns87415_ide_dma_end; 260 hwif->ide_dma_end = &ns87415_ide_dma_end;
261} 261}
262 262
263static ide_pci_device_t ns87415_chipset __devinitdata = { 263static const struct ide_port_info ns87415_chipset __devinitdata = {
264 .name = "NS87415", 264 .name = "NS87415",
265#ifdef CONFIG_SUPERIO 265#ifdef CONFIG_SUPERIO
266 .init_iops = init_iops_ns87415, 266 .init_iops = init_iops_ns87415,
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 3573ffeaaa34..8953d9c3926f 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/opti621.c Version 0.8 Aug 27, 2007 2 * linux/drivers/ide/pci/opti621.c Version 0.9 Sep 24, 2007
3 * 3 *
4 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) 4 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
5 */ 5 */
@@ -133,6 +133,8 @@ static int reg_base;
133#define PIO_NOT_EXIST 254 133#define PIO_NOT_EXIST 254
134#define PIO_DONT_KNOW 255 134#define PIO_DONT_KNOW 255
135 135
136static DEFINE_SPINLOCK(opti621_lock);
137
136/* there are stored pio numbers from other calls of opti621_set_pio_mode */ 138/* there are stored pio numbers from other calls of opti621_set_pio_mode */
137static void compute_pios(ide_drive_t *drive, const u8 pio) 139static void compute_pios(ide_drive_t *drive, const u8 pio)
138/* Store values into drive->drive_data 140/* Store values into drive->drive_data
@@ -278,7 +280,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
278 second.recovery_time, drdy); 280 second.recovery_time, drdy);
279#endif 281#endif
280 282
281 spin_lock_irqsave(&ide_lock, flags); 283 spin_lock_irqsave(&opti621_lock, flags);
282 284
283 reg_base = hwif->io_ports[IDE_DATA_OFFSET]; 285 reg_base = hwif->io_ports[IDE_DATA_OFFSET];
284 286
@@ -317,7 +319,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
317 /* and read prefetch for both drives */ 319 /* and read prefetch for both drives */
318 write_reg(misc, MISC_REG); 320 write_reg(misc, MISC_REG);
319 321
320 spin_unlock_irqrestore(&ide_lock, flags); 322 spin_unlock_irqrestore(&opti621_lock, flags);
321} 323}
322 324
323/* 325/*
@@ -331,7 +333,7 @@ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif)
331 hwif->set_pio_mode = &opti621_set_pio_mode; 333 hwif->set_pio_mode = &opti621_set_pio_mode;
332} 334}
333 335
334static ide_pci_device_t opti621_chipsets[] __devinitdata = { 336static const struct ide_port_info opti621_chipsets[] __devinitdata = {
335 { /* 0 */ 337 { /* 0 */
336 .name = "OPTI621", 338 .name = "OPTI621",
337 .init_hwif = init_hwif_opti621, 339 .init_hwif = init_hwif_opti621,
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index d1e7823454f3..4234efeba606 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -513,7 +513,7 @@ static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
513 .udma_mask = udma, \ 513 .udma_mask = udma, \
514 } 514 }
515 515
516static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { 516static const struct ide_port_info pdcnew_chipsets[] __devinitdata = {
517 /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5), 517 /* 0 */ DECLARE_PDCNEW_DEV("PDC20268", ATA_UDMA5),
518 /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6), 518 /* 1 */ DECLARE_PDCNEW_DEV("PDC20269", ATA_UDMA6),
519 /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5), 519 /* 2 */ DECLARE_PDCNEW_DEV("PDC20270", ATA_UDMA5),
@@ -534,7 +534,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
534 534
535static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id) 535static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
536{ 536{
537 ide_pci_device_t *d; 537 const struct ide_port_info *d;
538 struct pci_dev *bridge = dev->bus->self; 538 struct pci_dev *bridge = dev->bus->self;
539 u8 idx = id->driver_data; 539 u8 idx = id->driver_data;
540 540
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 29306121dc4a..e09742e2ba59 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -302,13 +302,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
302 302
303static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) 303static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
304{ 304{
305 struct pci_dev *dev = hwif->pci_dev;
306
307 /* PDC20265 has problems with large LBA48 requests */
308 if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
309 (dev->device == PCI_DEVICE_ID_PROMISE_20265))
310 hwif->rqsize = 256;
311
312 hwif->set_pio_mode = &pdc202xx_set_pio_mode; 305 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
313 hwif->set_dma_mode = &pdc202xx_set_mode; 306 hwif->set_dma_mode = &pdc202xx_set_mode;
314 307
@@ -382,7 +375,7 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
382 } 375 }
383} 376}
384 377
385#define DECLARE_PDC2026X_DEV(name_str, udma) \ 378#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \
386 { \ 379 { \
387 .name = name_str, \ 380 .name = name_str, \
388 .init_chipset = init_chipset_pdc202xx, \ 381 .init_chipset = init_chipset_pdc202xx, \
@@ -390,13 +383,14 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
390 .init_dma = init_dma_pdc202xx, \ 383 .init_dma = init_dma_pdc202xx, \
391 .extra = 48, \ 384 .extra = 48, \
392 .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \ 385 .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \
386 extra_flags | \
393 IDE_HFLAG_OFF_BOARD, \ 387 IDE_HFLAG_OFF_BOARD, \
394 .pio_mask = ATA_PIO4, \ 388 .pio_mask = ATA_PIO4, \
395 .mwdma_mask = ATA_MWDMA2, \ 389 .mwdma_mask = ATA_MWDMA2, \
396 .udma_mask = udma, \ 390 .udma_mask = udma, \
397 } 391 }
398 392
399static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { 393static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
400 { /* 0 */ 394 { /* 0 */
401 .name = "PDC20246", 395 .name = "PDC20246",
402 .init_chipset = init_chipset_pdc202xx, 396 .init_chipset = init_chipset_pdc202xx,
@@ -410,10 +404,10 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
410 .udma_mask = ATA_UDMA2, 404 .udma_mask = ATA_UDMA2,
411 }, 405 },
412 406
413 /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4), 407 /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4, 0),
414 /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4), 408 /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4, 0),
415 /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5), 409 /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5, IDE_HFLAG_RQSIZE_256),
416 /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5), 410 /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5, IDE_HFLAG_RQSIZE_256),
417}; 411};
418 412
419/** 413/**
@@ -427,7 +421,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
427 421
428static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) 422static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
429{ 423{
430 ide_pci_device_t *d; 424 const struct ide_port_info *d;
431 u8 idx = id->driver_data; 425 u8 idx = id->driver_data;
432 426
433 d = &pdc202xx_chipsets[idx]; 427 d = &pdc202xx_chipsets[idx];
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index ec0c6e96a213..9329d4a810e5 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -396,7 +396,7 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif)
396 .udma_mask = udma, \ 396 .udma_mask = udma, \
397 } 397 }
398 398
399static ide_pci_device_t piix_pci_info[] __devinitdata = { 399static const struct ide_port_info piix_pci_info[] __devinitdata = {
400 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */ 400 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */
401 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */ 401 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */
402 402
@@ -449,9 +449,7 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
449 449
450static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id) 450static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
451{ 451{
452 ide_pci_device_t *d = &piix_pci_info[id->driver_data]; 452 return ide_setup_pci_device(dev, &piix_pci_info[id->driver_data]);
453
454 return ide_setup_pci_device(dev, d);
455} 453}
456 454
457/** 455/**
diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c
index dd2583ef1ad7..6b10ae260fa2 100644
--- a/drivers/ide/pci/rz1000.c
+++ b/drivers/ide/pci/rz1000.c
@@ -35,13 +35,13 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
35 u16 reg; 35 u16 reg;
36 struct pci_dev *dev = hwif->pci_dev; 36 struct pci_dev *dev = hwif->pci_dev;
37 37
38 hwif->chipset = ide_rz1000;
39 if (!pci_read_config_word (dev, 0x40, &reg) && 38 if (!pci_read_config_word (dev, 0x40, &reg) &&
40 !pci_write_config_word(dev, 0x40, reg & 0xdfff)) { 39 !pci_write_config_word(dev, 0x40, reg & 0xdfff)) {
41 printk(KERN_INFO "%s: disabled chipset read-ahead " 40 printk(KERN_INFO "%s: disabled chipset read-ahead "
42 "(buggy RZ1000/RZ1001)\n", hwif->name); 41 "(buggy RZ1000/RZ1001)\n", hwif->name);
43 } else { 42 } else {
44 hwif->serialized = 1; 43 if (hwif->mate)
44 hwif->mate->serialized = hwif->serialized = 1;
45 hwif->drives[0].no_unmask = 1; 45 hwif->drives[0].no_unmask = 1;
46 hwif->drives[1].no_unmask = 1; 46 hwif->drives[1].no_unmask = 1;
47 printk(KERN_INFO "%s: serialized, disabled unmasking " 47 printk(KERN_INFO "%s: serialized, disabled unmasking "
@@ -49,9 +49,10 @@ static void __devinit init_hwif_rz1000 (ide_hwif_t *hwif)
49 } 49 }
50} 50}
51 51
52static ide_pci_device_t rz1000_chipset __devinitdata = { 52static const struct ide_port_info rz1000_chipset __devinitdata = {
53 .name = "RZ100x", 53 .name = "RZ100x",
54 .init_hwif = init_hwif_rz1000, 54 .init_hwif = init_hwif_rz1000,
55 .chipset = ide_rz1000,
55 .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE, 56 .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE,
56}; 57};
57 58
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index b2423e03bf36..d2c8b5524f28 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -372,7 +372,7 @@ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
372 hwif->ide_dma_end = &sc1200_ide_dma_end; 372 hwif->ide_dma_end = &sc1200_ide_dma_end;
373} 373}
374 374
375static ide_pci_device_t sc1200_chipset __devinitdata = { 375static const struct ide_port_info sc1200_chipset __devinitdata = {
376 .name = "SC1200", 376 .name = "SC1200",
377 .init_hwif = init_hwif_sc1200, 377 .init_hwif = init_hwif_sc1200,
378 .host_flags = IDE_HFLAG_SERIALIZE | 378 .host_flags = IDE_HFLAG_SERIALIZE |
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index ae9b50331d2a..ebb7132b9b84 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -538,12 +538,13 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
538/** 538/**
539 * init_setup_scc - set up an SCC PATA Controller 539 * init_setup_scc - set up an SCC PATA Controller
540 * @dev: PCI device 540 * @dev: PCI device
541 * @d: IDE PCI device 541 * @d: IDE port info
542 * 542 *
543 * Perform the initial set up for this device. 543 * Perform the initial set up for this device.
544 */ 544 */
545 545
546static int __devinit init_setup_scc(struct pci_dev *dev, ide_pci_device_t *d) 546static int __devinit init_setup_scc(struct pci_dev *dev,
547 const struct ide_port_info *d)
547{ 548{
548 unsigned long ctl_base; 549 unsigned long ctl_base;
549 unsigned long dma_base; 550 unsigned long dma_base;
@@ -702,7 +703,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
702 .pio_mask = ATA_PIO4, \ 703 .pio_mask = ATA_PIO4, \
703 } 704 }
704 705
705static ide_pci_device_t scc_chipsets[] __devinitdata = { 706static const struct ide_port_info scc_chipsets[] __devinitdata = {
706 /* 0 */ DECLARE_SCC_DEV("sccIDE"), 707 /* 0 */ DECLARE_SCC_DEV("sccIDE"),
707}; 708};
708 709
@@ -717,9 +718,7 @@ static ide_pci_device_t scc_chipsets[] __devinitdata = {
717 718
718static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id) 719static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id)
719{ 720{
720 ide_pci_device_t *d = &scc_chipsets[id->driver_data]; 721 return init_setup_scc(dev, &scc_chipsets[id->driver_data]);
721
722 return init_setup_scc(dev, d);
723} 722}
724 723
725/** 724/**
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index a3d880e21d0b..a7280311357b 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -158,13 +158,6 @@ static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
158 158
159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; 159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
160 160
161 /* If we are about to put a disk into UDMA mode we screwed up.
162 Our code assumes we never _ever_ do this on an OSB4 */
163
164 if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 &&
165 drive->media == ide_disk && speed >= XFER_UDMA_0)
166 BUG();
167
168 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing); 161 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
169 pci_read_config_byte(dev, 0x54, &ultra_enable); 162 pci_read_config_byte(dev, 0x54, &ultra_enable);
170 163
@@ -373,7 +366,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
373 } 366 }
374} 367}
375 368
376static ide_pci_device_t serverworks_chipsets[] __devinitdata = { 369static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
377 { /* 0 */ 370 { /* 0 */
378 .name = "SvrWks OSB4", 371 .name = "SvrWks OSB4",
379 .init_chipset = init_chipset_svwks, 372 .init_chipset = init_chipset_svwks,
@@ -430,7 +423,7 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
430 423
431static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id) 424static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id)
432{ 425{
433 ide_pci_device_t d; 426 struct ide_port_info d;
434 u8 idx = id->driver_data; 427 u8 idx = id->driver_data;
435 428
436 d = serverworks_chipsets[idx]; 429 d = serverworks_chipsets[idx];
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 5af74ea1d46e..de820aa58cd0 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -614,6 +614,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
614 void __iomem *virt_base; 614 void __iomem *virt_base;
615 ide_hwif_t *hwif; 615 ide_hwif_t *hwif;
616 int h; 616 int h;
617 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
617 618
618 /* 619 /*
619 * Find an empty HWIF; if none available, return -ENOMEM. 620 * Find an empty HWIF; if none available, return -ENOMEM.
@@ -654,10 +655,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
654 } 655 }
655 656
656 if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) { 657 if (hwif->io_ports[IDE_DATA_OFFSET] != cmd_base) {
658 hw_regs_t hw;
659
657 /* Initialize the IO registers */ 660 /* Initialize the IO registers */
658 sgiioc4_init_hwif_ports(&hwif->hw, cmd_base, ctl, irqport); 661 memset(&hw, 0, sizeof(hw));
659 memcpy(hwif->io_ports, hwif->hw.io_ports, 662 sgiioc4_init_hwif_ports(&hw, cmd_base, ctl, irqport);
660 sizeof (hwif->io_ports)); 663 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
661 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET]; 664 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
662 } 665 }
663 666
@@ -679,11 +682,10 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
679 682
680 ide_init_sgiioc4(hwif); 683 ide_init_sgiioc4(hwif);
681 684
682 if (probe_hwif_init(hwif)) 685 idx[0] = hwif->index;
683 return -EIO;
684 686
685 /* Create /proc/ide entries */ 687 if (ide_device_add(idx))
686 ide_proc_register_port(hwif); 688 return -EIO;
687 689
688 return 0; 690 return 0;
689} 691}
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 689786df1ede..dc915cb22bec 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/siimage.c Version 1.17 Oct 18 2007 2 * linux/drivers/ide/pci/siimage.c Version 1.18 Oct 18 2007
3 * 3 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
@@ -57,8 +57,8 @@
57 57
58static int pdev_is_sata(struct pci_dev *pdev) 58static int pdev_is_sata(struct pci_dev *pdev)
59{ 59{
60 switch(pdev->device) 60#ifdef CONFIG_BLK_DEV_IDE_SATA
61 { 61 switch(pdev->device) {
62 case PCI_DEVICE_ID_SII_3112: 62 case PCI_DEVICE_ID_SII_3112:
63 case PCI_DEVICE_ID_SII_1210SA: 63 case PCI_DEVICE_ID_SII_1210SA:
64 return 1; 64 return 1;
@@ -66,9 +66,10 @@ static int pdev_is_sata(struct pci_dev *pdev)
66 return 0; 66 return 0;
67 } 67 }
68 BUG(); 68 BUG();
69#endif
69 return 0; 70 return 0;
70} 71}
71 72
72/** 73/**
73 * is_sata - check if hwif is SATA 74 * is_sata - check if hwif is SATA
74 * @hwif: interface to check 75 * @hwif: interface to check
@@ -136,7 +137,7 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
136 * SI3112 SATA controller life is a bit simpler. 137 * SI3112 SATA controller life is a bit simpler.
137 */ 138 */
138 139
139static u8 sil_udma_filter(ide_drive_t *drive) 140static u8 sil_pata_udma_filter(ide_drive_t *drive)
140{ 141{
141 ide_hwif_t *hwif = drive->hwif; 142 ide_hwif_t *hwif = drive->hwif;
142 unsigned long base = (unsigned long) hwif->hwif_data; 143 unsigned long base = (unsigned long) hwif->hwif_data;
@@ -147,23 +148,23 @@ static u8 sil_udma_filter(ide_drive_t *drive)
147 else 148 else
148 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc); 149 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
149 150
150 if (is_sata(hwif)) {
151 mask = strstr(drive->id->model, "Maxtor") ? 0x3f : 0x7f;
152 goto out;
153 }
154
155 if ((scsc & 0x30) == 0x10) /* 133 */ 151 if ((scsc & 0x30) == 0x10) /* 133 */
156 mask = 0x7f; 152 mask = ATA_UDMA6;
157 else if ((scsc & 0x30) == 0x20) /* 2xPCI */ 153 else if ((scsc & 0x30) == 0x20) /* 2xPCI */
158 mask = 0x7f; 154 mask = ATA_UDMA6;
159 else if ((scsc & 0x30) == 0x00) /* 100 */ 155 else if ((scsc & 0x30) == 0x00) /* 100 */
160 mask = 0x3f; 156 mask = ATA_UDMA5;
161 else /* Disabled ? */ 157 else /* Disabled ? */
162 BUG(); 158 BUG();
163out: 159
164 return mask; 160 return mask;
165} 161}
166 162
163static u8 sil_sata_udma_filter(ide_drive_t *drive)
164{
165 return strstr(drive->id->model, "Maxtor") ? ATA_UDMA5 : ATA_UDMA6;
166}
167
167/** 168/**
168 * sil_set_pio_mode - set host controller for PIO mode 169 * sil_set_pio_mode - set host controller for PIO mode
169 * @drive: drive 170 * @drive: drive
@@ -340,10 +341,11 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
340static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) 341static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
341{ 342{
342 ide_hwif_t *hwif = HWIF(drive); 343 ide_hwif_t *hwif = HWIF(drive);
343 unsigned long base = (unsigned long)hwif->hwif_data;
344 unsigned long addr = siimage_selreg(hwif, 0x1); 344 unsigned long addr = siimage_selreg(hwif, 0x1);
345 345
346 if (SATA_ERROR_REG) { 346 if (SATA_ERROR_REG) {
347 unsigned long base = (unsigned long)hwif->hwif_data;
348
347 u32 ext_stat = readl((void __iomem *)(base + 0x10)); 349 u32 ext_stat = readl((void __iomem *)(base + 0x10));
348 u8 watchdog = 0; 350 u8 watchdog = 0;
349 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) { 351 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) {
@@ -376,7 +378,7 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
376} 378}
377 379
378/** 380/**
379 * siimage_busproc - bus isolation ioctl 381 * sil_sata_busproc - bus isolation IOCTL
380 * @drive: drive to isolate/restore 382 * @drive: drive to isolate/restore
381 * @state: bus state to set 383 * @state: bus state to set
382 * 384 *
@@ -384,8 +386,8 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
384 * SATA controller the work required is quite limited, we 386 * SATA controller the work required is quite limited, we
385 * just have to clean up the statistics 387 * just have to clean up the statistics
386 */ 388 */
387 389
388static int siimage_busproc (ide_drive_t * drive, int state) 390static int sil_sata_busproc(ide_drive_t * drive, int state)
389{ 391{
390 ide_hwif_t *hwif = HWIF(drive); 392 ide_hwif_t *hwif = HWIF(drive);
391 u32 stat_config = 0; 393 u32 stat_config = 0;
@@ -417,14 +419,14 @@ static int siimage_busproc (ide_drive_t * drive, int state)
417} 419}
418 420
419/** 421/**
420 * siimage_reset_poll - wait for sata reset 422 * sil_sata_reset_poll - wait for SATA reset
421 * @drive: drive we are resetting 423 * @drive: drive we are resetting
422 * 424 *
423 * Poll the SATA phy and see whether it has come back from the dead 425 * Poll the SATA phy and see whether it has come back from the dead
424 * yet. 426 * yet.
425 */ 427 */
426 428
427static int siimage_reset_poll (ide_drive_t *drive) 429static int sil_sata_reset_poll(ide_drive_t *drive)
428{ 430{
429 if (SATA_STATUS_REG) { 431 if (SATA_STATUS_REG) {
430 ide_hwif_t *hwif = HWIF(drive); 432 ide_hwif_t *hwif = HWIF(drive);
@@ -436,27 +438,22 @@ static int siimage_reset_poll (ide_drive_t *drive)
436 HWGROUP(drive)->polling = 0; 438 HWGROUP(drive)->polling = 0;
437 return ide_started; 439 return ide_started;
438 } 440 }
439 return 0;
440 } else {
441 return 0;
442 } 441 }
442
443 return 0;
443} 444}
444 445
445/** 446/**
446 * siimage_pre_reset - reset hook 447 * sil_sata_pre_reset - reset hook
447 * @drive: IDE device being reset 448 * @drive: IDE device being reset
448 * 449 *
449 * For the SATA devices we need to handle recalibration/geometry 450 * For the SATA devices we need to handle recalibration/geometry
450 * differently 451 * differently
451 */ 452 */
452
453static void siimage_pre_reset (ide_drive_t *drive)
454{
455 if (drive->media != ide_disk)
456 return;
457 453
458 if (is_sata(HWIF(drive))) 454static void sil_sata_pre_reset(ide_drive_t *drive)
459 { 455{
456 if (drive->media == ide_disk) {
460 drive->special.b.set_geometry = 0; 457 drive->special.b.set_geometry = 0;
461 drive->special.b.recalibrate = 0; 458 drive->special.b.recalibrate = 0;
462 } 459 }
@@ -502,7 +499,6 @@ static void siimage_reset (ide_drive_t *drive)
502 drive->failures++; 499 drive->failures++;
503 } 500 }
504 } 501 }
505
506} 502}
507 503
508/** 504/**
@@ -758,16 +754,11 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
758 hwif->sata_misc[SATA_IEN_OFFSET] = base + 0x148; 754 hwif->sata_misc[SATA_IEN_OFFSET] = base + 0x148;
759 } 755 }
760 756
761 hw.irq = hwif->pci_dev->irq; 757 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
762 758
763 memcpy(&hwif->hw, &hw, sizeof(hw)); 759 hwif->irq = dev->irq;
764 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports));
765 760
766 hwif->irq = hw.irq; 761 hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00);
767
768 base = (unsigned long) addr;
769
770 hwif->dma_base = base + (ch ? 0x08 : 0x00);
771 762
772 hwif->mmio = 1; 763 hwif->mmio = 1;
773} 764}
@@ -864,28 +855,31 @@ static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
864 855
865static void __devinit init_hwif_siimage(ide_hwif_t *hwif) 856static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
866{ 857{
858 u8 sata = is_sata(hwif);
859
867 hwif->resetproc = &siimage_reset; 860 hwif->resetproc = &siimage_reset;
868 hwif->set_pio_mode = &sil_set_pio_mode; 861 hwif->set_pio_mode = &sil_set_pio_mode;
869 hwif->set_dma_mode = &sil_set_dma_mode; 862 hwif->set_dma_mode = &sil_set_dma_mode;
870 hwif->reset_poll = &siimage_reset_poll;
871 hwif->pre_reset = &siimage_pre_reset;
872 hwif->udma_filter = &sil_udma_filter;
873 863
874 if(is_sata(hwif)) { 864 if (sata) {
875 static int first = 1; 865 static int first = 1;
876 866
877 hwif->busproc = &siimage_busproc; 867 hwif->busproc = &sil_sata_busproc;
868 hwif->reset_poll = &sil_sata_reset_poll;
869 hwif->pre_reset = &sil_sata_pre_reset;
870 hwif->udma_filter = &sil_sata_udma_filter;
878 871
879 if (first) { 872 if (first) {
880 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n"); 873 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n");
881 first = 0; 874 first = 0;
882 } 875 }
883 } 876 } else
877 hwif->udma_filter = &sil_pata_udma_filter;
884 878
885 if (hwif->dma_base == 0) 879 if (hwif->dma_base == 0)
886 return; 880 return;
887 881
888 if (is_sata(hwif)) 882 if (sata)
889 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 883 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
890 884
891 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 885 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
@@ -911,7 +905,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
911 .udma_mask = ATA_UDMA6, \ 905 .udma_mask = ATA_UDMA6, \
912 } 906 }
913 907
914static ide_pci_device_t siimage_chipsets[] __devinitdata = { 908static const struct ide_port_info siimage_chipsets[] __devinitdata = {
915 /* 0 */ DECLARE_SII_DEV("SiI680"), 909 /* 0 */ DECLARE_SII_DEV("SiI680"),
916 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA"), 910 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA"),
917 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA") 911 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA")
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index c1d280b06391..6b7bb53acefd 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -264,7 +264,7 @@ static void sis_ata133_program_timings(ide_drive_t *drive, const u8 mode)
264 if (mode >= XFER_MW_DMA_0) { 264 if (mode >= XFER_MW_DMA_0) {
265 t1 &= ~0x04; /* disable UDMA */ 265 t1 &= ~0x04; /* disable UDMA */
266 idx = mode - XFER_MW_DMA_0 + 5; 266 idx = mode - XFER_MW_DMA_0 + 5;
267 } 267 } else
268 idx = mode - XFER_PIO_0; 268 idx = mode - XFER_PIO_0;
269 t1 |= ini_time_value[clk][idx] << 12; 269 t1 |= ini_time_value[clk][idx] << 12;
270 t1 |= act_time_value[clk][idx] << 16; 270 t1 |= act_time_value[clk][idx] << 16;
@@ -579,7 +579,7 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
579 hwif->cbl = ata66_sis5513(hwif); 579 hwif->cbl = ata66_sis5513(hwif);
580} 580}
581 581
582static ide_pci_device_t sis5513_chipset __devinitdata = { 582static const struct ide_port_info sis5513_chipset __devinitdata = {
583 .name = "SIS5513", 583 .name = "SIS5513",
584 .init_chipset = init_chipset_sis5513, 584 .init_chipset = init_chipset_sis5513,
585 .init_hwif = init_hwif_sis5513, 585 .init_hwif = init_hwif_sis5513,
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 0dce459b1269..147d783f7529 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -361,13 +361,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
361 hwif->selectproc = &sl82c105_selectproc; 361 hwif->selectproc = &sl82c105_selectproc;
362 hwif->resetproc = &sl82c105_resetproc; 362 hwif->resetproc = &sl82c105_resetproc;
363 363
364 /*
365 * We support 32-bit I/O on this interface, and
366 * it doesn't have problems with interrupts.
367 */
368 hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1;
369 hwif->drives[0].unmask = hwif->drives[1].unmask = 1;
370
371 if (!hwif->dma_base) 364 if (!hwif->dma_base)
372 return; 365 return;
373 366
@@ -394,12 +387,15 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
394 hwif->serialized = hwif->mate->serialized = 1; 387 hwif->serialized = hwif->mate->serialized = 1;
395} 388}
396 389
397static ide_pci_device_t sl82c105_chipset __devinitdata = { 390static const struct ide_port_info sl82c105_chipset __devinitdata = {
398 .name = "W82C105", 391 .name = "W82C105",
399 .init_chipset = init_chipset_sl82c105, 392 .init_chipset = init_chipset_sl82c105,
400 .init_hwif = init_hwif_sl82c105, 393 .init_hwif = init_hwif_sl82c105,
401 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, 394 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
402 .host_flags = IDE_HFLAG_NO_AUTODMA | IDE_HFLAG_BOOTABLE, 395 .host_flags = IDE_HFLAG_IO_32BIT |
396 IDE_HFLAG_UNMASK_IRQS |
397 IDE_HFLAG_NO_AUTODMA |
398 IDE_HFLAG_BOOTABLE,
403 .pio_mask = ATA_PIO5, 399 .pio_mask = ATA_PIO5,
404}; 400};
405 401
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 4f22dffdf8ef..eb4445b229ed 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/slc90e66.c Version 0.18 Aug 9, 2007 2 * linux/drivers/ide/pci/slc90e66.c Version 0.19 Sep 24, 2007
3 * 3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
@@ -21,6 +21,8 @@
21 21
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24static DEFINE_SPINLOCK(slc90e66_lock);
25
24static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 26static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
25{ 27{
26 ide_hwif_t *hwif = HWIF(drive); 28 ide_hwif_t *hwif = HWIF(drive);
@@ -40,7 +42,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
40 { 2, 1 }, 42 { 2, 1 },
41 { 2, 3 }, }; 43 { 2, 3 }, };
42 44
43 spin_lock_irqsave(&ide_lock, flags); 45 spin_lock_irqsave(&slc90e66_lock, flags);
44 pci_read_config_word(dev, master_port, &master_data); 46 pci_read_config_word(dev, master_port, &master_data);
45 47
46 if (pio > 1) 48 if (pio > 1)
@@ -71,7 +73,7 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
71 pci_write_config_word(dev, master_port, master_data); 73 pci_write_config_word(dev, master_port, master_data);
72 if (is_slave) 74 if (is_slave)
73 pci_write_config_byte(dev, slave_port, slave_data); 75 pci_write_config_byte(dev, slave_port, slave_data);
74 spin_unlock_irqrestore(&ide_lock, flags); 76 spin_unlock_irqrestore(&slc90e66_lock, flags);
75} 77}
76 78
77static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed) 79static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
@@ -146,7 +148,7 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
146 hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 148 hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
147} 149}
148 150
149static ide_pci_device_t slc90e66_chipset __devinitdata = { 151static const struct ide_port_info slc90e66_chipset __devinitdata = {
150 .name = "SLC90E66", 152 .name = "SLC90E66",
151 .init_hwif = init_hwif_slc90e66, 153 .init_hwif = init_hwif_slc90e66,
152 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 154 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 631506e9b5d2..a66ebd14664e 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -218,7 +218,7 @@ static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
218 return err; 218 return err;
219} 219}
220 220
221static ide_pci_device_t tc86c001_chipset __devinitdata = { 221static const struct ide_port_info tc86c001_chipset __devinitdata = {
222 .name = "TC86C001", 222 .name = "TC86C001",
223 .init_chipset = init_chipset_tc86c001, 223 .init_chipset = init_chipset_tc86c001,
224 .init_hwif = init_hwif_tc86c001, 224 .init_hwif = init_hwif_tc86c001,
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 30b52f62699a..a227c41d23a3 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -102,7 +102,7 @@ static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
102 hwif->set_dma_mode = &triflex_set_mode; 102 hwif->set_dma_mode = &triflex_set_mode;
103} 103}
104 104
105static ide_pci_device_t triflex_device __devinitdata = { 105static const struct ide_port_info triflex_device __devinitdata = {
106 .name = "TRIFLEX", 106 .name = "TRIFLEX",
107 .init_hwif = init_hwif_triflex, 107 .init_hwif = init_hwif_triflex,
108 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, 108 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 140d486f6237..5011ba22e36c 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -250,7 +250,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
250 u8 reg = 0; 250 u8 reg = 0;
251 struct pci_dev *dev = hwif->pci_dev; 251 struct pci_dev *dev = hwif->pci_dev;
252 252
253 hwif->chipset = ide_trm290;
254 cfgbase = pci_resource_start(dev, 4); 253 cfgbase = pci_resource_start(dev, 4);
255 if ((dev->class & 5) && cfgbase) { 254 if ((dev->class & 5) && cfgbase) {
256 hwif->config_data = cfgbase; 255 hwif->config_data = cfgbase;
@@ -320,9 +319,10 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
320#endif 319#endif
321} 320}
322 321
323static ide_pci_device_t trm290_chipset __devinitdata = { 322static const struct ide_port_info trm290_chipset __devinitdata = {
324 .name = "TRM290", 323 .name = "TRM290",
325 .init_hwif = init_hwif_trm290, 324 .init_hwif = init_hwif_trm290,
325 .chipset = ide_trm290,
326 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 326 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
327#if 0 /* play it safe for now */ 327#if 0 /* play it safe for now */
328 IDE_HFLAG_TRUST_BIOS_FOR_DMA | 328 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index c8022a92a0e3..a0d3c16b68ec 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * 2 *
3 * Version 3.49 3 * Version 3.50
4 * 4 *
5 * VIA IDE driver for Linux. Supported southbridges: 5 * VIA IDE driver for Linux. Supported southbridges:
6 * 6 *
@@ -422,65 +422,40 @@ static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
422 422
423static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) 423static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
424{ 424{
425 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
426 int i;
427
428 hwif->set_pio_mode = &via_set_pio_mode; 425 hwif->set_pio_mode = &via_set_pio_mode;
429 hwif->set_dma_mode = &via_set_drive; 426 hwif->set_dma_mode = &via_set_drive;
430 427
431#ifdef CONFIG_PPC_CHRP
432 if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
433 hwif->irq = hwif->channel ? 15 : 14;
434 }
435#endif
436
437 for (i = 0; i < 2; i++) {
438 hwif->drives[i].io_32bit = 1;
439 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
440 }
441
442 if (!hwif->dma_base) 428 if (!hwif->dma_base)
443 return; 429 return;
444 430
445 hwif->ultra_mask = vdev->via_config->udma_mask;
446
447 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 431 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
448 hwif->cbl = via82cxxx_cable_detect(hwif); 432 hwif->cbl = via82cxxx_cable_detect(hwif);
449} 433}
450 434
451static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { 435static const struct ide_port_info via82cxxx_chipset __devinitdata = {
452 { /* 0 */ 436 .name = "VP_IDE",
453 .name = "VP_IDE", 437 .init_chipset = init_chipset_via82cxxx,
454 .init_chipset = init_chipset_via82cxxx, 438 .init_hwif = init_hwif_via82cxxx,
455 .init_hwif = init_hwif_via82cxxx, 439 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
456 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 440 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
457 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | 441 IDE_HFLAG_PIO_NO_DOWNGRADE |
458 IDE_HFLAG_PIO_NO_DOWNGRADE | 442 IDE_HFLAG_POST_SET_MODE |
459 IDE_HFLAG_POST_SET_MODE | 443 IDE_HFLAG_IO_32BIT |
460 IDE_HFLAG_NO_AUTODMA | 444 IDE_HFLAG_BOOTABLE,
461 IDE_HFLAG_BOOTABLE, 445 .pio_mask = ATA_PIO5,
462 .pio_mask = ATA_PIO5, 446 .swdma_mask = ATA_SWDMA2,
463 .swdma_mask = ATA_SWDMA2, 447 .mwdma_mask = ATA_MWDMA2,
464 .mwdma_mask = ATA_MWDMA2,
465 },{ /* 1 */
466 .name = "VP_IDE",
467 .init_chipset = init_chipset_via82cxxx,
468 .init_hwif = init_hwif_via82cxxx,
469 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
470 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
471 IDE_HFLAG_PIO_NO_DOWNGRADE |
472 IDE_HFLAG_POST_SET_MODE |
473 IDE_HFLAG_BOOTABLE,
474 .pio_mask = ATA_PIO5,
475 .swdma_mask = ATA_SWDMA2,
476 .mwdma_mask = ATA_MWDMA2,
477 }
478}; 448};
479 449
480static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id) 450static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
481{ 451{
482 struct pci_dev *isa = NULL; 452 struct pci_dev *isa = NULL;
483 struct via_isa_bridge *via_config; 453 struct via_isa_bridge *via_config;
454 u8 idx = id->driver_data;
455 struct ide_port_info d;
456
457 d = via82cxxx_chipset;
458
484 /* 459 /*
485 * Find the ISA bridge and check we know what it is. 460 * Find the ISA bridge and check we know what it is.
486 */ 461 */
@@ -490,7 +465,23 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
490 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n"); 465 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
491 return -ENODEV; 466 return -ENODEV;
492 } 467 }
493 return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]); 468
469 if (idx == 0)
470 d.host_flags |= IDE_HFLAG_NO_AUTODMA;
471 else
472 d.enablebits[1].reg = d.enablebits[0].reg = 0;
473
474 if ((via_config->flags & VIA_NO_UNMASK) == 0)
475 d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
476
477#ifdef CONFIG_PPC_CHRP
478 if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
479 d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
480#endif
481
482 d.udma_mask = via_config->udma_mask;
483
484 return ide_setup_pci_device(dev, &d);
494} 485}
495 486
496static const struct pci_device_id via_pci_tbl[] = { 487static const struct pci_device_id via_pci_tbl[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 12:27:58 -0500