diff options
Diffstat (limited to 'drivers/ide/pci')
33 files changed, 355 insertions, 379 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index cfb3265bc1a8..c9ba15afe97d 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c | |||
@@ -220,7 +220,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { | |||
220 | .init_hwif = init_hwif_aec62xx, | 220 | .init_hwif = init_hwif_aec62xx, |
221 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, | 221 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, |
222 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | | 222 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | |
223 | IDE_HFLAG_ABUSE_SET_DMA_MODE, | 223 | IDE_HFLAG_ABUSE_SET_DMA_MODE | |
224 | IDE_HFLAG_NON_BOOTABLE, | ||
224 | .pio_mask = ATA_PIO4, | 225 | .pio_mask = ATA_PIO4, |
225 | .mwdma_mask = ATA_MWDMA2, | 226 | .mwdma_mask = ATA_MWDMA2, |
226 | .udma_mask = ATA_UDMA4, | 227 | .udma_mask = ATA_UDMA4, |
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index b3b6f514ce2d..3fa2d9f7b1b2 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c | |||
@@ -750,7 +750,6 @@ static const struct ide_port_info ali15x3_chipset __devinitdata = { | |||
750 | .init_chipset = init_chipset_ali15x3, | 750 | .init_chipset = init_chipset_ali15x3, |
751 | .init_hwif = init_hwif_ali15x3, | 751 | .init_hwif = init_hwif_ali15x3, |
752 | .init_dma = init_dma_ali15x3, | 752 | .init_dma = init_dma_ali15x3, |
753 | .host_flags = IDE_HFLAG_BOOTABLE, | ||
754 | .pio_mask = ATA_PIO5, | 753 | .pio_mask = ATA_PIO5, |
755 | .swdma_mask = ATA_SWDMA2, | 754 | .swdma_mask = ATA_SWDMA2, |
756 | .mwdma_mask = ATA_MWDMA2, | 755 | .mwdma_mask = ATA_MWDMA2, |
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 2ef890ce8097..ff684d312378 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c | |||
@@ -219,12 +219,10 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
219 | 219 | ||
220 | #define IDE_HFLAGS_AMD \ | 220 | #define IDE_HFLAGS_AMD \ |
221 | (IDE_HFLAG_PIO_NO_BLACKLIST | \ | 221 | (IDE_HFLAG_PIO_NO_BLACKLIST | \ |
222 | IDE_HFLAG_PIO_NO_DOWNGRADE | \ | ||
223 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | 222 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ |
224 | IDE_HFLAG_POST_SET_MODE | \ | 223 | IDE_HFLAG_POST_SET_MODE | \ |
225 | IDE_HFLAG_IO_32BIT | \ | 224 | IDE_HFLAG_IO_32BIT | \ |
226 | IDE_HFLAG_UNMASK_IRQS | \ | 225 | IDE_HFLAG_UNMASK_IRQS) |
227 | IDE_HFLAG_BOOTABLE) | ||
228 | 226 | ||
229 | #define DECLARE_AMD_DEV(name_str, swdma, udma) \ | 227 | #define DECLARE_AMD_DEV(name_str, swdma, udma) \ |
230 | { \ | 228 | { \ |
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 7e037c880cb0..91722f88b7bd 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c | |||
@@ -151,7 +151,7 @@ static const struct ide_port_info atiixp_pci_info[] __devinitdata = { | |||
151 | .name = "ATIIXP", | 151 | .name = "ATIIXP", |
152 | .init_hwif = init_hwif_atiixp, | 152 | .init_hwif = init_hwif_atiixp, |
153 | .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, | 153 | .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, |
154 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, | 154 | .host_flags = IDE_HFLAG_LEGACY_IRQS, |
155 | .pio_mask = ATA_PIO4, | 155 | .pio_mask = ATA_PIO4, |
156 | .mwdma_mask = ATA_MWDMA2, | 156 | .mwdma_mask = ATA_MWDMA2, |
157 | .udma_mask = ATA_UDMA5, | 157 | .udma_mask = ATA_UDMA5, |
@@ -159,8 +159,7 @@ static const struct ide_port_info atiixp_pci_info[] __devinitdata = { | |||
159 | .name = "SB600_PATA", | 159 | .name = "SB600_PATA", |
160 | .init_hwif = init_hwif_atiixp, | 160 | .init_hwif = init_hwif_atiixp, |
161 | .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, | 161 | .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, |
162 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS | | 162 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS, |
163 | IDE_HFLAG_BOOTABLE, | ||
164 | .pio_mask = ATA_PIO4, | 163 | .pio_mask = ATA_PIO4, |
165 | .mwdma_mask = ATA_MWDMA2, | 164 | .mwdma_mask = ATA_MWDMA2, |
166 | .udma_mask = ATA_UDMA5, | 165 | .udma_mask = ATA_UDMA5, |
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c index a1cfe033a55f..b076dbfc43a7 100644 --- a/drivers/ide/pci/cmd640.c +++ b/drivers/ide/pci/cmd640.c | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | /* | 5 | /* |
6 | * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov) | 6 | * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov) |
7 | * mlord@pobox.com (Mark Lord) | 7 | * mlord@pobox.com (Mark Lord) |
8 | * | 8 | * |
9 | * See linux/MAINTAINERS for address of current maintainer. | 9 | * See linux/MAINTAINERS for address of current maintainer. |
10 | * | 10 | * |
@@ -98,7 +98,7 @@ | |||
98 | 98 | ||
99 | #define CMD640_PREFETCH_MASKS 1 | 99 | #define CMD640_PREFETCH_MASKS 1 |
100 | 100 | ||
101 | //#define CMD640_DUMP_REGS | 101 | /*#define CMD640_DUMP_REGS */ |
102 | 102 | ||
103 | #include <linux/types.h> | 103 | #include <linux/types.h> |
104 | #include <linux/kernel.h> | 104 | #include <linux/kernel.h> |
@@ -112,7 +112,7 @@ | |||
112 | /* | 112 | /* |
113 | * This flag is set in ide.c by the parameter: ide0=cmd640_vlb | 113 | * This flag is set in ide.c by the parameter: ide0=cmd640_vlb |
114 | */ | 114 | */ |
115 | int cmd640_vlb = 0; | 115 | int cmd640_vlb; |
116 | 116 | ||
117 | /* | 117 | /* |
118 | * CMD640 specific registers definition. | 118 | * CMD640 specific registers definition. |
@@ -185,7 +185,6 @@ static DEFINE_SPINLOCK(cmd640_lock); | |||
185 | * These are initialized to point at the devices we control | 185 | * These are initialized to point at the devices we control |
186 | */ | 186 | */ |
187 | static ide_hwif_t *cmd_hwif0, *cmd_hwif1; | 187 | static ide_hwif_t *cmd_hwif0, *cmd_hwif1; |
188 | static ide_drive_t *cmd_drives[4]; | ||
189 | 188 | ||
190 | /* | 189 | /* |
191 | * Interface to access cmd640x registers | 190 | * Interface to access cmd640x registers |
@@ -207,13 +206,13 @@ static unsigned int cmd640_chip_version; | |||
207 | 206 | ||
208 | /* PCI method 1 access */ | 207 | /* PCI method 1 access */ |
209 | 208 | ||
210 | static void put_cmd640_reg_pci1 (u16 reg, u8 val) | 209 | static void put_cmd640_reg_pci1(u16 reg, u8 val) |
211 | { | 210 | { |
212 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); | 211 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); |
213 | outb_p(val, (reg & 3) | 0xcfc); | 212 | outb_p(val, (reg & 3) | 0xcfc); |
214 | } | 213 | } |
215 | 214 | ||
216 | static u8 get_cmd640_reg_pci1 (u16 reg) | 215 | static u8 get_cmd640_reg_pci1(u16 reg) |
217 | { | 216 | { |
218 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); | 217 | outl_p((reg & 0xfc) | cmd640_key, 0xcf8); |
219 | return inb_p((reg & 3) | 0xcfc); | 218 | return inb_p((reg & 3) | 0xcfc); |
@@ -221,14 +220,14 @@ static u8 get_cmd640_reg_pci1 (u16 reg) | |||
221 | 220 | ||
222 | /* PCI method 2 access (from CMD datasheet) */ | 221 | /* PCI method 2 access (from CMD datasheet) */ |
223 | 222 | ||
224 | static void put_cmd640_reg_pci2 (u16 reg, u8 val) | 223 | static void put_cmd640_reg_pci2(u16 reg, u8 val) |
225 | { | 224 | { |
226 | outb_p(0x10, 0xcf8); | 225 | outb_p(0x10, 0xcf8); |
227 | outb_p(val, cmd640_key + reg); | 226 | outb_p(val, cmd640_key + reg); |
228 | outb_p(0, 0xcf8); | 227 | outb_p(0, 0xcf8); |
229 | } | 228 | } |
230 | 229 | ||
231 | static u8 get_cmd640_reg_pci2 (u16 reg) | 230 | static u8 get_cmd640_reg_pci2(u16 reg) |
232 | { | 231 | { |
233 | u8 b; | 232 | u8 b; |
234 | 233 | ||
@@ -240,13 +239,13 @@ static u8 get_cmd640_reg_pci2 (u16 reg) | |||
240 | 239 | ||
241 | /* VLB access */ | 240 | /* VLB access */ |
242 | 241 | ||
243 | static void put_cmd640_reg_vlb (u16 reg, u8 val) | 242 | static void put_cmd640_reg_vlb(u16 reg, u8 val) |
244 | { | 243 | { |
245 | outb_p(reg, cmd640_key); | 244 | outb_p(reg, cmd640_key); |
246 | outb_p(val, cmd640_key + 4); | 245 | outb_p(val, cmd640_key + 4); |
247 | } | 246 | } |
248 | 247 | ||
249 | static u8 get_cmd640_reg_vlb (u16 reg) | 248 | static u8 get_cmd640_reg_vlb(u16 reg) |
250 | { | 249 | { |
251 | outb_p(reg, cmd640_key); | 250 | outb_p(reg, cmd640_key); |
252 | return inb_p(cmd640_key + 4); | 251 | return inb_p(cmd640_key + 4); |
@@ -268,11 +267,11 @@ static void put_cmd640_reg(u16 reg, u8 val) | |||
268 | unsigned long flags; | 267 | unsigned long flags; |
269 | 268 | ||
270 | spin_lock_irqsave(&cmd640_lock, flags); | 269 | spin_lock_irqsave(&cmd640_lock, flags); |
271 | __put_cmd640_reg(reg,val); | 270 | __put_cmd640_reg(reg, val); |
272 | spin_unlock_irqrestore(&cmd640_lock, flags); | 271 | spin_unlock_irqrestore(&cmd640_lock, flags); |
273 | } | 272 | } |
274 | 273 | ||
275 | static int __init match_pci_cmd640_device (void) | 274 | static int __init match_pci_cmd640_device(void) |
276 | { | 275 | { |
277 | const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06}; | 276 | const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06}; |
278 | unsigned int i; | 277 | unsigned int i; |
@@ -292,7 +291,7 @@ static int __init match_pci_cmd640_device (void) | |||
292 | /* | 291 | /* |
293 | * Probe for CMD640x -- pci method 1 | 292 | * Probe for CMD640x -- pci method 1 |
294 | */ | 293 | */ |
295 | static int __init probe_for_cmd640_pci1 (void) | 294 | static int __init probe_for_cmd640_pci1(void) |
296 | { | 295 | { |
297 | __get_cmd640_reg = get_cmd640_reg_pci1; | 296 | __get_cmd640_reg = get_cmd640_reg_pci1; |
298 | __put_cmd640_reg = put_cmd640_reg_pci1; | 297 | __put_cmd640_reg = put_cmd640_reg_pci1; |
@@ -308,7 +307,7 @@ static int __init probe_for_cmd640_pci1 (void) | |||
308 | /* | 307 | /* |
309 | * Probe for CMD640x -- pci method 2 | 308 | * Probe for CMD640x -- pci method 2 |
310 | */ | 309 | */ |
311 | static int __init probe_for_cmd640_pci2 (void) | 310 | static int __init probe_for_cmd640_pci2(void) |
312 | { | 311 | { |
313 | __get_cmd640_reg = get_cmd640_reg_pci2; | 312 | __get_cmd640_reg = get_cmd640_reg_pci2; |
314 | __put_cmd640_reg = put_cmd640_reg_pci2; | 313 | __put_cmd640_reg = put_cmd640_reg_pci2; |
@@ -322,7 +321,7 @@ static int __init probe_for_cmd640_pci2 (void) | |||
322 | /* | 321 | /* |
323 | * Probe for CMD640x -- vlb | 322 | * Probe for CMD640x -- vlb |
324 | */ | 323 | */ |
325 | static int __init probe_for_cmd640_vlb (void) | 324 | static int __init probe_for_cmd640_vlb(void) |
326 | { | 325 | { |
327 | u8 b; | 326 | u8 b; |
328 | 327 | ||
@@ -343,7 +342,7 @@ static int __init probe_for_cmd640_vlb (void) | |||
343 | * Returns 1 if an IDE interface/drive exists at 0x170, | 342 | * Returns 1 if an IDE interface/drive exists at 0x170, |
344 | * Returns 0 otherwise. | 343 | * Returns 0 otherwise. |
345 | */ | 344 | */ |
346 | static int __init secondary_port_responding (void) | 345 | static int __init secondary_port_responding(void) |
347 | { | 346 | { |
348 | unsigned long flags; | 347 | unsigned long flags; |
349 | 348 | ||
@@ -367,7 +366,7 @@ static int __init secondary_port_responding (void) | |||
367 | /* | 366 | /* |
368 | * Dump out all cmd640 registers. May be called from ide.c | 367 | * Dump out all cmd640 registers. May be called from ide.c |
369 | */ | 368 | */ |
370 | static void cmd640_dump_regs (void) | 369 | static void cmd640_dump_regs(void) |
371 | { | 370 | { |
372 | unsigned int reg = cmd640_vlb ? 0x50 : 0x00; | 371 | unsigned int reg = cmd640_vlb ? 0x50 : 0x00; |
373 | 372 | ||
@@ -386,9 +385,8 @@ static void cmd640_dump_regs (void) | |||
386 | * Check whether prefetch is on for a drive, | 385 | * Check whether prefetch is on for a drive, |
387 | * and initialize the unmask flags for safe operation. | 386 | * and initialize the unmask flags for safe operation. |
388 | */ | 387 | */ |
389 | static void __init check_prefetch (unsigned int index) | 388 | static void __init check_prefetch(ide_drive_t *drive, unsigned int index) |
390 | { | 389 | { |
391 | ide_drive_t *drive = cmd_drives[index]; | ||
392 | u8 b = get_cmd640_reg(prefetch_regs[index]); | 390 | u8 b = get_cmd640_reg(prefetch_regs[index]); |
393 | 391 | ||
394 | if (b & prefetch_masks[index]) { /* is prefetch off? */ | 392 | if (b & prefetch_masks[index]) { /* is prefetch off? */ |
@@ -404,28 +402,13 @@ static void __init check_prefetch (unsigned int index) | |||
404 | } | 402 | } |
405 | } | 403 | } |
406 | 404 | ||
407 | /* | ||
408 | * Figure out which devices we control | ||
409 | */ | ||
410 | static void __init setup_device_ptrs (void) | ||
411 | { | ||
412 | cmd_hwif0 = &ide_hwifs[0]; | ||
413 | cmd_hwif1 = &ide_hwifs[1]; | ||
414 | |||
415 | cmd_drives[0] = &cmd_hwif0->drives[0]; | ||
416 | cmd_drives[1] = &cmd_hwif0->drives[1]; | ||
417 | cmd_drives[2] = &cmd_hwif1->drives[0]; | ||
418 | cmd_drives[3] = &cmd_hwif1->drives[1]; | ||
419 | } | ||
420 | |||
421 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | 405 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED |
422 | 406 | ||
423 | /* | 407 | /* |
424 | * Sets prefetch mode for a drive. | 408 | * Sets prefetch mode for a drive. |
425 | */ | 409 | */ |
426 | static void set_prefetch_mode (unsigned int index, int mode) | 410 | static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode) |
427 | { | 411 | { |
428 | ide_drive_t *drive = cmd_drives[index]; | ||
429 | unsigned long flags; | 412 | unsigned long flags; |
430 | int reg = prefetch_regs[index]; | 413 | int reg = prefetch_regs[index]; |
431 | u8 b; | 414 | u8 b; |
@@ -452,7 +435,7 @@ static void set_prefetch_mode (unsigned int index, int mode) | |||
452 | /* | 435 | /* |
453 | * Dump out current drive clocks settings | 436 | * Dump out current drive clocks settings |
454 | */ | 437 | */ |
455 | static void display_clocks (unsigned int index) | 438 | static void display_clocks(unsigned int index) |
456 | { | 439 | { |
457 | u8 active_count, recovery_count; | 440 | u8 active_count, recovery_count; |
458 | 441 | ||
@@ -471,7 +454,7 @@ static void display_clocks (unsigned int index) | |||
471 | * Pack active and recovery counts into single byte representation | 454 | * Pack active and recovery counts into single byte representation |
472 | * used by controller | 455 | * used by controller |
473 | */ | 456 | */ |
474 | static inline u8 pack_nibbles (u8 upper, u8 lower) | 457 | static inline u8 pack_nibbles(u8 upper, u8 lower) |
475 | { | 458 | { |
476 | return ((upper & 0x0f) << 4) | (lower & 0x0f); | 459 | return ((upper & 0x0f) << 4) | (lower & 0x0f); |
477 | } | 460 | } |
@@ -479,7 +462,7 @@ static inline u8 pack_nibbles (u8 upper, u8 lower) | |||
479 | /* | 462 | /* |
480 | * This routine retrieves the initial drive timings from the chipset. | 463 | * This routine retrieves the initial drive timings from the chipset. |
481 | */ | 464 | */ |
482 | static void __init retrieve_drive_counts (unsigned int index) | 465 | static void __init retrieve_drive_counts(unsigned int index) |
483 | { | 466 | { |
484 | u8 b; | 467 | u8 b; |
485 | 468 | ||
@@ -488,10 +471,10 @@ static void __init retrieve_drive_counts (unsigned int index) | |||
488 | */ | 471 | */ |
489 | b = get_cmd640_reg(arttim_regs[index]) & ~0x3f; | 472 | b = get_cmd640_reg(arttim_regs[index]) & ~0x3f; |
490 | switch (b) { | 473 | switch (b) { |
491 | case 0x00: b = 4; break; | 474 | case 0x00: b = 4; break; |
492 | case 0x80: b = 3; break; | 475 | case 0x80: b = 3; break; |
493 | case 0x40: b = 2; break; | 476 | case 0x40: b = 2; break; |
494 | default: b = 5; break; | 477 | default: b = 5; break; |
495 | } | 478 | } |
496 | setup_counts[index] = b; | 479 | setup_counts[index] = b; |
497 | 480 | ||
@@ -508,7 +491,7 @@ static void __init retrieve_drive_counts (unsigned int index) | |||
508 | * This routine writes the prepared setup/active/recovery counts | 491 | * This routine writes the prepared setup/active/recovery counts |
509 | * for a drive into the cmd640 chipset registers to active them. | 492 | * for a drive into the cmd640 chipset registers to active them. |
510 | */ | 493 | */ |
511 | static void program_drive_counts (unsigned int index) | 494 | static void program_drive_counts(ide_drive_t *drive, unsigned int index) |
512 | { | 495 | { |
513 | unsigned long flags; | 496 | unsigned long flags; |
514 | u8 setup_count = setup_counts[index]; | 497 | u8 setup_count = setup_counts[index]; |
@@ -522,8 +505,11 @@ static void program_drive_counts (unsigned int index) | |||
522 | * so we merge the timings, using the slowest value for each timing. | 505 | * so we merge the timings, using the slowest value for each timing. |
523 | */ | 506 | */ |
524 | if (index > 1) { | 507 | if (index > 1) { |
525 | unsigned int mate; | 508 | ide_hwif_t *hwif = drive->hwif; |
526 | if (cmd_drives[mate = index ^ 1]->present) { | 509 | ide_drive_t *peer = &hwif->drives[!drive->select.b.unit]; |
510 | unsigned int mate = index ^ 1; | ||
511 | |||
512 | if (peer->present) { | ||
527 | if (setup_count < setup_counts[mate]) | 513 | if (setup_count < setup_counts[mate]) |
528 | setup_count = setup_counts[mate]; | 514 | setup_count = setup_counts[mate]; |
529 | if (active_count < active_counts[mate]) | 515 | if (active_count < active_counts[mate]) |
@@ -537,11 +523,11 @@ static void program_drive_counts (unsigned int index) | |||
537 | * Convert setup_count to internal chipset representation | 523 | * Convert setup_count to internal chipset representation |
538 | */ | 524 | */ |
539 | switch (setup_count) { | 525 | switch (setup_count) { |
540 | case 4: setup_count = 0x00; break; | 526 | case 4: setup_count = 0x00; break; |
541 | case 3: setup_count = 0x80; break; | 527 | case 3: setup_count = 0x80; break; |
542 | case 1: | 528 | case 1: |
543 | case 2: setup_count = 0x40; break; | 529 | case 2: setup_count = 0x40; break; |
544 | default: setup_count = 0xc0; /* case 5 */ | 530 | default: setup_count = 0xc0; /* case 5 */ |
545 | } | 531 | } |
546 | 532 | ||
547 | /* | 533 | /* |
@@ -562,7 +548,8 @@ static void program_drive_counts (unsigned int index) | |||
562 | /* | 548 | /* |
563 | * Set a specific pio_mode for a drive | 549 | * Set a specific pio_mode for a drive |
564 | */ | 550 | */ |
565 | static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle_time) | 551 | static void cmd640_set_mode(ide_drive_t *drive, unsigned int index, |
552 | u8 pio_mode, unsigned int cycle_time) | ||
566 | { | 553 | { |
567 | int setup_time, active_time, recovery_time, clock_time; | 554 | int setup_time, active_time, recovery_time, clock_time; |
568 | u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count; | 555 | u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count; |
@@ -574,15 +561,15 @@ static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle | |||
574 | active_time = ide_pio_timings[pio_mode].active_time; | 561 | active_time = ide_pio_timings[pio_mode].active_time; |
575 | recovery_time = cycle_time - (setup_time + active_time); | 562 | recovery_time = cycle_time - (setup_time + active_time); |
576 | clock_time = 1000 / bus_speed; | 563 | clock_time = 1000 / bus_speed; |
577 | cycle_count = (cycle_time + clock_time - 1) / clock_time; | 564 | cycle_count = DIV_ROUND_UP(cycle_time, clock_time); |
578 | 565 | ||
579 | setup_count = (setup_time + clock_time - 1) / clock_time; | 566 | setup_count = DIV_ROUND_UP(setup_time, clock_time); |
580 | 567 | ||
581 | active_count = (active_time + clock_time - 1) / clock_time; | 568 | active_count = DIV_ROUND_UP(active_time, clock_time); |
582 | if (active_count < 2) | 569 | if (active_count < 2) |
583 | active_count = 2; /* minimum allowed by cmd640 */ | 570 | active_count = 2; /* minimum allowed by cmd640 */ |
584 | 571 | ||
585 | recovery_count = (recovery_time + clock_time - 1) / clock_time; | 572 | recovery_count = DIV_ROUND_UP(recovery_time, clock_time); |
586 | recovery_count2 = cycle_count - (setup_count + active_count); | 573 | recovery_count2 = cycle_count - (setup_count + active_count); |
587 | if (recovery_count2 > recovery_count) | 574 | if (recovery_count2 > recovery_count) |
588 | recovery_count = recovery_count2; | 575 | recovery_count = recovery_count2; |
@@ -611,7 +598,7 @@ static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle | |||
611 | * 1) this is the wrong place to do it (proper is do_special() in ide.c) | 598 | * 1) this is the wrong place to do it (proper is do_special() in ide.c) |
612 | * 2) in practice this is rarely, if ever, necessary | 599 | * 2) in practice this is rarely, if ever, necessary |
613 | */ | 600 | */ |
614 | program_drive_counts (index); | 601 | program_drive_counts(drive, index); |
615 | } | 602 | } |
616 | 603 | ||
617 | static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio) | 604 | static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio) |
@@ -619,32 +606,26 @@ static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
619 | unsigned int index = 0, cycle_time; | 606 | unsigned int index = 0, cycle_time; |
620 | u8 b; | 607 | u8 b; |
621 | 608 | ||
622 | while (drive != cmd_drives[index]) { | ||
623 | if (++index > 3) { | ||
624 | printk(KERN_ERR "%s: bad news in %s\n", | ||
625 | drive->name, __FUNCTION__); | ||
626 | return; | ||
627 | } | ||
628 | } | ||
629 | switch (pio) { | 609 | switch (pio) { |
630 | case 6: /* set fast-devsel off */ | 610 | case 6: /* set fast-devsel off */ |
631 | case 7: /* set fast-devsel on */ | 611 | case 7: /* set fast-devsel on */ |
632 | b = get_cmd640_reg(CNTRL) & ~0x27; | 612 | b = get_cmd640_reg(CNTRL) & ~0x27; |
633 | if (pio & 1) | 613 | if (pio & 1) |
634 | b |= 0x27; | 614 | b |= 0x27; |
635 | put_cmd640_reg(CNTRL, b); | 615 | put_cmd640_reg(CNTRL, b); |
636 | printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis"); | 616 | printk("%s: %sabled cmd640 fast host timing (devsel)\n", |
637 | return; | 617 | drive->name, (pio & 1) ? "en" : "dis"); |
638 | 618 | return; | |
639 | case 8: /* set prefetch off */ | 619 | case 8: /* set prefetch off */ |
640 | case 9: /* set prefetch on */ | 620 | case 9: /* set prefetch on */ |
641 | set_prefetch_mode(index, pio & 1); | 621 | set_prefetch_mode(drive, index, pio & 1); |
642 | printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis"); | 622 | printk("%s: %sabled cmd640 prefetch\n", |
643 | return; | 623 | drive->name, (pio & 1) ? "en" : "dis"); |
624 | return; | ||
644 | } | 625 | } |
645 | 626 | ||
646 | cycle_time = ide_pio_cycle_time(drive, pio); | 627 | cycle_time = ide_pio_cycle_time(drive, pio); |
647 | cmd640_set_mode(index, pio, cycle_time); | 628 | cmd640_set_mode(drive, index, pio, cycle_time); |
648 | 629 | ||
649 | printk("%s: selected cmd640 PIO mode%d (%dns)", | 630 | printk("%s: selected cmd640 PIO mode%d (%dns)", |
650 | drive->name, pio, cycle_time); | 631 | drive->name, pio, cycle_time); |
@@ -749,7 +730,7 @@ static int __init cmd640x_init(void) | |||
749 | cfr = get_cmd640_reg(CFR); | 730 | cfr = get_cmd640_reg(CFR); |
750 | cmd640_chip_version = cfr & CFR_DEVREV; | 731 | cmd640_chip_version = cfr & CFR_DEVREV; |
751 | if (cmd640_chip_version == 0) { | 732 | if (cmd640_chip_version == 0) { |
752 | printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version); | 733 | printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version); |
753 | return 0; | 734 | return 0; |
754 | } | 735 | } |
755 | 736 | ||
@@ -764,17 +745,19 @@ static int __init cmd640x_init(void) | |||
764 | printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x" | 745 | printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x" |
765 | "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr); | 746 | "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr); |
766 | 747 | ||
748 | cmd_hwif0 = ide_find_port(); | ||
749 | |||
767 | /* | 750 | /* |
768 | * Initialize data for primary port | 751 | * Initialize data for primary port |
769 | */ | 752 | */ |
770 | setup_device_ptrs (); | 753 | if (cmd_hwif0) { |
771 | 754 | ide_init_port_hw(cmd_hwif0, &hw[0]); | |
772 | ide_init_port_hw(cmd_hwif0, &hw[0]); | ||
773 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | 755 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED |
774 | cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode; | 756 | cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode; |
775 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | 757 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ |
776 | 758 | ||
777 | idx[0] = cmd_hwif0->index; | 759 | idx[0] = cmd_hwif0->index; |
760 | } | ||
778 | 761 | ||
779 | /* | 762 | /* |
780 | * Ensure compatibility by always using the slowest timings | 763 | * Ensure compatibility by always using the slowest timings |
@@ -786,10 +769,13 @@ static int __init cmd640x_init(void) | |||
786 | put_cmd640_reg(CMDTIM, 0); | 769 | put_cmd640_reg(CMDTIM, 0); |
787 | put_cmd640_reg(BRST, 0x40); | 770 | put_cmd640_reg(BRST, 0x40); |
788 | 771 | ||
772 | cmd_hwif1 = ide_find_port(); | ||
773 | |||
789 | /* | 774 | /* |
790 | * Try to enable the secondary interface, if not already enabled | 775 | * Try to enable the secondary interface, if not already enabled |
791 | */ | 776 | */ |
792 | if (cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) { | 777 | if (cmd_hwif1 && |
778 | cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) { | ||
793 | port2 = "not probed"; | 779 | port2 = "not probed"; |
794 | } else { | 780 | } else { |
795 | b = get_cmd640_reg(CNTRL); | 781 | b = get_cmd640_reg(CNTRL); |
@@ -820,7 +806,7 @@ static int __init cmd640x_init(void) | |||
820 | /* | 806 | /* |
821 | * Initialize data for secondary cmd640 port, if enabled | 807 | * Initialize data for secondary cmd640 port, if enabled |
822 | */ | 808 | */ |
823 | if (second_port_cmd640) { | 809 | if (second_port_cmd640 && cmd_hwif1) { |
824 | ide_init_port_hw(cmd_hwif1, &hw[1]); | 810 | ide_init_port_hw(cmd_hwif1, &hw[1]); |
825 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | 811 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED |
826 | cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode; | 812 | cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode; |
@@ -828,7 +814,7 @@ static int __init cmd640x_init(void) | |||
828 | 814 | ||
829 | idx[1] = cmd_hwif1->index; | 815 | idx[1] = cmd_hwif1->index; |
830 | } | 816 | } |
831 | printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name, | 817 | printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n", |
832 | second_port_cmd640 ? "" : "not ", port2); | 818 | second_port_cmd640 ? "" : "not ", port2); |
833 | 819 | ||
834 | /* | 820 | /* |
@@ -836,18 +822,30 @@ static int __init cmd640x_init(void) | |||
836 | * Do not unnecessarily disturb any prior BIOS setup of these. | 822 | * Do not unnecessarily disturb any prior BIOS setup of these. |
837 | */ | 823 | */ |
838 | for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) { | 824 | for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) { |
839 | ide_drive_t *drive = cmd_drives[index]; | 825 | ide_drive_t *drive; |
826 | |||
827 | if (index > 1) { | ||
828 | if (cmd_hwif1 == NULL) | ||
829 | continue; | ||
830 | drive = &cmd_hwif1->drives[index & 1]; | ||
831 | } else { | ||
832 | if (cmd_hwif0 == NULL) | ||
833 | continue; | ||
834 | drive = &cmd_hwif0->drives[index & 1]; | ||
835 | } | ||
836 | |||
840 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED | 837 | #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED |
841 | if (drive->autotune || ((index > 1) && second_port_toggled)) { | 838 | if (drive->autotune || ((index > 1) && second_port_toggled)) { |
842 | /* | 839 | /* |
843 | * Reset timing to the slowest speed and turn off prefetch. | 840 | * Reset timing to the slowest speed and turn off |
844 | * This way, the drive identify code has a better chance. | 841 | * prefetch. This way, the drive identify code has |
842 | * a better chance. | ||
845 | */ | 843 | */ |
846 | setup_counts [index] = 4; /* max possible */ | 844 | setup_counts [index] = 4; /* max possible */ |
847 | active_counts [index] = 16; /* max possible */ | 845 | active_counts [index] = 16; /* max possible */ |
848 | recovery_counts [index] = 16; /* max possible */ | 846 | recovery_counts [index] = 16; /* max possible */ |
849 | program_drive_counts (index); | 847 | program_drive_counts(drive, index); |
850 | set_prefetch_mode (index, 0); | 848 | set_prefetch_mode(drive, index, 0); |
851 | printk("cmd640: drive%d timings/prefetch cleared\n", index); | 849 | printk("cmd640: drive%d timings/prefetch cleared\n", index); |
852 | } else { | 850 | } else { |
853 | /* | 851 | /* |
@@ -855,7 +853,7 @@ static int __init cmd640x_init(void) | |||
855 | * This preserves any prior BIOS setup. | 853 | * This preserves any prior BIOS setup. |
856 | */ | 854 | */ |
857 | retrieve_drive_counts (index); | 855 | retrieve_drive_counts (index); |
858 | check_prefetch (index); | 856 | check_prefetch(drive, index); |
859 | printk("cmd640: drive%d timings/prefetch(%s) preserved", | 857 | printk("cmd640: drive%d timings/prefetch(%s) preserved", |
860 | index, drive->no_io_32bit ? "off" : "on"); | 858 | index, drive->no_io_32bit ? "off" : "on"); |
861 | display_clocks(index); | 859 | display_clocks(index); |
@@ -864,7 +862,7 @@ static int __init cmd640x_init(void) | |||
864 | /* | 862 | /* |
865 | * Set the drive unmask flags to match the prefetch setting | 863 | * Set the drive unmask flags to match the prefetch setting |
866 | */ | 864 | */ |
867 | check_prefetch (index); | 865 | check_prefetch(drive, index); |
868 | printk("cmd640: drive%d timings/prefetch(%s) preserved\n", | 866 | printk("cmd640: drive%d timings/prefetch(%s) preserved\n", |
869 | index, drive->no_io_32bit ? "off" : "on"); | 867 | index, drive->no_io_32bit ? "off" : "on"); |
870 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ | 868 | #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ |
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index edabe6299efd..8baccfef237f 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c | |||
@@ -440,8 +440,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
440 | .init_hwif = init_hwif_cmd64x, | 440 | .init_hwif = init_hwif_cmd64x, |
441 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, | 441 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, |
442 | .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | | 442 | .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | |
443 | IDE_HFLAG_ABUSE_PREFETCH | | 443 | IDE_HFLAG_ABUSE_PREFETCH, |
444 | IDE_HFLAG_BOOTABLE, | ||
445 | .pio_mask = ATA_PIO5, | 444 | .pio_mask = ATA_PIO5, |
446 | .mwdma_mask = ATA_MWDMA2, | 445 | .mwdma_mask = ATA_MWDMA2, |
447 | .udma_mask = 0x00, /* no udma */ | 446 | .udma_mask = 0x00, /* no udma */ |
@@ -451,7 +450,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
451 | .init_hwif = init_hwif_cmd64x, | 450 | .init_hwif = init_hwif_cmd64x, |
452 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 451 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
453 | .chipset = ide_cmd646, | 452 | .chipset = ide_cmd646, |
454 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, | 453 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, |
455 | .pio_mask = ATA_PIO5, | 454 | .pio_mask = ATA_PIO5, |
456 | .mwdma_mask = ATA_MWDMA2, | 455 | .mwdma_mask = ATA_MWDMA2, |
457 | .udma_mask = ATA_UDMA2, | 456 | .udma_mask = ATA_UDMA2, |
@@ -460,7 +459,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
460 | .init_chipset = init_chipset_cmd64x, | 459 | .init_chipset = init_chipset_cmd64x, |
461 | .init_hwif = init_hwif_cmd64x, | 460 | .init_hwif = init_hwif_cmd64x, |
462 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 461 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
463 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, | 462 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, |
464 | .pio_mask = ATA_PIO5, | 463 | .pio_mask = ATA_PIO5, |
465 | .mwdma_mask = ATA_MWDMA2, | 464 | .mwdma_mask = ATA_MWDMA2, |
466 | .udma_mask = ATA_UDMA4, | 465 | .udma_mask = ATA_UDMA4, |
@@ -469,7 +468,7 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
469 | .init_chipset = init_chipset_cmd64x, | 468 | .init_chipset = init_chipset_cmd64x, |
470 | .init_hwif = init_hwif_cmd64x, | 469 | .init_hwif = init_hwif_cmd64x, |
471 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 470 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
472 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, | 471 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, |
473 | .pio_mask = ATA_PIO5, | 472 | .pio_mask = ATA_PIO5, |
474 | .mwdma_mask = ATA_MWDMA2, | 473 | .mwdma_mask = ATA_MWDMA2, |
475 | .udma_mask = ATA_UDMA5, | 474 | .udma_mask = ATA_UDMA5, |
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index 1c163e4ef03f..01b37ecb5a5a 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c | |||
@@ -122,8 +122,7 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) | |||
122 | IDE_HFLAG_CS5520 | \ | 122 | IDE_HFLAG_CS5520 | \ |
123 | IDE_HFLAG_VDMA | \ | 123 | IDE_HFLAG_VDMA | \ |
124 | IDE_HFLAG_NO_ATAPI_DMA | \ | 124 | IDE_HFLAG_NO_ATAPI_DMA | \ |
125 | IDE_HFLAG_ABUSE_SET_DMA_MODE |\ | 125 | IDE_HFLAG_ABUSE_SET_DMA_MODE, \ |
126 | IDE_HFLAG_BOOTABLE, \ | ||
127 | .pio_mask = ATA_PIO4, \ | 126 | .pio_mask = ATA_PIO4, \ |
128 | } | 127 | } |
129 | 128 | ||
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index 941a1344820b..56a369c2a78a 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c | |||
@@ -249,8 +249,7 @@ static const struct ide_port_info cs5530_chipset __devinitdata = { | |||
249 | .init_chipset = init_chipset_cs5530, | 249 | .init_chipset = init_chipset_cs5530, |
250 | .init_hwif = init_hwif_cs5530, | 250 | .init_hwif = init_hwif_cs5530, |
251 | .host_flags = IDE_HFLAG_SERIALIZE | | 251 | .host_flags = IDE_HFLAG_SERIALIZE | |
252 | IDE_HFLAG_POST_SET_MODE | | 252 | IDE_HFLAG_POST_SET_MODE, |
253 | IDE_HFLAG_BOOTABLE, | ||
254 | .pio_mask = ATA_PIO4, | 253 | .pio_mask = ATA_PIO4, |
255 | .mwdma_mask = ATA_MWDMA2, | 254 | .mwdma_mask = ATA_MWDMA2, |
256 | .udma_mask = ATA_UDMA2, | 255 | .udma_mask = ATA_UDMA2, |
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index d7b5ea992e94..c9685f239c65 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c | |||
@@ -186,7 +186,7 @@ static const struct ide_port_info cs5535_chipset __devinitdata = { | |||
186 | .name = "CS5535", | 186 | .name = "CS5535", |
187 | .init_hwif = init_hwif_cs5535, | 187 | .init_hwif = init_hwif_cs5535, |
188 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | | 188 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | |
189 | IDE_HFLAG_ABUSE_SET_DMA_MODE | IDE_HFLAG_BOOTABLE, | 189 | IDE_HFLAG_ABUSE_SET_DMA_MODE, |
190 | .pio_mask = ATA_PIO4, | 190 | .pio_mask = ATA_PIO4, |
191 | .mwdma_mask = ATA_MWDMA2, | 191 | .mwdma_mask = ATA_MWDMA2, |
192 | .udma_mask = ATA_UDMA4, | 192 | .udma_mask = ATA_UDMA4, |
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c index 724cbacf4e5b..08eab7e7f051 100644 --- a/drivers/ide/pci/cy82c693.c +++ b/drivers/ide/pci/cy82c693.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * | 6 | * |
7 | * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards. | 7 | * The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards. |
8 | * Writing the driver was quite simple, since most of the job is | 8 | * Writing the driver was quite simple, since most of the job is |
9 | * done by the generic pci-ide support. | 9 | * done by the generic pci-ide support. |
10 | * The hard part was finding the CY82C693's datasheet on Cypress's | 10 | * The hard part was finding the CY82C693's datasheet on Cypress's |
11 | * web page :-(. But Altavista solved this problem :-). | 11 | * web page :-(. But Altavista solved this problem :-). |
12 | * | 12 | * |
@@ -15,12 +15,12 @@ | |||
15 | * - I recently got a 16.8G IBM DTTA, so I was able to test it with | 15 | * - I recently got a 16.8G IBM DTTA, so I was able to test it with |
16 | * a large and fast disk - the results look great, so I'd say the | 16 | * a large and fast disk - the results look great, so I'd say the |
17 | * driver is working fine :-) | 17 | * driver is working fine :-) |
18 | * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA | 18 | * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA |
19 | * - this is my first linux driver, so there's probably a lot of room | 19 | * - this is my first linux driver, so there's probably a lot of room |
20 | * for optimizations and bug fixing, so feel free to do it. | 20 | * for optimizations and bug fixing, so feel free to do it. |
21 | * - use idebus=xx parameter to set PCI bus speed - needed to calc | 21 | * - use idebus=xx parameter to set PCI bus speed - needed to calc |
22 | * timings for PIO modes (default will be 40) | 22 | * timings for PIO modes (default will be 40) |
23 | * - if using PIO mode it's a good idea to set the PIO mode and | 23 | * - if using PIO mode it's a good idea to set the PIO mode and |
24 | * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda | 24 | * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda |
25 | * - I had some problems with my IBM DHEA with PIO modes < 2 | 25 | * - I had some problems with my IBM DHEA with PIO modes < 2 |
26 | * (lost interrupts) ????? | 26 | * (lost interrupts) ????? |
@@ -110,11 +110,11 @@ typedef struct pio_clocks_s { | |||
110 | * calc clocks using bus_speed | 110 | * calc clocks using bus_speed |
111 | * returns (rounded up) time in bus clocks for time in ns | 111 | * returns (rounded up) time in bus clocks for time in ns |
112 | */ | 112 | */ |
113 | static int calc_clk (int time, int bus_speed) | 113 | static int calc_clk(int time, int bus_speed) |
114 | { | 114 | { |
115 | int clocks; | 115 | int clocks; |
116 | 116 | ||
117 | clocks = (time*bus_speed+999)/1000 -1; | 117 | clocks = (time*bus_speed+999)/1000 - 1; |
118 | 118 | ||
119 | if (clocks < 0) | 119 | if (clocks < 0) |
120 | clocks = 0; | 120 | clocks = 0; |
@@ -132,8 +132,8 @@ static int calc_clk (int time, int bus_speed) | |||
132 | * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used | 132 | * NOTE: for mode 0,1 and 2 drives 8-bit IDE command control registers are used |
133 | * for mode 3 and 4 drives 8 and 16-bit timings are the same | 133 | * for mode 3 and 4 drives 8 and 16-bit timings are the same |
134 | * | 134 | * |
135 | */ | 135 | */ |
136 | static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) | 136 | static void compute_clocks(u8 pio, pio_clocks_t *p_pclk) |
137 | { | 137 | { |
138 | int clk1, clk2; | 138 | int clk1, clk2; |
139 | int bus_speed = system_bus_clock(); /* get speed of PCI bus */ | 139 | int bus_speed = system_bus_clock(); /* get speed of PCI bus */ |
@@ -158,7 +158,7 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk) | |||
158 | clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ | 158 | clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */ |
159 | 159 | ||
160 | /* note: we use the same values for 16bit IOR and IOW | 160 | /* note: we use the same values for 16bit IOR and IOW |
161 | * those are all the same, since I don't have other | 161 | * those are all the same, since I don't have other |
162 | * timings than those from ide-lib.c | 162 | * timings than those from ide-lib.c |
163 | */ | 163 | */ |
164 | 164 | ||
@@ -186,7 +186,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
186 | outb(index, CY82_INDEX_PORT); | 186 | outb(index, CY82_INDEX_PORT); |
187 | data = inb(CY82_DATA_PORT); | 187 | data = inb(CY82_DATA_PORT); |
188 | 188 | ||
189 | printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", | 189 | printk(KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", |
190 | drive->name, HWIF(drive)->channel, drive->select.b.unit, | 190 | drive->name, HWIF(drive)->channel, drive->select.b.unit, |
191 | (data&0x3), ((data>>2)&1)); | 191 | (data&0x3), ((data>>2)&1)); |
192 | #endif /* CY82C693_DEBUG_LOGS */ | 192 | #endif /* CY82C693_DEBUG_LOGS */ |
@@ -202,7 +202,7 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
202 | mode & 3, single); | 202 | mode & 3, single); |
203 | #endif /* CY82C693_DEBUG_INFO */ | 203 | #endif /* CY82C693_DEBUG_INFO */ |
204 | 204 | ||
205 | /* | 205 | /* |
206 | * note: below we set the value for Bus Master IDE TimeOut Register | 206 | * note: below we set the value for Bus Master IDE TimeOut Register |
207 | * I'm not absolutly sure what this does, but it solved my problem | 207 | * I'm not absolutly sure what this does, but it solved my problem |
208 | * with IDE DMA and sound, so I now can play sound and work with | 208 | * with IDE DMA and sound, so I now can play sound and work with |
@@ -216,8 +216,8 @@ static void cy82c693_set_dma_mode(ide_drive_t *drive, const u8 mode) | |||
216 | outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); | 216 | outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); |
217 | outb(data, CY82_DATA_PORT); | 217 | outb(data, CY82_DATA_PORT); |
218 | 218 | ||
219 | #if CY82C693_DEBUG_INFO | 219 | #if CY82C693_DEBUG_INFO |
220 | printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", | 220 | printk(KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", |
221 | drive->name, data); | 221 | drive->name, data); |
222 | #endif /* CY82C693_DEBUG_INFO */ | 222 | #endif /* CY82C693_DEBUG_INFO */ |
223 | } | 223 | } |
@@ -242,14 +242,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
242 | 242 | ||
243 | #if CY82C693_DEBUG_LOGS | 243 | #if CY82C693_DEBUG_LOGS |
244 | /* for debug let's show the register values */ | 244 | /* for debug let's show the register values */ |
245 | 245 | ||
246 | if (drive->select.b.unit == 0) { | 246 | if (drive->select.b.unit == 0) { |
247 | /* | 247 | /* |
248 | * get master drive registers | 248 | * get master drive registers |
249 | * address setup control register | 249 | * address setup control register |
250 | * is 32 bit !!! | 250 | * is 32 bit !!! |
251 | */ | 251 | */ |
252 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 252 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
253 | addrCtrl &= 0x0F; | 253 | addrCtrl &= 0x0F; |
254 | 254 | ||
255 | /* now let's get the remaining registers */ | 255 | /* now let's get the remaining registers */ |
@@ -261,7 +261,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
261 | * set slave drive registers | 261 | * set slave drive registers |
262 | * address setup control register | 262 | * address setup control register |
263 | * is 32 bit !!! | 263 | * is 32 bit !!! |
264 | */ | 264 | */ |
265 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 265 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
266 | 266 | ||
267 | addrCtrl &= 0xF0; | 267 | addrCtrl &= 0xF0; |
@@ -288,9 +288,9 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
288 | * set master drive | 288 | * set master drive |
289 | * address setup control register | 289 | * address setup control register |
290 | * is 32 bit !!! | 290 | * is 32 bit !!! |
291 | */ | 291 | */ |
292 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 292 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
293 | 293 | ||
294 | addrCtrl &= (~0xF); | 294 | addrCtrl &= (~0xF); |
295 | addrCtrl |= (unsigned int)pclk.address_time; | 295 | addrCtrl |= (unsigned int)pclk.address_time; |
296 | pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl); | 296 | pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl); |
@@ -299,14 +299,14 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
299 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); | 299 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r); |
300 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); | 300 | pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w); |
301 | pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); | 301 | pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8); |
302 | 302 | ||
303 | addrCtrl &= 0xF; | 303 | addrCtrl &= 0xF; |
304 | } else { | 304 | } else { |
305 | /* | 305 | /* |
306 | * set slave drive | 306 | * set slave drive |
307 | * address setup control register | 307 | * address setup control register |
308 | * is 32 bit !!! | 308 | * is 32 bit !!! |
309 | */ | 309 | */ |
310 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); | 310 | pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl); |
311 | 311 | ||
312 | addrCtrl &= (~0xF0); | 312 | addrCtrl &= (~0xF0); |
@@ -320,7 +320,7 @@ static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
320 | 320 | ||
321 | addrCtrl >>= 4; | 321 | addrCtrl >>= 4; |
322 | addrCtrl &= 0xF; | 322 | addrCtrl &= 0xF; |
323 | } | 323 | } |
324 | 324 | ||
325 | #if CY82C693_DEBUG_INFO | 325 | #if CY82C693_DEBUG_INFO |
326 | printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to " | 326 | printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to " |
@@ -340,41 +340,41 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c | |||
340 | 340 | ||
341 | #ifdef CY82C693_SETDMA_CLOCK | 341 | #ifdef CY82C693_SETDMA_CLOCK |
342 | u8 data = 0; | 342 | u8 data = 0; |
343 | #endif /* CY82C693_SETDMA_CLOCK */ | 343 | #endif /* CY82C693_SETDMA_CLOCK */ |
344 | 344 | ||
345 | /* write info about this verion of the driver */ | 345 | /* write info about this verion of the driver */ |
346 | printk(KERN_INFO CY82_VERSION "\n"); | 346 | printk(KERN_INFO CY82_VERSION "\n"); |
347 | 347 | ||
348 | #ifdef CY82C693_SETDMA_CLOCK | 348 | #ifdef CY82C693_SETDMA_CLOCK |
349 | /* okay let's set the DMA clock speed */ | 349 | /* okay let's set the DMA clock speed */ |
350 | 350 | ||
351 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | 351 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); |
352 | data = inb(CY82_DATA_PORT); | 352 | data = inb(CY82_DATA_PORT); |
353 | 353 | ||
354 | #if CY82C693_DEBUG_INFO | 354 | #if CY82C693_DEBUG_INFO |
355 | printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", | 355 | printk(KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", |
356 | name, data); | 356 | name, data); |
357 | #endif /* CY82C693_DEBUG_INFO */ | 357 | #endif /* CY82C693_DEBUG_INFO */ |
358 | 358 | ||
359 | /* | 359 | /* |
360 | * for some reason sometimes the DMA controller | 360 | * for some reason sometimes the DMA controller |
361 | * speed is set to ATCLK/2 ???? - we fix this here | 361 | * speed is set to ATCLK/2 ???? - we fix this here |
362 | * | 362 | * |
363 | * note: i don't know what causes this strange behaviour, | 363 | * note: i don't know what causes this strange behaviour, |
364 | * but even changing the dma speed doesn't solve it :-( | 364 | * but even changing the dma speed doesn't solve it :-( |
365 | * the ide performance is still only half the normal speed | 365 | * the ide performance is still only half the normal speed |
366 | * | 366 | * |
367 | * if anybody knows what goes wrong with my machine, please | 367 | * if anybody knows what goes wrong with my machine, please |
368 | * let me know - ASK | 368 | * let me know - ASK |
369 | */ | 369 | */ |
370 | 370 | ||
371 | data |= 0x03; | 371 | data |= 0x03; |
372 | 372 | ||
373 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); | 373 | outb(CY82_INDEX_CTRLREG1, CY82_INDEX_PORT); |
374 | outb(data, CY82_DATA_PORT); | 374 | outb(data, CY82_DATA_PORT); |
375 | 375 | ||
376 | #if CY82C693_DEBUG_INFO | 376 | #if CY82C693_DEBUG_INFO |
377 | printk (KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", | 377 | printk(KERN_INFO "%s: New Peripheral Configuration Register: 0x%X\n", |
378 | name, data); | 378 | name, data); |
379 | #endif /* CY82C693_DEBUG_INFO */ | 379 | #endif /* CY82C693_DEBUG_INFO */ |
380 | 380 | ||
@@ -410,8 +410,7 @@ static const struct ide_port_info cy82c693_chipset __devinitdata = { | |||
410 | .init_iops = init_iops_cy82c693, | 410 | .init_iops = init_iops_cy82c693, |
411 | .init_hwif = init_hwif_cy82c693, | 411 | .init_hwif = init_hwif_cy82c693, |
412 | .chipset = ide_cy82c693, | 412 | .chipset = ide_cy82c693, |
413 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_CY82C693 | | 413 | .host_flags = IDE_HFLAG_SINGLE, |
414 | IDE_HFLAG_BOOTABLE, | ||
415 | .pio_mask = ATA_PIO4, | 414 | .pio_mask = ATA_PIO4, |
416 | .swdma_mask = ATA_SWDMA2, | 415 | .swdma_mask = ATA_SWDMA2, |
417 | .mwdma_mask = ATA_MWDMA2, | 416 | .mwdma_mask = ATA_MWDMA2, |
@@ -424,7 +423,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev | |||
424 | 423 | ||
425 | /* CY82C693 is more than only a IDE controller. | 424 | /* CY82C693 is more than only a IDE controller. |
426 | Function 1 is primary IDE channel, function 2 - secondary. */ | 425 | Function 1 is primary IDE channel, function 2 - secondary. */ |
427 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && | 426 | if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && |
428 | PCI_FUNC(dev->devfn) == 1) { | 427 | PCI_FUNC(dev->devfn) == 1) { |
429 | dev2 = pci_get_slot(dev->bus, dev->devfn + 1); | 428 | dev2 = pci_get_slot(dev->bus, dev->devfn + 1); |
430 | ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset); | 429 | ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset); |
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c index 961698d655eb..753b86fc6637 100644 --- a/drivers/ide/pci/delkin_cb.c +++ b/drivers/ide/pci/delkin_cb.c | |||
@@ -71,14 +71,13 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id) | |||
71 | if (setup[i]) | 71 | if (setup[i]) |
72 | outb(setup[i], base + i); | 72 | outb(setup[i], base + i); |
73 | } | 73 | } |
74 | pci_release_regions(dev); /* IDE layer handles regions itself */ | ||
75 | 74 | ||
76 | memset(&hw, 0, sizeof(hw)); | 75 | memset(&hw, 0, sizeof(hw)); |
77 | ide_std_init_ports(&hw, base + 0x10, base + 0x1e); | 76 | ide_std_init_ports(&hw, base + 0x10, base + 0x1e); |
78 | hw.irq = dev->irq; | 77 | hw.irq = dev->irq; |
79 | hw.chipset = ide_pci; /* this enables IRQ sharing */ | 78 | hw.chipset = ide_pci; /* this enables IRQ sharing */ |
80 | 79 | ||
81 | hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); | 80 | hwif = ide_find_port(); |
82 | if (hwif == NULL) | 81 | if (hwif == NULL) |
83 | goto out_disable; | 82 | goto out_disable; |
84 | 83 | ||
@@ -90,6 +89,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id) | |||
90 | ide_init_port_data(hwif, i); | 89 | ide_init_port_data(hwif, i); |
91 | 90 | ||
92 | ide_init_port_hw(hwif, &hw); | 91 | ide_init_port_hw(hwif, &hw); |
92 | hwif->mmio = 1; | ||
93 | hwif->quirkproc = &ide_undecoded_slave; | 93 | hwif->quirkproc = &ide_undecoded_slave; |
94 | 94 | ||
95 | idx[0] = i; | 95 | idx[0] = i; |
@@ -110,6 +110,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id) | |||
110 | 110 | ||
111 | out_disable: | 111 | out_disable: |
112 | printk(KERN_ERR "delkin_cb: no IDE devices found\n"); | 112 | printk(KERN_ERR "delkin_cb: no IDE devices found\n"); |
113 | pci_release_regions(dev); | ||
113 | pci_disable_device(dev); | 114 | pci_disable_device(dev); |
114 | return -ENODEV; | 115 | return -ENODEV; |
115 | } | 116 | } |
@@ -122,6 +123,7 @@ delkin_cb_remove (struct pci_dev *dev) | |||
122 | if (hwif) | 123 | if (hwif) |
123 | ide_unregister(hwif->index); | 124 | ide_unregister(hwif->index); |
124 | 125 | ||
126 | pci_release_regions(dev); | ||
125 | pci_disable_device(dev); | 127 | pci_disable_device(dev); |
126 | } | 128 | } |
127 | 129 | ||
diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c index 7fd83a9d4dee..041720e22762 100644 --- a/drivers/ide/pci/generic.c +++ b/drivers/ide/pci/generic.c | |||
@@ -38,8 +38,7 @@ MODULE_PARM_DESC(all_generic_ide, "IDE generic will claim all unknown PCI IDE st | |||
38 | { \ | 38 | { \ |
39 | .name = name_str, \ | 39 | .name = name_str, \ |
40 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ | 40 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | \ |
41 | extra_flags | \ | 41 | extra_flags, \ |
42 | IDE_HFLAG_BOOTABLE, \ | ||
43 | .swdma_mask = ATA_SWDMA2, \ | 42 | .swdma_mask = ATA_SWDMA2, \ |
44 | .mwdma_mask = ATA_MWDMA2, \ | 43 | .mwdma_mask = ATA_MWDMA2, \ |
45 | .udma_mask = ATA_UDMA6, \ | 44 | .udma_mask = ATA_UDMA6, \ |
@@ -50,9 +49,8 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = { | |||
50 | 49 | ||
51 | { /* 1 */ | 50 | { /* 1 */ |
52 | .name = "NS87410", | 51 | .name = "NS87410", |
53 | .enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}}, | 52 | .enablebits = { {0x43, 0x08, 0x08}, {0x47, 0x08, 0x08} }, |
54 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | | 53 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, |
55 | IDE_HFLAG_BOOTABLE, | ||
56 | .swdma_mask = ATA_SWDMA2, | 54 | .swdma_mask = ATA_SWDMA2, |
57 | .mwdma_mask = ATA_MWDMA2, | 55 | .mwdma_mask = ATA_MWDMA2, |
58 | .udma_mask = ATA_UDMA6, | 56 | .udma_mask = ATA_UDMA6, |
@@ -99,7 +97,7 @@ static const struct ide_port_info generic_chipsets[] __devinitdata = { | |||
99 | * Called when the PCI registration layer (or the IDE initialization) | 97 | * Called when the PCI registration layer (or the IDE initialization) |
100 | * finds a device matching our IDE device tables. | 98 | * finds a device matching our IDE device tables. |
101 | */ | 99 | */ |
102 | 100 | ||
103 | static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 101 | static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
104 | { | 102 | { |
105 | const struct ide_port_info *d = &generic_chipsets[id->driver_data]; | 103 | const struct ide_port_info *d = &generic_chipsets[id->driver_data]; |
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c index 9f01da46b016..9f2fc3094000 100644 --- a/drivers/ide/pci/hpt34x.c +++ b/drivers/ide/pci/hpt34x.c | |||
@@ -133,7 +133,7 @@ static const struct ide_port_info hpt34x_chipsets[] __devinitdata = { | |||
133 | .init_chipset = init_chipset_hpt34x, | 133 | .init_chipset = init_chipset_hpt34x, |
134 | .init_hwif = init_hwif_hpt34x, | 134 | .init_hwif = init_hwif_hpt34x, |
135 | .extra = 16, | 135 | .extra = 16, |
136 | .host_flags = IDE_HFLAGS_HPT34X, | 136 | .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE, |
137 | .pio_mask = ATA_PIO5, | 137 | .pio_mask = ATA_PIO5, |
138 | }, | 138 | }, |
139 | { /* 1 */ | 139 | { /* 1 */ |
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 82d0e318a1fe..a49090672145 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c | |||
@@ -1557,7 +1557,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic | |||
1557 | hpt374_init(dev, dev2); | 1557 | hpt374_init(dev, dev2); |
1558 | else { | 1558 | else { |
1559 | if (hpt36x_init(dev, dev2)) | 1559 | if (hpt36x_init(dev, dev2)) |
1560 | d.host_flags |= IDE_HFLAG_BOOTABLE; | 1560 | d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE; |
1561 | } | 1561 | } |
1562 | 1562 | ||
1563 | ret = ide_setup_pci_devices(dev, dev2, &d); | 1563 | ret = ide_setup_pci_devices(dev, dev2, &d); |
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index e3427eaab430..5b5b0cc4b76a 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c | |||
@@ -35,7 +35,7 @@ static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
35 | static DEFINE_SPINLOCK(tune_lock); | 35 | static DEFINE_SPINLOCK(tune_lock); |
36 | int control = 0; | 36 | int control = 0; |
37 | 37 | ||
38 | static const u8 timings[][2]= { | 38 | static const u8 timings[][2] = { |
39 | { 0, 0 }, | 39 | { 0, 0 }, |
40 | { 0, 0 }, | 40 | { 0, 0 }, |
41 | { 1, 0 }, | 41 | { 1, 0 }, |
@@ -105,11 +105,10 @@ static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
105 | 105 | ||
106 | if (!(reg48 & u_flag)) | 106 | if (!(reg48 & u_flag)) |
107 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); | 107 | pci_write_config_byte(dev, 0x48, reg48 | u_flag); |
108 | if (speed >= XFER_UDMA_5) { | 108 | if (speed >= XFER_UDMA_5) |
109 | pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag); | 109 | pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag); |
110 | } else { | 110 | else |
111 | pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); | 111 | pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); |
112 | } | ||
113 | 112 | ||
114 | if ((reg4a & a_speed) != u_speed) | 113 | if ((reg4a & a_speed) != u_speed) |
115 | pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed); | 114 | pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed); |
@@ -170,9 +169,8 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) | |||
170 | { \ | 169 | { \ |
171 | .name = name_str, \ | 170 | .name = name_str, \ |
172 | .init_hwif = init_hwif_it8213, \ | 171 | .init_hwif = init_hwif_it8213, \ |
173 | .enablebits = {{0x41,0x80,0x80}}, \ | 172 | .enablebits = { {0x41, 0x80, 0x80} }, \ |
174 | .host_flags = IDE_HFLAG_SINGLE | \ | 173 | .host_flags = IDE_HFLAG_SINGLE, \ |
175 | IDE_HFLAG_BOOTABLE, \ | ||
176 | .pio_mask = ATA_PIO4, \ | 174 | .pio_mask = ATA_PIO4, \ |
177 | .swdma_mask = ATA_SWDMA2_ONLY, \ | 175 | .swdma_mask = ATA_SWDMA2_ONLY, \ |
178 | .mwdma_mask = ATA_MWDMA12_ONLY, \ | 176 | .mwdma_mask = ATA_MWDMA12_ONLY, \ |
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index d8a167451fd6..a38ec47423a0 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c | |||
@@ -523,16 +523,12 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive) | |||
523 | static void __devinit init_hwif_it821x(ide_hwif_t *hwif) | 523 | static void __devinit init_hwif_it821x(ide_hwif_t *hwif) |
524 | { | 524 | { |
525 | struct pci_dev *dev = to_pci_dev(hwif->dev); | 525 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
526 | struct it821x_dev *idev = kzalloc(sizeof(struct it821x_dev), GFP_KERNEL); | 526 | struct it821x_dev **itdevs = (struct it821x_dev **)pci_get_drvdata(dev); |
527 | struct it821x_dev *idev = itdevs[hwif->channel]; | ||
527 | u8 conf; | 528 | u8 conf; |
528 | 529 | ||
529 | hwif->quirkproc = &it821x_quirkproc; | 530 | hwif->quirkproc = &it821x_quirkproc; |
530 | 531 | ||
531 | if (idev == NULL) { | ||
532 | printk(KERN_ERR "it821x: out of memory, falling back to legacy behaviour.\n"); | ||
533 | return; | ||
534 | } | ||
535 | |||
536 | ide_set_hwifdata(hwif, idev); | 532 | ide_set_hwifdata(hwif, idev); |
537 | 533 | ||
538 | pci_read_config_byte(dev, 0x50, &conf); | 534 | pci_read_config_byte(dev, 0x50, &conf); |
@@ -623,7 +619,6 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha | |||
623 | .name = name_str, \ | 619 | .name = name_str, \ |
624 | .init_chipset = init_chipset_it821x, \ | 620 | .init_chipset = init_chipset_it821x, \ |
625 | .init_hwif = init_hwif_it821x, \ | 621 | .init_hwif = init_hwif_it821x, \ |
626 | .host_flags = IDE_HFLAG_BOOTABLE, \ | ||
627 | .pio_mask = ATA_PIO4, \ | 622 | .pio_mask = ATA_PIO4, \ |
628 | } | 623 | } |
629 | 624 | ||
@@ -642,6 +637,22 @@ static const struct ide_port_info it821x_chipsets[] __devinitdata = { | |||
642 | 637 | ||
643 | static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 638 | static int __devinit it821x_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
644 | { | 639 | { |
640 | struct it821x_dev *itdevs[2] = { NULL, NULL} , *itdev; | ||
641 | unsigned int i; | ||
642 | |||
643 | for (i = 0; i < 2; i++) { | ||
644 | itdev = kzalloc(sizeof(*itdev), GFP_KERNEL); | ||
645 | if (itdev == NULL) { | ||
646 | kfree(itdevs[0]); | ||
647 | printk(KERN_ERR "it821x: out of memory\n"); | ||
648 | return -ENOMEM; | ||
649 | } | ||
650 | |||
651 | itdevs[i] = itdev; | ||
652 | } | ||
653 | |||
654 | pci_set_drvdata(dev, itdevs); | ||
655 | |||
645 | return ide_setup_pci_device(dev, &it821x_chipsets[id->driver_data]); | 656 | return ide_setup_pci_device(dev, &it821x_chipsets[id->driver_data]); |
646 | } | 657 | } |
647 | 658 | ||
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c index a56bcb4f22f4..673f7dc8ba65 100644 --- a/drivers/ide/pci/jmicron.c +++ b/drivers/ide/pci/jmicron.c | |||
@@ -63,8 +63,7 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif) | |||
63 | * actually do our cable checking etc. Thankfully we don't need | 63 | * actually do our cable checking etc. Thankfully we don't need |
64 | * to do the plumbing for other cases. | 64 | * to do the plumbing for other cases. |
65 | */ | 65 | */ |
66 | switch (port_map[port]) | 66 | switch (port_map[port]) { |
67 | { | ||
68 | case PORT_PATA0: | 67 | case PORT_PATA0: |
69 | if (control & (1 << 3)) /* 40/80 pin primary */ | 68 | if (control & (1 << 3)) /* 40/80 pin primary */ |
70 | return ATA_CBL_PATA40; | 69 | return ATA_CBL_PATA40; |
@@ -114,7 +113,6 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) | |||
114 | static const struct ide_port_info jmicron_chipset __devinitdata = { | 113 | static const struct ide_port_info jmicron_chipset __devinitdata = { |
115 | .name = "JMB", | 114 | .name = "JMB", |
116 | .init_hwif = init_hwif_jmicron, | 115 | .init_hwif = init_hwif_jmicron, |
117 | .host_flags = IDE_HFLAG_BOOTABLE, | ||
118 | .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, | 116 | .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, |
119 | .pio_mask = ATA_PIO5, | 117 | .pio_mask = ATA_PIO5, |
120 | .mwdma_mask = ATA_MWDMA2, | 118 | .mwdma_mask = ATA_MWDMA2, |
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c index 75513320aad9..3015d6916d4c 100644 --- a/drivers/ide/pci/ns87415.c +++ b/drivers/ide/pci/ns87415.c | |||
@@ -265,8 +265,7 @@ static const struct ide_port_info ns87415_chipset __devinitdata = { | |||
265 | #endif | 265 | #endif |
266 | .init_hwif = init_hwif_ns87415, | 266 | .init_hwif = init_hwif_ns87415, |
267 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | | 267 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | |
268 | IDE_HFLAG_NO_ATAPI_DMA | | 268 | IDE_HFLAG_NO_ATAPI_DMA, |
269 | IDE_HFLAG_BOOTABLE, | ||
270 | }; | 269 | }; |
271 | 270 | ||
272 | static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 271 | static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c index 46e8748f507e..88a4dd94eeea 100644 --- a/drivers/ide/pci/opti621.c +++ b/drivers/ide/pci/opti621.c | |||
@@ -57,9 +57,9 @@ | |||
57 | * (use idebus=xx to select PCI bus speed). | 57 | * (use idebus=xx to select PCI bus speed). |
58 | * | 58 | * |
59 | * Version 0.1, Nov 8, 1996 | 59 | * Version 0.1, Nov 8, 1996 |
60 | * by Jaromir Koutek, for 2.1.8. | 60 | * by Jaromir Koutek, for 2.1.8. |
61 | * Initial version of driver. | 61 | * Initial version of driver. |
62 | * | 62 | * |
63 | * Version 0.2 | 63 | * Version 0.2 |
64 | * Number 0.2 skipped. | 64 | * Number 0.2 skipped. |
65 | * | 65 | * |
@@ -75,7 +75,7 @@ | |||
75 | * by Jaromir Koutek | 75 | * by Jaromir Koutek |
76 | * Updates for use with (again) new IDE block driver. | 76 | * Updates for use with (again) new IDE block driver. |
77 | * Update of documentation. | 77 | * Update of documentation. |
78 | * | 78 | * |
79 | * Version 0.6, Jan 2, 1999 | 79 | * Version 0.6, Jan 2, 1999 |
80 | * by Jaromir Koutek | 80 | * by Jaromir Koutek |
81 | * Reversed to version 0.3 of the driver, because | 81 | * Reversed to version 0.3 of the driver, because |
@@ -208,29 +208,34 @@ typedef struct pio_clocks_s { | |||
208 | 208 | ||
209 | static void compute_clocks(int pio, pio_clocks_t *clks) | 209 | static void compute_clocks(int pio, pio_clocks_t *clks) |
210 | { | 210 | { |
211 | if (pio != PIO_NOT_EXIST) { | 211 | if (pio != PIO_NOT_EXIST) { |
212 | int adr_setup, data_pls; | 212 | int adr_setup, data_pls; |
213 | int bus_speed = system_bus_clock(); | 213 | int bus_speed = system_bus_clock(); |
214 | 214 | ||
215 | adr_setup = ide_pio_timings[pio].setup_time; | 215 | adr_setup = ide_pio_timings[pio].setup_time; |
216 | data_pls = ide_pio_timings[pio].active_time; | 216 | data_pls = ide_pio_timings[pio].active_time; |
217 | clks->address_time = cmpt_clk(adr_setup, bus_speed); | 217 | clks->address_time = cmpt_clk(adr_setup, bus_speed); |
218 | clks->data_time = cmpt_clk(data_pls, bus_speed); | 218 | clks->data_time = cmpt_clk(data_pls, bus_speed); |
219 | clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time | 219 | clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time |
220 | - adr_setup-data_pls, bus_speed); | 220 | - adr_setup-data_pls, bus_speed); |
221 | if (clks->address_time<1) clks->address_time = 1; | 221 | if (clks->address_time < 1) |
222 | if (clks->address_time>4) clks->address_time = 4; | 222 | clks->address_time = 1; |
223 | if (clks->data_time<1) clks->data_time = 1; | 223 | if (clks->address_time > 4) |
224 | if (clks->data_time>16) clks->data_time = 16; | 224 | clks->address_time = 4; |
225 | if (clks->recovery_time<2) clks->recovery_time = 2; | 225 | if (clks->data_time < 1) |
226 | if (clks->recovery_time>17) clks->recovery_time = 17; | 226 | clks->data_time = 1; |
227 | if (clks->data_time > 16) | ||
228 | clks->data_time = 16; | ||
229 | if (clks->recovery_time < 2) | ||
230 | clks->recovery_time = 2; | ||
231 | if (clks->recovery_time > 17) | ||
232 | clks->recovery_time = 17; | ||
227 | } else { | 233 | } else { |
228 | clks->address_time = 1; | 234 | clks->address_time = 1; |
229 | clks->data_time = 1; | 235 | clks->data_time = 1; |
230 | clks->recovery_time = 2; | 236 | clks->recovery_time = 2; |
231 | /* minimal values */ | 237 | /* minimal values */ |
232 | } | 238 | } |
233 | |||
234 | } | 239 | } |
235 | 240 | ||
236 | static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) | 241 | static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) |
@@ -247,8 +252,8 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
247 | 252 | ||
248 | /* sets drive->drive_data for both drives */ | 253 | /* sets drive->drive_data for both drives */ |
249 | compute_pios(drive, pio); | 254 | compute_pios(drive, pio); |
250 | pio1 = hwif->drives[0].drive_data; | 255 | pio1 = hwif->drives[0].drive_data; |
251 | pio2 = hwif->drives[1].drive_data; | 256 | pio2 = hwif->drives[1].drive_data; |
252 | 257 | ||
253 | compute_clocks(pio1, &first); | 258 | compute_clocks(pio1, &first); |
254 | compute_clocks(pio2, &second); | 259 | compute_clocks(pio2, &second); |
@@ -275,7 +280,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
275 | 280 | ||
276 | spin_lock_irqsave(&opti621_lock, flags); | 281 | spin_lock_irqsave(&opti621_lock, flags); |
277 | 282 | ||
278 | reg_base = hwif->io_ports[IDE_DATA_OFFSET]; | 283 | reg_base = hwif->io_ports[IDE_DATA_OFFSET]; |
279 | 284 | ||
280 | /* allow Register-B */ | 285 | /* allow Register-B */ |
281 | outb(0xc0, reg_base + CNTRL_REG); | 286 | outb(0xc0, reg_base + CNTRL_REG); |
@@ -324,7 +329,7 @@ static void __devinit opti621_port_init_devs(ide_hwif_t *hwif) | |||
324 | /* | 329 | /* |
325 | * init_hwif_opti621() is called once for each hwif found at boot. | 330 | * init_hwif_opti621() is called once for each hwif found at boot. |
326 | */ | 331 | */ |
327 | static void __devinit init_hwif_opti621 (ide_hwif_t *hwif) | 332 | static void __devinit init_hwif_opti621(ide_hwif_t *hwif) |
328 | { | 333 | { |
329 | hwif->port_init_devs = opti621_port_init_devs; | 334 | hwif->port_init_devs = opti621_port_init_devs; |
330 | hwif->set_pio_mode = &opti621_set_pio_mode; | 335 | hwif->set_pio_mode = &opti621_set_pio_mode; |
@@ -334,18 +339,16 @@ static const struct ide_port_info opti621_chipsets[] __devinitdata = { | |||
334 | { /* 0 */ | 339 | { /* 0 */ |
335 | .name = "OPTI621", | 340 | .name = "OPTI621", |
336 | .init_hwif = init_hwif_opti621, | 341 | .init_hwif = init_hwif_opti621, |
337 | .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, | 342 | .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, |
338 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | | 343 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, |
339 | IDE_HFLAG_BOOTABLE, | ||
340 | .pio_mask = ATA_PIO3, | 344 | .pio_mask = ATA_PIO3, |
341 | .swdma_mask = ATA_SWDMA2, | 345 | .swdma_mask = ATA_SWDMA2, |
342 | .mwdma_mask = ATA_MWDMA2, | 346 | .mwdma_mask = ATA_MWDMA2, |
343 | },{ /* 1 */ | 347 | }, { /* 1 */ |
344 | .name = "OPTI621X", | 348 | .name = "OPTI621X", |
345 | .init_hwif = init_hwif_opti621, | 349 | .init_hwif = init_hwif_opti621, |
346 | .enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}}, | 350 | .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, |
347 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | | 351 | .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, |
348 | IDE_HFLAG_BOOTABLE, | ||
349 | .pio_mask = ATA_PIO3, | 352 | .pio_mask = ATA_PIO3, |
350 | .swdma_mask = ATA_SWDMA2, | 353 | .swdma_mask = ATA_SWDMA2, |
351 | .mwdma_mask = ATA_MWDMA2, | 354 | .mwdma_mask = ATA_MWDMA2, |
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index decef0f47674..89d74ffdb207 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c | |||
@@ -307,9 +307,9 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif) | |||
307 | } | 307 | } |
308 | 308 | ||
309 | #ifndef CONFIG_IA64 | 309 | #ifndef CONFIG_IA64 |
310 | #define IDE_HFLAGS_PIIX (IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE) | 310 | #define IDE_HFLAGS_PIIX IDE_HFLAG_LEGACY_IRQS |
311 | #else | 311 | #else |
312 | #define IDE_HFLAGS_PIIX IDE_HFLAG_BOOTABLE | 312 | #define IDE_HFLAGS_PIIX 0 |
313 | #endif | 313 | #endif |
314 | 314 | ||
315 | #define DECLARE_PIIX_DEV(name_str, udma) \ | 315 | #define DECLARE_PIIX_DEV(name_str, udma) \ |
diff --git a/drivers/ide/pci/rz1000.c b/drivers/ide/pci/rz1000.c index 51676612f78f..532154adba29 100644 --- a/drivers/ide/pci/rz1000.c +++ b/drivers/ide/pci/rz1000.c | |||
@@ -43,7 +43,7 @@ static const struct ide_port_info rz1000_chipset __devinitdata = { | |||
43 | .name = "RZ100x", | 43 | .name = "RZ100x", |
44 | .init_hwif = init_hwif_rz1000, | 44 | .init_hwif = init_hwif_rz1000, |
45 | .chipset = ide_rz1000, | 45 | .chipset = ide_rz1000, |
46 | .host_flags = IDE_HFLAG_NO_DMA | IDE_HFLAG_BOOTABLE, | 46 | .host_flags = IDE_HFLAG_NO_DMA, |
47 | }; | 47 | }; |
48 | 48 | ||
49 | static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 49 | static int __devinit rz1000_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index 561aa47c7720..44985c8f36e7 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c | |||
@@ -307,8 +307,7 @@ static const struct ide_port_info sc1200_chipset __devinitdata = { | |||
307 | .init_hwif = init_hwif_sc1200, | 307 | .init_hwif = init_hwif_sc1200, |
308 | .host_flags = IDE_HFLAG_SERIALIZE | | 308 | .host_flags = IDE_HFLAG_SERIALIZE | |
309 | IDE_HFLAG_POST_SET_MODE | | 309 | IDE_HFLAG_POST_SET_MODE | |
310 | IDE_HFLAG_ABUSE_DMA_MODES | | 310 | IDE_HFLAG_ABUSE_DMA_MODES, |
311 | IDE_HFLAG_BOOTABLE, | ||
312 | .pio_mask = ATA_PIO4, | 311 | .pio_mask = ATA_PIO4, |
313 | .mwdma_mask = ATA_MWDMA2, | 312 | .mwdma_mask = ATA_MWDMA2, |
314 | .udma_mask = ATA_UDMA2, | 313 | .udma_mask = ATA_UDMA2, |
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index ef07c7a8b97a..52145796f12f 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c | |||
@@ -65,7 +65,7 @@ | |||
65 | 65 | ||
66 | static struct scc_ports { | 66 | static struct scc_ports { |
67 | unsigned long ctl, dma; | 67 | unsigned long ctl, dma; |
68 | unsigned char hwif_id; /* for removing hwif from system */ | 68 | ide_hwif_t *hwif; /* for removing port from system */ |
69 | } scc_ports[MAX_HWIFS]; | 69 | } scc_ports[MAX_HWIFS]; |
70 | 70 | ||
71 | /* PIO transfer mode table */ | 71 | /* PIO transfer mode table */ |
@@ -534,12 +534,8 @@ static int scc_ide_setup_pci_device(struct pci_dev *dev, | |||
534 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; | 534 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
535 | int i; | 535 | int i; |
536 | 536 | ||
537 | for (i = 0; i < MAX_HWIFS; i++) { | 537 | hwif = ide_find_port(); |
538 | hwif = &ide_hwifs[i]; | 538 | if (hwif == NULL) { |
539 | if (hwif->chipset == ide_unknown) | ||
540 | break; /* pick an unused entry */ | ||
541 | } | ||
542 | if (i == MAX_HWIFS) { | ||
543 | printk(KERN_ERR "%s: too many IDE interfaces, " | 539 | printk(KERN_ERR "%s: too many IDE interfaces, " |
544 | "no room in table\n", SCC_PATA_NAME); | 540 | "no room in table\n", SCC_PATA_NAME); |
545 | return -ENOMEM; | 541 | return -ENOMEM; |
@@ -696,7 +692,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) | |||
696 | { | 692 | { |
697 | struct scc_ports *ports = ide_get_hwifdata(hwif); | 693 | struct scc_ports *ports = ide_get_hwifdata(hwif); |
698 | 694 | ||
699 | ports->hwif_id = hwif->index; | 695 | ports->hwif = hwif; |
700 | 696 | ||
701 | hwif->dma_command = hwif->dma_base; | 697 | hwif->dma_command = hwif->dma_base; |
702 | hwif->dma_status = hwif->dma_base + 0x04; | 698 | hwif->dma_status = hwif->dma_base + 0x04; |
@@ -725,8 +721,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) | |||
725 | .name = name_str, \ | 721 | .name = name_str, \ |
726 | .init_iops = init_iops_scc, \ | 722 | .init_iops = init_iops_scc, \ |
727 | .init_hwif = init_hwif_scc, \ | 723 | .init_hwif = init_hwif_scc, \ |
728 | .host_flags = IDE_HFLAG_SINGLE | \ | 724 | .host_flags = IDE_HFLAG_SINGLE, \ |
729 | IDE_HFLAG_BOOTABLE, \ | ||
730 | .pio_mask = ATA_PIO4, \ | 725 | .pio_mask = ATA_PIO4, \ |
731 | } | 726 | } |
732 | 727 | ||
@@ -758,7 +753,7 @@ static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_i | |||
758 | static void __devexit scc_remove(struct pci_dev *dev) | 753 | static void __devexit scc_remove(struct pci_dev *dev) |
759 | { | 754 | { |
760 | struct scc_ports *ports = pci_get_drvdata(dev); | 755 | struct scc_ports *ports = pci_get_drvdata(dev); |
761 | ide_hwif_t *hwif = &ide_hwifs[ports->hwif_id]; | 756 | ide_hwif_t *hwif = ports->hwif; |
762 | unsigned long ctl_base = pci_resource_start(dev, 0); | 757 | unsigned long ctl_base = pci_resource_start(dev, 0); |
763 | unsigned long dma_base = pci_resource_start(dev, 1); | 758 | unsigned long dma_base = pci_resource_start(dev, 1); |
764 | unsigned long ctl_size = pci_resource_len(dev, 0); | 759 | unsigned long ctl_size = pci_resource_len(dev, 0); |
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index c11880b0709f..cfe927469793 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c | |||
@@ -350,8 +350,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif) | |||
350 | 350 | ||
351 | #define IDE_HFLAGS_SVWKS \ | 351 | #define IDE_HFLAGS_SVWKS \ |
352 | (IDE_HFLAG_LEGACY_IRQS | \ | 352 | (IDE_HFLAG_LEGACY_IRQS | \ |
353 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | 353 | IDE_HFLAG_ABUSE_SET_DMA_MODE) |
354 | IDE_HFLAG_BOOTABLE) | ||
355 | 354 | ||
356 | static const struct ide_port_info serverworks_chipsets[] __devinitdata = { | 355 | static const struct ide_port_info serverworks_chipsets[] __devinitdata = { |
357 | { /* 0 */ | 356 | { /* 0 */ |
@@ -418,7 +417,7 @@ static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device | |||
418 | else if (idx == 2 || idx == 3) { | 417 | else if (idx == 2 || idx == 3) { |
419 | if ((PCI_FUNC(dev->devfn) & 1) == 0) { | 418 | if ((PCI_FUNC(dev->devfn) & 1) == 0) { |
420 | if (pci_resource_start(dev, 0) != 0x01f1) | 419 | if (pci_resource_start(dev, 0) != 0x01f1) |
421 | d.host_flags &= ~IDE_HFLAG_BOOTABLE; | 420 | d.host_flags |= IDE_HFLAG_NON_BOOTABLE; |
422 | d.host_flags |= IDE_HFLAG_SINGLE; | 421 | d.host_flags |= IDE_HFLAG_SINGLE; |
423 | } else | 422 | } else |
424 | d.host_flags &= ~IDE_HFLAG_SINGLE; | 423 | d.host_flags &= ~IDE_HFLAG_SINGLE; |
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c index 9d1a3038af9b..6bd9523cf642 100644 --- a/drivers/ide/pci/sgiioc4.c +++ b/drivers/ide/pci/sgiioc4.c | |||
@@ -590,20 +590,12 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev) | |||
590 | unsigned long bar0, cmd_phys_base, ctl; | 590 | unsigned long bar0, cmd_phys_base, ctl; |
591 | void __iomem *virt_base; | 591 | void __iomem *virt_base; |
592 | ide_hwif_t *hwif; | 592 | ide_hwif_t *hwif; |
593 | int h; | ||
594 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; | 593 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
595 | hw_regs_t hw; | 594 | hw_regs_t hw; |
596 | struct ide_port_info d = sgiioc4_port_info; | 595 | struct ide_port_info d = sgiioc4_port_info; |
597 | 596 | ||
598 | /* | 597 | hwif = ide_find_port(); |
599 | * Find an empty HWIF; if none available, return -ENOMEM. | 598 | if (hwif == NULL) { |
600 | */ | ||
601 | for (h = 0; h < MAX_HWIFS; ++h) { | ||
602 | hwif = &ide_hwifs[h]; | ||
603 | if (hwif->chipset == ide_unknown) | ||
604 | break; | ||
605 | } | ||
606 | if (h == MAX_HWIFS) { | ||
607 | printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", | 599 | printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", |
608 | DRV_NAME); | 600 | DRV_NAME); |
609 | return -ENOMEM; | 601 | return -ENOMEM; |
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index b6be1b45f329..c9ecab8aeb61 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c | |||
@@ -808,7 +808,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) | |||
808 | .init_chipset = init_chipset_siimage, \ | 808 | .init_chipset = init_chipset_siimage, \ |
809 | .init_iops = init_iops_siimage, \ | 809 | .init_iops = init_iops_siimage, \ |
810 | .init_hwif = init_hwif_siimage, \ | 810 | .init_hwif = init_hwif_siimage, \ |
811 | .host_flags = IDE_HFLAG_BOOTABLE, \ | ||
812 | .pio_mask = ATA_PIO4, \ | 811 | .pio_mask = ATA_PIO4, \ |
813 | .mwdma_mask = ATA_MWDMA2, \ | 812 | .mwdma_mask = ATA_MWDMA2, \ |
814 | .udma_mask = ATA_UDMA6, \ | 813 | .udma_mask = ATA_UDMA6, \ |
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index 512bb4c1fd5c..181b647e5ca9 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c | |||
@@ -59,10 +59,10 @@ | |||
59 | #define ATA_16 0x01 | 59 | #define ATA_16 0x01 |
60 | #define ATA_33 0x02 | 60 | #define ATA_33 0x02 |
61 | #define ATA_66 0x03 | 61 | #define ATA_66 0x03 |
62 | #define ATA_100a 0x04 // SiS730/SiS550 is ATA100 with ATA66 layout | 62 | #define ATA_100a 0x04 /* SiS730/SiS550 is ATA100 with ATA66 layout */ |
63 | #define ATA_100 0x05 | 63 | #define ATA_100 0x05 |
64 | #define ATA_133a 0x06 // SiS961b with 133 support | 64 | #define ATA_133a 0x06 /* SiS961b with 133 support */ |
65 | #define ATA_133 0x07 // SiS962/963 | 65 | #define ATA_133 0x07 /* SiS962/963 */ |
66 | 66 | ||
67 | static u8 chipset_family; | 67 | static u8 chipset_family; |
68 | 68 | ||
@@ -111,69 +111,70 @@ static const struct { | |||
111 | Indexed by chipset_family and (dma_mode - XFER_UDMA_0) */ | 111 | Indexed by chipset_family and (dma_mode - XFER_UDMA_0) */ |
112 | 112 | ||
113 | /* {0, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */ | 113 | /* {0, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */ |
114 | static u8 cycle_time_offset[] = {0,0,5,4,4,0,0}; | 114 | static u8 cycle_time_offset[] = { 0, 0, 5, 4, 4, 0, 0 }; |
115 | static u8 cycle_time_range[] = {0,0,2,3,3,4,4}; | 115 | static u8 cycle_time_range[] = { 0, 0, 2, 3, 3, 4, 4 }; |
116 | static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = { | 116 | static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = { |
117 | {0,0,0,0,0,0,0}, /* no udma */ | 117 | { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */ |
118 | {0,0,0,0,0,0,0}, /* no udma */ | 118 | { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */ |
119 | {3,2,1,0,0,0,0}, /* ATA_33 */ | 119 | { 3, 2, 1, 0, 0, 0, 0 }, /* ATA_33 */ |
120 | {7,5,3,2,1,0,0}, /* ATA_66 */ | 120 | { 7, 5, 3, 2, 1, 0, 0 }, /* ATA_66 */ |
121 | {7,5,3,2,1,0,0}, /* ATA_100a (730 specific), differences are on cycle_time range and offset */ | 121 | { 7, 5, 3, 2, 1, 0, 0 }, /* ATA_100a (730 specific), |
122 | {11,7,5,4,2,1,0}, /* ATA_100 */ | 122 | different cycle_time range and offset */ |
123 | {15,10,7,5,3,2,1}, /* ATA_133a (earliest 691 southbridges) */ | 123 | { 11, 7, 5, 4, 2, 1, 0 }, /* ATA_100 */ |
124 | {15,10,7,5,3,2,1}, /* ATA_133 */ | 124 | { 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133a (earliest 691 southbridges) */ |
125 | { 15, 10, 7, 5, 3, 2, 1 }, /* ATA_133 */ | ||
125 | }; | 126 | }; |
126 | /* CRC Valid Setup Time vary across IDE clock setting 33/66/100/133 | 127 | /* CRC Valid Setup Time vary across IDE clock setting 33/66/100/133 |
127 | See SiS962 data sheet for more detail */ | 128 | See SiS962 data sheet for more detail */ |
128 | static u8 cvs_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = { | 129 | static u8 cvs_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = { |
129 | {0,0,0,0,0,0,0}, /* no udma */ | 130 | { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */ |
130 | {0,0,0,0,0,0,0}, /* no udma */ | 131 | { 0, 0, 0, 0, 0, 0, 0 }, /* no UDMA */ |
131 | {2,1,1,0,0,0,0}, | 132 | { 2, 1, 1, 0, 0, 0, 0 }, |
132 | {4,3,2,1,0,0,0}, | 133 | { 4, 3, 2, 1, 0, 0, 0 }, |
133 | {4,3,2,1,0,0,0}, | 134 | { 4, 3, 2, 1, 0, 0, 0 }, |
134 | {6,4,3,1,1,1,0}, | 135 | { 6, 4, 3, 1, 1, 1, 0 }, |
135 | {9,6,4,2,2,2,2}, | 136 | { 9, 6, 4, 2, 2, 2, 2 }, |
136 | {9,6,4,2,2,2,2}, | 137 | { 9, 6, 4, 2, 2, 2, 2 }, |
137 | }; | 138 | }; |
138 | /* Initialize time, Active time, Recovery time vary across | 139 | /* Initialize time, Active time, Recovery time vary across |
139 | IDE clock settings. These 3 arrays hold the register value | 140 | IDE clock settings. These 3 arrays hold the register value |
140 | for PIO0/1/2/3/4 and DMA0/1/2 mode in order */ | 141 | for PIO0/1/2/3/4 and DMA0/1/2 mode in order */ |
141 | static u8 ini_time_value[][8] = { | 142 | static u8 ini_time_value[][8] = { |
142 | {0,0,0,0,0,0,0,0}, | 143 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
143 | {0,0,0,0,0,0,0,0}, | 144 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
144 | {2,1,0,0,0,1,0,0}, | 145 | { 2, 1, 0, 0, 0, 1, 0, 0 }, |
145 | {4,3,1,1,1,3,1,1}, | 146 | { 4, 3, 1, 1, 1, 3, 1, 1 }, |
146 | {4,3,1,1,1,3,1,1}, | 147 | { 4, 3, 1, 1, 1, 3, 1, 1 }, |
147 | {6,4,2,2,2,4,2,2}, | 148 | { 6, 4, 2, 2, 2, 4, 2, 2 }, |
148 | {9,6,3,3,3,6,3,3}, | 149 | { 9, 6, 3, 3, 3, 6, 3, 3 }, |
149 | {9,6,3,3,3,6,3,3}, | 150 | { 9, 6, 3, 3, 3, 6, 3, 3 }, |
150 | }; | 151 | }; |
151 | static u8 act_time_value[][8] = { | 152 | static u8 act_time_value[][8] = { |
152 | {0,0,0,0,0,0,0,0}, | 153 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
153 | {0,0,0,0,0,0,0,0}, | 154 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
154 | {9,9,9,2,2,7,2,2}, | 155 | { 9, 9, 9, 2, 2, 7, 2, 2 }, |
155 | {19,19,19,5,4,14,5,4}, | 156 | { 19, 19, 19, 5, 4, 14, 5, 4 }, |
156 | {19,19,19,5,4,14,5,4}, | 157 | { 19, 19, 19, 5, 4, 14, 5, 4 }, |
157 | {28,28,28,7,6,21,7,6}, | 158 | { 28, 28, 28, 7, 6, 21, 7, 6 }, |
158 | {38,38,38,10,9,28,10,9}, | 159 | { 38, 38, 38, 10, 9, 28, 10, 9 }, |
159 | {38,38,38,10,9,28,10,9}, | 160 | { 38, 38, 38, 10, 9, 28, 10, 9 }, |
160 | }; | 161 | }; |
161 | static u8 rco_time_value[][8] = { | 162 | static u8 rco_time_value[][8] = { |
162 | {0,0,0,0,0,0,0,0}, | 163 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
163 | {0,0,0,0,0,0,0,0}, | 164 | { 0, 0, 0, 0, 0, 0, 0, 0 }, |
164 | {9,2,0,2,0,7,1,1}, | 165 | { 9, 2, 0, 2, 0, 7, 1, 1 }, |
165 | {19,5,1,5,2,16,3,2}, | 166 | { 19, 5, 1, 5, 2, 16, 3, 2 }, |
166 | {19,5,1,5,2,16,3,2}, | 167 | { 19, 5, 1, 5, 2, 16, 3, 2 }, |
167 | {30,9,3,9,4,25,6,4}, | 168 | { 30, 9, 3, 9, 4, 25, 6, 4 }, |
168 | {40,12,4,12,5,34,12,5}, | 169 | { 40, 12, 4, 12, 5, 34, 12, 5 }, |
169 | {40,12,4,12,5,34,12,5}, | 170 | { 40, 12, 4, 12, 5, 34, 12, 5 }, |
170 | }; | 171 | }; |
171 | 172 | ||
172 | /* | 173 | /* |
173 | * Printing configuration | 174 | * Printing configuration |
174 | */ | 175 | */ |
175 | /* Used for chipset type printing at boot time */ | 176 | /* Used for chipset type printing at boot time */ |
176 | static char* chipset_capability[] = { | 177 | static char *chipset_capability[] = { |
177 | "ATA", "ATA 16", | 178 | "ATA", "ATA 16", |
178 | "ATA 33", "ATA 66", | 179 | "ATA 33", "ATA 66", |
179 | "ATA 100 (1st gen)", "ATA 100 (2nd gen)", | 180 | "ATA 100 (1st gen)", "ATA 100 (2nd gen)", |
@@ -272,7 +273,7 @@ static void sis_program_timings(ide_drive_t *drive, const u8 mode) | |||
272 | sis_ata133_program_timings(drive, mode); | 273 | sis_ata133_program_timings(drive, mode); |
273 | } | 274 | } |
274 | 275 | ||
275 | static void config_drive_art_rwp (ide_drive_t *drive) | 276 | static void config_drive_art_rwp(ide_drive_t *drive) |
276 | { | 277 | { |
277 | ide_hwif_t *hwif = HWIF(drive); | 278 | ide_hwif_t *hwif = HWIF(drive); |
278 | struct pci_dev *dev = to_pci_dev(hwif->dev); | 279 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
@@ -358,8 +359,7 @@ static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) | |||
358 | return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5; | 359 | return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5; |
359 | } | 360 | } |
360 | 361 | ||
361 | /* Chip detection and general config */ | 362 | static int __devinit sis_find_family(struct pci_dev *dev) |
362 | static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name) | ||
363 | { | 363 | { |
364 | struct pci_dev *host; | 364 | struct pci_dev *host; |
365 | int i = 0; | 365 | int i = 0; |
@@ -381,7 +381,7 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c | |||
381 | chipset_family = ATA_100a; | 381 | chipset_family = ATA_100a; |
382 | } | 382 | } |
383 | pci_dev_put(host); | 383 | pci_dev_put(host); |
384 | 384 | ||
385 | printk(KERN_INFO "SIS5513: %s %s controller\n", | 385 | printk(KERN_INFO "SIS5513: %s %s controller\n", |
386 | SiSHostChipInfo[i].name, chipset_capability[chipset_family]); | 386 | SiSHostChipInfo[i].name, chipset_capability[chipset_family]); |
387 | } | 387 | } |
@@ -440,63 +440,60 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c | |||
440 | } | 440 | } |
441 | } | 441 | } |
442 | 442 | ||
443 | if (!chipset_family) | 443 | return chipset_family; |
444 | return -1; | 444 | } |
445 | 445 | ||
446 | static unsigned int __devinit init_chipset_sis5513(struct pci_dev *dev, | ||
447 | const char *name) | ||
448 | { | ||
446 | /* Make general config ops here | 449 | /* Make general config ops here |
447 | 1/ tell IDE channels to operate in Compatibility mode only | 450 | 1/ tell IDE channels to operate in Compatibility mode only |
448 | 2/ tell old chips to allow per drive IDE timings */ | 451 | 2/ tell old chips to allow per drive IDE timings */ |
449 | 452 | ||
450 | { | 453 | u8 reg; |
451 | u8 reg; | 454 | u16 regw; |
452 | u16 regw; | 455 | |
453 | 456 | switch (chipset_family) { | |
454 | switch(chipset_family) { | 457 | case ATA_133: |
455 | case ATA_133: | 458 | /* SiS962 operation mode */ |
456 | /* SiS962 operation mode */ | 459 | pci_read_config_word(dev, 0x50, ®w); |
457 | pci_read_config_word(dev, 0x50, ®w); | 460 | if (regw & 0x08) |
458 | if (regw & 0x08) | 461 | pci_write_config_word(dev, 0x50, regw&0xfff7); |
459 | pci_write_config_word(dev, 0x50, regw&0xfff7); | 462 | pci_read_config_word(dev, 0x52, ®w); |
460 | pci_read_config_word(dev, 0x52, ®w); | 463 | if (regw & 0x08) |
461 | if (regw & 0x08) | 464 | pci_write_config_word(dev, 0x52, regw&0xfff7); |
462 | pci_write_config_word(dev, 0x52, regw&0xfff7); | 465 | break; |
463 | break; | 466 | case ATA_133a: |
464 | case ATA_133a: | 467 | case ATA_100: |
465 | case ATA_100: | 468 | /* Fixup latency */ |
466 | /* Fixup latency */ | 469 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80); |
467 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80); | 470 | /* Set compatibility bit */ |
468 | /* Set compatibility bit */ | 471 | pci_read_config_byte(dev, 0x49, ®); |
469 | pci_read_config_byte(dev, 0x49, ®); | 472 | if (!(reg & 0x01)) |
470 | if (!(reg & 0x01)) { | 473 | pci_write_config_byte(dev, 0x49, reg|0x01); |
471 | pci_write_config_byte(dev, 0x49, reg|0x01); | 474 | break; |
472 | } | 475 | case ATA_100a: |
473 | break; | 476 | case ATA_66: |
474 | case ATA_100a: | 477 | /* Fixup latency */ |
475 | case ATA_66: | 478 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10); |
476 | /* Fixup latency */ | 479 | |
477 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10); | 480 | /* On ATA_66 chips the bit was elsewhere */ |
478 | 481 | pci_read_config_byte(dev, 0x52, ®); | |
479 | /* On ATA_66 chips the bit was elsewhere */ | 482 | if (!(reg & 0x04)) |
480 | pci_read_config_byte(dev, 0x52, ®); | 483 | pci_write_config_byte(dev, 0x52, reg|0x04); |
481 | if (!(reg & 0x04)) { | 484 | break; |
482 | pci_write_config_byte(dev, 0x52, reg|0x04); | 485 | case ATA_33: |
483 | } | 486 | /* On ATA_33 we didn't have a single bit to set */ |
484 | break; | 487 | pci_read_config_byte(dev, 0x09, ®); |
485 | case ATA_33: | 488 | if ((reg & 0x0f) != 0x00) |
486 | /* On ATA_33 we didn't have a single bit to set */ | 489 | pci_write_config_byte(dev, 0x09, reg&0xf0); |
487 | pci_read_config_byte(dev, 0x09, ®); | 490 | case ATA_16: |
488 | if ((reg & 0x0f) != 0x00) { | 491 | /* force per drive recovery and active timings |
489 | pci_write_config_byte(dev, 0x09, reg&0xf0); | 492 | needed on ATA_33 and below chips */ |
490 | } | 493 | pci_read_config_byte(dev, 0x52, ®); |
491 | case ATA_16: | 494 | if (!(reg & 0x08)) |
492 | /* force per drive recovery and active timings | 495 | pci_write_config_byte(dev, 0x52, reg|0x08); |
493 | needed on ATA_33 and below chips */ | 496 | break; |
494 | pci_read_config_byte(dev, 0x52, ®); | ||
495 | if (!(reg & 0x08)) { | ||
496 | pci_write_config_byte(dev, 0x52, reg|0x08); | ||
497 | } | ||
498 | break; | ||
499 | } | ||
500 | } | 497 | } |
501 | 498 | ||
502 | return 0; | 499 | return 0; |
@@ -546,10 +543,8 @@ static u8 __devinit ata66_sis5513(ide_hwif_t *hwif) | |||
546 | return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; | 543 | return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; |
547 | } | 544 | } |
548 | 545 | ||
549 | static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) | 546 | static void __devinit init_hwif_sis5513(ide_hwif_t *hwif) |
550 | { | 547 | { |
551 | u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; | ||
552 | |||
553 | hwif->set_pio_mode = &sis_set_pio_mode; | 548 | hwif->set_pio_mode = &sis_set_pio_mode; |
554 | hwif->set_dma_mode = &sis_set_dma_mode; | 549 | hwif->set_dma_mode = &sis_set_dma_mode; |
555 | 550 | ||
@@ -557,27 +552,29 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) | |||
557 | hwif->udma_filter = sis5513_ata133_udma_filter; | 552 | hwif->udma_filter = sis5513_ata133_udma_filter; |
558 | 553 | ||
559 | hwif->cable_detect = ata66_sis5513; | 554 | hwif->cable_detect = ata66_sis5513; |
560 | |||
561 | if (hwif->dma_base == 0) | ||
562 | return; | ||
563 | |||
564 | hwif->ultra_mask = udma_rates[chipset_family]; | ||
565 | } | 555 | } |
566 | 556 | ||
567 | static const struct ide_port_info sis5513_chipset __devinitdata = { | 557 | static const struct ide_port_info sis5513_chipset __devinitdata = { |
568 | .name = "SIS5513", | 558 | .name = "SIS5513", |
569 | .init_chipset = init_chipset_sis5513, | 559 | .init_chipset = init_chipset_sis5513, |
570 | .init_hwif = init_hwif_sis5513, | 560 | .init_hwif = init_hwif_sis5513, |
571 | .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, | 561 | .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} }, |
572 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA | | 562 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA, |
573 | IDE_HFLAG_BOOTABLE, | ||
574 | .pio_mask = ATA_PIO4, | 563 | .pio_mask = ATA_PIO4, |
575 | .mwdma_mask = ATA_MWDMA2, | 564 | .mwdma_mask = ATA_MWDMA2, |
576 | }; | 565 | }; |
577 | 566 | ||
578 | static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 567 | static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
579 | { | 568 | { |
580 | return ide_setup_pci_device(dev, &sis5513_chipset); | 569 | struct ide_port_info d = sis5513_chipset; |
570 | u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f }; | ||
571 | |||
572 | if (sis_find_family(dev) == 0) | ||
573 | return -ENOTSUPP; | ||
574 | |||
575 | d.udma_mask = udma_rates[chipset_family]; | ||
576 | |||
577 | return ide_setup_pci_device(dev, &d); | ||
581 | } | 578 | } |
582 | 579 | ||
583 | static const struct pci_device_id sis5513_pci_tbl[] = { | 580 | static const struct pci_device_id sis5513_pci_tbl[] = { |
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 1f00251a4a87..40b3eeb2d847 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c | |||
@@ -332,8 +332,7 @@ static const struct ide_port_info sl82c105_chipset __devinitdata = { | |||
332 | #if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT) | 332 | #if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT) |
333 | IDE_HFLAG_FORCE_LEGACY_IRQS | | 333 | IDE_HFLAG_FORCE_LEGACY_IRQS | |
334 | #endif | 334 | #endif |
335 | IDE_HFLAG_NO_AUTODMA | | 335 | IDE_HFLAG_NO_AUTODMA, |
336 | IDE_HFLAG_BOOTABLE, | ||
337 | .pio_mask = ATA_PIO5, | 336 | .pio_mask = ATA_PIO5, |
338 | }; | 337 | }; |
339 | 338 | ||
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index 65f4c2ffaa59..eab557c45d1b 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c | |||
@@ -27,9 +27,9 @@ static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
27 | unsigned long flags; | 27 | unsigned long flags; |
28 | u16 master_data; | 28 | u16 master_data; |
29 | u8 slave_data; | 29 | u8 slave_data; |
30 | int control = 0; | 30 | int control = 0; |
31 | /* ISP RTC */ | 31 | /* ISP RTC */ |
32 | static const u8 timings[][2]= { | 32 | static const u8 timings[][2] = { |
33 | { 0, 0 }, | 33 | { 0, 0 }, |
34 | { 0, 0 }, | 34 | { 0, 0 }, |
35 | { 1, 0 }, | 35 | { 1, 0 }, |
@@ -136,8 +136,8 @@ static void __devinit init_hwif_slc90e66(ide_hwif_t *hwif) | |||
136 | static const struct ide_port_info slc90e66_chipset __devinitdata = { | 136 | static const struct ide_port_info slc90e66_chipset __devinitdata = { |
137 | .name = "SLC90E66", | 137 | .name = "SLC90E66", |
138 | .init_hwif = init_hwif_slc90e66, | 138 | .init_hwif = init_hwif_slc90e66, |
139 | .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, | 139 | .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} }, |
140 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, | 140 | .host_flags = IDE_HFLAG_LEGACY_IRQS, |
141 | .pio_mask = ATA_PIO4, | 141 | .pio_mask = ATA_PIO4, |
142 | .swdma_mask = ATA_SWDMA2_ONLY, | 142 | .swdma_mask = ATA_SWDMA2_ONLY, |
143 | .mwdma_mask = ATA_MWDMA12_ONLY, | 143 | .mwdma_mask = ATA_MWDMA12_ONLY, |
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index 1e4a6262bcef..c15435182e3c 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c | |||
@@ -18,20 +18,20 @@ static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed) | |||
18 | u16 mode, scr = inw(scr_port); | 18 | u16 mode, scr = inw(scr_port); |
19 | 19 | ||
20 | switch (speed) { | 20 | switch (speed) { |
21 | case XFER_UDMA_4: mode = 0x00c0; break; | 21 | case XFER_UDMA_4: mode = 0x00c0; break; |
22 | case XFER_UDMA_3: mode = 0x00b0; break; | 22 | case XFER_UDMA_3: mode = 0x00b0; break; |
23 | case XFER_UDMA_2: mode = 0x00a0; break; | 23 | case XFER_UDMA_2: mode = 0x00a0; break; |
24 | case XFER_UDMA_1: mode = 0x0090; break; | 24 | case XFER_UDMA_1: mode = 0x0090; break; |
25 | case XFER_UDMA_0: mode = 0x0080; break; | 25 | case XFER_UDMA_0: mode = 0x0080; break; |
26 | case XFER_MW_DMA_2: mode = 0x0070; break; | 26 | case XFER_MW_DMA_2: mode = 0x0070; break; |
27 | case XFER_MW_DMA_1: mode = 0x0060; break; | 27 | case XFER_MW_DMA_1: mode = 0x0060; break; |
28 | case XFER_MW_DMA_0: mode = 0x0050; break; | 28 | case XFER_MW_DMA_0: mode = 0x0050; break; |
29 | case XFER_PIO_4: mode = 0x0400; break; | 29 | case XFER_PIO_4: mode = 0x0400; break; |
30 | case XFER_PIO_3: mode = 0x0300; break; | 30 | case XFER_PIO_3: mode = 0x0300; break; |
31 | case XFER_PIO_2: mode = 0x0200; break; | 31 | case XFER_PIO_2: mode = 0x0200; break; |
32 | case XFER_PIO_1: mode = 0x0100; break; | 32 | case XFER_PIO_1: mode = 0x0100; break; |
33 | case XFER_PIO_0: | 33 | case XFER_PIO_0: |
34 | default: mode = 0x0000; break; | 34 | default: mode = 0x0000; break; |
35 | } | 35 | } |
36 | 36 | ||
37 | scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; | 37 | scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; |
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c index a67d02a3f96e..3316b197c779 100644 --- a/drivers/ide/pci/triflex.c +++ b/drivers/ide/pci/triflex.c | |||
@@ -97,7 +97,6 @@ static const struct ide_port_info triflex_device __devinitdata = { | |||
97 | .name = "TRIFLEX", | 97 | .name = "TRIFLEX", |
98 | .init_hwif = init_hwif_triflex, | 98 | .init_hwif = init_hwif_triflex, |
99 | .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, | 99 | .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, |
100 | .host_flags = IDE_HFLAG_BOOTABLE, | ||
101 | .pio_mask = ATA_PIO4, | 100 | .pio_mask = ATA_PIO4, |
102 | .swdma_mask = ATA_SWDMA2, | 101 | .swdma_mask = ATA_SWDMA2, |
103 | .mwdma_mask = ATA_MWDMA2, | 102 | .mwdma_mask = ATA_MWDMA2, |
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index de750f7a43e9..2b8f3a2837d7 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c | |||
@@ -337,7 +337,6 @@ static const struct ide_port_info trm290_chipset __devinitdata = { | |||
337 | IDE_HFLAG_TRUST_BIOS_FOR_DMA | | 337 | IDE_HFLAG_TRUST_BIOS_FOR_DMA | |
338 | #endif | 338 | #endif |
339 | IDE_HFLAG_NO_AUTODMA | | 339 | IDE_HFLAG_NO_AUTODMA | |
340 | IDE_HFLAG_BOOTABLE | | ||
341 | IDE_HFLAG_NO_LBA48, | 340 | IDE_HFLAG_NO_LBA48, |
342 | }; | 341 | }; |
343 | 342 | ||
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index 9004e7521889..cff3cafedc47 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c | |||
@@ -429,11 +429,9 @@ static const struct ide_port_info via82cxxx_chipset __devinitdata = { | |||
429 | .init_hwif = init_hwif_via82cxxx, | 429 | .init_hwif = init_hwif_via82cxxx, |
430 | .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, | 430 | .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, |
431 | .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | | 431 | .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | |
432 | IDE_HFLAG_PIO_NO_DOWNGRADE | | ||
433 | IDE_HFLAG_ABUSE_SET_DMA_MODE | | 432 | IDE_HFLAG_ABUSE_SET_DMA_MODE | |
434 | IDE_HFLAG_POST_SET_MODE | | 433 | IDE_HFLAG_POST_SET_MODE | |
435 | IDE_HFLAG_IO_32BIT | | 434 | IDE_HFLAG_IO_32BIT, |
436 | IDE_HFLAG_BOOTABLE, | ||
437 | .pio_mask = ATA_PIO5, | 435 | .pio_mask = ATA_PIO5, |
438 | .swdma_mask = ATA_SWDMA2, | 436 | .swdma_mask = ATA_SWDMA2, |
439 | .mwdma_mask = ATA_MWDMA2, | 437 | .mwdma_mask = ATA_MWDMA2, |