aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ide/pci
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r--drivers/ide/pci/aec62xx.c2
-rw-r--r--drivers/ide/pci/alim15x3.c242
-rw-r--r--drivers/ide/pci/amd74xx.c2
-rw-r--r--drivers/ide/pci/cmd640.c89
-rw-r--r--drivers/ide/pci/cmd64x.c6
-rw-r--r--drivers/ide/pci/cy82c693.c4
-rw-r--r--drivers/ide/pci/delkin_cb.c9
-rw-r--r--drivers/ide/pci/hpt366.c2
-rw-r--r--drivers/ide/pci/ns87415.c12
-rw-r--r--drivers/ide/pci/opti621.c7
-rw-r--r--drivers/ide/pci/scc_pata.c11
-rw-r--r--drivers/ide/pci/sgiioc4.c27
-rw-r--r--drivers/ide/pci/siimage.c27
-rw-r--r--drivers/ide/pci/trm290.c2
-rw-r--r--drivers/ide/pci/via82cxxx.c2
15 files changed, 76 insertions, 368 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index ca16f37f9486..7f46c224b7c4 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -140,7 +140,7 @@ static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
140 140
141static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) 141static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
142{ 142{
143 int bus_speed = system_bus_clock(); 143 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
144 144
145 if (bus_speed <= 33) 145 if (bus_speed <= 33)
146 pci_set_drvdata(dev, (void *) aec6xxx_33_base); 146 pci_set_drvdata(dev, (void *) aec6xxx_33_base);
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index b5a3bc33e167..b36a22b8c213 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -38,8 +38,6 @@
38 38
39#include <asm/io.h> 39#include <asm/io.h>
40 40
41#define DISPLAY_ALI_TIMINGS
42
43/* 41/*
44 * ALi devices are not plug in. Otherwise these static values would 42 * ALi devices are not plug in. Otherwise these static values would
45 * need to go. They ought to go away anyway 43 * need to go. They ought to go away anyway
@@ -49,236 +47,6 @@ static u8 m5229_revision;
49static u8 chip_is_1543c_e; 47static u8 chip_is_1543c_e;
50static struct pci_dev *isa_dev; 48static struct pci_dev *isa_dev;
51 49
52#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
53#include <linux/stat.h>
54#include <linux/proc_fs.h>
55
56static u8 ali_proc = 0;
57
58static struct pci_dev *bmide_dev;
59
60static char *fifo[4] = {
61 "FIFO Off",
62 "FIFO On ",
63 "DMA mode",
64 "PIO mode" };
65
66static char *udmaT[8] = {
67 "1.5T",
68 " 2T",
69 "2.5T",
70 " 3T",
71 "3.5T",
72 " 4T",
73 " 6T",
74 " 8T"
75};
76
77static char *channel_status[8] = {
78 "OK ",
79 "busy ",
80 "DRQ ",
81 "DRQ busy ",
82 "error ",
83 "error busy ",
84 "error DRQ ",
85 "error DRQ busy"
86};
87
88/**
89 * ali_get_info - generate proc file for ALi IDE
90 * @buffer: buffer to fill
91 * @addr: address of user start in buffer
92 * @offset: offset into 'file'
93 * @count: buffer count
94 *
95 * Walks the Ali devices and outputs summary data on the tuning and
96 * anything else that will help with debugging
97 */
98
99static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
100{
101 unsigned long bibma;
102 u8 reg53h, reg5xh, reg5yh, reg5xh1, reg5yh1, c0, c1, rev, tmp;
103 char *q, *p = buffer;
104
105 /* fetch rev. */
106 pci_read_config_byte(bmide_dev, 0x08, &rev);
107 if (rev >= 0xc1) /* M1543C or newer */
108 udmaT[7] = " ???";
109 else
110 fifo[3] = " ??? ";
111
112 /* first fetch bibma: */
113
114 bibma = pci_resource_start(bmide_dev, 4);
115
116 /*
117 * at that point bibma+0x2 et bibma+0xa are byte
118 * registers to investigate:
119 */
120 c0 = inb(bibma + 0x02);
121 c1 = inb(bibma + 0x0a);
122
123 p += sprintf(p,
124 "\n Ali M15x3 Chipset.\n");
125 p += sprintf(p,
126 " ------------------\n");
127 pci_read_config_byte(bmide_dev, 0x78, &reg53h);
128 p += sprintf(p, "PCI Clock: %d.\n", reg53h);
129
130 pci_read_config_byte(bmide_dev, 0x53, &reg53h);
131 p += sprintf(p,
132 "CD_ROM FIFO:%s, CD_ROM DMA:%s\n",
133 (reg53h & 0x02) ? "Yes" : "No ",
134 (reg53h & 0x01) ? "Yes" : "No " );
135 pci_read_config_byte(bmide_dev, 0x74, &reg53h);
136 p += sprintf(p,
137 "FIFO Status: contains %d Words, runs%s%s\n\n",
138 (reg53h & 0x3f),
139 (reg53h & 0x40) ? " OVERWR" : "",
140 (reg53h & 0x80) ? " OVERRD." : "." );
141
142 p += sprintf(p,
143 "-------------------primary channel"
144 "-------------------secondary channel"
145 "---------\n\n");
146
147 pci_read_config_byte(bmide_dev, 0x09, &reg53h);
148 p += sprintf(p,
149 "channel status: %s"
150 " %s\n",
151 (reg53h & 0x20) ? "On " : "Off",
152 (reg53h & 0x10) ? "On " : "Off" );
153
154 p += sprintf(p,
155 "both channels togth: %s"
156 " %s\n",
157 (c0&0x80) ? "No " : "Yes",
158 (c1&0x80) ? "No " : "Yes" );
159
160 pci_read_config_byte(bmide_dev, 0x76, &reg53h);
161 p += sprintf(p,
162 "Channel state: %s %s\n",
163 channel_status[reg53h & 0x07],
164 channel_status[(reg53h & 0x70) >> 4] );
165
166 pci_read_config_byte(bmide_dev, 0x58, &reg5xh);
167 pci_read_config_byte(bmide_dev, 0x5c, &reg5yh);
168 p += sprintf(p,
169 "Add. Setup Timing: %dT"
170 " %dT\n",
171 (reg5xh & 0x07) ? (reg5xh & 0x07) : 8,
172 (reg5yh & 0x07) ? (reg5yh & 0x07) : 8 );
173
174 pci_read_config_byte(bmide_dev, 0x59, &reg5xh);
175 pci_read_config_byte(bmide_dev, 0x5d, &reg5yh);
176 p += sprintf(p,
177 "Command Act. Count: %dT"
178 " %dT\n"
179 "Command Rec. Count: %dT"
180 " %dT\n\n",
181 (reg5xh & 0x70) ? ((reg5xh & 0x70) >> 4) : 8,
182 (reg5yh & 0x70) ? ((reg5yh & 0x70) >> 4) : 8,
183 (reg5xh & 0x0f) ? (reg5xh & 0x0f) : 16,
184 (reg5yh & 0x0f) ? (reg5yh & 0x0f) : 16 );
185
186 p += sprintf(p,
187 "----------------drive0-----------drive1"
188 "------------drive0-----------drive1------\n\n");
189 p += sprintf(p,
190 "DMA enabled: %s %s"
191 " %s %s\n",
192 (c0&0x20) ? "Yes" : "No ",
193 (c0&0x40) ? "Yes" : "No ",
194 (c1&0x20) ? "Yes" : "No ",
195 (c1&0x40) ? "Yes" : "No " );
196
197 pci_read_config_byte(bmide_dev, 0x54, &reg5xh);
198 pci_read_config_byte(bmide_dev, 0x55, &reg5yh);
199 q = "FIFO threshold: %2d Words %2d Words"
200 " %2d Words %2d Words\n";
201 if (rev < 0xc1) {
202 if ((rev == 0x20) &&
203 (pci_read_config_byte(bmide_dev, 0x4f, &tmp), (tmp &= 0x20))) {
204 p += sprintf(p, q, 8, 8, 8, 8);
205 } else {
206 p += sprintf(p, q,
207 (reg5xh & 0x03) + 12,
208 ((reg5xh & 0x30)>>4) + 12,
209 (reg5yh & 0x03) + 12,
210 ((reg5yh & 0x30)>>4) + 12 );
211 }
212 } else {
213 int t1 = (tmp = (reg5xh & 0x03)) ? (tmp << 3) : 4;
214 int t2 = (tmp = ((reg5xh & 0x30)>>4)) ? (tmp << 3) : 4;
215 int t3 = (tmp = (reg5yh & 0x03)) ? (tmp << 3) : 4;
216 int t4 = (tmp = ((reg5yh & 0x30)>>4)) ? (tmp << 3) : 4;
217 p += sprintf(p, q, t1, t2, t3, t4);
218 }
219
220#if 0
221 p += sprintf(p,
222 "FIFO threshold: %2d Words %2d Words"
223 " %2d Words %2d Words\n",
224 (reg5xh & 0x03) + 12,
225 ((reg5xh & 0x30)>>4) + 12,
226 (reg5yh & 0x03) + 12,
227 ((reg5yh & 0x30)>>4) + 12 );
228#endif
229
230 p += sprintf(p,
231 "FIFO mode: %s %s %s %s\n",
232 fifo[((reg5xh & 0x0c) >> 2)],
233 fifo[((reg5xh & 0xc0) >> 6)],
234 fifo[((reg5yh & 0x0c) >> 2)],
235 fifo[((reg5yh & 0xc0) >> 6)] );
236
237 pci_read_config_byte(bmide_dev, 0x5a, &reg5xh);
238 pci_read_config_byte(bmide_dev, 0x5b, &reg5xh1);
239 pci_read_config_byte(bmide_dev, 0x5e, &reg5yh);
240 pci_read_config_byte(bmide_dev, 0x5f, &reg5yh1);
241
242 p += sprintf(p,/*
243 "------------------drive0-----------drive1"
244 "------------drive0-----------drive1------\n")*/
245 "Dt RW act. Cnt %2dT %2dT"
246 " %2dT %2dT\n"
247 "Dt RW rec. Cnt %2dT %2dT"
248 " %2dT %2dT\n\n",
249 (reg5xh & 0x70) ? ((reg5xh & 0x70) >> 4) : 8,
250 (reg5xh1 & 0x70) ? ((reg5xh1 & 0x70) >> 4) : 8,
251 (reg5yh & 0x70) ? ((reg5yh & 0x70) >> 4) : 8,
252 (reg5yh1 & 0x70) ? ((reg5yh1 & 0x70) >> 4) : 8,
253 (reg5xh & 0x0f) ? (reg5xh & 0x0f) : 16,
254 (reg5xh1 & 0x0f) ? (reg5xh1 & 0x0f) : 16,
255 (reg5yh & 0x0f) ? (reg5yh & 0x0f) : 16,
256 (reg5yh1 & 0x0f) ? (reg5yh1 & 0x0f) : 16 );
257
258 p += sprintf(p,
259 "-----------------------------------UDMA Timings"
260 "--------------------------------\n\n");
261
262 pci_read_config_byte(bmide_dev, 0x56, &reg5xh);
263 pci_read_config_byte(bmide_dev, 0x57, &reg5yh);
264 p += sprintf(p,
265 "UDMA: %s %s"
266 " %s %s\n"
267 "UDMA timings: %s %s"
268 " %s %s\n\n",
269 (reg5xh & 0x08) ? "OK" : "No",
270 (reg5xh & 0x80) ? "OK" : "No",
271 (reg5yh & 0x08) ? "OK" : "No",
272 (reg5yh & 0x80) ? "OK" : "No",
273 udmaT[(reg5xh & 0x07)],
274 udmaT[(reg5xh & 0x70) >> 4],
275 udmaT[reg5yh & 0x07],
276 udmaT[(reg5yh & 0x70) >> 4] );
277
278 return p-buffer; /* => must be less than 4k! */
279}
280#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
281
282/** 50/**
283 * ali_set_pio_mode - set host controller for PIO mode 51 * ali_set_pio_mode - set host controller for PIO mode
284 * @drive: drive 52 * @drive: drive
@@ -294,7 +62,7 @@ static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
294 int s_time, a_time, c_time; 62 int s_time, a_time, c_time;
295 u8 s_clc, a_clc, r_clc; 63 u8 s_clc, a_clc, r_clc;
296 unsigned long flags; 64 unsigned long flags;
297 int bus_speed = system_bus_clock(); 65 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
298 int port = hwif->channel ? 0x5c : 0x58; 66 int port = hwif->channel ? 0x5c : 0x58;
299 int portFIFO = hwif->channel ? 0x55 : 0x54; 67 int portFIFO = hwif->channel ? 0x55 : 0x54;
300 u8 cd_dma_fifo = 0; 68 u8 cd_dma_fifo = 0;
@@ -465,14 +233,6 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
465 233
466 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 234 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
467 235
468#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
469 if (!ali_proc) {
470 ali_proc = 1;
471 bmide_dev = dev;
472 ide_pci_create_host_proc("ali", ali_get_info);
473 }
474#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
475
476 local_irq_save(flags); 236 local_irq_save(flags);
477 237
478 if (m5229_revision < 0xC2) { 238 if (m5229_revision < 0xC2) {
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index f7c883808b02..efcf54338be7 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -179,7 +179,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev,
179 * Determine the system bus clock. 179 * Determine the system bus clock.
180 */ 180 */
181 181
182 amd_clock = system_bus_clock() * 1000; 182 amd_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
183 183
184 switch (amd_clock) { 184 switch (amd_clock) {
185 case 33000: amd_clock = 33333; break; 185 case 33000: amd_clock = 33333; break;
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index 25c2f1bd175f..aaf38109eaec 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -111,10 +111,7 @@
111 111
112#define DRV_NAME "cmd640" 112#define DRV_NAME "cmd640"
113 113
114/* 114static int cmd640_vlb;
115 * This flag is set in ide.c by the parameter: ide0=cmd640_vlb
116 */
117int cmd640_vlb;
118 115
119/* 116/*
120 * CMD640 specific registers definition. 117 * CMD640 specific registers definition.
@@ -350,12 +347,12 @@ static int __init secondary_port_responding(void)
350 347
351 spin_lock_irqsave(&cmd640_lock, flags); 348 spin_lock_irqsave(&cmd640_lock, flags);
352 349
353 outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */ 350 outb_p(0x0a, 0x176); /* select drive0 */
354 udelay(100); 351 udelay(100);
355 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) { 352 if ((inb_p(0x176) & 0x1f) != 0x0a) {
356 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */ 353 outb_p(0x1a, 0x176); /* select drive1 */
357 udelay(100); 354 udelay(100);
358 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) { 355 if ((inb_p(0x176) & 0x1f) != 0x1a) {
359 spin_unlock_irqrestore(&cmd640_lock, flags); 356 spin_unlock_irqrestore(&cmd640_lock, flags);
360 return 0; /* nothing responded */ 357 return 0; /* nothing responded */
361 } 358 }
@@ -383,6 +380,7 @@ static void cmd640_dump_regs(void)
383} 380}
384#endif 381#endif
385 382
383#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
386/* 384/*
387 * Check whether prefetch is on for a drive, 385 * Check whether prefetch is on for a drive,
388 * and initialize the unmask flags for safe operation. 386 * and initialize the unmask flags for safe operation.
@@ -403,9 +401,7 @@ static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
403 drive->no_io_32bit = 0; 401 drive->no_io_32bit = 0;
404 } 402 }
405} 403}
406 404#else
407#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
408
409/* 405/*
410 * Sets prefetch mode for a drive. 406 * Sets prefetch mode for a drive.
411 */ 407 */
@@ -462,34 +458,6 @@ static inline u8 pack_nibbles(u8 upper, u8 lower)
462} 458}
463 459
464/* 460/*
465 * This routine retrieves the initial drive timings from the chipset.
466 */
467static void __init retrieve_drive_counts(unsigned int index)
468{
469 u8 b;
470
471 /*
472 * Get the internal setup timing, and convert to clock count
473 */
474 b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
475 switch (b) {
476 case 0x00: b = 4; break;
477 case 0x80: b = 3; break;
478 case 0x40: b = 2; break;
479 default: b = 5; break;
480 }
481 setup_counts[index] = b;
482
483 /*
484 * Get the active/recovery counts
485 */
486 b = get_cmd640_reg(drwtim_regs[index]);
487 active_counts[index] = (b >> 4) ? (b >> 4) : 0x10;
488 recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
489}
490
491
492/*
493 * This routine writes the prepared setup/active/recovery counts 461 * This routine writes the prepared setup/active/recovery counts
494 * for a drive into the cmd640 chipset registers to active them. 462 * for a drive into the cmd640 chipset registers to active them.
495 */ 463 */
@@ -555,7 +523,14 @@ static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
555{ 523{
556 int setup_time, active_time, recovery_time, clock_time; 524 int setup_time, active_time, recovery_time, clock_time;
557 u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count; 525 u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
558 int bus_speed = system_bus_clock(); 526 int bus_speed;
527
528 if (cmd640_vlb && ide_vlb_clk)
529 bus_speed = ide_vlb_clk;
530 else if (!cmd640_vlb && ide_pci_clk)
531 bus_speed = ide_pci_clk;
532 else
533 bus_speed = system_bus_clock();
559 534
560 if (pio_mode > 5) 535 if (pio_mode > 5)
561 pio_mode = 5; 536 pio_mode = 5;
@@ -679,7 +654,6 @@ static const struct ide_port_info cmd640_port_info __initdata = {
679 .chipset = ide_cmd640, 654 .chipset = ide_cmd640,
680 .host_flags = IDE_HFLAG_SERIALIZE | 655 .host_flags = IDE_HFLAG_SERIALIZE |
681 IDE_HFLAG_NO_DMA | 656 IDE_HFLAG_NO_DMA |
682 IDE_HFLAG_NO_AUTOTUNE |
683 IDE_HFLAG_ABUSE_PREFETCH | 657 IDE_HFLAG_ABUSE_PREFETCH |
684 IDE_HFLAG_ABUSE_FAST_DEVSEL, 658 IDE_HFLAG_ABUSE_FAST_DEVSEL,
685#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 659#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
@@ -862,29 +836,16 @@ static int __init cmd640x_init(void)
862 } 836 }
863 837
864#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 838#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
865 if (drive->autotune || ((index > 1) && second_port_toggled)) { 839 /*
866 /* 840 * Reset timing to the slowest speed and turn off prefetch.
867 * Reset timing to the slowest speed and turn off 841 * This way, the drive identify code has a better chance.
868 * prefetch. This way, the drive identify code has 842 */
869 * a better chance. 843 setup_counts [index] = 4; /* max possible */
870 */ 844 active_counts [index] = 16; /* max possible */
871 setup_counts [index] = 4; /* max possible */ 845 recovery_counts [index] = 16; /* max possible */
872 active_counts [index] = 16; /* max possible */ 846 program_drive_counts(drive, index);
873 recovery_counts [index] = 16; /* max possible */ 847 set_prefetch_mode(drive, index, 0);
874 program_drive_counts(drive, index); 848 printk("cmd640: drive%d timings/prefetch cleared\n", index);
875 set_prefetch_mode(drive, index, 0);
876 printk("cmd640: drive%d timings/prefetch cleared\n", index);
877 } else {
878 /*
879 * Record timings/prefetch without changing them.
880 * This preserves any prior BIOS setup.
881 */
882 retrieve_drive_counts (index);
883 check_prefetch(drive, index);
884 printk("cmd640: drive%d timings/prefetch(%s) preserved",
885 index, drive->no_io_32bit ? "off" : "on");
886 display_clocks(index);
887 }
888#else 849#else
889 /* 850 /*
890 * Set the drive unmask flags to match the prefetch setting 851 * Set the drive unmask flags to match the prefetch setting
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 006fb62656bc..08674711d089 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -68,8 +68,8 @@ static u8 quantize_timing(int timing, int quant)
68 */ 68 */
69static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time) 69static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
70{ 70{
71 struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 71 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
72 int clock_time = 1000 / system_bus_clock(); 72 int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock());
73 u8 cycle_count, active_count, recovery_count, drwtim; 73 u8 cycle_count, active_count, recovery_count, drwtim;
74 static const u8 recovery_values[] = 74 static const u8 recovery_values[] =
75 {15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0}; 75 {15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
@@ -128,7 +128,7 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
128 ide_pio_timings[pio].active_time); 128 ide_pio_timings[pio].active_time);
129 129
130 setup_count = quantize_timing(ide_pio_timings[pio].setup_time, 130 setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
131 1000 / system_bus_clock()); 131 1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock()));
132 132
133 /* 133 /*
134 * The primary channel has individual address setup timing registers 134 * The primary channel has individual address setup timing registers
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index e30eae5a01b6..77cc22c2ad45 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -18,8 +18,6 @@
18 * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA 18 * hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
19 * - this is my first linux driver, so there's probably a lot of room 19 * - this is my first linux driver, so there's probably a lot of room
20 * for optimizations and bug fixing, so feel free to do it. 20 * for optimizations and bug fixing, so feel free to do it.
21 * - use idebus=xx parameter to set PCI bus speed - needed to calc
22 * timings for PIO modes (default will be 40)
23 * - if using PIO mode it's a good idea to set the PIO mode and 21 * - if using PIO mode it's a good idea to set the PIO mode and
24 * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda 22 * 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
25 * - I had some problems with my IBM DHEA with PIO modes < 2 23 * - I had some problems with my IBM DHEA with PIO modes < 2
@@ -136,7 +134,7 @@ static int calc_clk(int time, int bus_speed)
136static void compute_clocks(u8 pio, pio_clocks_t *p_pclk) 134static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
137{ 135{
138 int clk1, clk2; 136 int clk1, clk2;
139 int bus_speed = system_bus_clock(); /* get speed of PCI bus */ 137 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
140 138
141 /* we don't check against CY82C693's min and max speed, 139 /* we don't check against CY82C693's min and max speed,
142 * so you can play with the idebus=xx parameter 140 * so you can play with the idebus=xx parameter
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index c7b7e0483287..b9e457996d0e 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -87,11 +87,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
87 87
88 i = hwif->index; 88 i = hwif->index;
89 89
90 if (hwif->present) 90 ide_init_port_data(hwif, i);
91 ide_unregister(i);
92 else
93 ide_init_port_data(hwif, i);
94
95 ide_init_port_hw(hwif, &hw); 91 ide_init_port_hw(hwif, &hw);
96 hwif->port_ops = &delkin_cb_port_ops; 92 hwif->port_ops = &delkin_cb_port_ops;
97 93
@@ -123,8 +119,7 @@ delkin_cb_remove (struct pci_dev *dev)
123{ 119{
124 ide_hwif_t *hwif = pci_get_drvdata(dev); 120 ide_hwif_t *hwif = pci_get_drvdata(dev);
125 121
126 if (hwif) 122 ide_unregister(hwif);
127 ide_unregister(hwif->index);
128 123
129 pci_release_regions(dev); 124 pci_release_regions(dev);
130 pci_disable_device(dev); 125 pci_disable_device(dev);
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 8c02961d0188..c929dadaaaff 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -760,7 +760,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
760 } 760 }
761 } else 761 } else
762 outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), 762 outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
763 hwif->io_ports[IDE_CONTROL_OFFSET]); 763 hwif->io_ports.ctl_addr);
764} 764}
765 765
766/* 766/*
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index e1b0c9a9ab9c..c13e299077ec 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -72,8 +72,8 @@ static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
72 base = pci_resource_start(pdev, port * 2) & ~3; 72 base = pci_resource_start(pdev, port * 2) & ~3;
73 dmabase = pci_resource_start(pdev, 4) & ~3; 73 dmabase = pci_resource_start(pdev, 4) & ~3;
74 74
75 superio_ide_status[port] = base + IDE_STATUS_OFFSET; 75 superio_ide_status[port] = base + 7;
76 superio_ide_select[port] = base + IDE_SELECT_OFFSET; 76 superio_ide_select[port] = base + 6;
77 superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa); 77 superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
78 78
79 /* Clear error/interrupt, enable dma */ 79 /* Clear error/interrupt, enable dma */
@@ -231,12 +231,12 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
231 * SELECT_DRIVE() properly during first ide_probe_port(). 231 * SELECT_DRIVE() properly during first ide_probe_port().
232 */ 232 */
233 timeout = 10000; 233 timeout = 10000;
234 outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]); 234 outb(12, hwif->io_ports.ctl_addr);
235 udelay(10); 235 udelay(10);
236 outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]); 236 outb(8, hwif->io_ports.ctl_addr);
237 do { 237 do {
238 udelay(50); 238 udelay(50);
239 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 239 stat = hwif->INB(hwif->io_ports.status_addr);
240 if (stat == 0xff) 240 if (stat == 0xff)
241 break; 241 break;
242 } while ((stat & BUSY_STAT) && --timeout); 242 } while ((stat & BUSY_STAT) && --timeout);
@@ -244,7 +244,7 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
244 } 244 }
245 245
246 if (!using_inta) 246 if (!using_inta)
247 hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET]); 247 hwif->irq = ide_default_irq(hwif->io_ports.data_addr);
248 else if (!hwif->irq && hwif->mate && hwif->mate->irq) 248 else if (!hwif->irq && hwif->mate && hwif->mate->irq)
249 hwif->irq = hwif->mate->irq; /* share IRQ with mate */ 249 hwif->irq = hwif->mate->irq; /* share IRQ with mate */
250 250
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 9edacba20ffb..6e99080497bf 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -53,8 +53,7 @@
53 * If you then set the second drive to another PIO, the old value 53 * If you then set the second drive to another PIO, the old value
54 * (automatically selected) will be overrided by yours. 54 * (automatically selected) will be overrided by yours.
55 * There is a 25/33MHz switch in configuration 55 * There is a 25/33MHz switch in configuration
56 * register, but driver is written for use at any frequency which get 56 * register, but driver is written for use at any frequency.
57 * (use idebus=xx to select PCI bus speed).
58 * 57 *
59 * Version 0.1, Nov 8, 1996 58 * Version 0.1, Nov 8, 1996
60 * by Jaromir Koutek, for 2.1.8. 59 * by Jaromir Koutek, for 2.1.8.
@@ -210,7 +209,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks)
210{ 209{
211 if (pio != PIO_NOT_EXIST) { 210 if (pio != PIO_NOT_EXIST) {
212 int adr_setup, data_pls; 211 int adr_setup, data_pls;
213 int bus_speed = system_bus_clock(); 212 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
214 213
215 adr_setup = ide_pio_timings[pio].setup_time; 214 adr_setup = ide_pio_timings[pio].setup_time;
216 data_pls = ide_pio_timings[pio].active_time; 215 data_pls = ide_pio_timings[pio].active_time;
@@ -280,7 +279,7 @@ static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
280 279
281 spin_lock_irqsave(&opti621_lock, flags); 280 spin_lock_irqsave(&opti621_lock, flags);
282 281
283 reg_base = hwif->io_ports[IDE_DATA_OFFSET]; 282 reg_base = hwif->io_ports.data_addr;
284 283
285 /* allow Register-B */ 284 /* allow Register-B */
286 outb(0xc0, reg_base + CNTRL_REG); 285 outb(0xc0, reg_base + CNTRL_REG);
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 17cf86490d59..ad7cdf9060ca 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -334,7 +334,7 @@ static int scc_dma_end(ide_drive_t *drive)
334 334
335 /* errata A308 workaround: Step5 (check data loss) */ 335 /* errata A308 workaround: Step5 (check data loss) */
336 /* We don't check non ide_disk because it is limited to UDMA4 */ 336 /* We don't check non ide_disk because it is limited to UDMA4 */
337 if (!(in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET]) 337 if (!(in_be32((void __iomem *)hwif->io_ports.ctl_addr)
338 & ERR_STAT) && 338 & ERR_STAT) &&
339 drive->media == ide_disk && drive->current_speed > XFER_UDMA_4) { 339 drive->media == ide_disk && drive->current_speed > XFER_UDMA_4) {
340 reg = in_be32((void __iomem *)intsts_port); 340 reg = in_be32((void __iomem *)intsts_port);
@@ -438,7 +438,7 @@ static int scc_dma_test_irq(ide_drive_t *drive)
438 u32 int_stat = in_be32((void __iomem *)hwif->dma_base + 0x014); 438 u32 int_stat = in_be32((void __iomem *)hwif->dma_base + 0x014);
439 439
440 /* SCC errata A252,A308 workaround: Step4 */ 440 /* SCC errata A252,A308 workaround: Step4 */
441 if ((in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET]) 441 if ((in_be32((void __iomem *)hwif->io_ports.ctl_addr)
442 & ERR_STAT) && 442 & ERR_STAT) &&
443 (int_stat & INTSTS_INTRQ)) 443 (int_stat & INTSTS_INTRQ))
444 return 1; 444 return 1;
@@ -534,8 +534,8 @@ static int scc_ide_setup_pci_device(struct pci_dev *dev,
534 } 534 }
535 535
536 memset(&hw, 0, sizeof(hw)); 536 memset(&hw, 0, sizeof(hw));
537 for (i = IDE_DATA_OFFSET; i <= IDE_CONTROL_OFFSET; i++) 537 for (i = 0; i <= 8; i++)
538 hw.io_ports[i] = ports->dma + 0x20 + i * 4; 538 hw.io_ports_array[i] = ports->dma + 0x20 + i * 4;
539 hw.irq = dev->irq; 539 hw.irq = dev->irq;
540 hw.dev = &dev->dev; 540 hw.dev = &dev->dev;
541 hw.chipset = ide_pci; 541 hw.chipset = ide_pci;
@@ -763,9 +763,8 @@ static void __devexit scc_remove(struct pci_dev *dev)
763 hwif->dmatable_cpu = NULL; 763 hwif->dmatable_cpu = NULL;
764 } 764 }
765 765
766 ide_unregister(hwif->index); 766 ide_unregister(hwif);
767 767
768 hwif->chipset = ide_unknown;
769 iounmap((void*)ports->dma); 768 iounmap((void*)ports->dma);
770 iounmap((void*)ports->ctl); 769 iounmap((void*)ports->ctl);
771 pci_release_selected_regions(dev, (1 << 2) - 1); 770 pci_release_selected_regions(dev, (1 << 2) - 1);
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 321a4e28ac19..63e28f4e6d3b 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -98,28 +98,28 @@ sgiioc4_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
98 int i; 98 int i;
99 99
100 /* Registers are word (32 bit) aligned */ 100 /* Registers are word (32 bit) aligned */
101 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) 101 for (i = 0; i <= 7; i++)
102 hw->io_ports[i] = reg + i * 4; 102 hw->io_ports_array[i] = reg + i * 4;
103 103
104 if (ctrl_port) 104 if (ctrl_port)
105 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; 105 hw->io_ports.ctl_addr = ctrl_port;
106 106
107 if (irq_port) 107 if (irq_port)
108 hw->io_ports[IDE_IRQ_OFFSET] = irq_port; 108 hw->io_ports.irq_addr = irq_port;
109} 109}
110 110
111static void 111static void
112sgiioc4_maskproc(ide_drive_t * drive, int mask) 112sgiioc4_maskproc(ide_drive_t * drive, int mask)
113{ 113{
114 writeb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), 114 writeb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
115 (void __iomem *)drive->hwif->io_ports[IDE_CONTROL_OFFSET]); 115 (void __iomem *)drive->hwif->io_ports.ctl_addr);
116} 116}
117 117
118static int 118static int
119sgiioc4_checkirq(ide_hwif_t * hwif) 119sgiioc4_checkirq(ide_hwif_t * hwif)
120{ 120{
121 unsigned long intr_addr = 121 unsigned long intr_addr =
122 hwif->io_ports[IDE_IRQ_OFFSET] + IOC4_INTR_REG * 4; 122 hwif->io_ports.irq_addr + IOC4_INTR_REG * 4;
123 123
124 if ((u8)readl((void __iomem *)intr_addr) & 0x03) 124 if ((u8)readl((void __iomem *)intr_addr) & 0x03)
125 return 1; 125 return 1;
@@ -134,8 +134,8 @@ sgiioc4_clearirq(ide_drive_t * drive)
134{ 134{
135 u32 intr_reg; 135 u32 intr_reg;
136 ide_hwif_t *hwif = HWIF(drive); 136 ide_hwif_t *hwif = HWIF(drive);
137 unsigned long other_ir = 137 struct ide_io_ports *io_ports = &hwif->io_ports;
138 hwif->io_ports[IDE_IRQ_OFFSET] + (IOC4_INTR_REG << 2); 138 unsigned long other_ir = io_ports->irq_addr + (IOC4_INTR_REG << 2);
139 139
140 /* Code to check for PCI error conditions */ 140 /* Code to check for PCI error conditions */
141 intr_reg = readl((void __iomem *)other_ir); 141 intr_reg = readl((void __iomem *)other_ir);
@@ -147,12 +147,12 @@ sgiioc4_clearirq(ide_drive_t * drive)
147 * a "clear" status if it got cleared. If not, then spin 147 * a "clear" status if it got cleared. If not, then spin
148 * for a bit trying to clear it. 148 * for a bit trying to clear it.
149 */ 149 */
150 u8 stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]); 150 u8 stat = sgiioc4_INB(io_ports->status_addr);
151 int count = 0; 151 int count = 0;
152 stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]); 152 stat = sgiioc4_INB(io_ports->status_addr);
153 while ((stat & 0x80) && (count++ < 100)) { 153 while ((stat & 0x80) && (count++ < 100)) {
154 udelay(1); 154 udelay(1);
155 stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]); 155 stat = sgiioc4_INB(io_ports->status_addr);
156 } 156 }
157 157
158 if (intr_reg & 0x02) { 158 if (intr_reg & 0x02) {
@@ -162,9 +162,9 @@ sgiioc4_clearirq(ide_drive_t * drive)
162 pci_stat_cmd_reg; 162 pci_stat_cmd_reg;
163 163
164 pci_err_addr_low = 164 pci_err_addr_low =
165 readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]); 165 readl((void __iomem *)io_ports->irq_addr);
166 pci_err_addr_high = 166 pci_err_addr_high =
167 readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4)); 167 readl((void __iomem *)(io_ports->irq_addr + 4));
168 pci_read_config_dword(dev, PCI_COMMAND, 168 pci_read_config_dword(dev, PCI_COMMAND,
169 &pci_stat_cmd_reg); 169 &pci_stat_cmd_reg);
170 printk(KERN_ERR 170 printk(KERN_ERR
@@ -573,7 +573,6 @@ static const struct ide_port_info sgiioc4_port_info __devinitdata = {
573 .init_dma = ide_dma_sgiioc4, 573 .init_dma = ide_dma_sgiioc4,
574 .port_ops = &sgiioc4_port_ops, 574 .port_ops = &sgiioc4_port_ops,
575 .dma_ops = &sgiioc4_dma_ops, 575 .dma_ops = &sgiioc4_dma_ops,
576 .host_flags = IDE_HFLAG_NO_AUTOTUNE,
577 .mwdma_mask = ATA_MWDMA2_ONLY, 576 .mwdma_mask = ATA_MWDMA2_ONLY,
578}; 577};
579 578
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 1fffea3211bd..c2040a017f47 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -622,9 +622,10 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
622 struct pci_dev *dev = to_pci_dev(hwif->dev); 622 struct pci_dev *dev = to_pci_dev(hwif->dev);
623 void *addr = pci_get_drvdata(dev); 623 void *addr = pci_get_drvdata(dev);
624 u8 ch = hwif->channel; 624 u8 ch = hwif->channel;
625 hw_regs_t hw;
626 unsigned long base; 625 unsigned long base;
627 626
627 struct ide_io_ports *io_ports = &hwif->io_ports;
628
628 /* 629 /*
629 * Fill in the basic HWIF bits 630 * Fill in the basic HWIF bits
630 */ 631 */
@@ -638,7 +639,7 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
638 * based I/O 639 * based I/O
639 */ 640 */
640 641
641 memset(&hw, 0, sizeof(hw_regs_t)); 642 memset(io_ports, 0, sizeof(*io_ports));
642 643
643 base = (unsigned long)addr; 644 base = (unsigned long)addr;
644 if (ch) 645 if (ch)
@@ -651,17 +652,15 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
651 * so we can't currently use it sanely since we want to 652 * so we can't currently use it sanely since we want to
652 * use LBA48 mode. 653 * use LBA48 mode.
653 */ 654 */
654 hw.io_ports[IDE_DATA_OFFSET] = base; 655 io_ports->data_addr = base;
655 hw.io_ports[IDE_ERROR_OFFSET] = base + 1; 656 io_ports->error_addr = base + 1;
656 hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2; 657 io_ports->nsect_addr = base + 2;
657 hw.io_ports[IDE_SECTOR_OFFSET] = base + 3; 658 io_ports->lbal_addr = base + 3;
658 hw.io_ports[IDE_LCYL_OFFSET] = base + 4; 659 io_ports->lbam_addr = base + 4;
659 hw.io_ports[IDE_HCYL_OFFSET] = base + 5; 660 io_ports->lbah_addr = base + 5;
660 hw.io_ports[IDE_SELECT_OFFSET] = base + 6; 661 io_ports->device_addr = base + 6;
661 hw.io_ports[IDE_STATUS_OFFSET] = base + 7; 662 io_ports->status_addr = base + 7;
662 hw.io_ports[IDE_CONTROL_OFFSET] = base + 10; 663 io_ports->ctl_addr = base + 10;
663
664 hw.io_ports[IDE_IRQ_OFFSET] = 0;
665 664
666 if (pdev_is_sata(dev)) { 665 if (pdev_is_sata(dev)) {
667 base = (unsigned long)addr; 666 base = (unsigned long)addr;
@@ -672,8 +671,6 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
672 hwif->sata_scr[SATA_CONTROL_OFFSET] = base + 0x100; 671 hwif->sata_scr[SATA_CONTROL_OFFSET] = base + 0x100;
673 } 672 }
674 673
675 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
676
677 hwif->irq = dev->irq; 674 hwif->irq = dev->irq;
678 675
679 hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00); 676 hwif->dma_base = (unsigned long)addr + (ch ? 0x08 : 0x00);
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 15ee38f7ad3f..a8a3138682ef 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -298,7 +298,7 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
298 if (old != compat && old_mask == 0xff) { 298 if (old != compat && old_mask == 0xff) {
299 /* leave lower 10 bits untouched */ 299 /* leave lower 10 bits untouched */
300 compat += (next_offset += 0x400); 300 compat += (next_offset += 0x400);
301 hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2; 301 hwif->io_ports.ctl_addr = compat + 2;
302 outw(compat | 1, hwif->config_data); 302 outw(compat | 1, hwif->config_data);
303 new = inw(hwif->config_data); 303 new = inw(hwif->config_data);
304 printk(KERN_INFO "%s: control basereg workaround: " 304 printk(KERN_INFO "%s: control basereg workaround: "
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index bbd17bec6ffe..566e0ecb8db1 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -340,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
340 * Determine system bus clock. 340 * Determine system bus clock.
341 */ 341 */
342 342
343 via_clock = system_bus_clock() * 1000; 343 via_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
344 344
345 switch (via_clock) { 345 switch (via_clock) {
346 case 33000: via_clock = 33333; break; 346 case 33000: via_clock = 33333; break;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-29 02:13:01 -0500