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-rw-r--r--drivers/ide/pci/aec62xx.c32
-rw-r--r--drivers/ide/pci/alim15x3.c15
-rw-r--r--drivers/ide/pci/amd74xx.c5
-rw-r--r--drivers/ide/pci/atiixp.c41
-rw-r--r--drivers/ide/pci/cmd64x.c47
-rw-r--r--drivers/ide/pci/cs5520.c5
-rw-r--r--drivers/ide/pci/cs5530.c41
-rw-r--r--drivers/ide/pci/cs5535.c19
-rw-r--r--drivers/ide/pci/cy82c693.c33
-rw-r--r--drivers/ide/pci/hpt34x.c42
-rw-r--r--drivers/ide/pci/hpt366.c24
-rw-r--r--drivers/ide/pci/it8213.c14
-rw-r--r--drivers/ide/pci/it821x.c14
-rw-r--r--drivers/ide/pci/jmicron.c14
-rw-r--r--drivers/ide/pci/ns87415.c13
-rw-r--r--drivers/ide/pci/opti621.c63
-rw-r--r--drivers/ide/pci/pdc202xx_new.c28
-rw-r--r--drivers/ide/pci/pdc202xx_old.c104
-rw-r--r--drivers/ide/pci/piix.c119
-rw-r--r--drivers/ide/pci/sc1200.c11
-rw-r--r--drivers/ide/pci/serverworks.c59
-rw-r--r--drivers/ide/pci/sgiioc4.c125
-rw-r--r--drivers/ide/pci/siimage.c113
-rw-r--r--drivers/ide/pci/sis5513.c59
-rw-r--r--drivers/ide/pci/sl82c105.c39
-rw-r--r--drivers/ide/pci/slc90e66.c22
-rw-r--r--drivers/ide/pci/tc86c001.c46
-rw-r--r--drivers/ide/pci/triflex.c24
-rw-r--r--drivers/ide/pci/trm290.c42
-rw-r--r--drivers/ide/pci/via82cxxx.c5
30 files changed, 461 insertions, 757 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index d261bfbad222..990eafe5ea11 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -94,9 +94,9 @@ static u8 aec62xx_ratemask (ide_drive_t *drive)
94 switch(hwif->pci_dev->device) { 94 switch(hwif->pci_dev->device) {
95 case PCI_DEVICE_ID_ARTOP_ATP865: 95 case PCI_DEVICE_ID_ARTOP_ATP865:
96 case PCI_DEVICE_ID_ARTOP_ATP865R: 96 case PCI_DEVICE_ID_ARTOP_ATP865R:
97 mode = (hwif->INB(((hwif->channel) ? 97 mode = (inb(hwif->channel ?
98 hwif->mate->dma_status : 98 hwif->mate->dma_status :
99 hwif->dma_status)) & 0x10) ? 4 : 3; 99 hwif->dma_status) & 0x10) ? 4 : 3;
100 break; 100 break;
101 case PCI_DEVICE_ID_ARTOP_ATP860: 101 case PCI_DEVICE_ID_ARTOP_ATP860:
102 case PCI_DEVICE_ID_ARTOP_ATP860R: 102 case PCI_DEVICE_ID_ARTOP_ATP860R:
@@ -209,25 +209,13 @@ static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
209 209
210static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) 210static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
211{ 211{
212 ide_hwif_t *hwif = HWIF(drive); 212 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
213 struct hd_driveid *id = drive->id; 213 return 0;
214
215 if ((id->capability & 1) && drive->autodma) {
216
217 if (ide_use_dma(drive)) {
218 if (config_chipset_for_dma(drive))
219 return hwif->ide_dma_on(drive);
220 }
221
222 goto fast_ata_pio;
223 214
224 } else if ((id->capability & 8) || (id->field_valid & 2)) { 215 if (ide_use_fast_pio(drive))
225fast_ata_pio:
226 aec62xx_tune_drive(drive, 5); 216 aec62xx_tune_drive(drive, 5);
227 return hwif->ide_dma_off_quietly(drive); 217
228 } 218 return -1;
229 /* IORDY not supported */
230 return 0;
231} 219}
232 220
233static int aec62xx_irq_timeout (ide_drive_t *drive) 221static int aec62xx_irq_timeout (ide_drive_t *drive)
@@ -286,10 +274,8 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
286 hwif->tuneproc = &aec62xx_tune_drive; 274 hwif->tuneproc = &aec62xx_tune_drive;
287 hwif->speedproc = &aec62xx_tune_chipset; 275 hwif->speedproc = &aec62xx_tune_chipset;
288 276
289 if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 277 if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
290 hwif->serialized = hwif->channel; 278 hwif->serialized = hwif->channel;
291 hwif->no_dsc = 1;
292 }
293 279
294 if (hwif->mate) 280 if (hwif->mate)
295 hwif->mate->serialized = hwif->serialized; 281 hwif->mate->serialized = hwif->serialized;
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 68df77ec502b..4debd18d52f8 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -507,17 +507,15 @@ static int config_chipset_for_dma (ide_drive_t *drive)
507 * 507 *
508 * Configure a drive for DMA operation. If DMA is not possible we 508 * Configure a drive for DMA operation. If DMA is not possible we
509 * drop the drive into PIO mode instead. 509 * drop the drive into PIO mode instead.
510 *
511 * FIXME: exactly what are we trying to return here
512 */ 510 */
513 511
514static int ali15x3_config_drive_for_dma(ide_drive_t *drive) 512static int ali15x3_config_drive_for_dma(ide_drive_t *drive)
515{ 513{
516 ide_hwif_t *hwif = HWIF(drive); 514 ide_hwif_t *hwif = HWIF(drive);
517 struct hd_driveid *id = drive->id; 515 struct hd_driveid *id = drive->id;
518 516
519 if ((m5229_revision<=0x20) && (drive->media!=ide_disk)) 517 if ((m5229_revision<=0x20) && (drive->media!=ide_disk))
520 return hwif->ide_dma_off_quietly(drive); 518 goto no_dma_set;
521 519
522 drive->init_speed = 0; 520 drive->init_speed = 0;
523 521
@@ -552,9 +550,10 @@ try_dma_modes:
552ata_pio: 550ata_pio:
553 hwif->tuneproc(drive, 255); 551 hwif->tuneproc(drive, 255);
554no_dma_set: 552no_dma_set:
555 return hwif->ide_dma_off_quietly(drive); 553 return -1;
556 } 554 }
557 return hwif->ide_dma_on(drive); 555
556 return 0;
558} 557}
559 558
560/** 559/**
@@ -852,8 +851,8 @@ static void __devinit init_dma_ali15x3 (ide_hwif_t *hwif, unsigned long dmabase)
852{ 851{
853 if (m5229_revision < 0x20) 852 if (m5229_revision < 0x20)
854 return; 853 return;
855 if (!(hwif->channel)) 854 if (!hwif->channel)
856 hwif->OUTB(hwif->INB(dmabase+2) & 0x60, dmabase+2); 855 outb(inb(dmabase + 2) & 0x60, dmabase + 2);
857 ide_setup_dma(hwif, dmabase, 8); 856 ide_setup_dma(hwif, dmabase, 8);
858} 857}
859 858
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index a4336995a410..7989bdd842a2 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -304,8 +304,9 @@ static int amd74xx_ide_dma_check(ide_drive_t *drive)
304 amd_set_drive(drive, speed); 304 amd_set_drive(drive, speed);
305 305
306 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO) 306 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
307 return HWIF(drive)->ide_dma_on(drive); 307 return 0;
308 return HWIF(drive)->ide_dma_off_quietly(drive); 308
309 return -1;
309} 310}
310 311
311/* 312/*
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 982ac31fa995..2d48af32e3f4 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -101,7 +101,7 @@ static u8 atiixp_dma_2_pio(u8 xfer_rate) {
101 } 101 }
102} 102}
103 103
104static int atiixp_ide_dma_host_on(ide_drive_t *drive) 104static void atiixp_dma_host_on(ide_drive_t *drive)
105{ 105{
106 struct pci_dev *dev = drive->hwif->pci_dev; 106 struct pci_dev *dev = drive->hwif->pci_dev;
107 unsigned long flags; 107 unsigned long flags;
@@ -118,10 +118,10 @@ static int atiixp_ide_dma_host_on(ide_drive_t *drive)
118 118
119 spin_unlock_irqrestore(&atiixp_lock, flags); 119 spin_unlock_irqrestore(&atiixp_lock, flags);
120 120
121 return __ide_dma_host_on(drive); 121 ide_dma_host_on(drive);
122} 122}
123 123
124static int atiixp_ide_dma_host_off(ide_drive_t *drive) 124static void atiixp_dma_host_off(ide_drive_t *drive)
125{ 125{
126 struct pci_dev *dev = drive->hwif->pci_dev; 126 struct pci_dev *dev = drive->hwif->pci_dev;
127 unsigned long flags; 127 unsigned long flags;
@@ -135,7 +135,7 @@ static int atiixp_ide_dma_host_off(ide_drive_t *drive)
135 135
136 spin_unlock_irqrestore(&atiixp_lock, flags); 136 spin_unlock_irqrestore(&atiixp_lock, flags);
137 137
138 return __ide_dma_host_off(drive); 138 ide_dma_host_off(drive);
139} 139}
140 140
141/** 141/**
@@ -235,11 +235,8 @@ static int atiixp_config_drive_for_dma(ide_drive_t *drive)
235{ 235{
236 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive)); 236 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
237 237
238 /* If no DMA speed was available then disable DMA and use PIO. */ 238 if (!speed)
239 if (!speed) { 239 return 0;
240 u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
241 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
242 }
243 240
244 (void) atiixp_speedproc(drive, speed); 241 (void) atiixp_speedproc(drive, speed);
245 return ide_dma_enable(drive); 242 return ide_dma_enable(drive);
@@ -255,30 +252,20 @@ static int atiixp_config_drive_for_dma(ide_drive_t *drive)
255 252
256static int atiixp_dma_check(ide_drive_t *drive) 253static int atiixp_dma_check(ide_drive_t *drive)
257{ 254{
258 ide_hwif_t *hwif = HWIF(drive);
259 struct hd_driveid *id = drive->id;
260 u8 tspeed, speed; 255 u8 tspeed, speed;
261 256
262 drive->init_speed = 0; 257 drive->init_speed = 0;
263 258
264 if ((id->capability & 1) && drive->autodma) { 259 if (ide_use_dma(drive) && atiixp_config_drive_for_dma(drive))
265 260 return 0;
266 if (ide_use_dma(drive)) {
267 if (atiixp_config_drive_for_dma(drive))
268 return hwif->ide_dma_on(drive);
269 }
270
271 goto fast_ata_pio;
272 261
273 } else if ((id->capability & 8) || (id->field_valid & 2)) { 262 if (ide_use_fast_pio(drive)) {
274fast_ata_pio:
275 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL); 263 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
276 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0; 264 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
277 hwif->speedproc(drive, speed); 265 atiixp_speedproc(drive, speed);
278 return hwif->ide_dma_off_quietly(drive);
279 } 266 }
280 /* IORDY not supported */ 267
281 return 0; 268 return -1;
282} 269}
283 270
284/** 271/**
@@ -318,8 +305,8 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
318 else 305 else
319 hwif->udma_four = 0; 306 hwif->udma_four = 0;
320 307
321 hwif->ide_dma_host_on = &atiixp_ide_dma_host_on; 308 hwif->dma_host_on = &atiixp_dma_host_on;
322 hwif->ide_dma_host_off = &atiixp_ide_dma_host_off; 309 hwif->dma_host_off = &atiixp_dma_host_off;
323 hwif->ide_dma_check = &atiixp_dma_check; 310 hwif->ide_dma_check = &atiixp_dma_check;
324 if (!noautodma) 311 if (!noautodma)
325 hwif->autodma = 1; 312 hwif->autodma = 1;
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index aee947e8fc38..49df27513da7 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -466,36 +466,21 @@ static int config_chipset_for_dma (ide_drive_t *drive)
466 if (!speed) 466 if (!speed)
467 return 0; 467 return 0;
468 468
469 if(ide_set_xfer_rate(drive, speed)) 469 if (cmd64x_tune_chipset(drive, speed))
470 return 0; 470 return 0;
471
472 if (!drive->init_speed)
473 drive->init_speed = speed;
474 471
475 return ide_dma_enable(drive); 472 return ide_dma_enable(drive);
476} 473}
477 474
478static int cmd64x_config_drive_for_dma (ide_drive_t *drive) 475static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
479{ 476{
480 ide_hwif_t *hwif = HWIF(drive); 477 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
481 struct hd_driveid *id = drive->id; 478 return 0;
482
483 if ((id != NULL) && ((id->capability & 1) != 0) && drive->autodma) {
484
485 if (ide_use_dma(drive)) {
486 if (config_chipset_for_dma(drive))
487 return hwif->ide_dma_on(drive);
488 }
489
490 goto fast_ata_pio;
491 479
492 } else if ((id->capability & 8) || (id->field_valid & 2)) { 480 if (ide_use_fast_pio(drive))
493fast_ata_pio:
494 config_chipset_for_pio(drive, 1); 481 config_chipset_for_pio(drive, 1);
495 return hwif->ide_dma_off_quietly(drive); 482
496 } 483 return -1;
497 /* IORDY not supported */
498 return 0;
499} 484}
500 485
501static int cmd64x_alt_dma_status (struct pci_dev *dev) 486static int cmd64x_alt_dma_status (struct pci_dev *dev)
@@ -518,13 +503,13 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
518 503
519 drive->waiting_for_dma = 0; 504 drive->waiting_for_dma = 0;
520 /* read DMA command state */ 505 /* read DMA command state */
521 dma_cmd = hwif->INB(hwif->dma_command); 506 dma_cmd = inb(hwif->dma_command);
522 /* stop DMA */ 507 /* stop DMA */
523 hwif->OUTB((dma_cmd & ~1), hwif->dma_command); 508 outb(dma_cmd & ~1, hwif->dma_command);
524 /* get DMA status */ 509 /* get DMA status */
525 dma_stat = hwif->INB(hwif->dma_status); 510 dma_stat = inb(hwif->dma_status);
526 /* clear the INTR & ERROR bits */ 511 /* clear the INTR & ERROR bits */
527 hwif->OUTB(dma_stat|6, hwif->dma_status); 512 outb(dma_stat | 6, hwif->dma_status);
528 if (cmd64x_alt_dma_status(dev)) { 513 if (cmd64x_alt_dma_status(dev)) {
529 u8 dma_intr = 0; 514 u8 dma_intr = 0;
530 u8 dma_mask = (hwif->channel) ? ARTTIM23_INTR_CH1 : 515 u8 dma_mask = (hwif->channel) ? ARTTIM23_INTR_CH1 :
@@ -546,7 +531,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
546 struct pci_dev *dev = hwif->pci_dev; 531 struct pci_dev *dev = hwif->pci_dev;
547 u8 dma_alt_stat = 0, mask = (hwif->channel) ? MRDMODE_INTR_CH1 : 532 u8 dma_alt_stat = 0, mask = (hwif->channel) ? MRDMODE_INTR_CH1 :
548 MRDMODE_INTR_CH0; 533 MRDMODE_INTR_CH0;
549 u8 dma_stat = hwif->INB(hwif->dma_status); 534 u8 dma_stat = inb(hwif->dma_status);
550 535
551 (void) pci_read_config_byte(dev, MRDMODE, &dma_alt_stat); 536 (void) pci_read_config_byte(dev, MRDMODE, &dma_alt_stat);
552#ifdef DEBUG 537#ifdef DEBUG
@@ -576,13 +561,13 @@ static int cmd646_1_ide_dma_end (ide_drive_t *drive)
576 561
577 drive->waiting_for_dma = 0; 562 drive->waiting_for_dma = 0;
578 /* get DMA status */ 563 /* get DMA status */
579 dma_stat = hwif->INB(hwif->dma_status); 564 dma_stat = inb(hwif->dma_status);
580 /* read DMA command state */ 565 /* read DMA command state */
581 dma_cmd = hwif->INB(hwif->dma_command); 566 dma_cmd = inb(hwif->dma_command);
582 /* stop DMA */ 567 /* stop DMA */
583 hwif->OUTB((dma_cmd & ~1), hwif->dma_command); 568 outb(dma_cmd & ~1, hwif->dma_command);
584 /* clear the INTR & ERROR bits */ 569 /* clear the INTR & ERROR bits */
585 hwif->OUTB(dma_stat|6, hwif->dma_status); 570 outb(dma_stat | 6, hwif->dma_status);
586 /* and free any DMA resources */ 571 /* and free any DMA resources */
587 ide_destroy_dmatable(drive); 572 ide_destroy_dmatable(drive);
588 /* verify good DMA status */ 573 /* verify good DMA status */
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index ba6786aabf3b..400859a839f7 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -132,12 +132,11 @@ static void cs5520_tune_drive(ide_drive_t *drive, u8 pio)
132 132
133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
134{ 134{
135 ide_hwif_t *hwif = HWIF(drive);
136
137 /* Tune the drive for PIO modes up to PIO 4 */ 135 /* Tune the drive for PIO modes up to PIO 4 */
138 cs5520_tune_drive(drive, 4); 136 cs5520_tune_drive(drive, 4);
137
139 /* Then tell the core to use DMA operations */ 138 /* Then tell the core to use DMA operations */
140 return hwif->ide_dma_on(drive); 139 return 0;
141} 140}
142 141
143/* 142/*
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 9bf5fdfc5b1f..b2d7c132ef4b 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -81,8 +81,8 @@ static void cs5530_tuneproc (ide_drive_t *drive, u8 pio) /* pio=255 means "autot
81 81
82 pio = ide_get_best_pio_mode(drive, pio, 4, NULL); 82 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
83 if (!cs5530_set_xfer_mode(drive, modes[pio])) { 83 if (!cs5530_set_xfer_mode(drive, modes[pio])) {
84 format = (hwif->INL(basereg+4) >> 31) & 1; 84 format = (inl(basereg + 4) >> 31) & 1;
85 hwif->OUTL(cs5530_pio_timings[format][pio], 85 outl(cs5530_pio_timings[format][pio],
86 basereg+(drive->select.b.unit<<3)); 86 basereg+(drive->select.b.unit<<3));
87 } 87 }
88} 88}
@@ -103,16 +103,13 @@ static int cs5530_config_dma (ide_drive_t *drive)
103 int unit = drive->select.b.unit; 103 int unit = drive->select.b.unit;
104 ide_drive_t *mate = &hwif->drives[unit^1]; 104 ide_drive_t *mate = &hwif->drives[unit^1];
105 struct hd_driveid *id = drive->id; 105 struct hd_driveid *id = drive->id;
106 unsigned int reg, timings; 106 unsigned int reg, timings = 0;
107 unsigned long basereg; 107 unsigned long basereg;
108 108
109 /* 109 /*
110 * Default to DMA-off in case we run into trouble here. 110 * Default to DMA-off in case we run into trouble here.
111 */ 111 */
112 hwif->ide_dma_off_quietly(drive); 112 hwif->dma_off_quietly(drive);
113 /* turn off DMA while we fiddle */
114 hwif->ide_dma_host_off(drive);
115 /* clear DMA_capable bit */
116 113
117 /* 114 /*
118 * The CS5530 specifies that two drives sharing a cable cannot 115 * The CS5530 specifies that two drives sharing a cable cannot
@@ -182,30 +179,24 @@ static int cs5530_config_dma (ide_drive_t *drive)
182 case XFER_MW_DMA_1: timings = 0x00012121; break; 179 case XFER_MW_DMA_1: timings = 0x00012121; break;
183 case XFER_MW_DMA_2: timings = 0x00002020; break; 180 case XFER_MW_DMA_2: timings = 0x00002020; break;
184 default: 181 default:
185 printk(KERN_ERR "%s: cs5530_config_dma: huh? mode=%02x\n", 182 BUG();
186 drive->name, mode); 183 break;
187 return 1; /* failure */
188 } 184 }
189 basereg = CS5530_BASEREG(hwif); 185 basereg = CS5530_BASEREG(hwif);
190 reg = hwif->INL(basereg+4); /* get drive0 config register */ 186 reg = inl(basereg + 4); /* get drive0 config register */
191 timings |= reg & 0x80000000; /* preserve PIO format bit */ 187 timings |= reg & 0x80000000; /* preserve PIO format bit */
192 if (unit == 0) { /* are we configuring drive0? */ 188 if (unit == 0) { /* are we configuring drive0? */
193 hwif->OUTL(timings, basereg+4); /* write drive0 config register */ 189 outl(timings, basereg + 4); /* write drive0 config register */
194 } else { 190 } else {
195 if (timings & 0x00100000) 191 if (timings & 0x00100000)
196 reg |= 0x00100000; /* enable UDMA timings for both drives */ 192 reg |= 0x00100000; /* enable UDMA timings for both drives */
197 else 193 else
198 reg &= ~0x00100000; /* disable UDMA timings for both drives */ 194 reg &= ~0x00100000; /* disable UDMA timings for both drives */
199 hwif->OUTL(reg, basereg+4); /* write drive0 config register */ 195 outl(reg, basereg + 4); /* write drive0 config register */
200 hwif->OUTL(timings, basereg+12); /* write drive1 config register */ 196 outl(timings, basereg + 12); /* write drive1 config register */
201 } 197 }
202 (void) hwif->ide_dma_host_on(drive);
203 /* set DMA_capable bit */
204 198
205 /* 199 return 0; /* success */
206 * Finally, turn DMA on in software, and exit.
207 */
208 return hwif->ide_dma_on(drive); /* success */
209} 200}
210 201
211/** 202/**
@@ -321,17 +312,17 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
321 312
322 hwif->tuneproc = &cs5530_tuneproc; 313 hwif->tuneproc = &cs5530_tuneproc;
323 basereg = CS5530_BASEREG(hwif); 314 basereg = CS5530_BASEREG(hwif);
324 d0_timings = hwif->INL(basereg+0); 315 d0_timings = inl(basereg + 0);
325 if (CS5530_BAD_PIO(d0_timings)) { 316 if (CS5530_BAD_PIO(d0_timings)) {
326 /* PIO timings not initialized? */ 317 /* PIO timings not initialized? */
327 hwif->OUTL(cs5530_pio_timings[(d0_timings>>31)&1][0], basereg+0); 318 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0);
328 if (!hwif->drives[0].autotune) 319 if (!hwif->drives[0].autotune)
329 hwif->drives[0].autotune = 1; 320 hwif->drives[0].autotune = 1;
330 /* needs autotuning later */ 321 /* needs autotuning later */
331 } 322 }
332 if (CS5530_BAD_PIO(hwif->INL(basereg+8))) { 323 if (CS5530_BAD_PIO(inl(basereg + 8))) {
333 /* PIO timings not initialized? */ 324 /* PIO timings not initialized? */
334 hwif->OUTL(cs5530_pio_timings[(d0_timings>>31)&1][0], basereg+8); 325 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
335 if (!hwif->drives[1].autotune) 326 if (!hwif->drives[1].autotune)
336 hwif->drives[1].autotune = 1; 327 hwif->drives[1].autotune = 1;
337 /* needs autotuning later */ 328 /* needs autotuning later */
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 5c5aec28e671..45f43efbf92c 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -195,28 +195,19 @@ static int cs5535_config_drive_for_dma(ide_drive_t *drive)
195 195
196static int cs5535_dma_check(ide_drive_t *drive) 196static int cs5535_dma_check(ide_drive_t *drive)
197{ 197{
198 ide_hwif_t *hwif = drive->hwif;
199 struct hd_driveid *id = drive->id;
200 u8 speed; 198 u8 speed;
201 199
202 drive->init_speed = 0; 200 drive->init_speed = 0;
203 201
204 if ((id->capability & 1) && drive->autodma) { 202 if (ide_use_dma(drive) && cs5535_config_drive_for_dma(drive))
205 if (ide_use_dma(drive)) { 203 return 0;
206 if (cs5535_config_drive_for_dma(drive))
207 return hwif->ide_dma_on(drive);
208 }
209
210 goto fast_ata_pio;
211 204
212 } else if ((id->capability & 8) || (id->field_valid & 2)) { 205 if (ide_use_fast_pio(drive)) {
213fast_ata_pio:
214 speed = ide_get_best_pio_mode(drive, 255, 4, NULL); 206 speed = ide_get_best_pio_mode(drive, 255, 4, NULL);
215 cs5535_set_drive(drive, speed); 207 cs5535_set_drive(drive, speed);
216 return hwif->ide_dma_off_quietly(drive);
217 } 208 }
218 /* IORDY not supported */ 209
219 return 0; 210 return -1;
220} 211}
221 212
222static u8 __devinit cs5535_cable_detect(struct pci_dev *dev) 213static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 9eafcbf444f4..103b9db97853 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -197,8 +197,8 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
197#if CY82C693_DEBUG_LOGS 197#if CY82C693_DEBUG_LOGS
198 /* for debug let's show the previous values */ 198 /* for debug let's show the previous values */
199 199
200 HWIF(drive)->OUTB(index, CY82_INDEX_PORT); 200 outb(index, CY82_INDEX_PORT);
201 data = HWIF(drive)->INB(CY82_DATA_PORT); 201 data = inb(CY82_DATA_PORT);
202 202
203 printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n", 203 printk (KERN_INFO "%s (ch=%d, dev=%d): DMA mode is %d (single=%d)\n",
204 drive->name, HWIF(drive)->channel, drive->select.b.unit, 204 drive->name, HWIF(drive)->channel, drive->select.b.unit,
@@ -207,8 +207,8 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
207 207
208 data = (u8)mode|(u8)(single<<2); 208 data = (u8)mode|(u8)(single<<2);
209 209
210 HWIF(drive)->OUTB(index, CY82_INDEX_PORT); 210 outb(index, CY82_INDEX_PORT);
211 HWIF(drive)->OUTB(data, CY82_DATA_PORT); 211 outb(data, CY82_DATA_PORT);
212 212
213#if CY82C693_DEBUG_INFO 213#if CY82C693_DEBUG_INFO
214 printk(KERN_INFO "%s (ch=%d, dev=%d): set DMA mode to %d (single=%d)\n", 214 printk(KERN_INFO "%s (ch=%d, dev=%d): set DMA mode to %d (single=%d)\n",
@@ -227,8 +227,8 @@ static void cy82c693_dma_enable (ide_drive_t *drive, int mode, int single)
227 */ 227 */
228 228
229 data = BUSMASTER_TIMEOUT; 229 data = BUSMASTER_TIMEOUT;
230 HWIF(drive)->OUTB(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT); 230 outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
231 HWIF(drive)->OUTB(data, CY82_DATA_PORT); 231 outb(data, CY82_DATA_PORT);
232 232
233#if CY82C693_DEBUG_INFO 233#if CY82C693_DEBUG_INFO
234 printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n", 234 printk (KERN_INFO "%s: Set IDE Bus Master TimeOut Register to 0x%X\n",
@@ -478,21 +478,18 @@ static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
478 } 478 }
479} 479}
480 480
481static ide_pci_device_t cy82c693_chipsets[] __devinitdata = { 481static ide_pci_device_t cy82c693_chipset __devinitdata = {
482 { /* 0 */ 482 .name = "CY82C693",
483 .name = "CY82C693", 483 .init_chipset = init_chipset_cy82c693,
484 .init_chipset = init_chipset_cy82c693, 484 .init_iops = init_iops_cy82c693,
485 .init_iops = init_iops_cy82c693, 485 .init_hwif = init_hwif_cy82c693,
486 .init_hwif = init_hwif_cy82c693, 486 .channels = 1,
487 .channels = 1, 487 .autodma = AUTODMA,
488 .autodma = AUTODMA, 488 .bootable = ON_BOARD,
489 .bootable = ON_BOARD,
490 }
491}; 489};
492 490
493static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id) 491static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id)
494{ 492{
495 ide_pci_device_t *d = &cy82c693_chipsets[id->driver_data];
496 struct pci_dev *dev2; 493 struct pci_dev *dev2;
497 int ret = -ENODEV; 494 int ret = -ENODEV;
498 495
@@ -501,7 +498,7 @@ static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_dev
501 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && 498 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
502 PCI_FUNC(dev->devfn) == 1) { 499 PCI_FUNC(dev->devfn) == 1) {
503 dev2 = pci_get_slot(dev->bus, dev->devfn + 1); 500 dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
504 ret = ide_setup_pci_devices(dev, dev2, d); 501 ret = ide_setup_pci_devices(dev, dev2, &cy82c693_chipset);
505 /* We leak pci refs here but thats ok - we can't be unloaded */ 502 /* We leak pci refs here but thats ok - we can't be unloaded */
506 } 503 }
507 return ret; 504 return ret;
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index ce7b08f08a09..924eaa3a5708 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -48,19 +48,6 @@ static u8 hpt34x_ratemask (ide_drive_t *drive)
48 return 1; 48 return 1;
49} 49}
50 50
51static void hpt34x_clear_chipset (ide_drive_t *drive)
52{
53 struct pci_dev *dev = HWIF(drive)->pci_dev;
54 u32 reg1 = 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
55
56 pci_read_config_dword(dev, 0x44, &reg1);
57 pci_read_config_dword(dev, 0x48, &reg2);
58 tmp1 = ((0x00 << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn))));
59 tmp2 = (reg2 & ~(0x11 << drive->dn));
60 pci_write_config_dword(dev, 0x44, tmp1);
61 pci_write_config_dword(dev, 0x48, tmp2);
62}
63
64static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) 51static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
65{ 52{
66 struct pci_dev *dev = HWIF(drive)->pci_dev; 53 struct pci_dev *dev = HWIF(drive)->pci_dev;
@@ -81,7 +68,7 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
81 pci_read_config_dword(dev, 0x44, &reg1); 68 pci_read_config_dword(dev, 0x44, &reg1);
82 pci_read_config_dword(dev, 0x48, &reg2); 69 pci_read_config_dword(dev, 0x48, &reg2);
83 tmp1 = ((lo_speed << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn)))); 70 tmp1 = ((lo_speed << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn))));
84 tmp2 = ((hi_speed << drive->dn) | reg2); 71 tmp2 = ((hi_speed << drive->dn) | (reg2 & ~(0x11 << drive->dn)));
85 pci_write_config_dword(dev, 0x44, tmp1); 72 pci_write_config_dword(dev, 0x44, tmp1);
86 pci_write_config_dword(dev, 0x48, tmp2); 73 pci_write_config_dword(dev, 0x48, tmp2);
87 74
@@ -99,7 +86,6 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
99static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio) 86static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio)
100{ 87{
101 pio = ide_get_best_pio_mode(drive, pio, 5, NULL); 88 pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
102 hpt34x_clear_chipset(drive);
103 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); 89 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio));
104} 90}
105 91
@@ -117,38 +103,25 @@ static int config_chipset_for_dma (ide_drive_t *drive)
117 if (!(speed)) 103 if (!(speed))
118 return 0; 104 return 0;
119 105
120 hpt34x_clear_chipset(drive);
121 (void) hpt34x_tune_chipset(drive, speed); 106 (void) hpt34x_tune_chipset(drive, speed);
122 return ide_dma_enable(drive); 107 return ide_dma_enable(drive);
123} 108}
124 109
125static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive) 110static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
126{ 111{
127 ide_hwif_t *hwif = HWIF(drive);
128 struct hd_driveid *id = drive->id;
129
130 drive->init_speed = 0; 112 drive->init_speed = 0;
131 113
132 if (id && (id->capability & 1) && drive->autodma) { 114 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
133
134 if (ide_use_dma(drive)) {
135 if (config_chipset_for_dma(drive))
136#ifndef CONFIG_HPT34X_AUTODMA 115#ifndef CONFIG_HPT34X_AUTODMA
137 return hwif->ide_dma_off_quietly(drive); 116 return -1;
138#else 117#else
139 return hwif->ide_dma_on(drive); 118 return 0;
140#endif 119#endif
141 }
142
143 goto fast_ata_pio;
144 120
145 } else if ((id->capability & 8) || (id->field_valid & 2)) { 121 if (ide_use_fast_pio(drive))
146fast_ata_pio:
147 hpt34x_tune_drive(drive, 255); 122 hpt34x_tune_drive(drive, 255);
148 return hwif->ide_dma_off_quietly(drive); 123
149 } 124 return -1;
150 /* IORDY not supported */
151 return 0;
152} 125}
153 126
154/* 127/*
@@ -209,7 +182,6 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
209 182
210 hwif->tuneproc = &hpt34x_tune_drive; 183 hwif->tuneproc = &hpt34x_tune_drive;
211 hwif->speedproc = &hpt34x_tune_chipset; 184 hwif->speedproc = &hpt34x_tune_chipset;
212 hwif->no_dsc = 1;
213 hwif->drives[0].autotune = 1; 185 hwif->drives[0].autotune = 1;
214 hwif->drives[1].autotune = 1; 186 hwif->drives[1].autotune = 1;
215 187
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 05be8fadda7a..60ecdc258c7c 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -736,24 +736,15 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
736 736
737static int hpt366_config_drive_xfer_rate(ide_drive_t *drive) 737static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
738{ 738{
739 ide_hwif_t *hwif = HWIF(drive);
740 struct hd_driveid *id = drive->id;
741
742 drive->init_speed = 0; 739 drive->init_speed = 0;
743 740
744 if ((id->capability & 1) && drive->autodma) { 741 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
745 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 742 return 0;
746 return hwif->ide_dma_on(drive);
747
748 goto fast_ata_pio;
749 743
750 } else if ((id->capability & 8) || (id->field_valid & 2)) { 744 if (ide_use_fast_pio(drive))
751fast_ata_pio:
752 hpt3xx_tune_drive(drive, 255); 745 hpt3xx_tune_drive(drive, 255);
753 return hwif->ide_dma_off_quietly(drive); 746
754 } 747 return -1;
755 /* IORDY not supported */
756 return 0;
757} 748}
758 749
759/* 750/*
@@ -841,7 +832,7 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
841 return 0; 832 return 0;
842 } 833 }
843 834
844 dma_stat = hwif->INB(hwif->dma_status); 835 dma_stat = inb(hwif->dma_status);
845 /* return 1 if INTR asserted */ 836 /* return 1 if INTR asserted */
846 if (dma_stat & 4) 837 if (dma_stat & 4)
847 return 1; 838 return 1;
@@ -1391,9 +1382,6 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
1391 u8 dma_new = 0, dma_old = 0; 1382 u8 dma_new = 0, dma_old = 0;
1392 unsigned long flags; 1383 unsigned long flags;
1393 1384
1394 if (!dmabase)
1395 return;
1396
1397 dma_old = hwif->INB(dmabase + 2); 1385 dma_old = hwif->INB(dmabase + 2);
1398 1386
1399 local_irq_save(flags); 1387 local_irq_save(flags);
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 63248b6909fa..424f00bb160d 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -244,17 +244,15 @@ static int config_chipset_for_dma (ide_drive_t *drive)
244 244
245static int it8213_config_drive_for_dma (ide_drive_t *drive) 245static int it8213_config_drive_for_dma (ide_drive_t *drive)
246{ 246{
247 ide_hwif_t *hwif = drive->hwif; 247 u8 pio;
248 248
249 if (ide_use_dma(drive)) { 249 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
250 if (config_chipset_for_dma(drive)) 250 return 0;
251 return hwif->ide_dma_on(drive);
252 }
253 251
254 hwif->speedproc(drive, XFER_PIO_0 252 pio = ide_get_best_pio_mode(drive, 255, 4, NULL);
255 + ide_get_best_pio_mode(drive, 255, 4, NULL)); 253 it8213_tune_chipset(drive, XFER_PIO_0 + pio);
256 254
257 return hwif->ide_dma_off_quietly(drive); 255 return -1;
258} 256}
259 257
260/** 258/**
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index e9bad185968a..a132767f7d90 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -520,14 +520,12 @@ static int config_chipset_for_dma (ide_drive_t *drive)
520 520
521static int it821x_config_drive_for_dma (ide_drive_t *drive) 521static int it821x_config_drive_for_dma (ide_drive_t *drive)
522{ 522{
523 ide_hwif_t *hwif = drive->hwif; 523 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
524 return 0;
524 525
525 if (ide_use_dma(drive)) {
526 if (config_chipset_for_dma(drive))
527 return hwif->ide_dma_on(drive);
528 }
529 config_it821x_chipset_for_pio(drive, 1); 526 config_it821x_chipset_for_pio(drive, 1);
530 return hwif->ide_dma_off_quietly(drive); 527
528 return -1;
531} 529}
532 530
533/** 531/**
@@ -608,11 +606,11 @@ static void __devinit it821x_fixups(ide_hwif_t *hwif)
608 printk(".\n"); 606 printk(".\n");
609 /* Now the core code will have wrongly decided no DMA 607 /* Now the core code will have wrongly decided no DMA
610 so we need to fix this */ 608 so we need to fix this */
611 hwif->ide_dma_off_quietly(drive); 609 hwif->dma_off_quietly(drive);
612#ifdef CONFIG_IDEDMA_ONLYDISK 610#ifdef CONFIG_IDEDMA_ONLYDISK
613 if (drive->media == ide_disk) 611 if (drive->media == ide_disk)
614#endif 612#endif
615 hwif->ide_dma_check(drive); 613 ide_set_dma(drive);
616 } else { 614 } else {
617 /* Non RAID volume. Fixups to stop the core code 615 /* Non RAID volume. Fixups to stop the core code
618 doing unsupported things */ 616 doing unsupported things */
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index f07bbbed1778..53f25500c22b 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -147,7 +147,9 @@ static int config_chipset_for_dma (ide_drive_t *drive)
147{ 147{
148 u8 speed = ide_dma_speed(drive, jmicron_ratemask(drive)); 148 u8 speed = ide_dma_speed(drive, jmicron_ratemask(drive));
149 149
150 config_jmicron_chipset_for_pio(drive, !speed); 150 if (!speed)
151 return 0;
152
151 jmicron_tune_chipset(drive, speed); 153 jmicron_tune_chipset(drive, speed);
152 return ide_dma_enable(drive); 154 return ide_dma_enable(drive);
153} 155}
@@ -162,14 +164,12 @@ static int config_chipset_for_dma (ide_drive_t *drive)
162 164
163static int jmicron_config_drive_for_dma (ide_drive_t *drive) 165static int jmicron_config_drive_for_dma (ide_drive_t *drive)
164{ 166{
165 ide_hwif_t *hwif = drive->hwif; 167 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
168 return 0;
166 169
167 if (ide_use_dma(drive)) {
168 if (config_chipset_for_dma(drive))
169 return hwif->ide_dma_on(drive);
170 }
171 config_jmicron_chipset_for_pio(drive, 1); 170 config_jmicron_chipset_for_pio(drive, 1);
172 return hwif->ide_dma_off_quietly(drive); 171
172 return -1;
173} 173}
174 174
175/** 175/**
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index 8aaea4ea5549..b310c4f51077 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -166,10 +166,10 @@ static int ns87415_ide_dma_end (ide_drive_t *drive)
166 /* get dma command mode */ 166 /* get dma command mode */
167 dma_cmd = hwif->INB(hwif->dma_command); 167 dma_cmd = hwif->INB(hwif->dma_command);
168 /* stop DMA */ 168 /* stop DMA */
169 hwif->OUTB(dma_cmd & ~1, hwif->dma_command); 169 outb(dma_cmd & ~1, hwif->dma_command);
170 /* from ERRATA: clear the INTR & ERROR bits */ 170 /* from ERRATA: clear the INTR & ERROR bits */
171 dma_cmd = hwif->INB(hwif->dma_command); 171 dma_cmd = hwif->INB(hwif->dma_command);
172 hwif->OUTB(dma_cmd|6, hwif->dma_command); 172 outb(dma_cmd | 6, hwif->dma_command);
173 /* and free any DMA resources */ 173 /* and free any DMA resources */
174 ide_destroy_dmatable(drive); 174 ide_destroy_dmatable(drive);
175 /* verify good DMA status */ 175 /* verify good DMA status */
@@ -190,7 +190,8 @@ static int ns87415_ide_dma_setup(ide_drive_t *drive)
190static int ns87415_ide_dma_check (ide_drive_t *drive) 190static int ns87415_ide_dma_check (ide_drive_t *drive)
191{ 191{
192 if (drive->media != ide_disk) 192 if (drive->media != ide_disk)
193 return HWIF(drive)->ide_dma_off_quietly(drive); 193 return -1;
194
194 return __ide_dma_check(drive); 195 return __ide_dma_check(drive);
195} 196}
196 197
@@ -243,9 +244,9 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
243 * to SELECT_DRIVE() properly during first probe_hwif(). 244 * to SELECT_DRIVE() properly during first probe_hwif().
244 */ 245 */
245 timeout = 10000; 246 timeout = 10000;
246 hwif->OUTB(12, hwif->io_ports[IDE_CONTROL_OFFSET]); 247 outb(12, hwif->io_ports[IDE_CONTROL_OFFSET]);
247 udelay(10); 248 udelay(10);
248 hwif->OUTB(8, hwif->io_ports[IDE_CONTROL_OFFSET]); 249 outb(8, hwif->io_ports[IDE_CONTROL_OFFSET]);
249 do { 250 do {
250 udelay(50); 251 udelay(50);
251 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); 252 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
@@ -263,7 +264,7 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
263 if (!hwif->dma_base) 264 if (!hwif->dma_base)
264 return; 265 return;
265 266
266 hwif->OUTB(0x60, hwif->dma_status); 267 outb(0x60, hwif->dma_status);
267 hwif->dma_setup = &ns87415_ide_dma_setup; 268 hwif->dma_setup = &ns87415_ide_dma_setup;
268 hwif->ide_dma_check = &ns87415_ide_dma_check; 269 hwif->ide_dma_check = &ns87415_ide_dma_check;
269 hwif->ide_dma_end = &ns87415_ide_dma_end; 270 hwif->ide_dma_end = &ns87415_ide_dma_end;
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 22bbf613f948..9ca60dd2185e 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -176,34 +176,35 @@ static int cmpt_clk(int time, int bus_speed)
176 return ((time*bus_speed+999)/1000); 176 return ((time*bus_speed+999)/1000);
177} 177}
178 178
179static void write_reg(ide_hwif_t *hwif, u8 value, int reg)
180/* Write value to register reg, base of register 179/* Write value to register reg, base of register
181 * is at reg_base (0x1f0 primary, 0x170 secondary, 180 * is at reg_base (0x1f0 primary, 0x170 secondary,
182 * if not changed by PCI configuration). 181 * if not changed by PCI configuration).
183 * This is from setupvic.exe program. 182 * This is from setupvic.exe program.
184 */ 183 */
184static void write_reg(u8 value, int reg)
185{ 185{
186 hwif->INW(reg_base+1); 186 inw(reg_base + 1);
187 hwif->INW(reg_base+1); 187 inw(reg_base + 1);
188 hwif->OUTB(3, reg_base+2); 188 outb(3, reg_base + 2);
189 hwif->OUTB(value, reg_base+reg); 189 outb(value, reg_base + reg);
190 hwif->OUTB(0x83, reg_base+2); 190 outb(0x83, reg_base + 2);
191} 191}
192 192
193static u8 read_reg(ide_hwif_t *hwif, int reg)
194/* Read value from register reg, base of register 193/* Read value from register reg, base of register
195 * is at reg_base (0x1f0 primary, 0x170 secondary, 194 * is at reg_base (0x1f0 primary, 0x170 secondary,
196 * if not changed by PCI configuration). 195 * if not changed by PCI configuration).
197 * This is from setupvic.exe program. 196 * This is from setupvic.exe program.
198 */ 197 */
198static u8 read_reg(int reg)
199{ 199{
200 u8 ret = 0; 200 u8 ret = 0;
201 201
202 hwif->INW(reg_base+1); 202 inw(reg_base + 1);
203 hwif->INW(reg_base+1); 203 inw(reg_base + 1);
204 hwif->OUTB(3, reg_base+2); 204 outb(3, reg_base + 2);
205 ret = hwif->INB(reg_base+reg); 205 ret = inb(reg_base + reg);
206 hwif->OUTB(0x83, reg_base+2); 206 outb(0x83, reg_base + 2);
207
207 return ret; 208 return ret;
208} 209}
209 210
@@ -286,39 +287,39 @@ static void opti621_tune_drive (ide_drive_t *drive, u8 pio)
286 reg_base = hwif->io_ports[IDE_DATA_OFFSET]; 287 reg_base = hwif->io_ports[IDE_DATA_OFFSET];
287 288
288 /* allow Register-B */ 289 /* allow Register-B */
289 hwif->OUTB(0xc0, reg_base+CNTRL_REG); 290 outb(0xc0, reg_base + CNTRL_REG);
290 /* hmm, setupvic.exe does this ;-) */ 291 /* hmm, setupvic.exe does this ;-) */
291 hwif->OUTB(0xff, reg_base+5); 292 outb(0xff, reg_base + 5);
292 /* if reads 0xff, adapter not exist? */ 293 /* if reads 0xff, adapter not exist? */
293 (void) hwif->INB(reg_base+CNTRL_REG); 294 (void)inb(reg_base + CNTRL_REG);
294 /* if reads 0xc0, no interface exist? */ 295 /* if reads 0xc0, no interface exist? */
295 read_reg(hwif, CNTRL_REG); 296 read_reg(CNTRL_REG);
296 /* read version, probably 0 */ 297 /* read version, probably 0 */
297 read_reg(hwif, STRAP_REG); 298 read_reg(STRAP_REG);
298 299
299 /* program primary drive */ 300 /* program primary drive */
300 /* select Index-0 for Register-A */ 301 /* select Index-0 for Register-A */
301 write_reg(hwif, 0, MISC_REG); 302 write_reg(0, MISC_REG);
302 /* set read cycle timings */ 303 /* set read cycle timings */
303 write_reg(hwif, cycle1, READ_REG); 304 write_reg(cycle1, READ_REG);
304 /* set write cycle timings */ 305 /* set write cycle timings */
305 write_reg(hwif, cycle1, WRITE_REG); 306 write_reg(cycle1, WRITE_REG);
306 307
307 /* program secondary drive */ 308 /* program secondary drive */
308 /* select Index-1 for Register-B */ 309 /* select Index-1 for Register-B */
309 write_reg(hwif, 1, MISC_REG); 310 write_reg(1, MISC_REG);
310 /* set read cycle timings */ 311 /* set read cycle timings */
311 write_reg(hwif, cycle2, READ_REG); 312 write_reg(cycle2, READ_REG);
312 /* set write cycle timings */ 313 /* set write cycle timings */
313 write_reg(hwif, cycle2, WRITE_REG); 314 write_reg(cycle2, WRITE_REG);
314 315
315 /* use Register-A for drive 0 */ 316 /* use Register-A for drive 0 */
316 /* use Register-B for drive 1 */ 317 /* use Register-B for drive 1 */
317 write_reg(hwif, 0x85, CNTRL_REG); 318 write_reg(0x85, CNTRL_REG);
318 319
319 /* set address setup, DRDY timings, */ 320 /* set address setup, DRDY timings, */
320 /* and read prefetch for both drives */ 321 /* and read prefetch for both drives */
321 write_reg(hwif, misc, MISC_REG); 322 write_reg(misc, MISC_REG);
322 323
323 spin_unlock_irqrestore(&ide_lock, flags); 324 spin_unlock_irqrestore(&ide_lock, flags);
324} 325}
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 236a03144a27..6ceb25bc5a7b 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -101,8 +101,8 @@ static u8 get_indexed_reg(ide_hwif_t *hwif, u8 index)
101{ 101{
102 u8 value; 102 u8 value;
103 103
104 hwif->OUTB(index, hwif->dma_vendor1); 104 outb(index, hwif->dma_vendor1);
105 value = hwif->INB(hwif->dma_vendor3); 105 value = inb(hwif->dma_vendor3);
106 106
107 DBG("index[%02X] value[%02X]\n", index, value); 107 DBG("index[%02X] value[%02X]\n", index, value);
108 return value; 108 return value;
@@ -115,8 +115,8 @@ static u8 get_indexed_reg(ide_hwif_t *hwif, u8 index)
115 */ 115 */
116static void set_indexed_reg(ide_hwif_t *hwif, u8 index, u8 value) 116static void set_indexed_reg(ide_hwif_t *hwif, u8 index, u8 value)
117{ 117{
118 hwif->OUTB(index, hwif->dma_vendor1); 118 outb(index, hwif->dma_vendor1);
119 hwif->OUTB(value, hwif->dma_vendor3); 119 outb(value, hwif->dma_vendor3);
120 DBG("index[%02X] value[%02X]\n", index, value); 120 DBG("index[%02X] value[%02X]\n", index, value);
121} 121}
122 122
@@ -281,25 +281,15 @@ static int config_chipset_for_dma(ide_drive_t *drive)
281 281
282static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive) 282static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive)
283{ 283{
284 ide_hwif_t *hwif = HWIF(drive);
285 struct hd_driveid *id = drive->id;
286
287 drive->init_speed = 0; 284 drive->init_speed = 0;
288 285
289 if ((id->capability & 1) && drive->autodma) { 286 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
290 287 return 0;
291 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
292 return hwif->ide_dma_on(drive);
293 288
294 goto fast_ata_pio; 289 if (ide_use_fast_pio(drive))
290 pdcnew_tune_drive(drive, 255);
295 291
296 } else if ((id->capability & 8) || (id->field_valid & 2)) { 292 return -1;
297fast_ata_pio:
298 hwif->tuneproc(drive, 255);
299 return hwif->ide_dma_off_quietly(drive);
300 }
301 /* IORDY not supported */
302 return 0;
303} 293}
304 294
305static int pdcnew_quirkproc(ide_drive_t *drive) 295static int pdcnew_quirkproc(ide_drive_t *drive)
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 730e8d1ec2f5..a7a639fe1eaf 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -2,6 +2,7 @@
2 * linux/drivers/ide/pci/pdc202xx_old.c Version 0.36 Sept 11, 2002 2 * linux/drivers/ide/pci/pdc202xx_old.c Version 0.36 Sept 11, 2002
3 * 3 *
4 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc.
5 * 6 *
6 * Promise Ultra33 cards with BIOS v1.20 through 1.28 will need this 7 * Promise Ultra33 cards with BIOS v1.20 through 1.28 will need this
7 * compiled into the kernel if you have more than one card installed. 8 * compiled into the kernel if you have more than one card installed.
@@ -216,21 +217,10 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed)
216} 217}
217 218
218 219
219/* 0 1 2 3 4 5 6 7 8 220static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio)
220 * 960, 480, 390, 300, 240, 180, 120, 90, 60
221 * 180, 150, 120, 90, 60
222 * DMA_Speed
223 * 180, 120, 90, 90, 90, 60, 30
224 * 11, 5, 4, 3, 2, 1, 0
225 */
226static void config_chipset_for_pio (ide_drive_t *drive, u8 pio)
227{ 221{
228 u8 speed = 0; 222 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
229 223 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio);
230 if (pio == 5) pio = 4;
231 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, pio, NULL);
232
233 pdc202xx_tune_chipset(drive, speed);
234} 224}
235 225
236static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) 226static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
@@ -250,17 +240,17 @@ static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
250static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif) 240static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
251{ 241{
252 unsigned long clock_reg = hwif->dma_master + 0x11; 242 unsigned long clock_reg = hwif->dma_master + 0x11;
253 u8 clock = hwif->INB(clock_reg); 243 u8 clock = inb(clock_reg);
254 244
255 hwif->OUTB(clock | (hwif->channel ? 0x08 : 0x02), clock_reg); 245 outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg);
256} 246}
257 247
258static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif) 248static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
259{ 249{
260 unsigned long clock_reg = hwif->dma_master + 0x11; 250 unsigned long clock_reg = hwif->dma_master + 0x11;
261 u8 clock = hwif->INB(clock_reg); 251 u8 clock = inb(clock_reg);
262 252
263 hwif->OUTB(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg); 253 outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
264} 254}
265 255
266static int config_chipset_for_dma (ide_drive_t *drive) 256static int config_chipset_for_dma (ide_drive_t *drive)
@@ -332,27 +322,15 @@ chipset_is_set:
332 322
333static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive) 323static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
334{ 324{
335 ide_hwif_t *hwif = HWIF(drive);
336 struct hd_driveid *id = drive->id;
337
338 drive->init_speed = 0; 325 drive->init_speed = 0;
339 326
340 if (id && (id->capability & 1) && drive->autodma) { 327 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
341 328 return 0;
342 if (ide_use_dma(drive)) {
343 if (config_chipset_for_dma(drive))
344 return hwif->ide_dma_on(drive);
345 }
346 329
347 goto fast_ata_pio; 330 if (ide_use_fast_pio(drive))
331 pdc202xx_tune_drive(drive, 255);
348 332
349 } else if ((id->capability & 8) || (id->field_valid & 2)) { 333 return -1;
350fast_ata_pio:
351 hwif->tuneproc(drive, 5);
352 return hwif->ide_dma_off_quietly(drive);
353 }
354 /* IORDY not supported */
355 return 0;
356} 334}
357 335
358static int pdc202xx_quirkproc (ide_drive_t *drive) 336static int pdc202xx_quirkproc (ide_drive_t *drive)
@@ -375,14 +353,14 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
375 unsigned long high_16 = hwif->dma_master; 353 unsigned long high_16 = hwif->dma_master;
376 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); 354 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
377 u32 word_count = 0; 355 u32 word_count = 0;
378 u8 clock = hwif->INB(high_16 + 0x11); 356 u8 clock = inb(high_16 + 0x11);
379 357
380 hwif->OUTB(clock|(hwif->channel ? 0x08 : 0x02), high_16+0x11); 358 outb(clock | (hwif->channel ? 0x08 : 0x02), high_16 + 0x11);
381 word_count = (rq->nr_sectors << 8); 359 word_count = (rq->nr_sectors << 8);
382 word_count = (rq_data_dir(rq) == READ) ? 360 word_count = (rq_data_dir(rq) == READ) ?
383 word_count | 0x05000000 : 361 word_count | 0x05000000 :
384 word_count | 0x06000000; 362 word_count | 0x06000000;
385 hwif->OUTL(word_count, atapi_reg); 363 outl(word_count, atapi_reg);
386 } 364 }
387 ide_dma_start(drive); 365 ide_dma_start(drive);
388} 366}
@@ -395,9 +373,9 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
395 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20); 373 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
396 u8 clock = 0; 374 u8 clock = 0;
397 375
398 hwif->OUTL(0, atapi_reg); /* zero out extra */ 376 outl(0, atapi_reg); /* zero out extra */
399 clock = hwif->INB(high_16 + 0x11); 377 clock = inb(high_16 + 0x11);
400 hwif->OUTB(clock & ~(hwif->channel ? 0x08:0x02), high_16+0x11); 378 outb(clock & ~(hwif->channel ? 0x08:0x02), high_16 + 0x11);
401 } 379 }
402 if (drive->current_speed > XFER_UDMA_2) 380 if (drive->current_speed > XFER_UDMA_2)
403 pdc_old_disable_66MHz_clock(drive->hwif); 381 pdc_old_disable_66MHz_clock(drive->hwif);
@@ -408,8 +386,8 @@ static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
408{ 386{
409 ide_hwif_t *hwif = HWIF(drive); 387 ide_hwif_t *hwif = HWIF(drive);
410 unsigned long high_16 = hwif->dma_master; 388 unsigned long high_16 = hwif->dma_master;
411 u8 dma_stat = hwif->INB(hwif->dma_status); 389 u8 dma_stat = inb(hwif->dma_status);
412 u8 sc1d = hwif->INB((high_16 + 0x001d)); 390 u8 sc1d = inb(high_16 + 0x001d);
413 391
414 if (hwif->channel) { 392 if (hwif->channel) {
415 /* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */ 393 /* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */
@@ -445,11 +423,11 @@ static int pdc202xx_ide_dma_timeout(ide_drive_t *drive)
445static void pdc202xx_reset_host (ide_hwif_t *hwif) 423static void pdc202xx_reset_host (ide_hwif_t *hwif)
446{ 424{
447 unsigned long high_16 = hwif->dma_master; 425 unsigned long high_16 = hwif->dma_master;
448 u8 udma_speed_flag = hwif->INB(high_16|0x001f); 426 u8 udma_speed_flag = inb(high_16 | 0x001f);
449 427
450 hwif->OUTB((udma_speed_flag | 0x10), (high_16|0x001f)); 428 outb(udma_speed_flag | 0x10, high_16 | 0x001f);
451 mdelay(100); 429 mdelay(100);
452 hwif->OUTB((udma_speed_flag & ~0x10), (high_16|0x001f)); 430 outb(udma_speed_flag & ~0x10, high_16 | 0x001f);
453 mdelay(2000); /* 2 seconds ?! */ 431 mdelay(2000); /* 2 seconds ?! */
454 432
455 printk(KERN_WARNING "PDC202XX: %s channel reset.\n", 433 printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
@@ -463,7 +441,7 @@ static void pdc202xx_reset (ide_drive_t *drive)
463 441
464 pdc202xx_reset_host(hwif); 442 pdc202xx_reset_host(hwif);
465 pdc202xx_reset_host(mate); 443 pdc202xx_reset_host(mate);
466 hwif->tuneproc(drive, 5); 444 pdc202xx_tune_drive(drive, 255);
467} 445}
468 446
469static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, 447static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
@@ -490,7 +468,7 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
490 hwif->rqsize = 256; 468 hwif->rqsize = 256;
491 469
492 hwif->autodma = 0; 470 hwif->autodma = 0;
493 hwif->tuneproc = &config_chipset_for_pio; 471 hwif->tuneproc = &pdc202xx_tune_drive;
494 hwif->quirkproc = &pdc202xx_quirkproc; 472 hwif->quirkproc = &pdc202xx_quirkproc;
495 473
496 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 474 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
@@ -537,9 +515,9 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
537 return; 515 return;
538 } 516 }
539 517
540 udma_speed_flag = hwif->INB((dmabase|0x1f)); 518 udma_speed_flag = inb(dmabase | 0x1f);
541 primary_mode = hwif->INB((dmabase|0x1a)); 519 primary_mode = inb(dmabase | 0x1a);
542 secondary_mode = hwif->INB((dmabase|0x1b)); 520 secondary_mode = inb(dmabase | 0x1b);
543 printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \ 521 printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \
544 "Primary %s Mode " \ 522 "Primary %s Mode " \
545 "Secondary %s Mode.\n", hwif->cds->name, 523 "Secondary %s Mode.\n", hwif->cds->name,
@@ -552,30 +530,10 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
552 printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ", 530 printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ",
553 hwif->cds->name, udma_speed_flag, 531 hwif->cds->name, udma_speed_flag,
554 (udma_speed_flag|1)); 532 (udma_speed_flag|1));
555 hwif->OUTB(udma_speed_flag|1,(dmabase|0x1f)); 533 outb(udma_speed_flag | 1, dmabase | 0x1f);
556 printk("%sACTIVE\n", 534 printk("%sACTIVE\n", (inb(dmabase | 0x1f) & 1) ? "" : "IN");
557 (hwif->INB(dmabase|0x1f)&1) ? "":"IN");
558 } 535 }
559#endif /* CONFIG_PDC202XX_BURST */ 536#endif /* CONFIG_PDC202XX_BURST */
560#ifdef CONFIG_PDC202XX_MASTER
561 if (!(primary_mode & 1)) {
562 printk(KERN_INFO "%s: FORCING PRIMARY MODE BIT "
563 "0x%02x -> 0x%02x ", hwif->cds->name,
564 primary_mode, (primary_mode|1));
565 hwif->OUTB(primary_mode|1, (dmabase|0x1a));
566 printk("%s\n",
567 (hwif->INB((dmabase|0x1a)) & 1) ? "MASTER" : "PCI");
568 }
569
570 if (!(secondary_mode & 1)) {
571 printk(KERN_INFO "%s: FORCING SECONDARY MODE BIT "
572 "0x%02x -> 0x%02x ", hwif->cds->name,
573 secondary_mode, (secondary_mode|1));
574 hwif->OUTB(secondary_mode|1, (dmabase|0x1b));
575 printk("%s\n",
576 (hwif->INB((dmabase|0x1b)) & 1) ? "MASTER" : "PCI");
577 }
578#endif /* CONFIG_PDC202XX_MASTER */
579 537
580 ide_setup_dma(hwif, dmabase, 8); 538 ide_setup_dma(hwif, dmabase, 8);
581} 539}
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 52cfc2ac22c1..569822f4cf55 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -369,7 +369,7 @@ static int piix_config_drive_for_dma (ide_drive_t *drive)
369 * If no DMA speed was available or the chipset has DMA bugs 369 * If no DMA speed was available or the chipset has DMA bugs
370 * then disable DMA and use PIO 370 * then disable DMA and use PIO
371 */ 371 */
372 if (!speed || no_piix_dma) 372 if (!speed)
373 return 0; 373 return 0;
374 374
375 (void) piix_tune_chipset(drive, speed); 375 (void) piix_tune_chipset(drive, speed);
@@ -386,41 +386,28 @@ static int piix_config_drive_for_dma (ide_drive_t *drive)
386 386
387static int piix_config_drive_xfer_rate (ide_drive_t *drive) 387static int piix_config_drive_xfer_rate (ide_drive_t *drive)
388{ 388{
389 ide_hwif_t *hwif = HWIF(drive);
390 struct hd_driveid *id = drive->id;
391
392 drive->init_speed = 0; 389 drive->init_speed = 0;
393 390
394 if ((id->capability & 1) && drive->autodma) { 391 if (ide_use_dma(drive) && piix_config_drive_for_dma(drive))
395 392 return 0;
396 if (ide_use_dma(drive) && piix_config_drive_for_dma(drive))
397 return hwif->ide_dma_on(drive);
398
399 goto fast_ata_pio;
400 393
401 } else if ((id->capability & 8) || (id->field_valid & 2)) { 394 if (ide_use_fast_pio(drive))
402fast_ata_pio:
403 /* Find best PIO mode. */ 395 /* Find best PIO mode. */
404 (void) hwif->speedproc(drive, XFER_PIO_0 + 396 piix_tune_chipset(drive, XFER_PIO_0 +
405 ide_get_best_pio_mode(drive, 255, 4, NULL)); 397 ide_get_best_pio_mode(drive, 255, 4, NULL));
406 return hwif->ide_dma_off_quietly(drive); 398
407 } 399 return -1;
408 /* IORDY not supported */
409 return 0;
410} 400}
411 401
412/** 402/**
413 * init_chipset_piix - set up the PIIX chipset 403 * piix_is_ichx - check if ICHx
414 * @dev: PCI device to set up 404 * @dev: PCI device to check
415 * @name: Name of the device
416 * 405 *
417 * Initialize the PCI device as required. For the PIIX this turns 406 * returns 1 if ICHx, 0 otherwise.
418 * out to be nice and simple
419 */ 407 */
420 408static int piix_is_ichx(struct pci_dev *dev)
421static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name)
422{ 409{
423 switch(dev->device) { 410 switch (dev->device) {
424 case PCI_DEVICE_ID_INTEL_82801EB_1: 411 case PCI_DEVICE_ID_INTEL_82801EB_1:
425 case PCI_DEVICE_ID_INTEL_82801AA_1: 412 case PCI_DEVICE_ID_INTEL_82801AA_1:
426 case PCI_DEVICE_ID_INTEL_82801AB_1: 413 case PCI_DEVICE_ID_INTEL_82801AB_1:
@@ -438,19 +425,61 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
438 case PCI_DEVICE_ID_INTEL_ICH7_21: 425 case PCI_DEVICE_ID_INTEL_ICH7_21:
439 case PCI_DEVICE_ID_INTEL_ESB2_18: 426 case PCI_DEVICE_ID_INTEL_ESB2_18:
440 case PCI_DEVICE_ID_INTEL_ICH8_6: 427 case PCI_DEVICE_ID_INTEL_ICH8_6:
441 { 428 return 1;
442 unsigned int extra = 0;
443 pci_read_config_dword(dev, 0x54, &extra);
444 pci_write_config_dword(dev, 0x54, extra|0x400);
445 }
446 default:
447 break;
448 } 429 }
449 430
450 return 0; 431 return 0;
451} 432}
452 433
453/** 434/**
435 * init_chipset_piix - set up the PIIX chipset
436 * @dev: PCI device to set up
437 * @name: Name of the device
438 *
439 * Initialize the PCI device as required. For the PIIX this turns
440 * out to be nice and simple
441 */
442
443static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name)
444{
445 if (piix_is_ichx(dev)) {
446 unsigned int extra = 0;
447 pci_read_config_dword(dev, 0x54, &extra);
448 pci_write_config_dword(dev, 0x54, extra|0x400);
449 }
450
451 return 0;
452}
453
454/**
455 * piix_dma_clear_irq - clear BMDMA status
456 * @drive: IDE drive to clear
457 *
458 * Called from ide_intr() for PIO interrupts
459 * to clear BMDMA status as needed by ICHx
460 */
461static void piix_dma_clear_irq(ide_drive_t *drive)
462{
463 ide_hwif_t *hwif = HWIF(drive);
464 u8 dma_stat;
465
466 /* clear the INTR & ERROR bits */
467 dma_stat = hwif->INB(hwif->dma_status);
468 /* Should we force the bit as well ? */
469 hwif->OUTB(dma_stat, hwif->dma_status);
470}
471
472static int __devinit piix_cable_detect(ide_hwif_t *hwif)
473{
474 struct pci_dev *dev = hwif->pci_dev;
475 u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
476
477 pci_read_config_byte(dev, 0x54, &reg54h);
478
479 return (reg54h & mask) ? 1 : 0;
480}
481
482/**
454 * init_hwif_piix - fill in the hwif for the PIIX 483 * init_hwif_piix - fill in the hwif for the PIIX
455 * @hwif: IDE interface 484 * @hwif: IDE interface
456 * 485 *
@@ -460,9 +489,6 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
460 489
461static void __devinit init_hwif_piix(ide_hwif_t *hwif) 490static void __devinit init_hwif_piix(ide_hwif_t *hwif)
462{ 491{
463 u8 reg54h = 0, reg55h = 0, ata66 = 0;
464 u8 mask = hwif->channel ? 0xc0 : 0x30;
465
466#ifndef CONFIG_IA64 492#ifndef CONFIG_IA64
467 if (!hwif->irq) 493 if (!hwif->irq)
468 hwif->irq = hwif->channel ? 15 : 14; 494 hwif->irq = hwif->channel ? 15 : 14;
@@ -472,10 +498,6 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
472 /* This is a painful system best to let it self tune for now */ 498 /* This is a painful system best to let it self tune for now */
473 return; 499 return;
474 } 500 }
475 /* ESB2 appears to generate spurious DMA interrupts in PIO mode
476 when in native mode */
477 if (hwif->pci_dev->device == PCI_DEVICE_ID_INTEL_ESB2_18)
478 hwif->atapi_irq_bogon = 1;
479 501
480 hwif->autodma = 0; 502 hwif->autodma = 0;
481 hwif->tuneproc = &piix_tune_drive; 503 hwif->tuneproc = &piix_tune_drive;
@@ -486,15 +508,16 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
486 if (!hwif->dma_base) 508 if (!hwif->dma_base)
487 return; 509 return;
488 510
511 /* ICHx need to clear the bmdma status for all interrupts */
512 if (piix_is_ichx(hwif->pci_dev))
513 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
514
489 hwif->atapi_dma = 1; 515 hwif->atapi_dma = 1;
490 hwif->ultra_mask = 0x3f; 516 hwif->ultra_mask = 0x3f;
491 hwif->mwdma_mask = 0x06; 517 hwif->mwdma_mask = 0x06;
492 hwif->swdma_mask = 0x04; 518 hwif->swdma_mask = 0x04;
493 519
494 switch(hwif->pci_dev->device) { 520 switch(hwif->pci_dev->device) {
495 case PCI_DEVICE_ID_INTEL_82371MX:
496 hwif->mwdma_mask = 0x80;
497 hwif->swdma_mask = 0x80;
498 case PCI_DEVICE_ID_INTEL_82371FB_0: 521 case PCI_DEVICE_ID_INTEL_82371FB_0:
499 case PCI_DEVICE_ID_INTEL_82371FB_1: 522 case PCI_DEVICE_ID_INTEL_82371FB_1:
500 case PCI_DEVICE_ID_INTEL_82371SB_1: 523 case PCI_DEVICE_ID_INTEL_82371SB_1:
@@ -507,14 +530,14 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
507 hwif->ultra_mask = 0x07; 530 hwif->ultra_mask = 0x07;
508 break; 531 break;
509 default: 532 default:
510 pci_read_config_byte(hwif->pci_dev, 0x54, &reg54h); 533 if (!hwif->udma_four)
511 pci_read_config_byte(hwif->pci_dev, 0x55, &reg55h); 534 hwif->udma_four = piix_cable_detect(hwif);
512 ata66 = (reg54h & mask) ? 1 : 0;
513 break; 535 break;
514 } 536 }
515 537
516 if (!(hwif->udma_four)) 538 if (no_piix_dma)
517 hwif->udma_four = ata66; 539 hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
540
518 hwif->ide_dma_check = &piix_config_drive_xfer_rate; 541 hwif->ide_dma_check = &piix_config_drive_xfer_rate;
519 if (!noautodma) 542 if (!noautodma)
520 hwif->autodma = 1; 543 hwif->autodma = 1;
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 8d762d323f8b..b5ae0c50e216 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -161,7 +161,7 @@ static int sc1200_config_dma2 (ide_drive_t *drive, int mode)
161 /* 161 /*
162 * Default to DMA-off in case we run into trouble here. 162 * Default to DMA-off in case we run into trouble here.
163 */ 163 */
164 hwif->ide_dma_off_quietly(drive); /* turn off DMA while we fiddle */ 164 hwif->dma_off_quietly(drive); /* turn off DMA while we fiddle */
165 outb(inb(hwif->dma_base+2)&~(unit?0x40:0x20), hwif->dma_base+2); /* clear DMA_capable bit */ 165 outb(inb(hwif->dma_base+2)&~(unit?0x40:0x20), hwif->dma_base+2); /* clear DMA_capable bit */
166 166
167 /* 167 /*
@@ -241,10 +241,7 @@ static int sc1200_config_dma2 (ide_drive_t *drive, int mode)
241 241
242 outb(inb(hwif->dma_base+2)|(unit?0x40:0x20), hwif->dma_base+2); /* set DMA_capable bit */ 242 outb(inb(hwif->dma_base+2)|(unit?0x40:0x20), hwif->dma_base+2); /* set DMA_capable bit */
243 243
244 /* 244 return 0; /* success */
245 * Finally, turn DMA on in software, and exit.
246 */
247 return hwif->ide_dma_on(drive); /* success */
248} 245}
249 246
250/* 247/*
@@ -442,10 +439,10 @@ static int sc1200_resume (struct pci_dev *dev)
442 ide_drive_t *drive = &(hwif->drives[d]); 439 ide_drive_t *drive = &(hwif->drives[d]);
443 if (drive->present && !__ide_dma_bad_drive(drive)) { 440 if (drive->present && !__ide_dma_bad_drive(drive)) {
444 int was_using_dma = drive->using_dma; 441 int was_using_dma = drive->using_dma;
445 hwif->ide_dma_off_quietly(drive); 442 hwif->dma_off_quietly(drive);
446 sc1200_config_dma(drive); 443 sc1200_config_dma(drive);
447 if (!was_using_dma && drive->using_dma) { 444 if (!was_using_dma && drive->using_dma) {
448 hwif->ide_dma_off_quietly(drive); 445 hwif->dma_off_quietly(drive);
449 } 446 }
450 } 447 }
451 } 448 }
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index ea9a28a45853..dbcd37a0c652 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -160,7 +160,7 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
160 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || 160 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
161 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) { 161 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
162 if (!drive->init_speed) { 162 if (!drive->init_speed) {
163 u8 dma_stat = hwif->INB(hwif->dma_status); 163 u8 dma_stat = inb(hwif->dma_status);
164 164
165dma_pio: 165dma_pio:
166 if (((ultra_enable << (7-drive->dn) & 0x80) == 0x80) && 166 if (((ultra_enable << (7-drive->dn) & 0x80) == 0x80) &&
@@ -315,35 +315,15 @@ static int config_chipset_for_dma (ide_drive_t *drive)
315 315
316static int svwks_config_drive_xfer_rate (ide_drive_t *drive) 316static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
317{ 317{
318 ide_hwif_t *hwif = HWIF(drive);
319 struct hd_driveid *id = drive->id;
320
321 drive->init_speed = 0; 318 drive->init_speed = 0;
322 319
323 if ((id->capability & 1) && drive->autodma) { 320 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
324 321 return 0;
325 if (ide_use_dma(drive)) {
326 if (config_chipset_for_dma(drive))
327 return hwif->ide_dma_on(drive);
328 }
329
330 goto fast_ata_pio;
331 322
332 } else if ((id->capability & 8) || (id->field_valid & 2)) { 323 if (ide_use_fast_pio(drive))
333fast_ata_pio:
334 config_chipset_for_pio(drive); 324 config_chipset_for_pio(drive);
335 // hwif->tuneproc(drive, 5);
336 return hwif->ide_dma_off_quietly(drive);
337 }
338 /* IORDY not supported */
339 return 0;
340}
341
342/* This can go soon */
343 325
344static int svwks_ide_dma_end (ide_drive_t *drive) 326 return -1;
345{
346 return __ide_dma_end(drive);
347} 327}
348 328
349static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name) 329static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name)
@@ -537,35 +517,20 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
537 } 517 }
538 518
539 hwif->ide_dma_check = &svwks_config_drive_xfer_rate; 519 hwif->ide_dma_check = &svwks_config_drive_xfer_rate;
540 if (hwif->pci_dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) 520 if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
541 hwif->ide_dma_end = &svwks_ide_dma_end; 521 if (!hwif->udma_four)
542 else if (!(hwif->udma_four)) 522 hwif->udma_four = ata66_svwks(hwif);
543 hwif->udma_four = ata66_svwks(hwif); 523 }
544 if (!noautodma) 524 if (!noautodma)
545 hwif->autodma = 1; 525 hwif->autodma = 1;
546 526
547 dma_stat = hwif->INB(hwif->dma_status); 527 dma_stat = inb(hwif->dma_status);
548 hwif->drives[0].autodma = (dma_stat & 0x20); 528 hwif->drives[0].autodma = (dma_stat & 0x20);
549 hwif->drives[1].autodma = (dma_stat & 0x40); 529 hwif->drives[1].autodma = (dma_stat & 0x40);
550 hwif->drives[0].autotune = (!(dma_stat & 0x20)); 530 hwif->drives[0].autotune = (!(dma_stat & 0x20));
551 hwif->drives[1].autotune = (!(dma_stat & 0x40)); 531 hwif->drives[1].autotune = (!(dma_stat & 0x40));
552} 532}
553 533
554/*
555 * We allow the BM-DMA driver to only work on enabled interfaces.
556 */
557static void __devinit init_dma_svwks (ide_hwif_t *hwif, unsigned long dmabase)
558{
559 struct pci_dev *dev = hwif->pci_dev;
560
561 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
562 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
563 (!(PCI_FUNC(dev->devfn) & 1)) && (hwif->channel))
564 return;
565
566 ide_setup_dma(hwif, dmabase, 8);
567}
568
569static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d) 534static int __devinit init_setup_svwks (struct pci_dev *dev, ide_pci_device_t *d)
570{ 535{
571 return ide_setup_pci_device(dev, d); 536 return ide_setup_pci_device(dev, d);
@@ -600,7 +565,6 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
600 .init_setup = init_setup_svwks, 565 .init_setup = init_setup_svwks,
601 .init_chipset = init_chipset_svwks, 566 .init_chipset = init_chipset_svwks,
602 .init_hwif = init_hwif_svwks, 567 .init_hwif = init_hwif_svwks,
603 .init_dma = init_dma_svwks,
604 .channels = 2, 568 .channels = 2,
605 .autodma = AUTODMA, 569 .autodma = AUTODMA,
606 .bootable = ON_BOARD, 570 .bootable = ON_BOARD,
@@ -609,7 +573,6 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
609 .init_setup = init_setup_csb6, 573 .init_setup = init_setup_csb6,
610 .init_chipset = init_chipset_svwks, 574 .init_chipset = init_chipset_svwks,
611 .init_hwif = init_hwif_svwks, 575 .init_hwif = init_hwif_svwks,
612 .init_dma = init_dma_svwks,
613 .channels = 2, 576 .channels = 2,
614 .autodma = AUTODMA, 577 .autodma = AUTODMA,
615 .bootable = ON_BOARD, 578 .bootable = ON_BOARD,
@@ -618,7 +581,6 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
618 .init_setup = init_setup_csb6, 581 .init_setup = init_setup_csb6,
619 .init_chipset = init_chipset_svwks, 582 .init_chipset = init_chipset_svwks,
620 .init_hwif = init_hwif_svwks, 583 .init_hwif = init_hwif_svwks,
621 .init_dma = init_dma_svwks,
622 .channels = 1, /* 2 */ 584 .channels = 1, /* 2 */
623 .autodma = AUTODMA, 585 .autodma = AUTODMA,
624 .bootable = ON_BOARD, 586 .bootable = ON_BOARD,
@@ -627,7 +589,6 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
627 .init_setup = init_setup_svwks, 589 .init_setup = init_setup_svwks,
628 .init_chipset = init_chipset_svwks, 590 .init_chipset = init_chipset_svwks,
629 .init_hwif = init_hwif_svwks, 591 .init_hwif = init_hwif_svwks,
630 .init_dma = init_dma_svwks,
631 .channels = 1, /* 2 */ 592 .channels = 1, /* 2 */
632 .autodma = AUTODMA, 593 .autodma = AUTODMA,
633 .bootable = ON_BOARD, 594 .bootable = ON_BOARD,
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index b0bf01809279..fd09b295a69d 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -110,24 +110,24 @@ sgiioc4_init_hwif_ports(hw_regs_t * hw, unsigned long data_port,
110static void 110static void
111sgiioc4_maskproc(ide_drive_t * drive, int mask) 111sgiioc4_maskproc(ide_drive_t * drive, int mask)
112{ 112{
113 ide_hwif_t *hwif = HWIF(drive); 113 writeb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
114 hwif->OUTB(mask ? (drive->ctl | 2) : (drive->ctl & ~2), 114 (void __iomem *)IDE_CONTROL_REG);
115 IDE_CONTROL_REG);
116} 115}
117 116
118 117
119static int 118static int
120sgiioc4_checkirq(ide_hwif_t * hwif) 119sgiioc4_checkirq(ide_hwif_t * hwif)
121{ 120{
122 u8 intr_reg = 121 unsigned long intr_addr =
123 hwif->INL(hwif->io_ports[IDE_IRQ_OFFSET] + IOC4_INTR_REG * 4); 122 hwif->io_ports[IDE_IRQ_OFFSET] + IOC4_INTR_REG * 4;
124 123
125 if (intr_reg & 0x03) 124 if ((u8)readl((void __iomem *)intr_addr) & 0x03)
126 return 1; 125 return 1;
127 126
128 return 0; 127 return 0;
129} 128}
130 129
130static u8 sgiioc4_INB(unsigned long);
131 131
132static int 132static int
133sgiioc4_clearirq(ide_drive_t * drive) 133sgiioc4_clearirq(ide_drive_t * drive)
@@ -138,21 +138,21 @@ sgiioc4_clearirq(ide_drive_t * drive)
138 hwif->io_ports[IDE_IRQ_OFFSET] + (IOC4_INTR_REG << 2); 138 hwif->io_ports[IDE_IRQ_OFFSET] + (IOC4_INTR_REG << 2);
139 139
140 /* Code to check for PCI error conditions */ 140 /* Code to check for PCI error conditions */
141 intr_reg = hwif->INL(other_ir); 141 intr_reg = readl((void __iomem *)other_ir);
142 if (intr_reg & 0x03) { /* Valid IOC4-IDE interrupt */ 142 if (intr_reg & 0x03) { /* Valid IOC4-IDE interrupt */
143 /* 143 /*
144 * Using hwif->INB to read the IDE_STATUS_REG has a side effect 144 * Using sgiioc4_INB to read the IDE_STATUS_REG has a side effect
145 * of clearing the interrupt. The first read should clear it 145 * of clearing the interrupt. The first read should clear it
146 * if it is set. The second read should return a "clear" status 146 * if it is set. The second read should return a "clear" status
147 * if it got cleared. If not, then spin for a bit trying to 147 * if it got cleared. If not, then spin for a bit trying to
148 * clear it. 148 * clear it.
149 */ 149 */
150 u8 stat = hwif->INB(IDE_STATUS_REG); 150 u8 stat = sgiioc4_INB(IDE_STATUS_REG);
151 int count = 0; 151 int count = 0;
152 stat = hwif->INB(IDE_STATUS_REG); 152 stat = sgiioc4_INB(IDE_STATUS_REG);
153 while ((stat & 0x80) && (count++ < 100)) { 153 while ((stat & 0x80) && (count++ < 100)) {
154 udelay(1); 154 udelay(1);
155 stat = hwif->INB(IDE_STATUS_REG); 155 stat = sgiioc4_INB(IDE_STATUS_REG);
156 } 156 }
157 157
158 if (intr_reg & 0x02) { 158 if (intr_reg & 0x02) {
@@ -161,9 +161,9 @@ sgiioc4_clearirq(ide_drive_t * drive)
161 pci_stat_cmd_reg; 161 pci_stat_cmd_reg;
162 162
163 pci_err_addr_low = 163 pci_err_addr_low =
164 hwif->INL(hwif->io_ports[IDE_IRQ_OFFSET]); 164 readl((void __iomem *)hwif->io_ports[IDE_IRQ_OFFSET]);
165 pci_err_addr_high = 165 pci_err_addr_high =
166 hwif->INL(hwif->io_ports[IDE_IRQ_OFFSET] + 4); 166 readl((void __iomem *)(hwif->io_ports[IDE_IRQ_OFFSET] + 4));
167 pci_read_config_dword(hwif->pci_dev, PCI_COMMAND, 167 pci_read_config_dword(hwif->pci_dev, PCI_COMMAND,
168 &pci_stat_cmd_reg); 168 &pci_stat_cmd_reg);
169 printk(KERN_ERR 169 printk(KERN_ERR
@@ -180,9 +180,9 @@ sgiioc4_clearirq(ide_drive_t * drive)
180 } 180 }
181 181
182 /* Clear the Interrupt, Error bits on the IOC4 */ 182 /* Clear the Interrupt, Error bits on the IOC4 */
183 hwif->OUTL(0x03, other_ir); 183 writel(0x03, (void __iomem *)other_ir);
184 184
185 intr_reg = hwif->INL(other_ir); 185 intr_reg = readl((void __iomem *)other_ir);
186 } 186 }
187 187
188 return intr_reg & 3; 188 return intr_reg & 3;
@@ -191,23 +191,25 @@ sgiioc4_clearirq(ide_drive_t * drive)
191static void sgiioc4_ide_dma_start(ide_drive_t * drive) 191static void sgiioc4_ide_dma_start(ide_drive_t * drive)
192{ 192{
193 ide_hwif_t *hwif = HWIF(drive); 193 ide_hwif_t *hwif = HWIF(drive);
194 unsigned int reg = hwif->INL(hwif->dma_base + IOC4_DMA_CTRL * 4); 194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4;
195 unsigned int reg = readl((void __iomem *)ioc4_dma_addr);
195 unsigned int temp_reg = reg | IOC4_S_DMA_START; 196 unsigned int temp_reg = reg | IOC4_S_DMA_START;
196 197
197 hwif->OUTL(temp_reg, hwif->dma_base + IOC4_DMA_CTRL * 4); 198 writel(temp_reg, (void __iomem *)ioc4_dma_addr);
198} 199}
199 200
200static u32 201static u32
201sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base) 202sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base)
202{ 203{
204 unsigned long ioc4_dma_addr = dma_base + IOC4_DMA_CTRL * 4;
203 u32 ioc4_dma; 205 u32 ioc4_dma;
204 int count; 206 int count;
205 207
206 count = 0; 208 count = 0;
207 ioc4_dma = hwif->INL(dma_base + IOC4_DMA_CTRL * 4); 209 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
208 while ((ioc4_dma & IOC4_S_DMA_STOP) && (count++ < 200)) { 210 while ((ioc4_dma & IOC4_S_DMA_STOP) && (count++ < 200)) {
209 udelay(1); 211 udelay(1);
210 ioc4_dma = hwif->INL(dma_base + IOC4_DMA_CTRL * 4); 212 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
211 } 213 }
212 return ioc4_dma; 214 return ioc4_dma;
213} 215}
@@ -218,11 +220,11 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
218{ 220{
219 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0; 221 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0;
220 ide_hwif_t *hwif = HWIF(drive); 222 ide_hwif_t *hwif = HWIF(drive);
221 u64 dma_base = hwif->dma_base; 223 unsigned long dma_base = hwif->dma_base;
222 int dma_stat = 0; 224 int dma_stat = 0;
223 unsigned long *ending_dma = ide_get_hwifdata(hwif); 225 unsigned long *ending_dma = ide_get_hwifdata(hwif);
224 226
225 hwif->OUTL(IOC4_S_DMA_STOP, dma_base + IOC4_DMA_CTRL * 4); 227 writel(IOC4_S_DMA_STOP, (void __iomem *)(dma_base + IOC4_DMA_CTRL * 4));
226 228
227 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base); 229 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
228 230
@@ -254,8 +256,8 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
254 dma_stat = 1; 256 dma_stat = 1;
255 } 257 }
256 258
257 bc_dev = hwif->INL(dma_base + IOC4_BC_DEV * 4); 259 bc_dev = readl((void __iomem *)(dma_base + IOC4_BC_DEV * 4));
258 bc_mem = hwif->INL(dma_base + IOC4_BC_MEM * 4); 260 bc_mem = readl((void __iomem *)(dma_base + IOC4_BC_MEM * 4));
259 261
260 if ((bc_dev & 0x01FF) || (bc_mem & 0x1FF)) { 262 if ((bc_dev & 0x01FF) || (bc_mem & 0x1FF)) {
261 if (bc_dev > bc_mem + 8) { 263 if (bc_dev > bc_mem + 8) {
@@ -273,34 +275,29 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
273} 275}
274 276
275static int 277static int
276sgiioc4_ide_dma_check(ide_drive_t * drive) 278sgiioc4_ide_dma_on(ide_drive_t * drive)
277{ 279{
278 if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0) { 280 drive->using_dma = 1;
279 printk(KERN_INFO
280 "Couldnot set %s in Multimode-2 DMA mode | "
281 "Drive %s using PIO instead\n",
282 drive->name, drive->name);
283 drive->using_dma = 0;
284 } else
285 drive->using_dma = 1;
286 281
287 return 0; 282 return 0;
288} 283}
289 284
290static int 285static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
291sgiioc4_ide_dma_on(ide_drive_t * drive)
292{ 286{
293 drive->using_dma = 1; 287 drive->using_dma = 0;
294 288
295 return HWIF(drive)->ide_dma_host_on(drive); 289 drive->hwif->dma_host_off(drive);
296} 290}
297 291
298static int 292static int sgiioc4_ide_dma_check(ide_drive_t *drive)
299sgiioc4_ide_dma_off_quietly(ide_drive_t * drive)
300{ 293{
301 drive->using_dma = 0; 294 /* FIXME: check for available DMA modes */
302 295 if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0) {
303 return HWIF(drive)->ide_dma_host_off(drive); 296 printk(KERN_WARNING "%s: couldn't set MWDMA2 mode, "
297 "using PIO instead\n", drive->name);
298 return -1;
299 } else
300 return 0;
304} 301}
305 302
306/* returns 1 if dma irq issued, 0 otherwise */ 303/* returns 1 if dma irq issued, 0 otherwise */
@@ -310,21 +307,13 @@ sgiioc4_ide_dma_test_irq(ide_drive_t * drive)
310 return sgiioc4_checkirq(HWIF(drive)); 307 return sgiioc4_checkirq(HWIF(drive));
311} 308}
312 309
313static int 310static void sgiioc4_dma_host_on(ide_drive_t * drive)
314sgiioc4_ide_dma_host_on(ide_drive_t * drive)
315{ 311{
316 if (drive->using_dma)
317 return 0;
318
319 return 1;
320} 312}
321 313
322static int 314static void sgiioc4_dma_host_off(ide_drive_t * drive)
323sgiioc4_ide_dma_host_off(ide_drive_t * drive)
324{ 315{
325 sgiioc4_clearirq(drive); 316 sgiioc4_clearirq(drive);
326
327 return 0;
328} 317}
329 318
330static int 319static int
@@ -436,16 +425,17 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
436{ 425{
437 u32 ioc4_dma; 426 u32 ioc4_dma;
438 ide_hwif_t *hwif = HWIF(drive); 427 ide_hwif_t *hwif = HWIF(drive);
439 u64 dma_base = hwif->dma_base; 428 unsigned long dma_base = hwif->dma_base;
429 unsigned long ioc4_dma_addr = dma_base + IOC4_DMA_CTRL * 4;
440 u32 dma_addr, ending_dma_addr; 430 u32 dma_addr, ending_dma_addr;
441 431
442 ioc4_dma = hwif->INL(dma_base + IOC4_DMA_CTRL * 4); 432 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
443 433
444 if (ioc4_dma & IOC4_S_DMA_ACTIVE) { 434 if (ioc4_dma & IOC4_S_DMA_ACTIVE) {
445 printk(KERN_WARNING 435 printk(KERN_WARNING
446 "%s(%s):Warning!! DMA from previous transfer was still active\n", 436 "%s(%s):Warning!! DMA from previous transfer was still active\n",
447 __FUNCTION__, drive->name); 437 __FUNCTION__, drive->name);
448 hwif->OUTL(IOC4_S_DMA_STOP, dma_base + IOC4_DMA_CTRL * 4); 438 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
449 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base); 439 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
450 440
451 if (ioc4_dma & IOC4_S_DMA_STOP) 441 if (ioc4_dma & IOC4_S_DMA_STOP)
@@ -454,13 +444,13 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
454 __FUNCTION__, drive->name); 444 __FUNCTION__, drive->name);
455 } 445 }
456 446
457 ioc4_dma = hwif->INL(dma_base + IOC4_DMA_CTRL * 4); 447 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
458 if (ioc4_dma & IOC4_S_DMA_ERROR) { 448 if (ioc4_dma & IOC4_S_DMA_ERROR) {
459 printk(KERN_WARNING 449 printk(KERN_WARNING
460 "%s(%s) : Warning!! - DMA Error during Previous" 450 "%s(%s) : Warning!! - DMA Error during Previous"
461 " transfer | status 0x%x\n", 451 " transfer | status 0x%x\n",
462 __FUNCTION__, drive->name, ioc4_dma); 452 __FUNCTION__, drive->name, ioc4_dma);
463 hwif->OUTL(IOC4_S_DMA_STOP, dma_base + IOC4_DMA_CTRL * 4); 453 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
464 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base); 454 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
465 455
466 if (ioc4_dma & IOC4_S_DMA_STOP) 456 if (ioc4_dma & IOC4_S_DMA_STOP)
@@ -471,14 +461,14 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
471 461
472 /* Address of the Scatter Gather List */ 462 /* Address of the Scatter Gather List */
473 dma_addr = cpu_to_le32(hwif->dmatable_dma); 463 dma_addr = cpu_to_le32(hwif->dmatable_dma);
474 hwif->OUTL(dma_addr, dma_base + IOC4_DMA_PTR_L * 4); 464 writel(dma_addr, (void __iomem *)(dma_base + IOC4_DMA_PTR_L * 4));
475 465
476 /* Address of the Ending DMA */ 466 /* Address of the Ending DMA */
477 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE); 467 memset(ide_get_hwifdata(hwif), 0, IOC4_IDE_CACHELINE_SIZE);
478 ending_dma_addr = cpu_to_le32(hwif->dma_status); 468 ending_dma_addr = cpu_to_le32(hwif->dma_status);
479 hwif->OUTL(ending_dma_addr, dma_base + IOC4_DMA_END_ADDR * 4); 469 writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4));
480 470
481 hwif->OUTL(dma_direction, dma_base + IOC4_DMA_CTRL * 4); 471 writel(dma_direction, (void __iomem *)ioc4_dma_addr);
482 drive->waiting_for_dma = 1; 472 drive->waiting_for_dma = 1;
483} 473}
484 474
@@ -590,7 +580,7 @@ static int sgiioc4_ide_dma_setup(ide_drive_t *drive)
590static void __devinit 580static void __devinit
591ide_init_sgiioc4(ide_hwif_t * hwif) 581ide_init_sgiioc4(ide_hwif_t * hwif)
592{ 582{
593 hwif->mmio = 2; 583 hwif->mmio = 1;
594 hwif->autodma = 1; 584 hwif->autodma = 1;
595 hwif->atapi_dma = 1; 585 hwif->atapi_dma = 1;
596 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */ 586 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */
@@ -613,10 +603,10 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
613 hwif->ide_dma_end = &sgiioc4_ide_dma_end; 603 hwif->ide_dma_end = &sgiioc4_ide_dma_end;
614 hwif->ide_dma_check = &sgiioc4_ide_dma_check; 604 hwif->ide_dma_check = &sgiioc4_ide_dma_check;
615 hwif->ide_dma_on = &sgiioc4_ide_dma_on; 605 hwif->ide_dma_on = &sgiioc4_ide_dma_on;
616 hwif->ide_dma_off_quietly = &sgiioc4_ide_dma_off_quietly; 606 hwif->dma_off_quietly = &sgiioc4_dma_off_quietly;
617 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; 607 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq;
618 hwif->ide_dma_host_on = &sgiioc4_ide_dma_host_on; 608 hwif->dma_host_on = &sgiioc4_dma_host_on;
619 hwif->ide_dma_host_off = &sgiioc4_ide_dma_host_off; 609 hwif->dma_host_off = &sgiioc4_dma_host_off;
620 hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq; 610 hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq;
621 hwif->ide_dma_timeout = &__ide_dma_timeout; 611 hwif->ide_dma_timeout = &__ide_dma_timeout;
622 612
@@ -688,7 +678,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
688 default_hwif_mmiops(hwif); 678 default_hwif_mmiops(hwif);
689 679
690 /* Initializing chipset IRQ Registers */ 680 /* Initializing chipset IRQ Registers */
691 hwif->OUTL(0x03, irqport + IOC4_INTR_SET * 4); 681 writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4));
692 682
693 ide_init_sgiioc4(hwif); 683 ide_init_sgiioc4(hwif);
694 684
@@ -729,8 +719,7 @@ out:
729 return ret; 719 return ret;
730} 720}
731 721
732static ide_pci_device_t sgiioc4_chipsets[] __devinitdata = { 722static ide_pci_device_t sgiioc4_chipset __devinitdata = {
733 {
734 /* Channel 0 */ 723 /* Channel 0 */
735 .name = "SGIIOC4", 724 .name = "SGIIOC4",
736 .init_hwif = ide_init_sgiioc4, 725 .init_hwif = ide_init_sgiioc4,
@@ -739,7 +728,6 @@ static ide_pci_device_t sgiioc4_chipsets[] __devinitdata = {
739 .autodma = AUTODMA, 728 .autodma = AUTODMA,
740 /* SGI IOC4 doesn't have enablebits. */ 729 /* SGI IOC4 doesn't have enablebits. */
741 .bootable = ON_BOARD, 730 .bootable = ON_BOARD,
742 }
743}; 731};
744 732
745int 733int
@@ -751,8 +739,7 @@ ioc4_ide_attach_one(struct ioc4_driver_data *idd)
751 if (idd->idd_variant == IOC4_VARIANT_PCI_RT) 739 if (idd->idd_variant == IOC4_VARIANT_PCI_RT)
752 return 0; 740 return 0;
753 741
754 return pci_init_sgiioc4(idd->idd_pdev, 742 return pci_init_sgiioc4(idd->idd_pdev, &sgiioc4_chipset);
755 &sgiioc4_chipsets[idd->idd_pci_id->driver_data]);
756} 743}
757 744
758static struct ioc4_submodule ioc4_ide_submodule = { 745static struct ioc4_submodule ioc4_ide_submodule = {
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 4ff89c7d990a..7b4c189a9d99 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,8 +1,9 @@
1/* 1/*
2 * linux/drivers/ide/pci/siimage.c Version 1.07 Nov 30, 2003 2 * linux/drivers/ide/pci/siimage.c Version 1.11 Jan 27, 2007
3 * 3 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
6 * Copyright (C) 2007 MontaVista Software, Inc.
6 * 7 *
7 * May be copied or modified under the terms of the GNU General Public License 8 * May be copied or modified under the terms of the GNU General Public License
8 * 9 *
@@ -205,41 +206,39 @@ static void siimage_tuneproc (ide_drive_t *drive, byte mode_wanted)
205 unsigned long tfaddr = siimage_selreg(hwif, 0x02); 206 unsigned long tfaddr = siimage_selreg(hwif, 0x02);
206 207
207 /* cheat for now and use the docs */ 208 /* cheat for now and use the docs */
208 switch(mode_wanted) { 209 switch (mode_wanted) {
209 case 4: 210 case 4:
210 speedp = 0x10c1; 211 speedp = 0x10c1;
211 speedt = 0x10c1; 212 speedt = 0x10c1;
212 break; 213 break;
213 case 3: 214 case 3:
214 speedp = 0x10C3; 215 speedp = 0x10c3;
215 speedt = 0x10C3; 216 speedt = 0x10c3;
216 break; 217 break;
217 case 2: 218 case 2:
218 speedp = 0x1104; 219 speedp = 0x1104;
219 speedt = 0x1281; 220 speedt = 0x1281;
220 break; 221 break;
221 case 1: 222 case 1:
222 speedp = 0x2283; 223 speedp = 0x2283;
223 speedt = 0x1281; 224 speedt = 0x2283;
224 break; 225 break;
225 case 0: 226 case 0:
226 default: 227 default:
227 speedp = 0x328A; 228 speedp = 0x328a;
228 speedt = 0x328A; 229 speedt = 0x328a;
229 break; 230 break;
230 } 231 }
231 if (hwif->mmio) 232
232 { 233 if (hwif->mmio) {
233 hwif->OUTW(speedt, addr); 234 hwif->OUTW(speedp, addr);
234 hwif->OUTW(speedp, tfaddr); 235 hwif->OUTW(speedt, tfaddr);
235 /* Now set up IORDY */ 236 /* Now set up IORDY */
236 if(mode_wanted == 3 || mode_wanted == 4) 237 if(mode_wanted == 3 || mode_wanted == 4)
237 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2); 238 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
238 else 239 else
239 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2); 240 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
240 } 241 } else {
241 else
242 {
243 pci_write_config_word(hwif->pci_dev, addr, speedp); 242 pci_write_config_word(hwif->pci_dev, addr, speedp);
244 pci_write_config_word(hwif->pci_dev, tfaddr, speedt); 243 pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
245 pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp); 244 pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp);
@@ -397,12 +396,9 @@ static int config_chipset_for_dma (ide_drive_t *drive)
397 if (!speed) 396 if (!speed)
398 return 0; 397 return 0;
399 398
400 if (ide_set_xfer_rate(drive, speed)) 399 if (siimage_tune_chipset(drive, speed))
401 return 0; 400 return 0;
402 401
403 if (!drive->init_speed)
404 drive->init_speed = speed;
405
406 return ide_dma_enable(drive); 402 return ide_dma_enable(drive);
407} 403}
408 404
@@ -418,25 +414,13 @@ static int config_chipset_for_dma (ide_drive_t *drive)
418 414
419static int siimage_config_drive_for_dma (ide_drive_t *drive) 415static int siimage_config_drive_for_dma (ide_drive_t *drive)
420{ 416{
421 ide_hwif_t *hwif = HWIF(drive); 417 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
422 struct hd_driveid *id = drive->id; 418 return 0;
423
424 if ((id->capability & 1) != 0 && drive->autodma) {
425
426 if (ide_use_dma(drive)) {
427 if (config_chipset_for_dma(drive))
428 return hwif->ide_dma_on(drive);
429 }
430
431 goto fast_ata_pio;
432 419
433 } else if ((id->capability & 8) || (id->field_valid & 2)) { 420 if (ide_use_fast_pio(drive))
434fast_ata_pio:
435 config_chipset_for_pio(drive, 1); 421 config_chipset_for_pio(drive, 1);
436 return hwif->ide_dma_off_quietly(drive); 422
437 } 423 return -1;
438 /* IORDY not supported */
439 return 0;
440} 424}
441 425
442/* returns 1 if dma irq issued, 0 otherwise */ 426/* returns 1 if dma irq issued, 0 otherwise */
@@ -472,11 +456,11 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
472 unsigned long addr = siimage_selreg(hwif, 0x1); 456 unsigned long addr = siimage_selreg(hwif, 0x1);
473 457
474 if (SATA_ERROR_REG) { 458 if (SATA_ERROR_REG) {
475 u32 ext_stat = hwif->INL(base + 0x10); 459 u32 ext_stat = readl((void __iomem *)(base + 0x10));
476 u8 watchdog = 0; 460 u8 watchdog = 0;
477 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) { 461 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) {
478 u32 sata_error = hwif->INL(SATA_ERROR_REG); 462 u32 sata_error = readl((void __iomem *)SATA_ERROR_REG);
479 hwif->OUTL(sata_error, SATA_ERROR_REG); 463 writel(sata_error, (void __iomem *)SATA_ERROR_REG);
480 watchdog = (sata_error & 0x00680000) ? 1 : 0; 464 watchdog = (sata_error & 0x00680000) ? 1 : 0;
481 printk(KERN_WARNING "%s: sata_error = 0x%08x, " 465 printk(KERN_WARNING "%s: sata_error = 0x%08x, "
482 "watchdog = %d, %s\n", 466 "watchdog = %d, %s\n",
@@ -493,11 +477,11 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
493 } 477 }
494 478
495 /* return 1 if INTR asserted */ 479 /* return 1 if INTR asserted */
496 if ((hwif->INB(hwif->dma_status) & 0x04) == 0x04) 480 if ((readb((void __iomem *)hwif->dma_status) & 0x04) == 0x04)
497 return 1; 481 return 1;
498 482
499 /* return 1 if Device INTR asserted */ 483 /* return 1 if Device INTR asserted */
500 if ((hwif->INB(addr) & 8) == 8) 484 if ((readb((void __iomem *)addr) & 8) == 8)
501 return 0; //return 1; 485 return 0; //return 1;
502 486
503 return 0; 487 return 0;
@@ -519,9 +503,9 @@ static int siimage_busproc (ide_drive_t * drive, int state)
519 u32 stat_config = 0; 503 u32 stat_config = 0;
520 unsigned long addr = siimage_selreg(hwif, 0); 504 unsigned long addr = siimage_selreg(hwif, 0);
521 505
522 if (hwif->mmio) { 506 if (hwif->mmio)
523 stat_config = hwif->INL(addr); 507 stat_config = readl((void __iomem *)addr);
524 } else 508 else
525 pci_read_config_dword(hwif->pci_dev, addr, &stat_config); 509 pci_read_config_dword(hwif->pci_dev, addr, &stat_config);
526 510
527 switch (state) { 511 switch (state) {
@@ -557,9 +541,10 @@ static int siimage_reset_poll (ide_drive_t *drive)
557 if (SATA_STATUS_REG) { 541 if (SATA_STATUS_REG) {
558 ide_hwif_t *hwif = HWIF(drive); 542 ide_hwif_t *hwif = HWIF(drive);
559 543
560 if ((hwif->INL(SATA_STATUS_REG) & 0x03) != 0x03) { 544 /* SATA_STATUS_REG is valid only when in MMIO mode */
545 if ((readl((void __iomem *)SATA_STATUS_REG) & 0x03) != 0x03) {
561 printk(KERN_WARNING "%s: reset phy dead, status=0x%08x\n", 546 printk(KERN_WARNING "%s: reset phy dead, status=0x%08x\n",
562 hwif->name, hwif->INL(SATA_STATUS_REG)); 547 hwif->name, readl((void __iomem *)SATA_STATUS_REG));
563 HWGROUP(drive)->polling = 0; 548 HWGROUP(drive)->polling = 0;
564 return ide_started; 549 return ide_started;
565 } 550 }
@@ -619,7 +604,8 @@ static void siimage_reset (ide_drive_t *drive)
619 } 604 }
620 605
621 if (SATA_STATUS_REG) { 606 if (SATA_STATUS_REG) {
622 u32 sata_stat = hwif->INL(SATA_STATUS_REG); 607 /* SATA_STATUS_REG is valid only when in MMIO mode */
608 u32 sata_stat = readl((void __iomem *)SATA_STATUS_REG);
623 printk(KERN_WARNING "%s: reset phy, status=0x%08x, %s\n", 609 printk(KERN_WARNING "%s: reset phy, status=0x%08x, %s\n",
624 hwif->name, sata_stat, __FUNCTION__); 610 hwif->name, sata_stat, __FUNCTION__);
625 if (!(sata_stat)) { 611 if (!(sata_stat)) {
@@ -898,7 +884,8 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
898 base = (unsigned long) addr; 884 base = (unsigned long) addr;
899 885
900 hwif->dma_base = base + (ch ? 0x08 : 0x00); 886 hwif->dma_base = base + (ch ? 0x08 : 0x00);
901 hwif->mmio = 2; 887
888 hwif->mmio = 1;
902} 889}
903 890
904static int is_dev_seagate_sata(ide_drive_t *drive) 891static int is_dev_seagate_sata(ide_drive_t *drive)
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 1afff659ab55..2ba0669f36a1 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -667,67 +667,20 @@ static int config_chipset_for_dma (ide_drive_t *drive)
667 return ide_dma_enable(drive); 667 return ide_dma_enable(drive);
668} 668}
669 669
670static int sis5513_config_drive_xfer_rate (ide_drive_t *drive) 670static int sis5513_config_xfer_rate(ide_drive_t *drive)
671{ 671{
672 ide_hwif_t *hwif = HWIF(drive); 672 config_art_rwp_pio(drive, 5);
673 struct hd_driveid *id = drive->id;
674 673
675 drive->init_speed = 0; 674 drive->init_speed = 0;
676 675
677 if (id && (id->capability & 1) && drive->autodma) { 676 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
678 677 return 0;
679 if (ide_use_dma(drive)) {
680 if (config_chipset_for_dma(drive))
681 return hwif->ide_dma_on(drive);
682 }
683
684 goto fast_ata_pio;
685 678
686 } else if ((id->capability & 8) || (id->field_valid & 2)) { 679 if (ide_use_fast_pio(drive))
687fast_ata_pio:
688 sis5513_tune_drive(drive, 5); 680 sis5513_tune_drive(drive, 5);
689 return hwif->ide_dma_off_quietly(drive);
690 }
691 /* IORDY not supported */
692 return 0;
693}
694
695/* initiates/aborts (U)DMA read/write operations on a drive. */
696static int sis5513_config_xfer_rate (ide_drive_t *drive)
697{
698 config_drive_art_rwp(drive);
699 config_art_rwp_pio(drive, 5);
700 return sis5513_config_drive_xfer_rate(drive);
701}
702
703/*
704 Future simpler config_xfer_rate :
705 When ide_find_best_mode is made bad-drive aware
706 - remove config_drive_xfer_rate and config_chipset_for_dma,
707 - replace config_xfer_rate with the following
708
709static int sis5513_config_xfer_rate (ide_drive_t *drive)
710{
711 u16 w80 = HWIF(drive)->udma_four;
712 u16 speed;
713
714 config_drive_art_rwp(drive);
715 config_art_rwp_pio(drive, 5);
716
717 speed = ide_find_best_mode(drive,
718 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
719 (chipset_family >= ATA_33 ? XFER_UDMA : 0) |
720 (w80 && chipset_family >= ATA_66 ? XFER_UDMA_66 : 0) |
721 (w80 && chipset_family >= ATA_100a ? XFER_UDMA_100 : 0) |
722 (w80 && chipset_family >= ATA_133a ? XFER_UDMA_133 : 0));
723
724 sis5513_tune_chipset(drive, speed);
725 681
726 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO) 682 return -1;
727 return HWIF(drive)->ide_dma_on(drive);
728 return HWIF(drive)->ide_dma_off_quietly(drive);
729} 683}
730*/
731 684
732/* Chip detection and general config */ 685/* Chip detection and general config */
733static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name) 686static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name)
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 170a26199050..3a8a76fc78c7 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -161,14 +161,14 @@ static int sl82c105_check_drive (ide_drive_t *drive)
161 if (id->field_valid & 2) { 161 if (id->field_valid & 2) {
162 if ((id->dma_mword & hwif->mwdma_mask) || 162 if ((id->dma_mword & hwif->mwdma_mask) ||
163 (id->dma_1word & hwif->swdma_mask)) 163 (id->dma_1word & hwif->swdma_mask))
164 return hwif->ide_dma_on(drive); 164 return 0;
165 } 165 }
166 166
167 if (__ide_dma_good_drive(drive)) 167 if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
168 return hwif->ide_dma_on(drive); 168 return 0;
169 } while (0); 169 } while (0);
170 170
171 return hwif->ide_dma_off_quietly(drive); 171 return -1;
172} 172}
173 173
174/* 174/*
@@ -215,7 +215,7 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
215 * Was DMA enabled? If so, disable it - we're resetting the 215 * Was DMA enabled? If so, disable it - we're resetting the
216 * host. The IDE layer will be handling the drive for us. 216 * host. The IDE layer will be handling the drive for us.
217 */ 217 */
218 val = hwif->INB(dma_base); 218 val = inb(dma_base);
219 if (val & 1) { 219 if (val & 1) {
220 outb(val & ~1, dma_base); 220 outb(val & ~1, dma_base);
221 printk("sl82c105: DMA was enabled\n"); 221 printk("sl82c105: DMA was enabled\n");
@@ -259,28 +259,22 @@ static int sl82c105_ide_dma_on (ide_drive_t *drive)
259{ 259{
260 DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name)); 260 DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
261 261
262 if (config_for_dma(drive)) { 262 if (config_for_dma(drive))
263 config_for_pio(drive, 4, 0, 0); 263 return 1;
264 return HWIF(drive)->ide_dma_off_quietly(drive);
265 }
266 printk(KERN_INFO "%s: DMA enabled\n", drive->name); 264 printk(KERN_INFO "%s: DMA enabled\n", drive->name);
267 return __ide_dma_on(drive); 265 return __ide_dma_on(drive);
268} 266}
269 267
270static int sl82c105_ide_dma_off_quietly (ide_drive_t *drive) 268static void sl82c105_dma_off_quietly(ide_drive_t *drive)
271{ 269{
272 u8 speed = XFER_PIO_0; 270 u8 speed = XFER_PIO_0;
273 int rc;
274
275 DBG(("sl82c105_ide_dma_off_quietly(drive:%s)\n", drive->name));
276 271
277 rc = __ide_dma_off_quietly(drive); 272 DBG(("sl82c105_dma_off_quietly(drive:%s)\n", drive->name));
273
274 ide_dma_off_quietly(drive);
278 if (drive->pio_speed) 275 if (drive->pio_speed)
279 speed = drive->pio_speed - XFER_PIO_0; 276 speed = drive->pio_speed - XFER_PIO_0;
280 config_for_pio(drive, speed, 0, 1); 277 config_for_pio(drive, speed, 0, 1);
281 drive->current_speed = drive->pio_speed;
282
283 return rc;
284} 278}
285 279
286/* 280/*
@@ -401,11 +395,9 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
401/* 395/*
402 * Initialise the chip 396 * Initialise the chip
403 */ 397 */
404
405static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) 398static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
406{ 399{
407 unsigned int rev; 400 unsigned int rev;
408 u8 dma_state;
409 401
410 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); 402 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
411 403
@@ -431,7 +423,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
431 if (!hwif->dma_base) 423 if (!hwif->dma_base)
432 return; 424 return;
433 425
434 dma_state = hwif->INB(hwif->dma_base + 2) & ~0x60;
435 rev = sl82c105_bridge_revision(hwif->pci_dev); 426 rev = sl82c105_bridge_revision(hwif->pci_dev);
436 if (rev <= 5) { 427 if (rev <= 5) {
437 /* 428 /*
@@ -441,15 +432,12 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
441 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n", 432 printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
442 hwif->name, rev); 433 hwif->name, rev);
443 } else { 434 } else {
444 dma_state |= 0x60;
445
446 hwif->atapi_dma = 1; 435 hwif->atapi_dma = 1;
447 hwif->mwdma_mask = 0x07; 436 hwif->mwdma_mask = 0x04;
448 hwif->swdma_mask = 0x07;
449 437
450 hwif->ide_dma_check = &sl82c105_check_drive; 438 hwif->ide_dma_check = &sl82c105_check_drive;
451 hwif->ide_dma_on = &sl82c105_ide_dma_on; 439 hwif->ide_dma_on = &sl82c105_ide_dma_on;
452 hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly; 440 hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
453 hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq; 441 hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
454 hwif->dma_start = &sl82c105_ide_dma_start; 442 hwif->dma_start = &sl82c105_ide_dma_start;
455 hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout; 443 hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
@@ -462,7 +450,6 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
462 if (hwif->mate) 450 if (hwif->mate)
463 hwif->serialized = hwif->mate->serialized = 1; 451 hwif->serialized = hwif->mate->serialized = 1;
464 } 452 }
465 hwif->OUTB(dma_state, hwif->dma_base + 2);
466} 453}
467 454
468static ide_pci_device_t sl82c105_chipset __devinitdata = { 455static ide_pci_device_t sl82c105_chipset __devinitdata = {
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 2663ddbd9b67..ae7eb58d961c 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -179,26 +179,16 @@ static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
179 179
180static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive) 180static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
181{ 181{
182 ide_hwif_t *hwif = HWIF(drive);
183 struct hd_driveid *id = drive->id;
184
185 drive->init_speed = 0; 182 drive->init_speed = 0;
186 183
187 if ((id->capability & 1) && drive->autodma) { 184 if (ide_use_dma(drive) && slc90e66_config_drive_for_dma(drive))
188 185 return 0;
189 if (ide_use_dma(drive) && slc90e66_config_drive_for_dma(drive))
190 return hwif->ide_dma_on(drive);
191 186
192 goto fast_ata_pio; 187 if (ide_use_fast_pio(drive))
188 (void)slc90e66_tune_chipset(drive, XFER_PIO_0 +
189 ide_get_best_pio_mode(drive, 255, 4, NULL));
193 190
194 } else if ((id->capability & 8) || (id->field_valid & 2)) { 191 return -1;
195fast_ata_pio:
196 (void) hwif->speedproc(drive, XFER_PIO_0 +
197 ide_get_best_pio_mode(drive, 255, 4, NULL));
198 return hwif->ide_dma_off_quietly(drive);
199 }
200 /* IORDY not supported */
201 return 0;
202} 192}
203 193
204static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) 194static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 2ad72bbda342..0b6d81d6ce48 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -45,7 +45,7 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
45 45
46 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; 46 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
47 scr |= mode; 47 scr |= mode;
48 hwif->OUTW(scr, scr_port); 48 outw(scr, scr_port);
49 49
50 return ide_config_drive_speed(drive, speed); 50 return ide_config_drive_speed(drive, speed);
51} 51}
@@ -89,15 +89,15 @@ static int tc86c001_timer_expiry(ide_drive_t *drive)
89 "attempting recovery...\n", drive->name); 89 "attempting recovery...\n", drive->name);
90 90
91 /* Stop DMA */ 91 /* Stop DMA */
92 hwif->OUTB(dma_cmd & ~0x01, hwif->dma_command); 92 outb(dma_cmd & ~0x01, hwif->dma_command);
93 93
94 /* Setup the dummy DMA transfer */ 94 /* Setup the dummy DMA transfer */
95 hwif->OUTW(0, sc_base + 0x0a); /* Sector Count */ 95 outw(0, sc_base + 0x0a); /* Sector Count */
96 hwif->OUTW(0, twcr_port); /* Transfer Word Count 1 or 2 */ 96 outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
97 97
98 /* Start the dummy DMA transfer */ 98 /* Start the dummy DMA transfer */
99 hwif->OUTB(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */ 99 outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
100 hwif->OUTB(0x01, hwif->dma_command); /* set START_STOPBM */ 100 outb(0x01, hwif->dma_command); /* set START_STOPBM */
101 101
102 /* 102 /*
103 * If an interrupt was pending, it should come thru shortly. 103 * If an interrupt was pending, it should come thru shortly.
@@ -128,8 +128,8 @@ static void tc86c001_dma_start(ide_drive_t *drive)
128 * the appropriate system control registers for DMA to work 128 * the appropriate system control registers for DMA to work
129 * with LBA48 and ATAPI devices... 129 * with LBA48 and ATAPI devices...
130 */ 130 */
131 hwif->OUTW(nsectors, sc_base + 0x0a); /* Sector Count */ 131 outw(nsectors, sc_base + 0x0a); /* Sector Count */
132 hwif->OUTW(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */ 132 outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
133 133
134 /* Install our timeout expiry hook, saving the current handler... */ 134 /* Install our timeout expiry hook, saving the current handler... */
135 ide_set_hwifdata(hwif, hwgroup->expiry); 135 ide_set_hwifdata(hwif, hwgroup->expiry);
@@ -168,7 +168,7 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
168 } 168 }
169 169
170 /* System Control 1 Register bit 11 (ATA Hard Reset) write */ 170 /* System Control 1 Register bit 11 (ATA Hard Reset) write */
171 hwif->OUTW(scr1, sc_base + 0x00); 171 outw(scr1, sc_base + 0x00);
172 return 0; 172 return 0;
173} 173}
174 174
@@ -185,23 +185,13 @@ static int config_chipset_for_dma(ide_drive_t *drive)
185 185
186static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive) 186static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
187{ 187{
188 ide_hwif_t *hwif = HWIF(drive); 188 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
189 struct hd_driveid *id = drive->id; 189 return 0;
190
191 if ((id->capability & 1) && drive->autodma) {
192
193 if (ide_use_dma(drive) && config_chipset_for_dma(drive))
194 return hwif->ide_dma_on(drive);
195
196 goto fast_ata_pio;
197 190
198 } else if ((id->capability & 8) || (id->field_valid & 2)) { 191 if (ide_use_fast_pio(drive))
199fast_ata_pio:
200 tc86c001_tune_drive(drive, 255); 192 tc86c001_tune_drive(drive, 255);
201 return hwif->ide_dma_off_quietly(drive); 193
202 } 194 return -1;
203 /* IORDY not supported */
204 return 0;
205} 195}
206 196
207static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) 197static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
@@ -210,13 +200,13 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
210 u16 scr1 = hwif->INW(sc_base + 0x00);; 200 u16 scr1 = hwif->INW(sc_base + 0x00);;
211 201
212 /* System Control 1 Register bit 15 (Soft Reset) set */ 202 /* System Control 1 Register bit 15 (Soft Reset) set */
213 hwif->OUTW(scr1 | 0x8000, sc_base + 0x00); 203 outw(scr1 | 0x8000, sc_base + 0x00);
214 204
215 /* System Control 1 Register bit 14 (FIFO Reset) set */ 205 /* System Control 1 Register bit 14 (FIFO Reset) set */
216 hwif->OUTW(scr1 | 0x4000, sc_base + 0x00); 206 outw(scr1 | 0x4000, sc_base + 0x00);
217 207
218 /* System Control 1 Register: reset clear */ 208 /* System Control 1 Register: reset clear */
219 hwif->OUTW(scr1 & ~0xc000, sc_base + 0x00); 209 outw(scr1 & ~0xc000, sc_base + 0x00);
220 210
221 /* Store the system control register base for convenience... */ 211 /* Store the system control register base for convenience... */
222 hwif->config_data = sc_base; 212 hwif->config_data = sc_base;
@@ -234,7 +224,7 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
234 * Sector Count Control Register bits 0 and 1 set: 224 * Sector Count Control Register bits 0 and 1 set:
235 * software sets Sector Count Register for master and slave device 225 * software sets Sector Count Register for master and slave device
236 */ 226 */
237 hwif->OUTW(0x0003, sc_base + 0x0c); 227 outw(0x0003, sc_base + 0x0c);
238 228
239 /* Sector Count Register limit */ 229 /* Sector Count Register limit */
240 hwif->rqsize = 0xffff; 230 hwif->rqsize = 0xffff;
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index b13cce1fd1a6..5e06179c3469 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -104,29 +104,21 @@ static int triflex_config_drive_for_dma(ide_drive_t *drive)
104{ 104{
105 int speed = ide_dma_speed(drive, 0); /* No ultra speeds */ 105 int speed = ide_dma_speed(drive, 0); /* No ultra speeds */
106 106
107 if (!speed) { 107 if (!speed)
108 u8 pspeed = ide_get_best_pio_mode(drive, 255, 4, NULL); 108 return 0;
109 speed = XFER_PIO_0 + pspeed; 109
110 }
111
112 (void) triflex_tune_chipset(drive, speed); 110 (void) triflex_tune_chipset(drive, speed);
113 return ide_dma_enable(drive); 111 return ide_dma_enable(drive);
114} 112}
115 113
116static int triflex_config_drive_xfer_rate(ide_drive_t *drive) 114static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
117{ 115{
118 ide_hwif_t *hwif = HWIF(drive); 116 if (ide_use_dma(drive) && triflex_config_drive_for_dma(drive))
119 struct hd_driveid *id = drive->id; 117 return 0;
120 118
121 if ((id->capability & 1) && drive->autodma) { 119 triflex_tune_drive(drive, 255);
122 if (ide_use_dma(drive)) {
123 if (triflex_config_drive_for_dma(drive))
124 return hwif->ide_dma_on(drive);
125 }
126 }
127 120
128 hwif->tuneproc(drive, 255); 121 return -1;
129 return hwif->ide_dma_off_quietly(drive);
130} 122}
131 123
132static void __devinit init_hwif_triflex(ide_hwif_t *hwif) 124static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 174b88c4780e..cbb1b11119a5 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -157,16 +157,16 @@ static void trm290_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
157 if (reg != hwif->select_data) { 157 if (reg != hwif->select_data) {
158 hwif->select_data = reg; 158 hwif->select_data = reg;
159 /* set PIO/DMA */ 159 /* set PIO/DMA */
160 hwif->OUTB(0x51|(hwif->channel<<3), hwif->config_data+1); 160 outb(0x51 | (hwif->channel << 3), hwif->config_data + 1);
161 hwif->OUTW(reg & 0xff, hwif->config_data); 161 outw(reg & 0xff, hwif->config_data);
162 } 162 }
163 163
164 /* enable IRQ if not probing */ 164 /* enable IRQ if not probing */
165 if (drive->present) { 165 if (drive->present) {
166 reg = hwif->INW(hwif->config_data + 3); 166 reg = inw(hwif->config_data + 3);
167 reg &= 0x13; 167 reg &= 0x13;
168 reg &= ~(1 << hwif->channel); 168 reg &= ~(1 << hwif->channel);
169 hwif->OUTW(reg, hwif->config_data+3); 169 outw(reg, hwif->config_data + 3);
170 } 170 }
171 171
172 local_irq_restore(flags); 172 local_irq_restore(flags);
@@ -177,15 +177,12 @@ static void trm290_selectproc (ide_drive_t *drive)
177 trm290_prepare_drive(drive, drive->using_dma); 177 trm290_prepare_drive(drive, drive->using_dma);
178} 178}
179 179
180#ifdef CONFIG_BLK_DEV_IDEDMA
181static void trm290_ide_dma_exec_cmd(ide_drive_t *drive, u8 command) 180static void trm290_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
182{ 181{
183 ide_hwif_t *hwif = HWIF(drive);
184
185 BUG_ON(HWGROUP(drive)->handler != NULL); /* paranoia check */ 182 BUG_ON(HWGROUP(drive)->handler != NULL); /* paranoia check */
186 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL); 183 ide_set_handler(drive, &ide_dma_intr, WAIT_CMD, NULL);
187 /* issue cmd to drive */ 184 /* issue cmd to drive */
188 hwif->OUTB(command, IDE_COMMAND_REG); 185 outb(command, IDE_COMMAND_REG);
189} 186}
190 187
191static int trm290_ide_dma_setup(ide_drive_t *drive) 188static int trm290_ide_dma_setup(ide_drive_t *drive)
@@ -211,10 +208,10 @@ static int trm290_ide_dma_setup(ide_drive_t *drive)
211 } 208 }
212 /* select DMA xfer */ 209 /* select DMA xfer */
213 trm290_prepare_drive(drive, 1); 210 trm290_prepare_drive(drive, 1);
214 hwif->OUTL(hwif->dmatable_dma|rw, hwif->dma_command); 211 outl(hwif->dmatable_dma | rw, hwif->dma_command);
215 drive->waiting_for_dma = 1; 212 drive->waiting_for_dma = 1;
216 /* start DMA */ 213 /* start DMA */
217 hwif->OUTW((count * 2) - 1, hwif->dma_status); 214 outw((count * 2) - 1, hwif->dma_status);
218 return 0; 215 return 0;
219} 216}
220 217
@@ -230,7 +227,7 @@ static int trm290_ide_dma_end (ide_drive_t *drive)
230 drive->waiting_for_dma = 0; 227 drive->waiting_for_dma = 0;
231 /* purge DMA mappings */ 228 /* purge DMA mappings */
232 ide_destroy_dmatable(drive); 229 ide_destroy_dmatable(drive);
233 status = hwif->INW(hwif->dma_status); 230 status = inw(hwif->dma_status);
234 return (status != 0x00ff); 231 return (status != 0x00ff);
235} 232}
236 233
@@ -239,10 +236,9 @@ static int trm290_ide_dma_test_irq (ide_drive_t *drive)
239 ide_hwif_t *hwif = HWIF(drive); 236 ide_hwif_t *hwif = HWIF(drive);
240 u16 status = 0; 237 u16 status = 0;
241 238
242 status = hwif->INW(hwif->dma_status); 239 status = inw(hwif->dma_status);
243 return (status == 0x00ff); 240 return (status == 0x00ff);
244} 241}
245#endif /* CONFIG_BLK_DEV_IDEDMA */
246 242
247/* 243/*
248 * Invoked from ide-dma.c at boot time. 244 * Invoked from ide-dma.c at boot time.
@@ -269,15 +265,15 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
269 265
270 local_irq_save(flags); 266 local_irq_save(flags);
271 /* put config reg into first byte of hwif->select_data */ 267 /* put config reg into first byte of hwif->select_data */
272 hwif->OUTB(0x51|(hwif->channel<<3), hwif->config_data+1); 268 outb(0x51 | (hwif->channel << 3), hwif->config_data + 1);
273 /* select PIO as default */ 269 /* select PIO as default */
274 hwif->select_data = 0x21; 270 hwif->select_data = 0x21;
275 hwif->OUTB(hwif->select_data, hwif->config_data); 271 outb(hwif->select_data, hwif->config_data);
276 /* get IRQ info */ 272 /* get IRQ info */
277 reg = hwif->INB(hwif->config_data+3); 273 reg = inb(hwif->config_data + 3);
278 /* mask IRQs for both ports */ 274 /* mask IRQs for both ports */
279 reg = (reg & 0x10) | 0x03; 275 reg = (reg & 0x10) | 0x03;
280 hwif->OUTB(reg, hwif->config_data+3); 276 outb(reg, hwif->config_data + 3);
281 local_irq_restore(flags); 277 local_irq_restore(flags);
282 278
283 if ((reg & 0x10)) 279 if ((reg & 0x10))
@@ -289,13 +285,11 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
289 285
290 ide_setup_dma(hwif, (hwif->config_data + 4) ^ (hwif->channel ? 0x0080 : 0x0000), 3); 286 ide_setup_dma(hwif, (hwif->config_data + 4) ^ (hwif->channel ? 0x0080 : 0x0000), 3);
291 287
292#ifdef CONFIG_BLK_DEV_IDEDMA
293 hwif->dma_setup = &trm290_ide_dma_setup; 288 hwif->dma_setup = &trm290_ide_dma_setup;
294 hwif->dma_exec_cmd = &trm290_ide_dma_exec_cmd; 289 hwif->dma_exec_cmd = &trm290_ide_dma_exec_cmd;
295 hwif->dma_start = &trm290_ide_dma_start; 290 hwif->dma_start = &trm290_ide_dma_start;
296 hwif->ide_dma_end = &trm290_ide_dma_end; 291 hwif->ide_dma_end = &trm290_ide_dma_end;
297 hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq; 292 hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq;
298#endif /* CONFIG_BLK_DEV_IDEDMA */
299 293
300 hwif->selectproc = &trm290_selectproc; 294 hwif->selectproc = &trm290_selectproc;
301 hwif->autodma = 0; /* play it safe for now */ 295 hwif->autodma = 0; /* play it safe for now */
@@ -312,16 +306,16 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
312 static u16 next_offset = 0; 306 static u16 next_offset = 0;
313 u8 old_mask; 307 u8 old_mask;
314 308
315 hwif->OUTB(0x54|(hwif->channel<<3), hwif->config_data+1); 309 outb(0x54 | (hwif->channel << 3), hwif->config_data + 1);
316 old = hwif->INW(hwif->config_data); 310 old = inw(hwif->config_data);
317 old &= ~1; 311 old &= ~1;
318 old_mask = hwif->INB(old+2); 312 old_mask = inb(old + 2);
319 if (old != compat && old_mask == 0xff) { 313 if (old != compat && old_mask == 0xff) {
320 /* leave lower 10 bits untouched */ 314 /* leave lower 10 bits untouched */
321 compat += (next_offset += 0x400); 315 compat += (next_offset += 0x400);
322 hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2; 316 hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2;
323 hwif->OUTW(compat|1, hwif->config_data); 317 outw(compat | 1, hwif->config_data);
324 new = hwif->INW(hwif->config_data); 318 new = inw(hwif->config_data);
325 printk(KERN_INFO "%s: control basereg workaround: " 319 printk(KERN_INFO "%s: control basereg workaround: "
326 "old=0x%04x, new=0x%04x\n", 320 "old=0x%04x, new=0x%04x\n",
327 hwif->name, old, new & ~1); 321 hwif->name, old, new & ~1);
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index 6fb6e50b8231..a508550c4095 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -240,8 +240,9 @@ static int via82cxxx_ide_dma_check (ide_drive_t *drive)
240 via_set_drive(drive, speed); 240 via_set_drive(drive, speed);
241 241
242 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO) 242 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
243 return hwif->ide_dma_on(drive); 243 return 0;
244 return hwif->ide_dma_off_quietly(drive); 244
245 return -1;
245} 246}
246 247
247static struct via_isa_bridge *via_config_find(struct pci_dev **isa) 248static struct via_isa_bridge *via_config_find(struct pci_dev **isa)