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-rw-r--r--drivers/ide/pci/aec62xx.c62
-rw-r--r--drivers/ide/pci/alim15x3.c97
-rw-r--r--drivers/ide/pci/amd74xx.c6
-rw-r--r--drivers/ide/pci/atiixp.c40
-rw-r--r--drivers/ide/pci/cmd64x.c90
-rw-r--r--drivers/ide/pci/cs5520.c20
-rw-r--r--drivers/ide/pci/cs5535.c33
-rw-r--r--drivers/ide/pci/delkin_cb.c2
-rw-r--r--drivers/ide/pci/hpt34x.c27
-rw-r--r--drivers/ide/pci/hpt366.c85
-rw-r--r--drivers/ide/pci/it8213.c39
-rw-r--r--drivers/ide/pci/it821x.c20
-rw-r--r--drivers/ide/pci/jmicron.c40
-rw-r--r--drivers/ide/pci/pdc202xx_new.c40
-rw-r--r--drivers/ide/pci/pdc202xx_old.c54
-rw-r--r--drivers/ide/pci/piix.c163
-rw-r--r--drivers/ide/pci/scc_pata.c21
-rw-r--r--drivers/ide/pci/serverworks.c31
-rw-r--r--drivers/ide/pci/sgiioc4.c2
-rw-r--r--drivers/ide/pci/siimage.c47
-rw-r--r--drivers/ide/pci/sis5513.c44
-rw-r--r--drivers/ide/pci/slc90e66.c24
-rw-r--r--drivers/ide/pci/tc86c001.c20
-rw-r--r--drivers/ide/pci/triflex.c15
24 files changed, 258 insertions, 764 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 73bdf64dbbfc..b173bc66ce1e 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -87,38 +87,12 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr
87 return chipset_table->ultra_settings; 87 return chipset_table->ultra_settings;
88} 88}
89 89
90static u8 aec62xx_ratemask (ide_drive_t *drive)
91{
92 ide_hwif_t *hwif = HWIF(drive);
93 u8 mode;
94
95 switch(hwif->pci_dev->device) {
96 case PCI_DEVICE_ID_ARTOP_ATP865:
97 case PCI_DEVICE_ID_ARTOP_ATP865R:
98 mode = (inb(hwif->channel ?
99 hwif->mate->dma_status :
100 hwif->dma_status) & 0x10) ? 4 : 3;
101 break;
102 case PCI_DEVICE_ID_ARTOP_ATP860:
103 case PCI_DEVICE_ID_ARTOP_ATP860R:
104 mode = 2;
105 break;
106 case PCI_DEVICE_ID_ARTOP_ATP850UF:
107 default:
108 return 1;
109 }
110
111 if (!eighty_ninty_three(drive))
112 mode = min(mode, (u8)1);
113 return mode;
114}
115
116static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed) 90static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
117{ 91{
118 ide_hwif_t *hwif = HWIF(drive); 92 ide_hwif_t *hwif = HWIF(drive);
119 struct pci_dev *dev = hwif->pci_dev; 93 struct pci_dev *dev = hwif->pci_dev;
120 u16 d_conf = 0; 94 u16 d_conf = 0;
121 u8 speed = ide_rate_filter(aec62xx_ratemask(drive), xferspeed); 95 u8 speed = ide_rate_filter(drive, xferspeed);
122 u8 ultra = 0, ultra_conf = 0; 96 u8 ultra = 0, ultra_conf = 0;
123 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; 97 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
124 unsigned long flags; 98 unsigned long flags;
@@ -145,7 +119,7 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
145{ 119{
146 ide_hwif_t *hwif = HWIF(drive); 120 ide_hwif_t *hwif = HWIF(drive);
147 struct pci_dev *dev = hwif->pci_dev; 121 struct pci_dev *dev = hwif->pci_dev;
148 u8 speed = ide_rate_filter(aec62xx_ratemask(drive), xferspeed); 122 u8 speed = ide_rate_filter(drive, xferspeed);
149 u8 unit = (drive->select.b.unit & 0x01); 123 u8 unit = (drive->select.b.unit & 0x01);
150 u8 tmp1 = 0, tmp2 = 0; 124 u8 tmp1 = 0, tmp2 = 0;
151 u8 ultra = 0, drive_conf = 0, ultra_conf = 0; 125 u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
@@ -181,17 +155,6 @@ static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed)
181 } 155 }
182} 156}
183 157
184static int config_chipset_for_dma (ide_drive_t *drive)
185{
186 u8 speed = ide_dma_speed(drive, aec62xx_ratemask(drive));
187
188 if (!(speed))
189 return 0;
190
191 (void) aec62xx_tune_chipset(drive, speed);
192 return ide_dma_enable(drive);
193}
194
195static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) 158static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
196{ 159{
197 pio = ide_get_best_pio_mode(drive, pio, 4, NULL); 160 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
@@ -200,7 +163,7 @@ static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
200 163
201static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) 164static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
202{ 165{
203 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 166 if (ide_tune_dma(drive))
204 return 0; 167 return 0;
205 168
206 if (ide_use_fast_pio(drive)) 169 if (ide_use_fast_pio(drive))
@@ -261,11 +224,13 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
261 224
262static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) 225static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
263{ 226{
227 struct pci_dev *dev = hwif->pci_dev;
228
264 hwif->autodma = 0; 229 hwif->autodma = 0;
265 hwif->tuneproc = &aec62xx_tune_drive; 230 hwif->tuneproc = &aec62xx_tune_drive;
266 hwif->speedproc = &aec62xx_tune_chipset; 231 hwif->speedproc = &aec62xx_tune_chipset;
267 232
268 if (hwif->pci_dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) 233 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
269 hwif->serialized = hwif->channel; 234 hwif->serialized = hwif->channel;
270 235
271 if (hwif->mate) 236 if (hwif->mate)
@@ -277,7 +242,15 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
277 return; 242 return;
278 } 243 }
279 244
280 hwif->ultra_mask = 0x7f; 245 hwif->ultra_mask = hwif->cds->udma_mask;
246
247 /* atp865 and atp865r */
248 if (hwif->ultra_mask == 0x3f) {
249 /* check bit 0x10 of DMA status register */
250 if (inb(pci_resource_start(dev, 4) + 2) & 0x10)
251 hwif->ultra_mask = 0x7f; /* udma0-6 */
252 }
253
281 hwif->mwdma_mask = 0x07; 254 hwif->mwdma_mask = 0x07;
282 255
283 hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate; 256 hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate;
@@ -344,6 +317,7 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
344 .autodma = AUTODMA, 317 .autodma = AUTODMA,
345 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 318 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
346 .bootable = OFF_BOARD, 319 .bootable = OFF_BOARD,
320 .udma_mask = 0x07, /* udma0-2 */
347 },{ /* 1 */ 321 },{ /* 1 */
348 .name = "AEC6260", 322 .name = "AEC6260",
349 .init_setup = init_setup_aec62xx, 323 .init_setup = init_setup_aec62xx,
@@ -353,6 +327,7 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
353 .channels = 2, 327 .channels = 2,
354 .autodma = NOAUTODMA, 328 .autodma = NOAUTODMA,
355 .bootable = OFF_BOARD, 329 .bootable = OFF_BOARD,
330 .udma_mask = 0x1f, /* udma0-4 */
356 },{ /* 2 */ 331 },{ /* 2 */
357 .name = "AEC6260R", 332 .name = "AEC6260R",
358 .init_setup = init_setup_aec62xx, 333 .init_setup = init_setup_aec62xx,
@@ -363,6 +338,7 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
363 .autodma = AUTODMA, 338 .autodma = AUTODMA,
364 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 339 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
365 .bootable = NEVER_BOARD, 340 .bootable = NEVER_BOARD,
341 .udma_mask = 0x1f, /* udma0-4 */
366 },{ /* 3 */ 342 },{ /* 3 */
367 .name = "AEC6X80", 343 .name = "AEC6X80",
368 .init_setup = init_setup_aec6x80, 344 .init_setup = init_setup_aec6x80,
@@ -372,6 +348,7 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
372 .channels = 2, 348 .channels = 2,
373 .autodma = AUTODMA, 349 .autodma = AUTODMA,
374 .bootable = OFF_BOARD, 350 .bootable = OFF_BOARD,
351 .udma_mask = 0x3f, /* udma0-5 */
375 },{ /* 4 */ 352 },{ /* 4 */
376 .name = "AEC6X80R", 353 .name = "AEC6X80R",
377 .init_setup = init_setup_aec6x80, 354 .init_setup = init_setup_aec6x80,
@@ -382,6 +359,7 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
382 .autodma = AUTODMA, 359 .autodma = AUTODMA,
383 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 360 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
384 .bootable = OFF_BOARD, 361 .bootable = OFF_BOARD,
362 .udma_mask = 0x3f, /* udma0-5 */
385 } 363 }
386}; 364};
387 365
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 946a12746cb5..428efdae0c7b 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -50,7 +50,7 @@ static u8 m5229_revision;
50static u8 chip_is_1543c_e; 50static u8 chip_is_1543c_e;
51static struct pci_dev *isa_dev; 51static struct pci_dev *isa_dev;
52 52
53#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_PROC_FS) 53#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
54#include <linux/stat.h> 54#include <linux/stat.h>
55#include <linux/proc_fs.h> 55#include <linux/proc_fs.h>
56 56
@@ -278,7 +278,7 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
278 278
279 return p-buffer; /* => must be less than 4k! */ 279 return p-buffer; /* => must be less than 4k! */
280} 280}
281#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_PROC_FS) */ 281#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
282 282
283/** 283/**
284 * ali15x3_tune_pio - set up chipset for PIO mode 284 * ali15x3_tune_pio - set up chipset for PIO mode
@@ -378,74 +378,31 @@ static void ali15x3_tune_drive (ide_drive_t *drive, u8 pio)
378} 378}
379 379
380/** 380/**
381 * ali15x3_can_ultra - check for ultra DMA support 381 * ali_udma_filter - compute UDMA mask
382 * @drive: drive to do the check 382 * @drive: IDE device
383 * 383 *
384 * Check the drive and controller revisions. Return 0 if UDMA is 384 * Return available UDMA modes.
385 * not available, or 1 if UDMA can be used. The actual rules for 385 *
386 * the ALi are 386 * The actual rules for the ALi are:
387 * No UDMA on revisions <= 0x20 387 * No UDMA on revisions <= 0x20
388 * Disk only for revisions < 0xC2 388 * Disk only for revisions < 0xC2
389 * Not WDC drives for revisions < 0xC2 389 * Not WDC drives for revisions < 0xC2
390 * 390 *
391 * FIXME: WDC ifdef needs to die 391 * FIXME: WDC ifdef needs to die
392 */ 392 */
393
394static u8 ali15x3_can_ultra (ide_drive_t *drive)
395{
396#ifndef CONFIG_WDC_ALI15X3
397 struct hd_driveid *id = drive->id;
398#endif /* CONFIG_WDC_ALI15X3 */
399 393
400 if (m5229_revision <= 0x20) { 394static u8 ali_udma_filter(ide_drive_t *drive)
401 return 0;
402 } else if ((m5229_revision < 0xC2) &&
403#ifndef CONFIG_WDC_ALI15X3
404 ((chip_is_1543c_e && strstr(id->model, "WDC ")) ||
405 (drive->media!=ide_disk))) {
406#else /* CONFIG_WDC_ALI15X3 */
407 (drive->media!=ide_disk)) {
408#endif /* CONFIG_WDC_ALI15X3 */
409 return 0;
410 } else {
411 return 1;
412 }
413}
414
415/**
416 * ali15x3_ratemask - generate DMA mode list
417 * @drive: drive to compute against
418 *
419 * Generate a list of the available DMA modes for the drive.
420 * FIXME: this function contains lots of bogus masking we can dump
421 *
422 * Return the highest available mode (UDMA33, UDMA66, UDMA100,..)
423 */
424
425static u8 ali15x3_ratemask (ide_drive_t *drive)
426{ 395{
427 u8 mode = 0, can_ultra = ali15x3_can_ultra(drive); 396 if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
428 397 if (drive->media != ide_disk)
429 if (m5229_revision > 0xC4 && can_ultra) { 398 return 0;
430 mode = 4; 399#ifndef CONFIG_WDC_ALI15X3
431 } else if (m5229_revision == 0xC4 && can_ultra) { 400 if (chip_is_1543c_e && strstr(drive->id->model, "WDC "))
432 mode = 3; 401 return 0;
433 } else if (m5229_revision >= 0xC2 && can_ultra) { 402#endif
434 mode = 2;
435 } else if (can_ultra) {
436 return 1;
437 } else {
438 return 0;
439 } 403 }
440 404
441 /* 405 return drive->hwif->ultra_mask;
442 * If the drive sees no suitable cable then UDMA 33
443 * is the highest permitted mode
444 */
445
446 if (!eighty_ninty_three(drive))
447 mode = min(mode, (u8)1);
448 return mode;
449} 406}
450 407
451/** 408/**
@@ -461,7 +418,7 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed)
461{ 418{
462 ide_hwif_t *hwif = HWIF(drive); 419 ide_hwif_t *hwif = HWIF(drive);
463 struct pci_dev *dev = hwif->pci_dev; 420 struct pci_dev *dev = hwif->pci_dev;
464 u8 speed = ide_rate_filter(ali15x3_ratemask(drive), xferspeed); 421 u8 speed = ide_rate_filter(drive, xferspeed);
465 u8 speed1 = speed; 422 u8 speed1 = speed;
466 u8 unit = (drive->select.b.unit & 0x01); 423 u8 unit = (drive->select.b.unit & 0x01);
467 u8 tmpbyte = 0x00; 424 u8 tmpbyte = 0x00;
@@ -511,7 +468,7 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed)
511 468
512static int config_chipset_for_dma (ide_drive_t *drive) 469static int config_chipset_for_dma (ide_drive_t *drive)
513{ 470{
514 u8 speed = ide_dma_speed(drive, ali15x3_ratemask(drive)); 471 u8 speed = ide_max_dma_mode(drive);
515 472
516 if (!(speed)) 473 if (!(speed))
517 return 0; 474 return 0;
@@ -609,13 +566,13 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c
609 566
610 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); 567 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
611 568
612#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_PROC_FS) 569#if defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
613 if (!ali_proc) { 570 if (!ali_proc) {
614 ali_proc = 1; 571 ali_proc = 1;
615 bmide_dev = dev; 572 bmide_dev = dev;
616 ide_pci_create_host_proc("ali", ali_get_info); 573 ide_pci_create_host_proc("ali", ali_get_info);
617 } 574 }
618#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_PROC_FS) */ 575#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
619 576
620 local_irq_save(flags); 577 local_irq_save(flags);
621 578
@@ -771,6 +728,7 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
771 hwif->autodma = 0; 728 hwif->autodma = 0;
772 hwif->tuneproc = &ali15x3_tune_drive; 729 hwif->tuneproc = &ali15x3_tune_drive;
773 hwif->speedproc = &ali15x3_tune_chipset; 730 hwif->speedproc = &ali15x3_tune_chipset;
731 hwif->udma_filter = &ali_udma_filter;
774 732
775 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 733 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
776 hwif->no_lba48_dma = (m5229_revision <= 0xC4) ? 1 : 0; 734 hwif->no_lba48_dma = (m5229_revision <= 0xC4) ? 1 : 0;
@@ -783,8 +741,17 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
783 741
784 hwif->atapi_dma = 1; 742 hwif->atapi_dma = 1;
785 743
786 if (m5229_revision > 0x20) 744 if (m5229_revision <= 0x20)
787 hwif->ultra_mask = 0x7f; 745 hwif->ultra_mask = 0x00; /* no udma */
746 else if (m5229_revision < 0xC2)
747 hwif->ultra_mask = 0x07; /* udma0-2 */
748 else if (m5229_revision == 0xC2 || m5229_revision == 0xC3)
749 hwif->ultra_mask = 0x1f; /* udma0-4 */
750 else if (m5229_revision == 0xC4)
751 hwif->ultra_mask = 0x3f; /* udma0-5 */
752 else
753 hwif->ultra_mask = 0x7f; /* udma0-6 */
754
788 hwif->mwdma_mask = 0x07; 755 hwif->mwdma_mask = 0x07;
789 hwif->swdma_mask = 0x07; 756 hwif->swdma_mask = 0x07;
790 757
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 7989bdd842a2..becb1a5648b0 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -92,7 +92,7 @@ static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3
92 * AMD /proc entry. 92 * AMD /proc entry.
93 */ 93 */
94 94
95#ifdef CONFIG_PROC_FS 95#ifdef CONFIG_IDE_PROC_FS
96 96
97#include <linux/stat.h> 97#include <linux/stat.h>
98#include <linux/proc_fs.h> 98#include <linux/proc_fs.h>
@@ -402,14 +402,14 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch
402 * Register /proc/ide/amd74xx entry 402 * Register /proc/ide/amd74xx entry
403 */ 403 */
404 404
405#if defined(DISPLAY_AMD_TIMINGS) && defined(CONFIG_PROC_FS) 405#if defined(DISPLAY_AMD_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
406 if (!amd74xx_proc) { 406 if (!amd74xx_proc) {
407 amd_base = pci_resource_start(dev, 4); 407 amd_base = pci_resource_start(dev, 4);
408 bmide_dev = dev; 408 bmide_dev = dev;
409 ide_pci_create_host_proc("amd74xx", amd74xx_get_info); 409 ide_pci_create_host_proc("amd74xx", amd74xx_get_info);
410 amd74xx_proc = 1; 410 amd74xx_proc = 1;
411 } 411 }
412#endif /* DISPLAY_AMD_TIMINGS && CONFIG_PROC_FS */ 412#endif /* DISPLAY_AMD_TIMINGS && CONFIG_IDE_PROC_FS */
413 413
414 return dev->irq; 414 return dev->irq;
415} 415}
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 2d48af32e3f4..0e52ad722a72 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -49,22 +49,6 @@ static int save_mdma_mode[4];
49static DEFINE_SPINLOCK(atiixp_lock); 49static DEFINE_SPINLOCK(atiixp_lock);
50 50
51/** 51/**
52 * atiixp_ratemask - compute rate mask for ATIIXP IDE
53 * @drive: IDE drive to compute for
54 *
55 * Returns the available modes for the ATIIXP IDE controller.
56 */
57
58static u8 atiixp_ratemask(ide_drive_t *drive)
59{
60 u8 mode = 3;
61
62 if (!eighty_ninty_three(drive))
63 mode = min(mode, (u8)1);
64 return mode;
65}
66
67/**
68 * atiixp_dma_2_pio - return the PIO mode matching DMA 52 * atiixp_dma_2_pio - return the PIO mode matching DMA
69 * @xfer_rate: transfer speed 53 * @xfer_rate: transfer speed
70 * 54 *
@@ -189,7 +173,7 @@ static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
189 u16 tmp16; 173 u16 tmp16;
190 u8 speed, pio; 174 u8 speed, pio;
191 175
192 speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed); 176 speed = ide_rate_filter(drive, xferspeed);
193 177
194 spin_lock_irqsave(&atiixp_lock, flags); 178 spin_lock_irqsave(&atiixp_lock, flags);
195 179
@@ -223,26 +207,6 @@ static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
223} 207}
224 208
225/** 209/**
226 * atiixp_config_drive_for_dma - configure drive for DMA
227 * @drive: IDE drive to configure
228 *
229 * Set up a ATIIXP interface channel for the best available speed.
230 * We prefer UDMA if it is available and then MWDMA. If DMA is
231 * not available we switch to PIO and return 0.
232 */
233
234static int atiixp_config_drive_for_dma(ide_drive_t *drive)
235{
236 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
237
238 if (!speed)
239 return 0;
240
241 (void) atiixp_speedproc(drive, speed);
242 return ide_dma_enable(drive);
243}
244
245/**
246 * atiixp_dma_check - set up an IDE device 210 * atiixp_dma_check - set up an IDE device
247 * @drive: IDE drive to configure 211 * @drive: IDE drive to configure
248 * 212 *
@@ -256,7 +220,7 @@ static int atiixp_dma_check(ide_drive_t *drive)
256 220
257 drive->init_speed = 0; 221 drive->init_speed = 0;
258 222
259 if (ide_use_dma(drive) && atiixp_config_drive_for_dma(drive)) 223 if (ide_tune_dma(drive))
260 return 0; 224 return 0;
261 225
262 if (ide_use_fast_pio(drive)) { 226 if (ide_use_fast_pio(drive)) {
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 77f51ab6d439..61ea96b5555c 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -74,7 +74,7 @@
74#define UDIDETCR1 0x7B 74#define UDIDETCR1 0x7B
75#define DTPR1 0x7C 75#define DTPR1 0x7C
76 76
77#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) 77#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
78#include <linux/stat.h> 78#include <linux/stat.h>
79#include <linux/proc_fs.h> 79#include <linux/proc_fs.h>
80 80
@@ -165,7 +165,7 @@ static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
165 return p-buffer; /* => must be less than 4k! */ 165 return p-buffer; /* => must be less than 4k! */
166} 166}
167 167
168#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) */ 168#endif /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
169 169
170static u8 quantize_timing(int timing, int quant) 170static u8 quantize_timing(int timing, int quant)
171{ 171{
@@ -292,55 +292,6 @@ static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio)
292 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 292 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
293} 293}
294 294
295static u8 cmd64x_ratemask (ide_drive_t *drive)
296{
297 struct pci_dev *dev = HWIF(drive)->pci_dev;
298 u8 mode = 0;
299
300 switch(dev->device) {
301 case PCI_DEVICE_ID_CMD_649:
302 mode = 3;
303 break;
304 case PCI_DEVICE_ID_CMD_648:
305 mode = 2;
306 break;
307 case PCI_DEVICE_ID_CMD_643:
308 return 0;
309
310 case PCI_DEVICE_ID_CMD_646:
311 {
312 unsigned int class_rev = 0;
313 pci_read_config_dword(dev,
314 PCI_CLASS_REVISION, &class_rev);
315 class_rev &= 0xff;
316 /*
317 * UltraDMA only supported on PCI646U and PCI646U2, which
318 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
319 * Actually, although the CMD tech support people won't
320 * tell me the details, the 0x03 revision cannot support
321 * UDMA correctly without hardware modifications, and even
322 * then it only works with Quantum disks due to some
323 * hold time assumptions in the 646U part which are fixed
324 * in the 646U2.
325 *
326 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
327 */
328 switch(class_rev) {
329 case 0x07:
330 case 0x05:
331 return 1;
332 case 0x03:
333 case 0x01:
334 default:
335 return 0;
336 }
337 }
338 }
339 if (!eighty_ninty_three(drive))
340 mode = min(mode, (u8)1);
341 return mode;
342}
343
344static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed) 295static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
345{ 296{
346 ide_hwif_t *hwif = HWIF(drive); 297 ide_hwif_t *hwif = HWIF(drive);
@@ -348,7 +299,7 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
348 u8 unit = drive->dn & 0x01; 299 u8 unit = drive->dn & 0x01;
349 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0; 300 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
350 301
351 speed = ide_rate_filter(cmd64x_ratemask(drive), speed); 302 speed = ide_rate_filter(drive, speed);
352 303
353 if (speed >= XFER_SW_DMA_0) { 304 if (speed >= XFER_SW_DMA_0) {
354 (void) pci_read_config_byte(dev, pciU, &regU); 305 (void) pci_read_config_byte(dev, pciU, &regU);
@@ -403,7 +354,7 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
403 354
404static int config_chipset_for_dma (ide_drive_t *drive) 355static int config_chipset_for_dma (ide_drive_t *drive)
405{ 356{
406 u8 speed = ide_dma_speed(drive, cmd64x_ratemask(drive)); 357 u8 speed = ide_max_dma_mode(drive);
407 358
408 if (!speed) 359 if (!speed)
409 return 0; 360 return 0;
@@ -597,7 +548,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
597 (void) pci_write_config_byte(dev, UDIDETCR0, 0xf0); 548 (void) pci_write_config_byte(dev, UDIDETCR0, 0xf0);
598#endif /* CONFIG_PPC */ 549#endif /* CONFIG_PPC */
599 550
600#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) 551#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
601 552
602 cmd_devs[n_cmd_devs++] = dev; 553 cmd_devs[n_cmd_devs++] = dev;
603 554
@@ -605,7 +556,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
605 cmd64x_proc = 1; 556 cmd64x_proc = 1;
606 ide_pci_create_host_proc("cmd64x", cmd64x_get_info); 557 ide_pci_create_host_proc("cmd64x", cmd64x_get_info);
607 } 558 }
608#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_PROC_FS */ 559#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_IDE_PROC_FS */
609 560
610 return 0; 561 return 0;
611} 562}
@@ -644,15 +595,24 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
644 595
645 hwif->atapi_dma = 1; 596 hwif->atapi_dma = 1;
646 597
647 hwif->ultra_mask = 0x3f; 598 hwif->ultra_mask = hwif->cds->udma_mask;
648 hwif->mwdma_mask = 0x07; 599
600 /*
601 * UltraDMA only supported on PCI646U and PCI646U2, which
602 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
603 * Actually, although the CMD tech support people won't
604 * tell me the details, the 0x03 revision cannot support
605 * UDMA correctly without hardware modifications, and even
606 * then it only works with Quantum disks due to some
607 * hold time assumptions in the 646U part which are fixed
608 * in the 646U2.
609 *
610 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
611 */
612 if (dev->device == PCI_DEVICE_ID_CMD_646 && class_rev < 5)
613 hwif->ultra_mask = 0x00;
649 614
650 if (dev->device == PCI_DEVICE_ID_CMD_643) 615 hwif->mwdma_mask = 0x07;
651 hwif->ultra_mask = 0x80;
652 if (dev->device == PCI_DEVICE_ID_CMD_646)
653 hwif->ultra_mask = (class_rev > 0x04) ? 0x07 : 0x80;
654 if (dev->device == PCI_DEVICE_ID_CMD_648)
655 hwif->ultra_mask = 0x1f;
656 616
657 hwif->ide_dma_check = &cmd64x_config_drive_for_dma; 617 hwif->ide_dma_check = &cmd64x_config_drive_for_dma;
658 if (!(hwif->udma_four)) 618 if (!(hwif->udma_four))
@@ -716,6 +676,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
716 .autodma = AUTODMA, 676 .autodma = AUTODMA,
717 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 677 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
718 .bootable = ON_BOARD, 678 .bootable = ON_BOARD,
679 .udma_mask = 0x00, /* no udma */
719 },{ /* 1 */ 680 },{ /* 1 */
720 .name = "CMD646", 681 .name = "CMD646",
721 .init_setup = init_setup_cmd646, 682 .init_setup = init_setup_cmd646,
@@ -725,6 +686,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
725 .autodma = AUTODMA, 686 .autodma = AUTODMA,
726 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 687 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
727 .bootable = ON_BOARD, 688 .bootable = ON_BOARD,
689 .udma_mask = 0x07, /* udma0-2 */
728 },{ /* 2 */ 690 },{ /* 2 */
729 .name = "CMD648", 691 .name = "CMD648",
730 .init_setup = init_setup_cmd64x, 692 .init_setup = init_setup_cmd64x,
@@ -734,6 +696,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
734 .autodma = AUTODMA, 696 .autodma = AUTODMA,
735 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 697 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
736 .bootable = ON_BOARD, 698 .bootable = ON_BOARD,
699 .udma_mask = 0x1f, /* udma0-4 */
737 },{ /* 3 */ 700 },{ /* 3 */
738 .name = "CMD649", 701 .name = "CMD649",
739 .init_setup = init_setup_cmd64x, 702 .init_setup = init_setup_cmd64x,
@@ -743,6 +706,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
743 .autodma = AUTODMA, 706 .autodma = AUTODMA,
744 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 707 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
745 .bootable = ON_BOARD, 708 .bootable = ON_BOARD,
709 .udma_mask = 0x3f, /* udma0-5 */
746 } 710 }
747}; 711};
748 712
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index 400859a839f7..3b88a3a56116 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -213,6 +213,7 @@ static ide_pci_device_t cyrix_chipsets[] __devinitdata = {
213 213
214static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id) 214static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
215{ 215{
216 ide_hwif_t *hwif = NULL, *mate = NULL;
216 ata_index_t index; 217 ata_index_t index;
217 ide_pci_device_t *d = &cyrix_chipsets[id->driver_data]; 218 ide_pci_device_t *d = &cyrix_chipsets[id->driver_data];
218 219
@@ -239,10 +240,21 @@ static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_devic
239 240
240 ide_pci_setup_ports(dev, d, 14, &index); 241 ide_pci_setup_ports(dev, d, 14, &index);
241 242
242 if((index.b.low & 0xf0) != 0xf0) 243 if ((index.b.low & 0xf0) != 0xf0)
243 probe_hwif_init(&ide_hwifs[index.b.low]); 244 hwif = &ide_hwifs[index.b.low];
244 if((index.b.high & 0xf0) != 0xf0) 245 if ((index.b.high & 0xf0) != 0xf0)
245 probe_hwif_init(&ide_hwifs[index.b.high]); 246 mate = &ide_hwifs[index.b.high];
247
248 if (hwif)
249 probe_hwif_init(hwif);
250 if (mate)
251 probe_hwif_init(mate);
252
253 if (hwif)
254 ide_proc_register_port(hwif);
255 if (mate)
256 ide_proc_register_port(mate);
257
246 return 0; 258 return 0;
247} 259}
248 260
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 45f43efbf92c..41925c47ef05 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -127,20 +127,6 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
127 } 127 }
128} 128}
129 129
130static u8 cs5535_ratemask(ide_drive_t *drive)
131{
132 /* eighty93 will return 1 if it's 80core and capable of
133 exceeding udma2, 0 otherwise. we need ratemask to set
134 the max speed and if we can > udma2 then we return 2
135 which selects speed_max as udma4 which is the 5535's max
136 speed, and 1 selects udma2 which is the max for 40c */
137 if (!eighty_ninty_three(drive))
138 return 1;
139
140 return 2;
141}
142
143
144/**** 130/****
145 * cs5535_set_drive - Configure the drive to the new speed 131 * cs5535_set_drive - Configure the drive to the new speed
146 * @drive: Drive to set up 132 * @drive: Drive to set up
@@ -151,7 +137,7 @@ static u8 cs5535_ratemask(ide_drive_t *drive)
151 */ 137 */
152static int cs5535_set_drive(ide_drive_t *drive, u8 speed) 138static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
153{ 139{
154 speed = ide_rate_filter(cs5535_ratemask(drive), speed); 140 speed = ide_rate_filter(drive, speed);
155 ide_config_drive_speed(drive, speed); 141 ide_config_drive_speed(drive, speed);
156 cs5535_set_speed(drive, speed); 142 cs5535_set_speed(drive, speed);
157 143
@@ -178,28 +164,13 @@ static void cs5535_tuneproc(ide_drive_t *drive, u8 xferspeed)
178 cs5535_set_speed(drive, xferspeed); 164 cs5535_set_speed(drive, xferspeed);
179} 165}
180 166
181static int cs5535_config_drive_for_dma(ide_drive_t *drive)
182{
183 u8 speed;
184
185 speed = ide_dma_speed(drive, cs5535_ratemask(drive));
186
187 /* If no DMA speed was available then let dma_check hit pio */
188 if (!speed) {
189 return 0;
190 }
191
192 cs5535_set_drive(drive, speed);
193 return ide_dma_enable(drive);
194}
195
196static int cs5535_dma_check(ide_drive_t *drive) 167static int cs5535_dma_check(ide_drive_t *drive)
197{ 168{
198 u8 speed; 169 u8 speed;
199 170
200 drive->init_speed = 0; 171 drive->init_speed = 0;
201 172
202 if (ide_use_dma(drive) && cs5535_config_drive_for_dma(drive)) 173 if (ide_tune_dma(drive))
203 return 0; 174 return 0;
204 175
205 if (ide_use_fast_pio(drive)) { 176 if (ide_use_fast_pio(drive)) {
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index dd7ec37fdeab..46f4a888c037 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -80,7 +80,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
80 hw.irq = dev->irq; 80 hw.irq = dev->irq;
81 hw.chipset = ide_pci; /* this enables IRQ sharing */ 81 hw.chipset = ide_pci; /* this enables IRQ sharing */
82 82
83 rc = ide_register_hw_with_fixup(&hw, &hwif, ide_undecoded_slave); 83 rc = ide_register_hw_with_fixup(&hw, 0, &hwif, ide_undecoded_slave);
84 if (rc < 0) { 84 if (rc < 0) {
85 printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc); 85 printk(KERN_ERR "delkin_cb: ide_register_hw failed (%d)\n", rc);
86 pci_disable_device(dev); 86 pci_disable_device(dev);
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index 924eaa3a5708..2c24c3de8846 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -43,15 +43,10 @@
43 43
44#define HPT343_DEBUG_DRIVE_INFO 0 44#define HPT343_DEBUG_DRIVE_INFO 0
45 45
46static u8 hpt34x_ratemask (ide_drive_t *drive)
47{
48 return 1;
49}
50
51static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) 46static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
52{ 47{
53 struct pci_dev *dev = HWIF(drive)->pci_dev; 48 struct pci_dev *dev = HWIF(drive)->pci_dev;
54 u8 speed = ide_rate_filter(hpt34x_ratemask(drive), xferspeed); 49 u8 speed = ide_rate_filter(drive, xferspeed);
55 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; 50 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
56 u8 hi_speed, lo_speed; 51 u8 hi_speed, lo_speed;
57 52
@@ -89,29 +84,11 @@ static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio)
89 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); 84 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio));
90} 85}
91 86
92/*
93 * This allows the configuration of ide_pci chipset registers
94 * for cards that learn about the drive's UDMA, DMA, PIO capabilities
95 * after the drive is reported by the OS. Initially for designed for
96 * HPT343 UDMA chipset by HighPoint|Triones Technologies, Inc.
97 */
98
99static int config_chipset_for_dma (ide_drive_t *drive)
100{
101 u8 speed = ide_dma_speed(drive, hpt34x_ratemask(drive));
102
103 if (!(speed))
104 return 0;
105
106 (void) hpt34x_tune_chipset(drive, speed);
107 return ide_dma_enable(drive);
108}
109
110static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive) 87static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
111{ 88{
112 drive->init_speed = 0; 89 drive->init_speed = 0;
113 90
114 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 91 if (ide_tune_dma(drive))
115#ifndef CONFIG_HPT34X_AUTODMA 92#ifndef CONFIG_HPT34X_AUTODMA
116 return -1; 93 return -1;
117#else 94#else
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index cf9d344d19f8..fcbc5605b38e 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -514,43 +514,31 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list)
514 return 0; 514 return 0;
515} 515}
516 516
517static u8 hpt3xx_ratemask(ide_drive_t *drive)
518{
519 struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev);
520 u8 mode = info->max_mode;
521
522 if (!eighty_ninty_three(drive) && mode)
523 mode = min(mode, (u8)1);
524 return mode;
525}
526
527/* 517/*
528 * Note for the future; the SATA hpt37x we must set 518 * Note for the future; the SATA hpt37x we must set
529 * either PIO or UDMA modes 0,4,5 519 * either PIO or UDMA modes 0,4,5
530 */ 520 */
531 521
532static u8 hpt3xx_ratefilter(ide_drive_t *drive, u8 speed) 522static u8 hpt3xx_udma_filter(ide_drive_t *drive)
533{ 523{
534 struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev); 524 struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev);
535 u8 chip_type = info->chip_type; 525 u8 chip_type = info->chip_type;
536 u8 mode = hpt3xx_ratemask(drive); 526 u8 mode = info->max_mode;
537 527 u8 mask;
538 if (drive->media != ide_disk)
539 return min(speed, (u8)XFER_PIO_4);
540 528
541 switch (mode) { 529 switch (mode) {
542 case 0x04: 530 case 0x04:
543 speed = min_t(u8, speed, XFER_UDMA_6); 531 mask = 0x7f;
544 break; 532 break;
545 case 0x03: 533 case 0x03:
546 speed = min_t(u8, speed, XFER_UDMA_5); 534 mask = 0x3f;
547 if (chip_type >= HPT374) 535 if (chip_type >= HPT374)
548 break; 536 break;
549 if (!check_in_drive_list(drive, bad_ata100_5)) 537 if (!check_in_drive_list(drive, bad_ata100_5))
550 goto check_bad_ata33; 538 goto check_bad_ata33;
551 /* fall thru */ 539 /* fall thru */
552 case 0x02: 540 case 0x02:
553 speed = min_t(u8, speed, XFER_UDMA_4); 541 mask = 0x1f;
554 542
555 /* 543 /*
556 * CHECK ME, Does this need to be changed to HPT374 ?? 544 * CHECK ME, Does this need to be changed to HPT374 ??
@@ -561,13 +549,13 @@ static u8 hpt3xx_ratefilter(ide_drive_t *drive, u8 speed)
561 !check_in_drive_list(drive, bad_ata66_4)) 549 !check_in_drive_list(drive, bad_ata66_4))
562 goto check_bad_ata33; 550 goto check_bad_ata33;
563 551
564 speed = min_t(u8, speed, XFER_UDMA_3); 552 mask = 0x0f;
565 if (HPT366_ALLOW_ATA66_3 && 553 if (HPT366_ALLOW_ATA66_3 &&
566 !check_in_drive_list(drive, bad_ata66_3)) 554 !check_in_drive_list(drive, bad_ata66_3))
567 goto check_bad_ata33; 555 goto check_bad_ata33;
568 /* fall thru */ 556 /* fall thru */
569 case 0x01: 557 case 0x01:
570 speed = min_t(u8, speed, XFER_UDMA_2); 558 mask = 0x07;
571 559
572 check_bad_ata33: 560 check_bad_ata33:
573 if (chip_type >= HPT370A) 561 if (chip_type >= HPT370A)
@@ -577,10 +565,10 @@ static u8 hpt3xx_ratefilter(ide_drive_t *drive, u8 speed)
577 /* fall thru */ 565 /* fall thru */
578 case 0x00: 566 case 0x00:
579 default: 567 default:
580 speed = min_t(u8, speed, XFER_MW_DMA_2); 568 mask = 0x00;
581 break; 569 break;
582 } 570 }
583 return speed; 571 return mask;
584} 572}
585 573
586static u32 get_speed_setting(u8 speed, struct hpt_info *info) 574static u32 get_speed_setting(u8 speed, struct hpt_info *info)
@@ -608,12 +596,19 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed)
608 ide_hwif_t *hwif = HWIF(drive); 596 ide_hwif_t *hwif = HWIF(drive);
609 struct pci_dev *dev = hwif->pci_dev; 597 struct pci_dev *dev = hwif->pci_dev;
610 struct hpt_info *info = pci_get_drvdata(dev); 598 struct hpt_info *info = pci_get_drvdata(dev);
611 u8 speed = hpt3xx_ratefilter(drive, xferspeed); 599 u8 speed = ide_rate_filter(drive, xferspeed);
612 u8 itr_addr = drive->dn ? 0x44 : 0x40; 600 u8 itr_addr = drive->dn ? 0x44 : 0x40;
613 u32 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 :
614 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff);
615 u32 new_itr = get_speed_setting(speed, info);
616 u32 old_itr = 0; 601 u32 old_itr = 0;
602 u32 itr_mask, new_itr;
603
604 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
605 if (drive->media != ide_disk)
606 speed = min_t(u8, speed, XFER_PIO_4);
607
608 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 :
609 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff);
610
611 new_itr = get_speed_setting(speed, info);
617 612
618 /* 613 /*
619 * Disable on-chip PIO FIFO/buffer (and PIO MST mode as well) 614 * Disable on-chip PIO FIFO/buffer (and PIO MST mode as well)
@@ -633,12 +628,19 @@ static int hpt37x_tune_chipset(ide_drive_t *drive, u8 xferspeed)
633 ide_hwif_t *hwif = HWIF(drive); 628 ide_hwif_t *hwif = HWIF(drive);
634 struct pci_dev *dev = hwif->pci_dev; 629 struct pci_dev *dev = hwif->pci_dev;
635 struct hpt_info *info = pci_get_drvdata(dev); 630 struct hpt_info *info = pci_get_drvdata(dev);
636 u8 speed = hpt3xx_ratefilter(drive, xferspeed); 631 u8 speed = ide_rate_filter(drive, xferspeed);
637 u8 itr_addr = 0x40 + (drive->dn * 4); 632 u8 itr_addr = 0x40 + (drive->dn * 4);
638 u32 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 :
639 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff);
640 u32 new_itr = get_speed_setting(speed, info);
641 u32 old_itr = 0; 633 u32 old_itr = 0;
634 u32 itr_mask, new_itr;
635
636 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
637 if (drive->media != ide_disk)
638 speed = min_t(u8, speed, XFER_PIO_4);
639
640 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 :
641 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff);
642
643 new_itr = get_speed_setting(speed, info);
642 644
643 pci_read_config_dword(dev, itr_addr, &old_itr); 645 pci_read_config_dword(dev, itr_addr, &old_itr);
644 new_itr = (new_itr & ~itr_mask) | (old_itr & itr_mask); 646 new_itr = (new_itr & ~itr_mask) | (old_itr & itr_mask);
@@ -667,24 +669,6 @@ static void hpt3xx_tune_drive(ide_drive_t *drive, u8 pio)
667 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio); 669 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio);
668} 670}
669 671
670/*
671 * This allows the configuration of ide_pci chipset registers
672 * for cards that learn about the drive's UDMA, DMA, PIO capabilities
673 * after the drive is reported by the OS. Initially designed for
674 * HPT366 UDMA chipset by HighPoint|Triones Technologies, Inc.
675 *
676 */
677static int config_chipset_for_dma(ide_drive_t *drive)
678{
679 u8 speed = ide_dma_speed(drive, hpt3xx_ratemask(drive));
680
681 if (!speed)
682 return 0;
683
684 (void) hpt3xx_tune_chipset(drive, speed);
685 return ide_dma_enable(drive);
686}
687
688static int hpt3xx_quirkproc(ide_drive_t *drive) 672static int hpt3xx_quirkproc(ide_drive_t *drive)
689{ 673{
690 struct hd_driveid *id = drive->id; 674 struct hd_driveid *id = drive->id;
@@ -739,7 +723,7 @@ static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
739{ 723{
740 drive->init_speed = 0; 724 drive->init_speed = 0;
741 725
742 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 726 if (ide_tune_dma(drive))
743 return 0; 727 return 0;
744 728
745 if (ide_use_fast_pio(drive)) 729 if (ide_use_fast_pio(drive))
@@ -1271,6 +1255,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1271 hwif->intrproc = &hpt3xx_intrproc; 1255 hwif->intrproc = &hpt3xx_intrproc;
1272 hwif->maskproc = &hpt3xx_maskproc; 1256 hwif->maskproc = &hpt3xx_maskproc;
1273 hwif->busproc = &hpt3xx_busproc; 1257 hwif->busproc = &hpt3xx_busproc;
1258 hwif->udma_filter = &hpt3xx_udma_filter;
1274 1259
1275 /* 1260 /*
1276 * HPT3xxN chips have some complications: 1261 * HPT3xxN chips have some complications:
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 424f00bb160d..c04a02687b95 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -17,22 +17,6 @@
17 17
18#include <asm/io.h> 18#include <asm/io.h>
19 19
20/*
21 * it8213_ratemask - Compute available modes
22 * @drive: IDE drive
23 *
24 * Compute the available speeds for the devices on the interface. This
25 * is all modes to ATA133 clipped by drive cable setup.
26 */
27
28static u8 it8213_ratemask (ide_drive_t *drive)
29{
30 u8 mode = 4;
31 if (!eighty_ninty_three(drive))
32 mode = min_t(u8, mode, 1);
33 return mode;
34}
35
36/** 20/**
37 * it8213_dma_2_pio - return the PIO mode matching DMA 21 * it8213_dma_2_pio - return the PIO mode matching DMA
38 * @xfer_rate: transfer speed 22 * @xfer_rate: transfer speed
@@ -145,7 +129,7 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
145 ide_hwif_t *hwif = HWIF(drive); 129 ide_hwif_t *hwif = HWIF(drive);
146 struct pci_dev *dev = hwif->pci_dev; 130 struct pci_dev *dev = hwif->pci_dev;
147 u8 maslave = 0x40; 131 u8 maslave = 0x40;
148 u8 speed = ide_rate_filter(it8213_ratemask(drive), xferspeed); 132 u8 speed = ide_rate_filter(drive, xferspeed);
149 int a_speed = 3 << (drive->dn * 4); 133 int a_speed = 3 << (drive->dn * 4);
150 int u_flag = 1 << drive->dn; 134 int u_flag = 1 << drive->dn;
151 int v_flag = 0x01 << drive->dn; 135 int v_flag = 0x01 << drive->dn;
@@ -213,25 +197,6 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
213 return ide_config_drive_speed(drive, speed); 197 return ide_config_drive_speed(drive, speed);
214} 198}
215 199
216/*
217 * config_chipset_for_dma - configure for DMA
218 * @drive: drive to configure
219 *
220 * Called by the IDE layer when it wants the timings set up.
221 */
222
223static int config_chipset_for_dma (ide_drive_t *drive)
224{
225 u8 speed = ide_dma_speed(drive, it8213_ratemask(drive));
226
227 if (!speed)
228 return 0;
229
230 it8213_tune_chipset(drive, speed);
231
232 return ide_dma_enable(drive);
233}
234
235/** 200/**
236 * it8213_configure_drive_for_dma - set up for DMA transfers 201 * it8213_configure_drive_for_dma - set up for DMA transfers
237 * @drive: drive we are going to set up 202 * @drive: drive we are going to set up
@@ -246,7 +211,7 @@ static int it8213_config_drive_for_dma (ide_drive_t *drive)
246{ 211{
247 u8 pio; 212 u8 pio;
248 213
249 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 214 if (ide_tune_dma(drive))
250 return 0; 215 return 0;
251 216
252 pio = ide_get_best_pio_mode(drive, 255, 4, NULL); 217 pio = ide_get_best_pio_mode(drive, 255, 4, NULL);
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 4e1254813ee0..442f658c6ae7 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -229,22 +229,6 @@ static void it821x_clock_strategy(ide_drive_t *drive)
229} 229}
230 230
231/** 231/**
232 * it821x_ratemask - Compute available modes
233 * @drive: IDE drive
234 *
235 * Compute the available speeds for the devices on the interface. This
236 * is all modes to ATA133 clipped by drive cable setup.
237 */
238
239static u8 it821x_ratemask (ide_drive_t *drive)
240{
241 u8 mode = 4;
242 if (!eighty_ninty_three(drive))
243 mode = min(mode, (u8)1);
244 return mode;
245}
246
247/**
248 * it821x_tunepio - tune a drive 232 * it821x_tunepio - tune a drive
249 * @drive: drive to tune 233 * @drive: drive to tune
250 * @pio: the desired PIO mode 234 * @pio: the desired PIO mode
@@ -438,7 +422,7 @@ static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed)
438 422
439 ide_hwif_t *hwif = drive->hwif; 423 ide_hwif_t *hwif = drive->hwif;
440 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 424 struct it821x_dev *itdev = ide_get_hwifdata(hwif);
441 u8 speed = ide_rate_filter(it821x_ratemask(drive), xferspeed); 425 u8 speed = ide_rate_filter(drive, xferspeed);
442 426
443 switch (speed) { 427 switch (speed) {
444 case XFER_PIO_4: 428 case XFER_PIO_4:
@@ -488,7 +472,7 @@ static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed)
488 472
489static int config_chipset_for_dma (ide_drive_t *drive) 473static int config_chipset_for_dma (ide_drive_t *drive)
490{ 474{
491 u8 speed = ide_dma_speed(drive, it821x_ratemask(drive)); 475 u8 speed = ide_max_dma_mode(drive);
492 476
493 if (speed == 0) 477 if (speed == 0)
494 return 0; 478 return 0;
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index be4fc96c29e0..76ed25147229 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -22,22 +22,6 @@ typedef enum {
22} port_type; 22} port_type;
23 23
24/** 24/**
25 * jmicron_ratemask - Compute available modes
26 * @drive: IDE drive
27 *
28 * Compute the available speeds for the devices on the interface. This
29 * is all modes to ATA133 clipped by drive cable setup.
30 */
31
32static u8 jmicron_ratemask(ide_drive_t *drive)
33{
34 u8 mode = 4;
35 if (!eighty_ninty_three(drive))
36 mode = min(mode, (u8)1);
37 return mode;
38}
39
40/**
41 * ata66_jmicron - Cable check 25 * ata66_jmicron - Cable check
42 * @hwif: IDE port 26 * @hwif: IDE port
43 * 27 *
@@ -129,32 +113,12 @@ static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed)
129 113
130static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed) 114static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed)
131{ 115{
132 116 u8 speed = ide_rate_filter(drive, xferspeed);
133 u8 speed = ide_rate_filter(jmicron_ratemask(drive), xferspeed);
134 117
135 return ide_config_drive_speed(drive, speed); 118 return ide_config_drive_speed(drive, speed);
136} 119}
137 120
138/** 121/**
139 * config_chipset_for_dma - configure for DMA
140 * @drive: drive to configure
141 *
142 * As the JMicron snoops for timings all we actually need to do is
143 * make sure we don't set an invalid mode.
144 */
145
146static int config_chipset_for_dma (ide_drive_t *drive)
147{
148 u8 speed = ide_dma_speed(drive, jmicron_ratemask(drive));
149
150 if (!speed)
151 return 0;
152
153 jmicron_tune_chipset(drive, speed);
154 return ide_dma_enable(drive);
155}
156
157/**
158 * jmicron_configure_drive_for_dma - set up for DMA transfers 122 * jmicron_configure_drive_for_dma - set up for DMA transfers
159 * @drive: drive we are going to set up 123 * @drive: drive we are going to set up
160 * 124 *
@@ -164,7 +128,7 @@ static int config_chipset_for_dma (ide_drive_t *drive)
164 128
165static int jmicron_config_drive_for_dma (ide_drive_t *drive) 129static int jmicron_config_drive_for_dma (ide_drive_t *drive)
166{ 130{
167 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 131 if (ide_tune_dma(drive))
168 return 0; 132 return 0;
169 133
170 config_jmicron_chipset_for_pio(drive, 1); 134 config_jmicron_chipset_for_pio(drive, 1);
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 2cdd629c653d..65b1e124edf7 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -37,8 +37,6 @@
37#include <asm/pci-bridge.h> 37#include <asm/pci-bridge.h>
38#endif 38#endif
39 39
40#define PDC202_DEBUG_CABLE 0
41
42#undef DEBUG 40#undef DEBUG
43 41
44#ifdef DEBUG 42#ifdef DEBUG
@@ -82,16 +80,6 @@ static u8 max_dma_rate(struct pci_dev *pdev)
82 return mode; 80 return mode;
83} 81}
84 82
85static u8 pdcnew_ratemask(ide_drive_t *drive)
86{
87 u8 mode = max_dma_rate(HWIF(drive)->pci_dev);
88
89 if (!eighty_ninty_three(drive))
90 mode = min_t(u8, mode, 1);
91
92 return mode;
93}
94
95/** 83/**
96 * get_indexed_reg - Get indexed register 84 * get_indexed_reg - Get indexed register
97 * @hwif: for the port address 85 * @hwif: for the port address
@@ -164,7 +152,7 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed)
164 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
165 int err; 153 int err;
166 154
167 speed = ide_rate_filter(pdcnew_ratemask(drive), speed); 155 speed = ide_rate_filter(drive, speed);
168 156
169 /* 157 /*
170 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will 158 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will
@@ -244,17 +232,8 @@ static int config_chipset_for_dma(ide_drive_t *drive)
244{ 232{
245 struct hd_driveid *id = drive->id; 233 struct hd_driveid *id = drive->id;
246 ide_hwif_t *hwif = HWIF(drive); 234 ide_hwif_t *hwif = HWIF(drive);
247 u8 ultra_66 = (id->dma_ultra & 0x0078) ? 1 : 0;
248 u8 cable = pdcnew_cable_detect(hwif);
249 u8 speed; 235 u8 speed;
250 236
251 if (ultra_66 && cable) {
252 printk(KERN_WARNING "Warning: %s channel "
253 "requires an 80-pin cable for operation.\n",
254 hwif->channel ? "Secondary" : "Primary");
255 printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
256 }
257
258 if (id->capability & 4) { 237 if (id->capability & 4) {
259 /* 238 /*
260 * Set IORDY_EN & PREFETCH_EN (this seems to have 239 * Set IORDY_EN & PREFETCH_EN (this seems to have
@@ -267,7 +246,7 @@ static int config_chipset_for_dma(ide_drive_t *drive)
267 set_indexed_reg(hwif, 0x13 + adj, tmp | 0x03); 246 set_indexed_reg(hwif, 0x13 + adj, tmp | 0x03);
268 } 247 }
269 248
270 speed = ide_dma_speed(drive, pdcnew_ratemask(drive)); 249 speed = ide_max_dma_mode(drive);
271 250
272 if (!speed) 251 if (!speed)
273 return 0; 252 return 0;
@@ -543,7 +522,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
543 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 522 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
544 523
545 hwif->atapi_dma = 1; 524 hwif->atapi_dma = 1;
546 hwif->ultra_mask = 0x7f; 525
526 hwif->ultra_mask = hwif->cds->udma_mask;
547 hwif->mwdma_mask = 0x07; 527 hwif->mwdma_mask = 0x07;
548 528
549 hwif->err_stops_fifo = 1; 529 hwif->err_stops_fifo = 1;
@@ -556,11 +536,6 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
556 if (!noautodma) 536 if (!noautodma)
557 hwif->autodma = 1; 537 hwif->autodma = 1;
558 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; 538 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
559
560#if PDC202_DEBUG_CABLE
561 printk(KERN_DEBUG "%s: %s-pin cable\n",
562 hwif->name, hwif->udma_four ? "80" : "40");
563#endif /* PDC202_DEBUG_CABLE */
564} 539}
565 540
566static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d) 541static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
@@ -619,6 +594,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
619 .channels = 2, 594 .channels = 2,
620 .autodma = AUTODMA, 595 .autodma = AUTODMA,
621 .bootable = OFF_BOARD, 596 .bootable = OFF_BOARD,
597 .udma_mask = 0x3f, /* udma0-5 */
622 },{ /* 1 */ 598 },{ /* 1 */
623 .name = "PDC20269", 599 .name = "PDC20269",
624 .init_setup = init_setup_pdcnew, 600 .init_setup = init_setup_pdcnew,
@@ -627,6 +603,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
627 .channels = 2, 603 .channels = 2,
628 .autodma = AUTODMA, 604 .autodma = AUTODMA,
629 .bootable = OFF_BOARD, 605 .bootable = OFF_BOARD,
606 .udma_mask = 0x7f, /* udma0-6*/
630 },{ /* 2 */ 607 },{ /* 2 */
631 .name = "PDC20270", 608 .name = "PDC20270",
632 .init_setup = init_setup_pdc20270, 609 .init_setup = init_setup_pdc20270,
@@ -635,6 +612,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
635 .channels = 2, 612 .channels = 2,
636 .autodma = AUTODMA, 613 .autodma = AUTODMA,
637 .bootable = OFF_BOARD, 614 .bootable = OFF_BOARD,
615 .udma_mask = 0x3f, /* udma0-5 */
638 },{ /* 3 */ 616 },{ /* 3 */
639 .name = "PDC20271", 617 .name = "PDC20271",
640 .init_setup = init_setup_pdcnew, 618 .init_setup = init_setup_pdcnew,
@@ -643,6 +621,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
643 .channels = 2, 621 .channels = 2,
644 .autodma = AUTODMA, 622 .autodma = AUTODMA,
645 .bootable = OFF_BOARD, 623 .bootable = OFF_BOARD,
624 .udma_mask = 0x7f, /* udma0-6*/
646 },{ /* 4 */ 625 },{ /* 4 */
647 .name = "PDC20275", 626 .name = "PDC20275",
648 .init_setup = init_setup_pdcnew, 627 .init_setup = init_setup_pdcnew,
@@ -651,6 +630,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
651 .channels = 2, 630 .channels = 2,
652 .autodma = AUTODMA, 631 .autodma = AUTODMA,
653 .bootable = OFF_BOARD, 632 .bootable = OFF_BOARD,
633 .udma_mask = 0x7f, /* udma0-6*/
654 },{ /* 5 */ 634 },{ /* 5 */
655 .name = "PDC20276", 635 .name = "PDC20276",
656 .init_setup = init_setup_pdc20276, 636 .init_setup = init_setup_pdc20276,
@@ -659,6 +639,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
659 .channels = 2, 639 .channels = 2,
660 .autodma = AUTODMA, 640 .autodma = AUTODMA,
661 .bootable = OFF_BOARD, 641 .bootable = OFF_BOARD,
642 .udma_mask = 0x7f, /* udma0-6*/
662 },{ /* 6 */ 643 },{ /* 6 */
663 .name = "PDC20277", 644 .name = "PDC20277",
664 .init_setup = init_setup_pdcnew, 645 .init_setup = init_setup_pdcnew,
@@ -667,6 +648,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
667 .channels = 2, 648 .channels = 2,
668 .autodma = AUTODMA, 649 .autodma = AUTODMA,
669 .bootable = OFF_BOARD, 650 .bootable = OFF_BOARD,
651 .udma_mask = 0x7f, /* udma0-6*/
670 } 652 }
671}; 653};
672 654
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index a7a639fe1eaf..7146fe3f6ba7 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -46,7 +46,6 @@
46#include <asm/io.h> 46#include <asm/io.h>
47#include <asm/irq.h> 47#include <asm/irq.h>
48 48
49#define PDC202_DEBUG_CABLE 0
50#define PDC202XX_DEBUG_DRIVE_INFO 0 49#define PDC202XX_DEBUG_DRIVE_INFO 0
51 50
52static const char *pdc_quirk_drives[] = { 51static const char *pdc_quirk_drives[] = {
@@ -101,35 +100,12 @@ static const char *pdc_quirk_drives[] = {
101#define MC1 0x02 /* DMA"C" timing */ 100#define MC1 0x02 /* DMA"C" timing */
102#define MC0 0x01 /* DMA"C" timing */ 101#define MC0 0x01 /* DMA"C" timing */
103 102
104static u8 pdc202xx_ratemask (ide_drive_t *drive)
105{
106 u8 mode;
107
108 switch(HWIF(drive)->pci_dev->device) {
109 case PCI_DEVICE_ID_PROMISE_20267:
110 case PCI_DEVICE_ID_PROMISE_20265:
111 mode = 3;
112 break;
113 case PCI_DEVICE_ID_PROMISE_20263:
114 case PCI_DEVICE_ID_PROMISE_20262:
115 mode = 2;
116 break;
117 case PCI_DEVICE_ID_PROMISE_20246:
118 return 1;
119 default:
120 return 0;
121 }
122 if (!eighty_ninty_three(drive))
123 mode = min(mode, (u8)1);
124 return mode;
125}
126
127static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) 103static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed)
128{ 104{
129 ide_hwif_t *hwif = HWIF(drive); 105 ide_hwif_t *hwif = HWIF(drive);
130 struct pci_dev *dev = hwif->pci_dev; 106 struct pci_dev *dev = hwif->pci_dev;
131 u8 drive_pci = 0x60 + (drive->dn << 2); 107 u8 drive_pci = 0x60 + (drive->dn << 2);
132 u8 speed = ide_rate_filter(pdc202xx_ratemask(drive), xferspeed); 108 u8 speed = ide_rate_filter(drive, xferspeed);
133 109
134 u32 drive_conf; 110 u32 drive_conf;
135 u8 AP, BP, CP, DP; 111 u8 AP, BP, CP, DP;
@@ -261,20 +237,7 @@ static int config_chipset_for_dma (ide_drive_t *drive)
261 u32 drive_conf = 0; 237 u32 drive_conf = 0;
262 u8 drive_pci = 0x60 + (drive->dn << 2); 238 u8 drive_pci = 0x60 + (drive->dn << 2);
263 u8 test1 = 0, test2 = 0, speed = -1; 239 u8 test1 = 0, test2 = 0, speed = -1;
264 u8 AP = 0, cable = 0; 240 u8 AP = 0;
265
266 u8 ultra_66 = ((id->dma_ultra & 0x0010) ||
267 (id->dma_ultra & 0x0008)) ? 1 : 0;
268
269 if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
270 cable = pdc202xx_old_cable_detect(hwif);
271 else
272 ultra_66 = 0;
273
274 if (ultra_66 && cable) {
275 printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
276 printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
277 }
278 241
279 if (dev->device != PCI_DEVICE_ID_PROMISE_20246) 242 if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
280 pdc_old_disable_66MHz_clock(drive->hwif); 243 pdc_old_disable_66MHz_clock(drive->hwif);
@@ -308,7 +271,7 @@ chipset_is_set:
308 if (drive->media == ide_disk) /* PREFETCH_EN */ 271 if (drive->media == ide_disk) /* PREFETCH_EN */
309 pci_write_config_byte(dev, (drive_pci), AP|PREFETCH_EN); 272 pci_write_config_byte(dev, (drive_pci), AP|PREFETCH_EN);
310 273
311 speed = ide_dma_speed(drive, pdc202xx_ratemask(drive)); 274 speed = ide_max_dma_mode(drive);
312 275
313 if (!(speed)) { 276 if (!(speed)) {
314 /* restore original pci-config space */ 277 /* restore original pci-config space */
@@ -478,7 +441,7 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
478 441
479 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 442 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
480 443
481 hwif->ultra_mask = 0x3f; 444 hwif->ultra_mask = hwif->cds->udma_mask;
482 hwif->mwdma_mask = 0x07; 445 hwif->mwdma_mask = 0x07;
483 hwif->swdma_mask = 0x07; 446 hwif->swdma_mask = 0x07;
484 hwif->atapi_dma = 1; 447 hwif->atapi_dma = 1;
@@ -500,10 +463,6 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
500 if (!noautodma) 463 if (!noautodma)
501 hwif->autodma = 1; 464 hwif->autodma = 1;
502 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; 465 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
503#if PDC202_DEBUG_CABLE
504 printk(KERN_DEBUG "%s: %s-pin cable\n",
505 hwif->name, hwif->udma_four ? "80" : "40");
506#endif /* PDC202_DEBUG_CABLE */
507} 466}
508 467
509static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) 468static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
@@ -587,6 +546,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
587 .autodma = AUTODMA, 546 .autodma = AUTODMA,
588 .bootable = OFF_BOARD, 547 .bootable = OFF_BOARD,
589 .extra = 16, 548 .extra = 16,
549 .udma_mask = 0x07, /* udma0-2 */
590 },{ /* 1 */ 550 },{ /* 1 */
591 .name = "PDC20262", 551 .name = "PDC20262",
592 .init_setup = init_setup_pdc202ata4, 552 .init_setup = init_setup_pdc202ata4,
@@ -597,6 +557,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
597 .autodma = AUTODMA, 557 .autodma = AUTODMA,
598 .bootable = OFF_BOARD, 558 .bootable = OFF_BOARD,
599 .extra = 48, 559 .extra = 48,
560 .udma_mask = 0x1f, /* udma0-4 */
600 },{ /* 2 */ 561 },{ /* 2 */
601 .name = "PDC20263", 562 .name = "PDC20263",
602 .init_setup = init_setup_pdc202ata4, 563 .init_setup = init_setup_pdc202ata4,
@@ -607,6 +568,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
607 .autodma = AUTODMA, 568 .autodma = AUTODMA,
608 .bootable = OFF_BOARD, 569 .bootable = OFF_BOARD,
609 .extra = 48, 570 .extra = 48,
571 .udma_mask = 0x1f, /* udma0-4 */
610 },{ /* 3 */ 572 },{ /* 3 */
611 .name = "PDC20265", 573 .name = "PDC20265",
612 .init_setup = init_setup_pdc20265, 574 .init_setup = init_setup_pdc20265,
@@ -617,6 +579,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
617 .autodma = AUTODMA, 579 .autodma = AUTODMA,
618 .bootable = OFF_BOARD, 580 .bootable = OFF_BOARD,
619 .extra = 48, 581 .extra = 48,
582 .udma_mask = 0x3f, /* udma0-5 */
620 },{ /* 4 */ 583 },{ /* 4 */
621 .name = "PDC20267", 584 .name = "PDC20267",
622 .init_setup = init_setup_pdc202xx, 585 .init_setup = init_setup_pdc202xx,
@@ -627,6 +590,7 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
627 .autodma = AUTODMA, 590 .autodma = AUTODMA,
628 .bootable = OFF_BOARD, 591 .bootable = OFF_BOARD,
629 .extra = 48, 592 .extra = 48,
593 .udma_mask = 0x3f, /* udma0-5 */
630 } 594 }
631}; 595};
632 596
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 061d300ab8be..8b219dd63024 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -106,68 +106,6 @@
106static int no_piix_dma; 106static int no_piix_dma;
107 107
108/** 108/**
109 * piix_ratemask - compute rate mask for PIIX IDE
110 * @drive: IDE drive to compute for
111 *
112 * Returns the available modes for the PIIX IDE controller.
113 */
114
115static u8 piix_ratemask (ide_drive_t *drive)
116{
117 struct pci_dev *dev = HWIF(drive)->pci_dev;
118 u8 mode;
119
120 switch(dev->device) {
121 case PCI_DEVICE_ID_INTEL_82801EB_1:
122 mode = 3;
123 break;
124 /* UDMA 100 capable */
125 case PCI_DEVICE_ID_INTEL_82801BA_8:
126 case PCI_DEVICE_ID_INTEL_82801BA_9:
127 case PCI_DEVICE_ID_INTEL_82801CA_10:
128 case PCI_DEVICE_ID_INTEL_82801CA_11:
129 case PCI_DEVICE_ID_INTEL_82801E_11:
130 case PCI_DEVICE_ID_INTEL_82801DB_1:
131 case PCI_DEVICE_ID_INTEL_82801DB_10:
132 case PCI_DEVICE_ID_INTEL_82801DB_11:
133 case PCI_DEVICE_ID_INTEL_82801EB_11:
134 case PCI_DEVICE_ID_INTEL_ESB_2:
135 case PCI_DEVICE_ID_INTEL_ICH6_19:
136 case PCI_DEVICE_ID_INTEL_ICH7_21:
137 case PCI_DEVICE_ID_INTEL_ESB2_18:
138 case PCI_DEVICE_ID_INTEL_ICH8_6:
139 mode = 3;
140 break;
141 /* UDMA 66 capable */
142 case PCI_DEVICE_ID_INTEL_82801AA_1:
143 case PCI_DEVICE_ID_INTEL_82372FB_1:
144 mode = 2;
145 break;
146 /* UDMA 33 capable */
147 case PCI_DEVICE_ID_INTEL_82371AB:
148 case PCI_DEVICE_ID_INTEL_82443MX_1:
149 case PCI_DEVICE_ID_INTEL_82451NX:
150 case PCI_DEVICE_ID_INTEL_82801AB_1:
151 return 1;
152 /* Non UDMA capable (MWDMA2) */
153 case PCI_DEVICE_ID_INTEL_82371SB_1:
154 case PCI_DEVICE_ID_INTEL_82371FB_1:
155 case PCI_DEVICE_ID_INTEL_82371FB_0:
156 case PCI_DEVICE_ID_INTEL_82371MX:
157 default:
158 return 0;
159 }
160
161 /*
162 * If we are UDMA66 capable fall back to UDMA33
163 * if the drive cannot see an 80pin cable.
164 */
165 if (!eighty_ninty_three(drive))
166 mode = min_t(u8, mode, 1);
167 return mode;
168}
169
170/**
171 * piix_dma_2_pio - return the PIO mode matching DMA 109 * piix_dma_2_pio - return the PIO mode matching DMA
172 * @xfer_rate: transfer speed 110 * @xfer_rate: transfer speed
173 * 111 *
@@ -301,7 +239,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
301 ide_hwif_t *hwif = HWIF(drive); 239 ide_hwif_t *hwif = HWIF(drive);
302 struct pci_dev *dev = hwif->pci_dev; 240 struct pci_dev *dev = hwif->pci_dev;
303 u8 maslave = hwif->channel ? 0x42 : 0x40; 241 u8 maslave = hwif->channel ? 0x42 : 0x40;
304 u8 speed = ide_rate_filter(piix_ratemask(drive), xferspeed); 242 u8 speed = ide_rate_filter(drive, xferspeed);
305 int a_speed = 3 << (drive->dn * 4); 243 int a_speed = 3 << (drive->dn * 4);
306 int u_flag = 1 << drive->dn; 244 int u_flag = 1 << drive->dn;
307 int v_flag = 0x01 << drive->dn; 245 int v_flag = 0x01 << drive->dn;
@@ -366,30 +304,6 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
366} 304}
367 305
368/** 306/**
369 * piix_config_drive_for_dma - configure drive for DMA
370 * @drive: IDE drive to configure
371 *
372 * Set up a PIIX interface channel for the best available speed.
373 * We prefer UDMA if it is available and then MWDMA. If DMA is
374 * not available we switch to PIO and return 0.
375 */
376
377static int piix_config_drive_for_dma (ide_drive_t *drive)
378{
379 u8 speed = ide_dma_speed(drive, piix_ratemask(drive));
380
381 /*
382 * If no DMA speed was available or the chipset has DMA bugs
383 * then disable DMA and use PIO
384 */
385 if (!speed)
386 return 0;
387
388 (void) piix_tune_chipset(drive, speed);
389 return ide_dma_enable(drive);
390}
391
392/**
393 * piix_config_drive_xfer_rate - set up an IDE device 307 * piix_config_drive_xfer_rate - set up an IDE device
394 * @drive: IDE drive to configure 308 * @drive: IDE drive to configure
395 * 309 *
@@ -401,7 +315,7 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive)
401{ 315{
402 drive->init_speed = 0; 316 drive->init_speed = 0;
403 317
404 if (ide_use_dma(drive) && piix_config_drive_for_dma(drive)) 318 if (ide_tune_dma(drive))
405 return 0; 319 return 0;
406 320
407 if (ide_use_fast_pio(drive)) 321 if (ide_use_fast_pio(drive))
@@ -524,26 +438,14 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
524 hwif->ide_dma_clear_irq = &piix_dma_clear_irq; 438 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
525 439
526 hwif->atapi_dma = 1; 440 hwif->atapi_dma = 1;
527 hwif->ultra_mask = 0x3f; 441
442 hwif->ultra_mask = hwif->cds->udma_mask;
528 hwif->mwdma_mask = 0x06; 443 hwif->mwdma_mask = 0x06;
529 hwif->swdma_mask = 0x04; 444 hwif->swdma_mask = 0x04;
530 445
531 switch(hwif->pci_dev->device) { 446 if (hwif->ultra_mask & 0x78) {
532 case PCI_DEVICE_ID_INTEL_82371FB_0: 447 if (!hwif->udma_four)
533 case PCI_DEVICE_ID_INTEL_82371FB_1: 448 hwif->udma_four = piix_cable_detect(hwif);
534 case PCI_DEVICE_ID_INTEL_82371SB_1:
535 hwif->ultra_mask = 0x80;
536 break;
537 case PCI_DEVICE_ID_INTEL_82371AB:
538 case PCI_DEVICE_ID_INTEL_82443MX_1:
539 case PCI_DEVICE_ID_INTEL_82451NX:
540 case PCI_DEVICE_ID_INTEL_82801AB_1:
541 hwif->ultra_mask = 0x07;
542 break;
543 default:
544 if (!hwif->udma_four)
545 hwif->udma_four = piix_cable_detect(hwif);
546 break;
547 } 449 }
548 450
549 if (no_piix_dma) 451 if (no_piix_dma)
@@ -557,7 +459,7 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
557 hwif->drives[0].autodma = hwif->autodma; 459 hwif->drives[0].autodma = hwif->autodma;
558} 460}
559 461
560#define DECLARE_PIIX_DEV(name_str) \ 462#define DECLARE_PIIX_DEV(name_str, udma) \
561 { \ 463 { \
562 .name = name_str, \ 464 .name = name_str, \
563 .init_chipset = init_chipset_piix, \ 465 .init_chipset = init_chipset_piix, \
@@ -566,11 +468,12 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
566 .autodma = AUTODMA, \ 468 .autodma = AUTODMA, \
567 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 469 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
568 .bootable = ON_BOARD, \ 470 .bootable = ON_BOARD, \
471 .udma_mask = udma, \
569 } 472 }
570 473
571static ide_pci_device_t piix_pci_info[] __devinitdata = { 474static ide_pci_device_t piix_pci_info[] __devinitdata = {
572 /* 0 */ DECLARE_PIIX_DEV("PIIXa"), 475 /* 0 */ DECLARE_PIIX_DEV("PIIXa", 0x00), /* no udma */
573 /* 1 */ DECLARE_PIIX_DEV("PIIXb"), 476 /* 1 */ DECLARE_PIIX_DEV("PIIXb", 0x00), /* no udma */
574 477
575 /* 2 */ 478 /* 2 */
576 { /* 479 { /*
@@ -587,28 +490,28 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
587 .flags = IDEPCI_FLAG_ISA_PORTS 490 .flags = IDEPCI_FLAG_ISA_PORTS
588 }, 491 },
589 492
590 /* 3 */ DECLARE_PIIX_DEV("PIIX3"), 493 /* 3 */ DECLARE_PIIX_DEV("PIIX3", 0x00), /* no udma */
591 /* 4 */ DECLARE_PIIX_DEV("PIIX4"), 494 /* 4 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */
592 /* 5 */ DECLARE_PIIX_DEV("ICH0"), 495 /* 5 */ DECLARE_PIIX_DEV("ICH0", 0x07), /* udma0-2 */
593 /* 6 */ DECLARE_PIIX_DEV("PIIX4"), 496 /* 6 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */
594 /* 7 */ DECLARE_PIIX_DEV("ICH"), 497 /* 7 */ DECLARE_PIIX_DEV("ICH", 0x1f), /* udma0-4 */
595 /* 8 */ DECLARE_PIIX_DEV("PIIX4"), 498 /* 8 */ DECLARE_PIIX_DEV("PIIX4", 0x1f), /* udma0-4 */
596 /* 9 */ DECLARE_PIIX_DEV("PIIX4"), 499 /* 9 */ DECLARE_PIIX_DEV("PIIX4", 0x07), /* udma0-2 */
597 /* 10 */ DECLARE_PIIX_DEV("ICH2"), 500 /* 10 */ DECLARE_PIIX_DEV("ICH2", 0x3f), /* udma0-5 */
598 /* 11 */ DECLARE_PIIX_DEV("ICH2M"), 501 /* 11 */ DECLARE_PIIX_DEV("ICH2M", 0x3f), /* udma0-5 */
599 /* 12 */ DECLARE_PIIX_DEV("ICH3M"), 502 /* 12 */ DECLARE_PIIX_DEV("ICH3M", 0x3f), /* udma0-5 */
600 /* 13 */ DECLARE_PIIX_DEV("ICH3"), 503 /* 13 */ DECLARE_PIIX_DEV("ICH3", 0x3f), /* udma0-5 */
601 /* 14 */ DECLARE_PIIX_DEV("ICH4"), 504 /* 14 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */
602 /* 15 */ DECLARE_PIIX_DEV("ICH5"), 505 /* 15 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */
603 /* 16 */ DECLARE_PIIX_DEV("C-ICH"), 506 /* 16 */ DECLARE_PIIX_DEV("C-ICH", 0x3f), /* udma0-5 */
604 /* 17 */ DECLARE_PIIX_DEV("ICH4"), 507 /* 17 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */
605 /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"), 508 /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA", 0x3f), /* udma0-5 */
606 /* 19 */ DECLARE_PIIX_DEV("ICH5"), 509 /* 19 */ DECLARE_PIIX_DEV("ICH5", 0x3f), /* udma0-5 */
607 /* 20 */ DECLARE_PIIX_DEV("ICH6"), 510 /* 20 */ DECLARE_PIIX_DEV("ICH6", 0x3f), /* udma0-5 */
608 /* 21 */ DECLARE_PIIX_DEV("ICH7"), 511 /* 21 */ DECLARE_PIIX_DEV("ICH7", 0x3f), /* udma0-5 */
609 /* 22 */ DECLARE_PIIX_DEV("ICH4"), 512 /* 22 */ DECLARE_PIIX_DEV("ICH4", 0x3f), /* udma0-5 */
610 /* 23 */ DECLARE_PIIX_DEV("ESB2"), 513 /* 23 */ DECLARE_PIIX_DEV("ESB2", 0x3f), /* udma0-5 */
611 /* 24 */ DECLARE_PIIX_DEV("ICH8M"), 514 /* 24 */ DECLARE_PIIX_DEV("ICH8M", 0x3f), /* udma0-5 */
612}; 515};
613 516
614/** 517/**
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index f84bf791f72e..cbf936325355 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -190,23 +190,6 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
190} 190}
191 191
192/** 192/**
193 * scc_ratemask - Compute available modes
194 * @drive: IDE drive
195 *
196 * Compute the available speeds for the devices on the interface.
197 * Enforce UDMA33 as a limit if there is no 80pin cable present.
198 */
199
200static u8 scc_ratemask(ide_drive_t *drive)
201{
202 u8 mode = 4;
203
204 if (!eighty_ninty_three(drive))
205 mode = min(mode, (u8)1);
206 return mode;
207}
208
209/**
210 * scc_tuneproc - tune a drive PIO mode 193 * scc_tuneproc - tune a drive PIO mode
211 * @drive: drive to tune 194 * @drive: drive to tune
212 * @mode_wanted: the target operating mode 195 * @mode_wanted: the target operating mode
@@ -273,7 +256,7 @@ static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
273static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) 256static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
274{ 257{
275 ide_hwif_t *hwif = HWIF(drive); 258 ide_hwif_t *hwif = HWIF(drive);
276 u8 speed = ide_rate_filter(scc_ratemask(drive), xferspeed); 259 u8 speed = ide_rate_filter(drive, xferspeed);
277 struct scc_ports *ports = ide_get_hwifdata(hwif); 260 struct scc_ports *ports = ide_get_hwifdata(hwif);
278 unsigned long ctl_base = ports->ctl; 261 unsigned long ctl_base = ports->ctl;
279 unsigned long cckctrl_port = ctl_base + 0xff0; 262 unsigned long cckctrl_port = ctl_base + 0xff0;
@@ -347,7 +330,7 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
347 330
348static int scc_config_chipset_for_dma(ide_drive_t *drive) 331static int scc_config_chipset_for_dma(ide_drive_t *drive)
349{ 332{
350 u8 speed = ide_dma_speed(drive, scc_ratemask(drive)); 333 u8 speed = ide_max_dma_mode(drive);
351 334
352 if (!speed) 335 if (!speed)
353 return 0; 336 return 0;
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index dbcd37a0c652..2fa6d92d16cc 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -65,16 +65,16 @@ static int check_in_drive_lists (ide_drive_t *drive, const char **list)
65 return 0; 65 return 0;
66} 66}
67 67
68static u8 svwks_ratemask (ide_drive_t *drive) 68static u8 svwks_udma_filter(ide_drive_t *drive)
69{ 69{
70 struct pci_dev *dev = HWIF(drive)->pci_dev; 70 struct pci_dev *dev = HWIF(drive)->pci_dev;
71 u8 mode = 0; 71 u8 mask = 0;
72 72
73 if (!svwks_revision) 73 if (!svwks_revision)
74 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); 74 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
75 75
76 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) 76 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
77 return 2; 77 return 0x1f;
78 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 78 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
79 u32 reg = 0; 79 u32 reg = 0;
80 if (isa_dev) 80 if (isa_dev)
@@ -86,25 +86,31 @@ static u8 svwks_ratemask (ide_drive_t *drive)
86 if(drive->media == ide_disk) 86 if(drive->media == ide_disk)
87 return 0; 87 return 0;
88 /* Check the OSB4 DMA33 enable bit */ 88 /* Check the OSB4 DMA33 enable bit */
89 return ((reg & 0x00004000) == 0x00004000) ? 1 : 0; 89 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
90 } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) { 90 } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) {
91 return 1; 91 return 0x07;
92 } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { 92 } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) {
93 u8 btr = 0; 93 u8 btr = 0, mode;
94 pci_read_config_byte(dev, 0x5A, &btr); 94 pci_read_config_byte(dev, 0x5A, &btr);
95 mode = btr & 0x3; 95 mode = btr & 0x3;
96 if (!eighty_ninty_three(drive)) 96
97 mode = min(mode, (u8)1);
98 /* If someone decides to do UDMA133 on CSB5 the same 97 /* If someone decides to do UDMA133 on CSB5 the same
99 issue will bite so be inclusive */ 98 issue will bite so be inclusive */
100 if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100)) 99 if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
101 mode = 2; 100 mode = 2;
101
102 switch(mode) {
103 case 2: mask = 0x1f; break;
104 case 1: mask = 0x07; break;
105 default: mask = 0x00; break;
106 }
102 } 107 }
103 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || 108 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
104 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) && 109 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
105 (!(PCI_FUNC(dev->devfn) & 1))) 110 (!(PCI_FUNC(dev->devfn) & 1)))
106 mode = 2; 111 mask = 0x1f;
107 return mode; 112
113 return mask;
108} 114}
109 115
110static u8 svwks_csb_check (struct pci_dev *dev) 116static u8 svwks_csb_check (struct pci_dev *dev)
@@ -141,7 +147,7 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
141 if (xferspeed == 255) /* PIO auto-tuning */ 147 if (xferspeed == 255) /* PIO auto-tuning */
142 speed = XFER_PIO_0 + pio; 148 speed = XFER_PIO_0 + pio;
143 else 149 else
144 speed = ide_rate_filter(svwks_ratemask(drive), xferspeed); 150 speed = ide_rate_filter(drive, xferspeed);
145 151
146 /* If we are about to put a disk into UDMA mode we screwed up. 152 /* If we are about to put a disk into UDMA mode we screwed up.
147 Our code assumes we never _ever_ do this on an OSB4 */ 153 Our code assumes we never _ever_ do this on an OSB4 */
@@ -304,7 +310,7 @@ static void svwks_tune_drive (ide_drive_t *drive, u8 pio)
304 310
305static int config_chipset_for_dma (ide_drive_t *drive) 311static int config_chipset_for_dma (ide_drive_t *drive)
306{ 312{
307 u8 speed = ide_dma_speed(drive, svwks_ratemask(drive)); 313 u8 speed = ide_max_dma_mode(drive);
308 314
309 if (!(speed)) 315 if (!(speed))
310 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL); 316 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
@@ -500,6 +506,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
500 506
501 hwif->tuneproc = &svwks_tune_drive; 507 hwif->tuneproc = &svwks_tune_drive;
502 hwif->speedproc = &svwks_tune_chipset; 508 hwif->speedproc = &svwks_tune_chipset;
509 hwif->udma_filter = &svwks_udma_filter;
503 510
504 hwif->atapi_dma = 1; 511 hwif->atapi_dma = 1;
505 512
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index fd09b295a69d..d3185e29a38e 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -692,7 +692,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
692 return -EIO; 692 return -EIO;
693 693
694 /* Create /proc/ide entries */ 694 /* Create /proc/ide entries */
695 create_proc_ide_interfaces(); 695 ide_proc_register_port(hwif);
696 696
697 return 0; 697 return 0;
698} 698}
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index c0188de3cc66..d09e74c2996e 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -122,45 +122,41 @@ static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
122} 122}
123 123
124/** 124/**
125 * siimage_ratemask - Compute available modes 125 * sil_udma_filter - compute UDMA mask
126 * @drive: IDE drive 126 * @drive: IDE device
127 *
128 * Compute the available UDMA speeds for the device on the interface.
127 * 129 *
128 * Compute the available speeds for the devices on the interface.
129 * For the CMD680 this depends on the clocking mode (scsc), for the 130 * For the CMD680 this depends on the clocking mode (scsc), for the
130 * SI3312 SATA controller life is a bit simpler. Enforce UDMA33 131 * SI3112 SATA controller life is a bit simpler.
131 * as a limit if there is no 80pin cable present.
132 */ 132 */
133 133
134static byte siimage_ratemask (ide_drive_t *drive) 134static u8 sil_udma_filter(ide_drive_t *drive)
135{ 135{
136 ide_hwif_t *hwif = HWIF(drive); 136 ide_hwif_t *hwif = drive->hwif;
137 u8 mode = 0, scsc = 0;
138 unsigned long base = (unsigned long) hwif->hwif_data; 137 unsigned long base = (unsigned long) hwif->hwif_data;
138 u8 mask = 0, scsc = 0;
139 139
140 if (hwif->mmio) 140 if (hwif->mmio)
141 scsc = hwif->INB(base + 0x4A); 141 scsc = hwif->INB(base + 0x4A);
142 else 142 else
143 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc); 143 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
144 144
145 if(is_sata(hwif)) 145 if (is_sata(hwif)) {
146 { 146 mask = strstr(drive->id->model, "Maxtor") ? 0x3f : 0x7f;
147 if(strstr(drive->id->model, "Maxtor")) 147 goto out;
148 return 3;
149 return 4;
150 } 148 }
151 149
152 if ((scsc & 0x30) == 0x10) /* 133 */ 150 if ((scsc & 0x30) == 0x10) /* 133 */
153 mode = 4; 151 mask = 0x7f;
154 else if ((scsc & 0x30) == 0x20) /* 2xPCI */ 152 else if ((scsc & 0x30) == 0x20) /* 2xPCI */
155 mode = 4; 153 mask = 0x7f;
156 else if ((scsc & 0x30) == 0x00) /* 100 */ 154 else if ((scsc & 0x30) == 0x00) /* 100 */
157 mode = 3; 155 mask = 0x3f;
158 else /* Disabled ? */ 156 else /* Disabled ? */
159 BUG(); 157 BUG();
160 158out:
161 if (!eighty_ninty_three(drive)) 159 return mask;
162 mode = min(mode, (u8)1);
163 return mode;
164} 160}
165 161
166/** 162/**
@@ -306,7 +302,7 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
306 ide_hwif_t *hwif = HWIF(drive); 302 ide_hwif_t *hwif = HWIF(drive);
307 u16 ultra = 0, multi = 0; 303 u16 ultra = 0, multi = 0;
308 u8 mode = 0, unit = drive->select.b.unit; 304 u8 mode = 0, unit = drive->select.b.unit;
309 u8 speed = ide_rate_filter(siimage_ratemask(drive), xferspeed); 305 u8 speed = ide_rate_filter(drive, xferspeed);
310 unsigned long base = (unsigned long)hwif->hwif_data; 306 unsigned long base = (unsigned long)hwif->hwif_data;
311 u8 scsc = 0, addr_mask = ((hwif->channel) ? 307 u8 scsc = 0, addr_mask = ((hwif->channel) ?
312 ((hwif->mmio) ? 0xF4 : 0x84) : 308 ((hwif->mmio) ? 0xF4 : 0x84) :
@@ -389,7 +385,7 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
389 385
390static int config_chipset_for_dma (ide_drive_t *drive) 386static int config_chipset_for_dma (ide_drive_t *drive)
391{ 387{
392 u8 speed = ide_dma_speed(drive, siimage_ratemask(drive)); 388 u8 speed = ide_max_dma_mode(drive);
393 389
394 if (!speed) 390 if (!speed)
395 return 0; 391 return 0;
@@ -831,7 +827,7 @@ static void __devinit init_mmio_iops_siimage(ide_hwif_t *hwif)
831 827
832 /* 828 /*
833 * Now set up the hw. We have to do this ourselves as 829 * Now set up the hw. We have to do this ourselves as
834 * the MMIO layout isnt the same as the the standard port 830 * the MMIO layout isnt the same as the standard port
835 * based I/O 831 * based I/O
836 */ 832 */
837 833
@@ -989,6 +985,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
989 hwif->tuneproc = &siimage_tuneproc; 985 hwif->tuneproc = &siimage_tuneproc;
990 hwif->reset_poll = &siimage_reset_poll; 986 hwif->reset_poll = &siimage_reset_poll;
991 hwif->pre_reset = &siimage_pre_reset; 987 hwif->pre_reset = &siimage_pre_reset;
988 hwif->udma_filter = &sil_udma_filter;
992 989
993 if(is_sata(hwif)) { 990 if(is_sata(hwif)) {
994 static int first = 1; 991 static int first = 1;
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 2ba0669f36a1..2bde1b92784a 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -191,7 +191,7 @@ static char* chipset_capability[] = {
191 "ATA 133 (1st gen)", "ATA 133 (2nd gen)" 191 "ATA 133 (1st gen)", "ATA 133 (2nd gen)"
192}; 192};
193 193
194#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) 194#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
195#include <linux/stat.h> 195#include <linux/stat.h>
196#include <linux/proc_fs.h> 196#include <linux/proc_fs.h>
197 197
@@ -426,17 +426,7 @@ static int sis_get_info (char *buffer, char **addr, off_t offset, int count)
426 426
427 return len > count ? count : len; 427 return len > count ? count : len;
428} 428}
429#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) */ 429#endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
430
431static u8 sis5513_ratemask (ide_drive_t *drive)
432{
433 u8 rates[] = { 0, 0, 1, 2, 3, 3, 4, 4 };
434 u8 mode = rates[chipset_family];
435
436 if (!eighty_ninty_three(drive))
437 mode = min(mode, (u8)1);
438 return mode;
439}
440 430
441/* 431/*
442 * Configuration functions 432 * Configuration functions
@@ -563,7 +553,7 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
563 u8 drive_pci, reg, speed; 553 u8 drive_pci, reg, speed;
564 u32 regdw; 554 u32 regdw;
565 555
566 speed = ide_rate_filter(sis5513_ratemask(drive), xferspeed); 556 speed = ide_rate_filter(drive, xferspeed);
567 557
568 /* See config_art_rwp_pio for drive pci config registers */ 558 /* See config_art_rwp_pio for drive pci config registers */
569 drive_pci = 0x40; 559 drive_pci = 0x40;
@@ -648,32 +638,13 @@ static void sis5513_tune_drive (ide_drive_t *drive, u8 pio)
648 (void) config_chipset_for_pio(drive, pio); 638 (void) config_chipset_for_pio(drive, pio);
649} 639}
650 640
651/*
652 * ((id->hw_config & 0x4000|0x2000) && (HWIF(drive)->udma_four))
653 */
654static int config_chipset_for_dma (ide_drive_t *drive)
655{
656 u8 speed = ide_dma_speed(drive, sis5513_ratemask(drive));
657
658#ifdef DEBUG
659 printk("SIS5513: config_chipset_for_dma, drive %d, ultra %x\n",
660 drive->dn, drive->id->dma_ultra);
661#endif
662
663 if (!(speed))
664 return 0;
665
666 sis5513_tune_chipset(drive, speed);
667 return ide_dma_enable(drive);
668}
669
670static int sis5513_config_xfer_rate(ide_drive_t *drive) 641static int sis5513_config_xfer_rate(ide_drive_t *drive)
671{ 642{
672 config_art_rwp_pio(drive, 5); 643 config_art_rwp_pio(drive, 5);
673 644
674 drive->init_speed = 0; 645 drive->init_speed = 0;
675 646
676 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 647 if (ide_tune_dma(drive))
677 return 0; 648 return 0;
678 649
679 if (ide_use_fast_pio(drive)) 650 if (ide_use_fast_pio(drive))
@@ -826,7 +797,7 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c
826 break; 797 break;
827 } 798 }
828 799
829#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) 800#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
830 if (!sis_proc) { 801 if (!sis_proc) {
831 sis_proc = 1; 802 sis_proc = 1;
832 bmide_dev = dev; 803 bmide_dev = dev;
@@ -858,6 +829,8 @@ static unsigned int __devinit ata66_sis5513 (ide_hwif_t *hwif)
858 829
859static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) 830static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
860{ 831{
832 u8 udma_rates[] = { 0x00, 0x00, 0x07, 0x1f, 0x3f, 0x3f, 0x7f, 0x7f };
833
861 hwif->autodma = 0; 834 hwif->autodma = 0;
862 835
863 if (!hwif->irq) 836 if (!hwif->irq)
@@ -873,7 +846,8 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
873 } 846 }
874 847
875 hwif->atapi_dma = 1; 848 hwif->atapi_dma = 1;
876 hwif->ultra_mask = 0x7f; 849
850 hwif->ultra_mask = udma_rates[chipset_family];
877 hwif->mwdma_mask = 0x07; 851 hwif->mwdma_mask = 0x07;
878 hwif->swdma_mask = 0x07; 852 hwif->swdma_mask = 0x07;
879 853
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 852ccb36da1d..c40f291f91e0 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -21,15 +21,6 @@
21 21
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24static u8 slc90e66_ratemask (ide_drive_t *drive)
25{
26 u8 mode = 2;
27
28 if (!eighty_ninty_three(drive))
29 mode = min_t(u8, mode, 1);
30 return mode;
31}
32
33static u8 slc90e66_dma_2_pio (u8 xfer_rate) { 24static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
34 switch(xfer_rate) { 25 switch(xfer_rate) {
35 case XFER_UDMA_4: 26 case XFER_UDMA_4:
@@ -122,7 +113,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
122 ide_hwif_t *hwif = HWIF(drive); 113 ide_hwif_t *hwif = HWIF(drive);
123 struct pci_dev *dev = hwif->pci_dev; 114 struct pci_dev *dev = hwif->pci_dev;
124 u8 maslave = hwif->channel ? 0x42 : 0x40; 115 u8 maslave = hwif->channel ? 0x42 : 0x40;
125 u8 speed = ide_rate_filter(slc90e66_ratemask(drive), xferspeed); 116 u8 speed = ide_rate_filter(drive, xferspeed);
126 int sitre = 0, a_speed = 7 << (drive->dn * 4); 117 int sitre = 0, a_speed = 7 << (drive->dn * 4);
127 int u_speed = 0, u_flag = 1 << drive->dn; 118 int u_speed = 0, u_flag = 1 << drive->dn;
128 u16 reg4042, reg44, reg48, reg4a; 119 u16 reg4042, reg44, reg48, reg4a;
@@ -169,22 +160,11 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
169 return ide_config_drive_speed(drive, speed); 160 return ide_config_drive_speed(drive, speed);
170} 161}
171 162
172static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
173{
174 u8 speed = ide_dma_speed(drive, slc90e66_ratemask(drive));
175
176 if (!speed)
177 return 0;
178
179 (void) slc90e66_tune_chipset(drive, speed);
180 return ide_dma_enable(drive);
181}
182
183static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive) 163static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
184{ 164{
185 drive->init_speed = 0; 165 drive->init_speed = 0;
186 166
187 if (ide_use_dma(drive) && slc90e66_config_drive_for_dma(drive)) 167 if (ide_tune_dma(drive))
188 return 0; 168 return 0;
189 169
190 if (ide_use_fast_pio(drive)) 170 if (ide_use_fast_pio(drive))
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 0b6d81d6ce48..cee619bb2eaf 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -13,18 +13,13 @@
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/ide.h> 14#include <linux/ide.h>
15 15
16static inline u8 tc86c001_ratemask(ide_drive_t *drive)
17{
18 return eighty_ninty_three(drive) ? 2 : 1;
19}
20
21static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed) 16static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
22{ 17{
23 ide_hwif_t *hwif = HWIF(drive); 18 ide_hwif_t *hwif = HWIF(drive);
24 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); 19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
25 u16 mode, scr = hwif->INW(scr_port); 20 u16 mode, scr = hwif->INW(scr_port);
26 21
27 speed = ide_rate_filter(tc86c001_ratemask(drive), speed); 22 speed = ide_rate_filter(drive, speed);
28 23
29 switch (speed) { 24 switch (speed) {
30 case XFER_UDMA_4: mode = 0x00c0; break; 25 case XFER_UDMA_4: mode = 0x00c0; break;
@@ -172,20 +167,9 @@ static int tc86c001_busproc(ide_drive_t *drive, int state)
172 return 0; 167 return 0;
173} 168}
174 169
175static int config_chipset_for_dma(ide_drive_t *drive)
176{
177 u8 speed = ide_dma_speed(drive, tc86c001_ratemask(drive));
178
179 if (!speed)
180 return 0;
181
182 (void) tc86c001_tune_chipset(drive, speed);
183 return ide_dma_enable(drive);
184}
185
186static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive) 170static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
187{ 171{
188 if (ide_use_dma(drive) && config_chipset_for_dma(drive)) 172 if (ide_tune_dma(drive))
189 return 0; 173 return 0;
190 174
191 if (ide_use_fast_pio(drive)) 175 if (ide_use_fast_pio(drive))
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 5e06179c3469..35e8c612638f 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -48,7 +48,7 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed)
48 u16 timing = 0; 48 u16 timing = 0;
49 u32 triflex_timings = 0; 49 u32 triflex_timings = 0;
50 u8 unit = (drive->select.b.unit & 0x01); 50 u8 unit = (drive->select.b.unit & 0x01);
51 u8 speed = ide_rate_filter(0, xferspeed); 51 u8 speed = ide_rate_filter(drive, xferspeed);
52 52
53 pci_read_config_dword(dev, channel_offset, &triflex_timings); 53 pci_read_config_dword(dev, channel_offset, &triflex_timings);
54 54
@@ -100,20 +100,9 @@ static void triflex_tune_drive(ide_drive_t *drive, u8 pio)
100 (void) triflex_tune_chipset(drive, (XFER_PIO_0 + use_pio)); 100 (void) triflex_tune_chipset(drive, (XFER_PIO_0 + use_pio));
101} 101}
102 102
103static int triflex_config_drive_for_dma(ide_drive_t *drive)
104{
105 int speed = ide_dma_speed(drive, 0); /* No ultra speeds */
106
107 if (!speed)
108 return 0;
109
110 (void) triflex_tune_chipset(drive, speed);
111 return ide_dma_enable(drive);
112}
113
114static int triflex_config_drive_xfer_rate(ide_drive_t *drive) 103static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
115{ 104{
116 if (ide_use_dma(drive) && triflex_config_drive_for_dma(drive)) 105 if (ide_tune_dma(drive))
117 return 0; 106 return 0;
118 107
119 triflex_tune_drive(drive, 255); 108 triflex_tune_drive(drive, 255);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 05:43:34 -0500