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-rw-r--r--drivers/ide/pci/aec62xx.c34
-rw-r--r--drivers/ide/pci/alim15x3.c89
-rw-r--r--drivers/ide/pci/amd74xx.c13
-rw-r--r--drivers/ide/pci/atiixp.c24
-rw-r--r--drivers/ide/pci/cmd640.c45
-rw-r--r--drivers/ide/pci/cmd64x.c138
-rw-r--r--drivers/ide/pci/cs5520.c26
-rw-r--r--drivers/ide/pci/cs5530.c15
-rw-r--r--drivers/ide/pci/cs5535.c22
-rw-r--r--drivers/ide/pci/cy82c693.c16
-rw-r--r--drivers/ide/pci/delkin_cb.c7
-rw-r--r--drivers/ide/pci/hpt34x.c15
-rw-r--r--drivers/ide/pci/hpt366.c128
-rw-r--r--drivers/ide/pci/it8213.c22
-rw-r--r--drivers/ide/pci/it821x.c27
-rw-r--r--drivers/ide/pci/jmicron.c25
-rw-r--r--drivers/ide/pci/ns87415.c25
-rw-r--r--drivers/ide/pci/opti621.c16
-rw-r--r--drivers/ide/pci/pdc202xx_new.c23
-rw-r--r--drivers/ide/pci/pdc202xx_old.c126
-rw-r--r--drivers/ide/pci/piix.c13
-rw-r--r--drivers/ide/pci/sc1200.c36
-rw-r--r--drivers/ide/pci/scc_pata.c67
-rw-r--r--drivers/ide/pci/serverworks.c33
-rw-r--r--drivers/ide/pci/sgiioc4.c103
-rw-r--r--drivers/ide/pci/siimage.c114
-rw-r--r--drivers/ide/pci/sis5513.c30
-rw-r--r--drivers/ide/pci/sl82c105.c80
-rw-r--r--drivers/ide/pci/slc90e66.c14
-rw-r--r--drivers/ide/pci/tc86c001.c26
-rw-r--r--drivers/ide/pci/triflex.c11
-rw-r--r--drivers/ide/pci/trm290.c44
-rw-r--r--drivers/ide/pci/via82cxxx.c14
33 files changed, 743 insertions, 678 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index c9ba15afe97d..ca16f37f9486 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -135,7 +135,7 @@ static void aec6260_set_mode(ide_drive_t *drive, const u8 speed)
135 135
136static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio) 136static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
137{ 137{
138 drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0); 138 drive->hwif->port_ops->set_dma_mode(drive, pio + XFER_PIO_0);
139} 139}
140 140
141static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) 141static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
@@ -175,27 +175,23 @@ static u8 __devinit atp86x_cable_detect(ide_hwif_t *hwif)
175 return (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 175 return (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
176} 176}
177 177
178static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) 178static const struct ide_port_ops atp850_port_ops = {
179{ 179 .set_pio_mode = aec_set_pio_mode,
180 struct pci_dev *dev = to_pci_dev(hwif->dev); 180 .set_dma_mode = aec6210_set_mode,
181 181};
182 hwif->set_pio_mode = &aec_set_pio_mode;
183
184 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF)
185 hwif->set_dma_mode = &aec6210_set_mode;
186 else {
187 hwif->set_dma_mode = &aec6260_set_mode;
188 182
189 hwif->cable_detect = atp86x_cable_detect; 183static const struct ide_port_ops atp86x_port_ops = {
190 } 184 .set_pio_mode = aec_set_pio_mode,
191} 185 .set_dma_mode = aec6260_set_mode,
186 .cable_detect = atp86x_cable_detect,
187};
192 188
193static const struct ide_port_info aec62xx_chipsets[] __devinitdata = { 189static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
194 { /* 0 */ 190 { /* 0 */
195 .name = "AEC6210", 191 .name = "AEC6210",
196 .init_chipset = init_chipset_aec62xx, 192 .init_chipset = init_chipset_aec62xx,
197 .init_hwif = init_hwif_aec62xx,
198 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 193 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
194 .port_ops = &atp850_port_ops,
199 .host_flags = IDE_HFLAG_SERIALIZE | 195 .host_flags = IDE_HFLAG_SERIALIZE |
200 IDE_HFLAG_NO_ATAPI_DMA | 196 IDE_HFLAG_NO_ATAPI_DMA |
201 IDE_HFLAG_NO_DSC | 197 IDE_HFLAG_NO_DSC |
@@ -207,7 +203,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
207 },{ /* 1 */ 203 },{ /* 1 */
208 .name = "AEC6260", 204 .name = "AEC6260",
209 .init_chipset = init_chipset_aec62xx, 205 .init_chipset = init_chipset_aec62xx,
210 .init_hwif = init_hwif_aec62xx, 206 .port_ops = &atp86x_port_ops,
211 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA | 207 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | IDE_HFLAG_NO_AUTODMA |
212 IDE_HFLAG_ABUSE_SET_DMA_MODE | 208 IDE_HFLAG_ABUSE_SET_DMA_MODE |
213 IDE_HFLAG_OFF_BOARD, 209 IDE_HFLAG_OFF_BOARD,
@@ -217,8 +213,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
217 },{ /* 2 */ 213 },{ /* 2 */
218 .name = "AEC6260R", 214 .name = "AEC6260R",
219 .init_chipset = init_chipset_aec62xx, 215 .init_chipset = init_chipset_aec62xx,
220 .init_hwif = init_hwif_aec62xx,
221 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 216 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
217 .port_ops = &atp86x_port_ops,
222 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 218 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
223 IDE_HFLAG_ABUSE_SET_DMA_MODE | 219 IDE_HFLAG_ABUSE_SET_DMA_MODE |
224 IDE_HFLAG_NON_BOOTABLE, 220 IDE_HFLAG_NON_BOOTABLE,
@@ -228,7 +224,7 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
228 },{ /* 3 */ 224 },{ /* 3 */
229 .name = "AEC6280", 225 .name = "AEC6280",
230 .init_chipset = init_chipset_aec62xx, 226 .init_chipset = init_chipset_aec62xx,
231 .init_hwif = init_hwif_aec62xx, 227 .port_ops = &atp86x_port_ops,
232 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 228 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
233 IDE_HFLAG_ABUSE_SET_DMA_MODE | 229 IDE_HFLAG_ABUSE_SET_DMA_MODE |
234 IDE_HFLAG_OFF_BOARD, 230 IDE_HFLAG_OFF_BOARD,
@@ -238,8 +234,8 @@ static const struct ide_port_info aec62xx_chipsets[] __devinitdata = {
238 },{ /* 4 */ 234 },{ /* 4 */
239 .name = "AEC6280R", 235 .name = "AEC6280R",
240 .init_chipset = init_chipset_aec62xx, 236 .init_chipset = init_chipset_aec62xx,
241 .init_hwif = init_hwif_aec62xx,
242 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 237 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
238 .port_ops = &atp86x_port_ops,
243 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 239 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
244 IDE_HFLAG_ABUSE_SET_DMA_MODE | 240 IDE_HFLAG_ABUSE_SET_DMA_MODE |
245 IDE_HFLAG_OFF_BOARD, 241 IDE_HFLAG_OFF_BOARD,
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 3fa2d9f7b1b2..b5a3bc33e167 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -610,7 +610,7 @@ static int ali_cable_override(struct pci_dev *pdev)
610} 610}
611 611
612/** 612/**
613 * ata66_ali15x3 - check for UDMA 66 support 613 * ali_cable_detect - cable detection
614 * @hwif: IDE interface 614 * @hwif: IDE interface
615 * 615 *
616 * This checks if the controller and the cable are capable 616 * This checks if the controller and the cable are capable
@@ -620,7 +620,7 @@ static int ali_cable_override(struct pci_dev *pdev)
620 * FIXME: frobs bits that are not defined on newer ALi devicea 620 * FIXME: frobs bits that are not defined on newer ALi devicea
621 */ 621 */
622 622
623static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif) 623static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
624{ 624{
625 struct pci_dev *dev = to_pci_dev(hwif->dev); 625 struct pci_dev *dev = to_pci_dev(hwif->dev);
626 unsigned long flags; 626 unsigned long flags;
@@ -652,27 +652,7 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
652 return cbl; 652 return cbl;
653} 653}
654 654
655/** 655#ifndef CONFIG_SPARC64
656 * init_hwif_common_ali15x3 - Set up ALI IDE hardware
657 * @hwif: IDE interface
658 *
659 * Initialize the IDE structure side of the ALi 15x3 driver.
660 */
661
662static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
663{
664 hwif->set_pio_mode = &ali_set_pio_mode;
665 hwif->set_dma_mode = &ali_set_dma_mode;
666 hwif->udma_filter = &ali_udma_filter;
667
668 hwif->cable_detect = ata66_ali15x3;
669
670 if (hwif->dma_base == 0)
671 return;
672
673 hwif->dma_setup = &ali15x3_dma_setup;
674}
675
676/** 656/**
677 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff 657 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
678 * @hwif: interface to configure 658 * @hwif: interface to configure
@@ -722,34 +702,66 @@ static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
722 if(irq >= 0) 702 if(irq >= 0)
723 hwif->irq = irq; 703 hwif->irq = irq;
724 } 704 }
725
726 init_hwif_common_ali15x3(hwif);
727} 705}
706#endif
728 707
729/** 708/**
730 * init_dma_ali15x3 - set up DMA on ALi15x3 709 * init_dma_ali15x3 - set up DMA on ALi15x3
731 * @hwif: IDE interface 710 * @hwif: IDE interface
732 * @dmabase: DMA interface base PCI address 711 * @d: IDE port info
733 * 712 *
734 * Set up the DMA functionality on the ALi 15x3. For the ALi 713 * Set up the DMA functionality on the ALi 15x3.
735 * controllers this is generic so we can let the generic code do
736 * the actual work.
737 */ 714 */
738 715
739static void __devinit init_dma_ali15x3 (ide_hwif_t *hwif, unsigned long dmabase) 716static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
717 const struct ide_port_info *d)
740{ 718{
741 if (m5229_revision < 0x20) 719 struct pci_dev *dev = to_pci_dev(hwif->dev);
742 return; 720 unsigned long base = ide_pci_dma_base(hwif, d);
721
722 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
723 return -1;
724
743 if (!hwif->channel) 725 if (!hwif->channel)
744 outb(inb(dmabase + 2) & 0x60, dmabase + 2); 726 outb(inb(base + 2) & 0x60, base + 2);
745 ide_setup_dma(hwif, dmabase); 727
728 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
729 hwif->name, base, base + 7);
730
731 if (ide_allocate_dma_engine(hwif))
732 return -1;
733
734 ide_setup_dma(hwif, base);
735
736 return 0;
746} 737}
747 738
739static const struct ide_port_ops ali_port_ops = {
740 .set_pio_mode = ali_set_pio_mode,
741 .set_dma_mode = ali_set_dma_mode,
742 .udma_filter = ali_udma_filter,
743 .cable_detect = ali_cable_detect,
744};
745
746static const struct ide_dma_ops ali_dma_ops = {
747 .dma_host_set = ide_dma_host_set,
748 .dma_setup = ali15x3_dma_setup,
749 .dma_exec_cmd = ide_dma_exec_cmd,
750 .dma_start = ide_dma_start,
751 .dma_end = __ide_dma_end,
752 .dma_test_irq = ide_dma_test_irq,
753 .dma_lost_irq = ide_dma_lost_irq,
754 .dma_timeout = ide_dma_timeout,
755};
756
748static const struct ide_port_info ali15x3_chipset __devinitdata = { 757static const struct ide_port_info ali15x3_chipset __devinitdata = {
749 .name = "ALI15X3", 758 .name = "ALI15X3",
750 .init_chipset = init_chipset_ali15x3, 759 .init_chipset = init_chipset_ali15x3,
760#ifndef CONFIG_SPARC64
751 .init_hwif = init_hwif_ali15x3, 761 .init_hwif = init_hwif_ali15x3,
762#endif
752 .init_dma = init_dma_ali15x3, 763 .init_dma = init_dma_ali15x3,
764 .port_ops = &ali_port_ops,
753 .pio_mask = ATA_PIO5, 765 .pio_mask = ATA_PIO5,
754 .swdma_mask = ATA_SWDMA2, 766 .swdma_mask = ATA_SWDMA2,
755 .mwdma_mask = ATA_MWDMA2, 767 .mwdma_mask = ATA_MWDMA2,
@@ -792,14 +804,17 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev
792 d.udma_mask = ATA_UDMA5; 804 d.udma_mask = ATA_UDMA5;
793 else 805 else
794 d.udma_mask = ATA_UDMA6; 806 d.udma_mask = ATA_UDMA6;
807
808 d.dma_ops = &ali_dma_ops;
809 } else {
810 d.host_flags |= IDE_HFLAG_NO_DMA;
811
812 d.mwdma_mask = d.swdma_mask = 0;
795 } 813 }
796 814
797 if (idx == 0) 815 if (idx == 0)
798 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; 816 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
799 817
800#if defined(CONFIG_SPARC64)
801 d.init_hwif = init_hwif_common_ali15x3;
802#endif /* CONFIG_SPARC64 */
803 return ide_setup_pci_device(dev, &d); 818 return ide_setup_pci_device(dev, &d);
804} 819}
805 820
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index ff684d312378..f7c883808b02 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -210,13 +210,14 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
210 210
211 if (hwif->irq == 0) /* 0 is bogus but will do for now */ 211 if (hwif->irq == 0) /* 0 is bogus but will do for now */
212 hwif->irq = pci_get_legacy_ide_irq(dev, hwif->channel); 212 hwif->irq = pci_get_legacy_ide_irq(dev, hwif->channel);
213
214 hwif->set_pio_mode = &amd_set_pio_mode;
215 hwif->set_dma_mode = &amd_set_drive;
216
217 hwif->cable_detect = amd_cable_detect;
218} 213}
219 214
215static const struct ide_port_ops amd_port_ops = {
216 .set_pio_mode = amd_set_pio_mode,
217 .set_dma_mode = amd_set_drive,
218 .cable_detect = amd_cable_detect,
219};
220
220#define IDE_HFLAGS_AMD \ 221#define IDE_HFLAGS_AMD \
221 (IDE_HFLAG_PIO_NO_BLACKLIST | \ 222 (IDE_HFLAG_PIO_NO_BLACKLIST | \
222 IDE_HFLAG_ABUSE_SET_DMA_MODE | \ 223 IDE_HFLAG_ABUSE_SET_DMA_MODE | \
@@ -230,6 +231,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
230 .init_chipset = init_chipset_amd74xx, \ 231 .init_chipset = init_chipset_amd74xx, \
231 .init_hwif = init_hwif_amd74xx, \ 232 .init_hwif = init_hwif_amd74xx, \
232 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 233 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
234 .port_ops = &amd_port_ops, \
233 .host_flags = IDE_HFLAGS_AMD, \ 235 .host_flags = IDE_HFLAGS_AMD, \
234 .pio_mask = ATA_PIO5, \ 236 .pio_mask = ATA_PIO5, \
235 .swdma_mask = swdma, \ 237 .swdma_mask = swdma, \
@@ -243,6 +245,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
243 .init_chipset = init_chipset_amd74xx, \ 245 .init_chipset = init_chipset_amd74xx, \
244 .init_hwif = init_hwif_amd74xx, \ 246 .init_hwif = init_hwif_amd74xx, \
245 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 247 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
248 .port_ops = &amd_port_ops, \
246 .host_flags = IDE_HFLAGS_AMD, \ 249 .host_flags = IDE_HFLAGS_AMD, \
247 .pio_mask = ATA_PIO5, \ 250 .pio_mask = ATA_PIO5, \
248 .swdma_mask = ATA_SWDMA2, \ 251 .swdma_mask = ATA_SWDMA2, \
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 91722f88b7bd..8b637181681a 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -130,35 +130,25 @@ static u8 __devinit atiixp_cable_detect(ide_hwif_t *hwif)
130 return ATA_CBL_PATA40; 130 return ATA_CBL_PATA40;
131} 131}
132 132
133/** 133static const struct ide_port_ops atiixp_port_ops = {
134 * init_hwif_atiixp - fill in the hwif for the ATIIXP 134 .set_pio_mode = atiixp_set_pio_mode,
135 * @hwif: IDE interface 135 .set_dma_mode = atiixp_set_dma_mode,
136 * 136 .cable_detect = atiixp_cable_detect,
137 * Set up the ide_hwif_t for the ATIIXP interface according to the 137};
138 * capabilities of the hardware.
139 */
140
141static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
142{
143 hwif->set_pio_mode = &atiixp_set_pio_mode;
144 hwif->set_dma_mode = &atiixp_set_dma_mode;
145
146 hwif->cable_detect = atiixp_cable_detect;
147}
148 138
149static const struct ide_port_info atiixp_pci_info[] __devinitdata = { 139static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
150 { /* 0 */ 140 { /* 0 */
151 .name = "ATIIXP", 141 .name = "ATIIXP",
152 .init_hwif = init_hwif_atiixp,
153 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, 142 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
143 .port_ops = &atiixp_port_ops,
154 .host_flags = IDE_HFLAG_LEGACY_IRQS, 144 .host_flags = IDE_HFLAG_LEGACY_IRQS,
155 .pio_mask = ATA_PIO4, 145 .pio_mask = ATA_PIO4,
156 .mwdma_mask = ATA_MWDMA2, 146 .mwdma_mask = ATA_MWDMA2,
157 .udma_mask = ATA_UDMA5, 147 .udma_mask = ATA_UDMA5,
158 },{ /* 1 */ 148 },{ /* 1 */
159 .name = "SB600_PATA", 149 .name = "SB600_PATA",
160 .init_hwif = init_hwif_atiixp,
161 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, 150 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
151 .port_ops = &atiixp_port_ops,
162 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS, 152 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS,
163 .pio_mask = ATA_PIO4, 153 .pio_mask = ATA_PIO4,
164 .mwdma_mask = ATA_MWDMA2, 154 .mwdma_mask = ATA_MWDMA2,
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index b076dbfc43a7..25c2f1bd175f 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -109,6 +109,8 @@
109 109
110#include <asm/io.h> 110#include <asm/io.h>
111 111
112#define DRV_NAME "cmd640"
113
112/* 114/*
113 * This flag is set in ide.c by the parameter: ide0=cmd640_vlb 115 * This flag is set in ide.c by the parameter: ide0=cmd640_vlb
114 */ 116 */
@@ -633,6 +635,9 @@ static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
633 display_clocks(index); 635 display_clocks(index);
634} 636}
635 637
638static const struct ide_port_ops cmd640_port_ops = {
639 .set_pio_mode = cmd640_set_pio_mode,
640};
636#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 641#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
637 642
638static int pci_conf1(void) 643static int pci_conf1(void)
@@ -678,10 +683,29 @@ static const struct ide_port_info cmd640_port_info __initdata = {
678 IDE_HFLAG_ABUSE_PREFETCH | 683 IDE_HFLAG_ABUSE_PREFETCH |
679 IDE_HFLAG_ABUSE_FAST_DEVSEL, 684 IDE_HFLAG_ABUSE_FAST_DEVSEL,
680#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 685#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
686 .port_ops = &cmd640_port_ops,
681 .pio_mask = ATA_PIO5, 687 .pio_mask = ATA_PIO5,
682#endif 688#endif
683}; 689};
684 690
691static int cmd640x_init_one(unsigned long base, unsigned long ctl)
692{
693 if (!request_region(base, 8, DRV_NAME)) {
694 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
695 DRV_NAME, base, base + 7);
696 return -EBUSY;
697 }
698
699 if (!request_region(ctl, 1, DRV_NAME)) {
700 printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
701 DRV_NAME, ctl);
702 release_region(base, 8);
703 return -EBUSY;
704 }
705
706 return 0;
707}
708
685/* 709/*
686 * Probe for a cmd640 chipset, and initialize it if found. 710 * Probe for a cmd640 chipset, and initialize it if found.
687 */ 711 */
@@ -690,7 +714,7 @@ static int __init cmd640x_init(void)
690#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 714#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
691 int second_port_toggled = 0; 715 int second_port_toggled = 0;
692#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 716#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
693 int second_port_cmd640 = 0; 717 int second_port_cmd640 = 0, rc;
694 const char *bus_type, *port2; 718 const char *bus_type, *port2;
695 unsigned int index; 719 unsigned int index;
696 u8 b, cfr; 720 u8 b, cfr;
@@ -734,6 +758,17 @@ static int __init cmd640x_init(void)
734 return 0; 758 return 0;
735 } 759 }
736 760
761 rc = cmd640x_init_one(0x1f0, 0x3f6);
762 if (rc)
763 return rc;
764
765 rc = cmd640x_init_one(0x170, 0x376);
766 if (rc) {
767 release_region(0x3f6, 1);
768 release_region(0x1f0, 8);
769 return rc;
770 }
771
737 memset(&hw, 0, sizeof(hw)); 772 memset(&hw, 0, sizeof(hw));
738 773
739 ide_std_init_ports(&hw[0], 0x1f0, 0x3f6); 774 ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
@@ -752,10 +787,6 @@ static int __init cmd640x_init(void)
752 */ 787 */
753 if (cmd_hwif0) { 788 if (cmd_hwif0) {
754 ide_init_port_hw(cmd_hwif0, &hw[0]); 789 ide_init_port_hw(cmd_hwif0, &hw[0]);
755#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
756 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
757#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
758
759 idx[0] = cmd_hwif0->index; 790 idx[0] = cmd_hwif0->index;
760 } 791 }
761 792
@@ -808,10 +839,6 @@ static int __init cmd640x_init(void)
808 */ 839 */
809 if (second_port_cmd640 && cmd_hwif1) { 840 if (second_port_cmd640 && cmd_hwif1) {
810 ide_init_port_hw(cmd_hwif1, &hw[1]); 841 ide_init_port_hw(cmd_hwif1, &hw[1]);
811#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
812 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
813#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
814
815 idx[1] = cmd_hwif1->index; 842 idx[1] = cmd_hwif1->index;
816 } 843 }
817 printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n", 844 printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 8baccfef237f..006fb62656bc 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -223,7 +223,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
223 (void) pci_write_config_byte(dev, pciU, regU); 223 (void) pci_write_config_byte(dev, pciU, regU);
224} 224}
225 225
226static int cmd648_ide_dma_end (ide_drive_t *drive) 226static int cmd648_dma_end(ide_drive_t *drive)
227{ 227{
228 ide_hwif_t *hwif = HWIF(drive); 228 ide_hwif_t *hwif = HWIF(drive);
229 unsigned long base = hwif->dma_base - (hwif->channel * 8); 229 unsigned long base = hwif->dma_base - (hwif->channel * 8);
@@ -239,7 +239,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive)
239 return err; 239 return err;
240} 240}
241 241
242static int cmd64x_ide_dma_end (ide_drive_t *drive) 242static int cmd64x_dma_end(ide_drive_t *drive)
243{ 243{
244 ide_hwif_t *hwif = HWIF(drive); 244 ide_hwif_t *hwif = HWIF(drive);
245 struct pci_dev *dev = to_pci_dev(hwif->dev); 245 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -256,7 +256,7 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive)
256 return err; 256 return err;
257} 257}
258 258
259static int cmd648_ide_dma_test_irq (ide_drive_t *drive) 259static int cmd648_dma_test_irq(ide_drive_t *drive)
260{ 260{
261 ide_hwif_t *hwif = HWIF(drive); 261 ide_hwif_t *hwif = HWIF(drive);
262 unsigned long base = hwif->dma_base - (hwif->channel * 8); 262 unsigned long base = hwif->dma_base - (hwif->channel * 8);
@@ -279,7 +279,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive)
279 return 0; 279 return 0;
280} 280}
281 281
282static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) 282static int cmd64x_dma_test_irq(ide_drive_t *drive)
283{ 283{
284 ide_hwif_t *hwif = HWIF(drive); 284 ide_hwif_t *hwif = HWIF(drive);
285 struct pci_dev *dev = to_pci_dev(hwif->dev); 285 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -310,7 +310,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive)
310 * event order for DMA transfers. 310 * event order for DMA transfers.
311 */ 311 */
312 312
313static int cmd646_1_ide_dma_end (ide_drive_t *drive) 313static int cmd646_1_dma_end(ide_drive_t *drive)
314{ 314{
315 ide_hwif_t *hwif = HWIF(drive); 315 ide_hwif_t *hwif = HWIF(drive);
316 u8 dma_stat = 0, dma_cmd = 0; 316 u8 dma_stat = 0, dma_cmd = 0;
@@ -370,7 +370,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
370 return 0; 370 return 0;
371} 371}
372 372
373static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) 373static u8 __devinit cmd64x_cable_detect(ide_hwif_t *hwif)
374{ 374{
375 struct pci_dev *dev = to_pci_dev(hwif->dev); 375 struct pci_dev *dev = to_pci_dev(hwif->dev);
376 u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01; 376 u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
@@ -385,60 +385,52 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
385 } 385 }
386} 386}
387 387
388static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) 388static const struct ide_port_ops cmd64x_port_ops = {
389{ 389 .set_pio_mode = cmd64x_set_pio_mode,
390 struct pci_dev *dev = to_pci_dev(hwif->dev); 390 .set_dma_mode = cmd64x_set_dma_mode,
391 391 .cable_detect = cmd64x_cable_detect,
392 hwif->set_pio_mode = &cmd64x_set_pio_mode; 392};
393 hwif->set_dma_mode = &cmd64x_set_dma_mode;
394
395 hwif->cable_detect = ata66_cmd64x;
396 393
397 if (!hwif->dma_base) 394static const struct ide_dma_ops cmd64x_dma_ops = {
398 return; 395 .dma_host_set = ide_dma_host_set,
396 .dma_setup = ide_dma_setup,
397 .dma_exec_cmd = ide_dma_exec_cmd,
398 .dma_start = ide_dma_start,
399 .dma_end = cmd64x_dma_end,
400 .dma_test_irq = cmd64x_dma_test_irq,
401 .dma_lost_irq = ide_dma_lost_irq,
402 .dma_timeout = ide_dma_timeout,
403};
399 404
400 /* 405static const struct ide_dma_ops cmd646_rev1_dma_ops = {
401 * UltraDMA only supported on PCI646U and PCI646U2, which 406 .dma_host_set = ide_dma_host_set,
402 * correspond to revisions 0x03, 0x05 and 0x07 respectively. 407 .dma_setup = ide_dma_setup,
403 * Actually, although the CMD tech support people won't 408 .dma_exec_cmd = ide_dma_exec_cmd,
404 * tell me the details, the 0x03 revision cannot support 409 .dma_start = ide_dma_start,
405 * UDMA correctly without hardware modifications, and even 410 .dma_end = cmd646_1_dma_end,
406 * then it only works with Quantum disks due to some 411 .dma_test_irq = ide_dma_test_irq,
407 * hold time assumptions in the 646U part which are fixed 412 .dma_lost_irq = ide_dma_lost_irq,
408 * in the 646U2. 413 .dma_timeout = ide_dma_timeout,
409 * 414};
410 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
411 */
412 if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
413 hwif->ultra_mask = 0x00;
414 415
415 switch (dev->device) { 416static const struct ide_dma_ops cmd648_dma_ops = {
416 case PCI_DEVICE_ID_CMD_648: 417 .dma_host_set = ide_dma_host_set,
417 case PCI_DEVICE_ID_CMD_649: 418 .dma_setup = ide_dma_setup,
418 alt_irq_bits: 419 .dma_exec_cmd = ide_dma_exec_cmd,
419 hwif->ide_dma_end = &cmd648_ide_dma_end; 420 .dma_start = ide_dma_start,
420 hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq; 421 .dma_end = cmd648_dma_end,
421 break; 422 .dma_test_irq = cmd648_dma_test_irq,
422 case PCI_DEVICE_ID_CMD_646: 423 .dma_lost_irq = ide_dma_lost_irq,
423 if (dev->revision == 0x01) { 424 .dma_timeout = ide_dma_timeout,
424 hwif->ide_dma_end = &cmd646_1_ide_dma_end; 425};
425 break;
426 } else if (dev->revision >= 0x03)
427 goto alt_irq_bits;
428 /* fall thru */
429 default:
430 hwif->ide_dma_end = &cmd64x_ide_dma_end;
431 hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq;
432 break;
433 }
434}
435 426
436static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { 427static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
437 { /* 0 */ 428 { /* 0 */
438 .name = "CMD643", 429 .name = "CMD643",
439 .init_chipset = init_chipset_cmd64x, 430 .init_chipset = init_chipset_cmd64x,
440 .init_hwif = init_hwif_cmd64x,
441 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 431 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
432 .port_ops = &cmd64x_port_ops,
433 .dma_ops = &cmd64x_dma_ops,
442 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | 434 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
443 IDE_HFLAG_ABUSE_PREFETCH, 435 IDE_HFLAG_ABUSE_PREFETCH,
444 .pio_mask = ATA_PIO5, 436 .pio_mask = ATA_PIO5,
@@ -447,9 +439,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
447 },{ /* 1 */ 439 },{ /* 1 */
448 .name = "CMD646", 440 .name = "CMD646",
449 .init_chipset = init_chipset_cmd64x, 441 .init_chipset = init_chipset_cmd64x,
450 .init_hwif = init_hwif_cmd64x,
451 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 442 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
452 .chipset = ide_cmd646, 443 .chipset = ide_cmd646,
444 .port_ops = &cmd64x_port_ops,
445 .dma_ops = &cmd648_dma_ops,
453 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 446 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
454 .pio_mask = ATA_PIO5, 447 .pio_mask = ATA_PIO5,
455 .mwdma_mask = ATA_MWDMA2, 448 .mwdma_mask = ATA_MWDMA2,
@@ -457,8 +450,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
457 },{ /* 2 */ 450 },{ /* 2 */
458 .name = "CMD648", 451 .name = "CMD648",
459 .init_chipset = init_chipset_cmd64x, 452 .init_chipset = init_chipset_cmd64x,
460 .init_hwif = init_hwif_cmd64x,
461 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 453 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
454 .port_ops = &cmd64x_port_ops,
455 .dma_ops = &cmd648_dma_ops,
462 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 456 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
463 .pio_mask = ATA_PIO5, 457 .pio_mask = ATA_PIO5,
464 .mwdma_mask = ATA_MWDMA2, 458 .mwdma_mask = ATA_MWDMA2,
@@ -466,8 +460,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
466 },{ /* 3 */ 460 },{ /* 3 */
467 .name = "CMD649", 461 .name = "CMD649",
468 .init_chipset = init_chipset_cmd64x, 462 .init_chipset = init_chipset_cmd64x,
469 .init_hwif = init_hwif_cmd64x,
470 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 463 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
464 .port_ops = &cmd64x_port_ops,
465 .dma_ops = &cmd648_dma_ops,
471 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 466 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
472 .pio_mask = ATA_PIO5, 467 .pio_mask = ATA_PIO5,
473 .mwdma_mask = ATA_MWDMA2, 468 .mwdma_mask = ATA_MWDMA2,
@@ -482,12 +477,35 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic
482 477
483 d = cmd64x_chipsets[idx]; 478 d = cmd64x_chipsets[idx];
484 479
485 /* 480 if (idx == 1) {
486 * The original PCI0646 didn't have the primary channel enable bit, 481 /*
487 * it appeared starting with PCI0646U (i.e. revision ID 3). 482 * UltraDMA only supported on PCI646U and PCI646U2, which
488 */ 483 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
489 if (idx == 1 && dev->revision < 3) 484 * Actually, although the CMD tech support people won't
490 d.enablebits[0].reg = 0; 485 * tell me the details, the 0x03 revision cannot support
486 * UDMA correctly without hardware modifications, and even
487 * then it only works with Quantum disks due to some
488 * hold time assumptions in the 646U part which are fixed
489 * in the 646U2.
490 *
491 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
492 */
493 if (dev->revision < 5) {
494 d.udma_mask = 0x00;
495 /*
496 * The original PCI0646 didn't have the primary
497 * channel enable bit, it appeared starting with
498 * PCI0646U (i.e. revision ID 3).
499 */
500 if (dev->revision < 3) {
501 d.enablebits[0].reg = 0;
502 if (dev->revision == 1)
503 d.dma_ops = &cmd646_rev1_dma_ops;
504 else
505 d.dma_ops = &cmd64x_dma_ops;
506 }
507 }
508 }
491 509
492 return ide_setup_pci_device(dev, &d); 510 return ide_setup_pci_device(dev, &d);
493} 511}
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index 01b37ecb5a5a..17669a434438 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -103,21 +103,27 @@ static void cs5520_dma_host_set(ide_drive_t *drive, int on)
103 ide_dma_host_set(drive, on); 103 ide_dma_host_set(drive, on);
104} 104}
105 105
106static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) 106static const struct ide_port_ops cs5520_port_ops = {
107{ 107 .set_pio_mode = cs5520_set_pio_mode,
108 hwif->set_pio_mode = &cs5520_set_pio_mode; 108 .set_dma_mode = cs5520_set_dma_mode,
109 hwif->set_dma_mode = &cs5520_set_dma_mode; 109};
110
111 if (hwif->dma_base == 0)
112 return;
113 110
114 hwif->dma_host_set = &cs5520_dma_host_set; 111static const struct ide_dma_ops cs5520_dma_ops = {
115} 112 .dma_host_set = cs5520_dma_host_set,
113 .dma_setup = ide_dma_setup,
114 .dma_exec_cmd = ide_dma_exec_cmd,
115 .dma_start = ide_dma_start,
116 .dma_end = __ide_dma_end,
117 .dma_test_irq = ide_dma_test_irq,
118 .dma_lost_irq = ide_dma_lost_irq,
119 .dma_timeout = ide_dma_timeout,
120};
116 121
117#define DECLARE_CS_DEV(name_str) \ 122#define DECLARE_CS_DEV(name_str) \
118 { \ 123 { \
119 .name = name_str, \ 124 .name = name_str, \
120 .init_hwif = init_hwif_cs5520, \ 125 .port_ops = &cs5520_port_ops, \
126 .dma_ops = &cs5520_dma_ops, \
121 .host_flags = IDE_HFLAG_ISA_PORTS | \ 127 .host_flags = IDE_HFLAG_ISA_PORTS | \
122 IDE_HFLAG_CS5520 | \ 128 IDE_HFLAG_CS5520 | \
123 IDE_HFLAG_VDMA | \ 129 IDE_HFLAG_VDMA | \
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 56a369c2a78a..f5534c1ff349 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -228,26 +228,25 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
228 unsigned long basereg; 228 unsigned long basereg;
229 u32 d0_timings; 229 u32 d0_timings;
230 230
231 hwif->set_pio_mode = &cs5530_set_pio_mode;
232 hwif->set_dma_mode = &cs5530_set_dma_mode;
233
234 basereg = CS5530_BASEREG(hwif); 231 basereg = CS5530_BASEREG(hwif);
235 d0_timings = inl(basereg + 0); 232 d0_timings = inl(basereg + 0);
236 if (CS5530_BAD_PIO(d0_timings)) 233 if (CS5530_BAD_PIO(d0_timings))
237 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0); 234 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0);
238 if (CS5530_BAD_PIO(inl(basereg + 8))) 235 if (CS5530_BAD_PIO(inl(basereg + 8)))
239 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8); 236 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
240
241 if (hwif->dma_base == 0)
242 return;
243
244 hwif->udma_filter = cs5530_udma_filter;
245} 237}
246 238
239static const struct ide_port_ops cs5530_port_ops = {
240 .set_pio_mode = cs5530_set_pio_mode,
241 .set_dma_mode = cs5530_set_dma_mode,
242 .udma_filter = cs5530_udma_filter,
243};
244
247static const struct ide_port_info cs5530_chipset __devinitdata = { 245static const struct ide_port_info cs5530_chipset __devinitdata = {
248 .name = "CS5530", 246 .name = "CS5530",
249 .init_chipset = init_chipset_cs5530, 247 .init_chipset = init_chipset_cs5530,
250 .init_hwif = init_hwif_cs5530, 248 .init_hwif = init_hwif_cs5530,
249 .port_ops = &cs5530_port_ops,
251 .host_flags = IDE_HFLAG_SERIALIZE | 250 .host_flags = IDE_HFLAG_SERIALIZE |
252 IDE_HFLAG_POST_SET_MODE, 251 IDE_HFLAG_POST_SET_MODE,
253 .pio_mask = ATA_PIO4, 252 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index c9685f239c65..99fe91a191b8 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -166,25 +166,15 @@ static u8 __devinit cs5535_cable_detect(ide_hwif_t *hwif)
166 return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; 166 return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
167} 167}
168 168
169/**** 169static const struct ide_port_ops cs5535_port_ops = {
170 * init_hwif_cs5535 - Initialize one ide cannel 170 .set_pio_mode = cs5535_set_pio_mode,
171 * @hwif: Channel descriptor 171 .set_dma_mode = cs5535_set_dma_mode,
172 * 172 .cable_detect = cs5535_cable_detect,
173 * This gets invoked by the IDE driver once for each channel. It 173};
174 * performs channel-specific pre-initialization before drive probing.
175 *
176 */
177static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
178{
179 hwif->set_pio_mode = &cs5535_set_pio_mode;
180 hwif->set_dma_mode = &cs5535_set_dma_mode;
181
182 hwif->cable_detect = cs5535_cable_detect;
183}
184 174
185static const struct ide_port_info cs5535_chipset __devinitdata = { 175static const struct ide_port_info cs5535_chipset __devinitdata = {
186 .name = "CS5535", 176 .name = "CS5535",
187 .init_hwif = init_hwif_cs5535, 177 .port_ops = &cs5535_port_ops,
188 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE | 178 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE |
189 IDE_HFLAG_ABUSE_SET_DMA_MODE, 179 IDE_HFLAG_ABUSE_SET_DMA_MODE,
190 .pio_mask = ATA_PIO4, 180 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index 08eab7e7f051..e30eae5a01b6 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -382,15 +382,6 @@ static unsigned int __devinit init_chipset_cy82c693(struct pci_dev *dev, const c
382 return 0; 382 return 0;
383} 383}
384 384
385/*
386 * the init function - called for each ide channel once
387 */
388static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
389{
390 hwif->set_pio_mode = &cy82c693_set_pio_mode;
391 hwif->set_dma_mode = &cy82c693_set_dma_mode;
392}
393
394static void __devinit init_iops_cy82c693(ide_hwif_t *hwif) 385static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
395{ 386{
396 static ide_hwif_t *primary; 387 static ide_hwif_t *primary;
@@ -404,11 +395,16 @@ static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
404 } 395 }
405} 396}
406 397
398static const struct ide_port_ops cy82c693_port_ops = {
399 .set_pio_mode = cy82c693_set_pio_mode,
400 .set_dma_mode = cy82c693_set_dma_mode,
401};
402
407static const struct ide_port_info cy82c693_chipset __devinitdata = { 403static const struct ide_port_info cy82c693_chipset __devinitdata = {
408 .name = "CY82C693", 404 .name = "CY82C693",
409 .init_chipset = init_chipset_cy82c693, 405 .init_chipset = init_chipset_cy82c693,
410 .init_iops = init_iops_cy82c693, 406 .init_iops = init_iops_cy82c693,
411 .init_hwif = init_hwif_cy82c693, 407 .port_ops = &cy82c693_port_ops,
412 .chipset = ide_cy82c693, 408 .chipset = ide_cy82c693,
413 .host_flags = IDE_HFLAG_SINGLE, 409 .host_flags = IDE_HFLAG_SINGLE,
414 .pio_mask = ATA_PIO4, 410 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index 753b86fc6637..c7b7e0483287 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -43,6 +43,10 @@ static const u8 setup[] = {
43 0x00, 0x00, 0x00, 0x00, 0xa4, 0x83, 0x02, 0x13, 43 0x00, 0x00, 0x00, 0x00, 0xa4, 0x83, 0x02, 0x13,
44}; 44};
45 45
46static const struct ide_port_ops delkin_cb_port_ops = {
47 .quirkproc = ide_undecoded_slave,
48};
49
46static int __devinit 50static int __devinit
47delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id) 51delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
48{ 52{
@@ -89,8 +93,7 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
89 ide_init_port_data(hwif, i); 93 ide_init_port_data(hwif, i);
90 94
91 ide_init_port_hw(hwif, &hw); 95 ide_init_port_hw(hwif, &hw);
92 hwif->mmio = 1; 96 hwif->port_ops = &delkin_cb_port_ops;
93 hwif->quirkproc = &ide_undecoded_slave;
94 97
95 idx[0] = i; 98 idx[0] = i;
96 99
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index 9f2fc3094000..84c36c117194 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -115,11 +115,10 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
115 return dev->irq; 115 return dev->irq;
116} 116}
117 117
118static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) 118static const struct ide_port_ops hpt34x_port_ops = {
119{ 119 .set_pio_mode = hpt34x_set_pio_mode,
120 hwif->set_pio_mode = &hpt34x_set_pio_mode; 120 .set_dma_mode = hpt34x_set_mode,
121 hwif->set_dma_mode = &hpt34x_set_mode; 121};
122}
123 122
124#define IDE_HFLAGS_HPT34X \ 123#define IDE_HFLAGS_HPT34X \
125 (IDE_HFLAG_NO_ATAPI_DMA | \ 124 (IDE_HFLAG_NO_ATAPI_DMA | \
@@ -131,16 +130,14 @@ static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
131 { /* 0 */ 130 { /* 0 */
132 .name = "HPT343", 131 .name = "HPT343",
133 .init_chipset = init_chipset_hpt34x, 132 .init_chipset = init_chipset_hpt34x,
134 .init_hwif = init_hwif_hpt34x, 133 .port_ops = &hpt34x_port_ops,
135 .extra = 16,
136 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE, 134 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE,
137 .pio_mask = ATA_PIO5, 135 .pio_mask = ATA_PIO5,
138 }, 136 },
139 { /* 1 */ 137 { /* 1 */
140 .name = "HPT345", 138 .name = "HPT345",
141 .init_chipset = init_chipset_hpt34x, 139 .init_chipset = init_chipset_hpt34x,
142 .init_hwif = init_hwif_hpt34x, 140 .port_ops = &hpt34x_port_ops,
143 .extra = 16,
144 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD, 141 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD,
145 .pio_mask = ATA_PIO5, 142 .pio_mask = ATA_PIO5,
146#ifdef CONFIG_HPT34X_AUTODMA 143#ifdef CONFIG_HPT34X_AUTODMA
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index a49090672145..8c02961d0188 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -776,7 +776,7 @@ static void hpt366_dma_lost_irq(ide_drive_t *drive)
776 pci_read_config_byte(dev, 0x52, &mcr3); 776 pci_read_config_byte(dev, 0x52, &mcr3);
777 pci_read_config_byte(dev, 0x5a, &scr1); 777 pci_read_config_byte(dev, 0x5a, &scr1);
778 printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", 778 printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n",
779 drive->name, __FUNCTION__, mcr1, mcr3, scr1); 779 drive->name, __func__, mcr1, mcr3, scr1);
780 if (scr1 & 0x10) 780 if (scr1 & 0x10)
781 pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); 781 pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
782 ide_dma_lost_irq(drive); 782 ide_dma_lost_irq(drive);
@@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
808 hpt370_clear_engine(drive); 808 hpt370_clear_engine(drive);
809} 809}
810 810
811static void hpt370_ide_dma_start(ide_drive_t *drive) 811static void hpt370_dma_start(ide_drive_t *drive)
812{ 812{
813#ifdef HPT_RESET_STATE_ENGINE 813#ifdef HPT_RESET_STATE_ENGINE
814 hpt370_clear_engine(drive); 814 hpt370_clear_engine(drive);
@@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive)
816 ide_dma_start(drive); 816 ide_dma_start(drive);
817} 817}
818 818
819static int hpt370_ide_dma_end(ide_drive_t *drive) 819static int hpt370_dma_end(ide_drive_t *drive)
820{ 820{
821 ide_hwif_t *hwif = HWIF(drive); 821 ide_hwif_t *hwif = HWIF(drive);
822 u8 dma_stat = inb(hwif->dma_status); 822 u8 dma_stat = inb(hwif->dma_status);
@@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive)
838} 838}
839 839
840/* returns 1 if DMA IRQ issued, 0 otherwise */ 840/* returns 1 if DMA IRQ issued, 0 otherwise */
841static int hpt374_ide_dma_test_irq(ide_drive_t *drive) 841static int hpt374_dma_test_irq(ide_drive_t *drive)
842{ 842{
843 ide_hwif_t *hwif = HWIF(drive); 843 ide_hwif_t *hwif = HWIF(drive);
844 struct pci_dev *dev = to_pci_dev(hwif->dev); 844 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -858,11 +858,11 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive)
858 858
859 if (!drive->waiting_for_dma) 859 if (!drive->waiting_for_dma)
860 printk(KERN_WARNING "%s: (%s) called while not waiting\n", 860 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
861 drive->name, __FUNCTION__); 861 drive->name, __func__);
862 return 0; 862 return 0;
863} 863}
864 864
865static int hpt374_ide_dma_end(ide_drive_t *drive) 865static int hpt374_dma_end(ide_drive_t *drive)
866{ 866{
867 ide_hwif_t *hwif = HWIF(drive); 867 ide_hwif_t *hwif = HWIF(drive);
868 struct pci_dev *dev = to_pci_dev(hwif->dev); 868 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -1271,17 +1271,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1271 /* Cache the channel's MISC. control registers' offset */ 1271 /* Cache the channel's MISC. control registers' offset */
1272 hwif->select_data = hwif->channel ? 0x54 : 0x50; 1272 hwif->select_data = hwif->channel ? 0x54 : 0x50;
1273 1273
1274 hwif->set_pio_mode = &hpt3xx_set_pio_mode;
1275 hwif->set_dma_mode = &hpt3xx_set_mode;
1276
1277 hwif->quirkproc = &hpt3xx_quirkproc;
1278 hwif->maskproc = &hpt3xx_maskproc;
1279
1280 hwif->udma_filter = &hpt3xx_udma_filter;
1281 hwif->mdma_filter = &hpt3xx_mdma_filter;
1282
1283 hwif->cable_detect = hpt3xx_cable_detect;
1284
1285 /* 1274 /*
1286 * HPT3xxN chips have some complications: 1275 * HPT3xxN chips have some complications:
1287 * 1276 *
@@ -1323,29 +1312,19 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1323 1312
1324 if (new_mcr != old_mcr) 1313 if (new_mcr != old_mcr)
1325 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); 1314 pci_write_config_byte(dev, hwif->select_data + 1, new_mcr);
1326
1327 if (hwif->dma_base == 0)
1328 return;
1329
1330 if (chip_type >= HPT374) {
1331 hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq;
1332 hwif->ide_dma_end = &hpt374_ide_dma_end;
1333 } else if (chip_type >= HPT370) {
1334 hwif->dma_start = &hpt370_ide_dma_start;
1335 hwif->ide_dma_end = &hpt370_ide_dma_end;
1336 hwif->dma_timeout = &hpt370_dma_timeout;
1337 } else
1338 hwif->dma_lost_irq = &hpt366_dma_lost_irq;
1339} 1315}
1340 1316
1341static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) 1317static int __devinit init_dma_hpt366(ide_hwif_t *hwif,
1318 const struct ide_port_info *d)
1342{ 1319{
1343 struct pci_dev *dev = to_pci_dev(hwif->dev); 1320 struct pci_dev *dev = to_pci_dev(hwif->dev);
1344 u8 masterdma = 0, slavedma = 0; 1321 unsigned long flags, base = ide_pci_dma_base(hwif, d);
1345 u8 dma_new = 0, dma_old = 0; 1322 u8 dma_old, dma_new, masterdma = 0, slavedma = 0;
1346 unsigned long flags;
1347 1323
1348 dma_old = inb(dmabase + 2); 1324 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
1325 return -1;
1326
1327 dma_old = inb(base + 2);
1349 1328
1350 local_irq_save(flags); 1329 local_irq_save(flags);
1351 1330
@@ -1356,11 +1335,21 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase)
1356 if (masterdma & 0x30) dma_new |= 0x20; 1335 if (masterdma & 0x30) dma_new |= 0x20;
1357 if ( slavedma & 0x30) dma_new |= 0x40; 1336 if ( slavedma & 0x30) dma_new |= 0x40;
1358 if (dma_new != dma_old) 1337 if (dma_new != dma_old)
1359 outb(dma_new, dmabase + 2); 1338 outb(dma_new, base + 2);
1360 1339
1361 local_irq_restore(flags); 1340 local_irq_restore(flags);
1362 1341
1363 ide_setup_dma(hwif, dmabase); 1342 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
1343 hwif->name, base, base + 7);
1344
1345 hwif->extra_base = base + (hwif->channel ? 8 : 16);
1346
1347 if (ide_allocate_dma_engine(hwif))
1348 return -1;
1349
1350 ide_setup_dma(hwif, base);
1351
1352 return 0;
1364} 1353}
1365 1354
1366static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) 1355static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2)
@@ -1416,6 +1405,49 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2)
1416 IDE_HFLAG_ABUSE_SET_DMA_MODE | \ 1405 IDE_HFLAG_ABUSE_SET_DMA_MODE | \
1417 IDE_HFLAG_OFF_BOARD) 1406 IDE_HFLAG_OFF_BOARD)
1418 1407
1408static const struct ide_port_ops hpt3xx_port_ops = {
1409 .set_pio_mode = hpt3xx_set_pio_mode,
1410 .set_dma_mode = hpt3xx_set_mode,
1411 .quirkproc = hpt3xx_quirkproc,
1412 .maskproc = hpt3xx_maskproc,
1413 .mdma_filter = hpt3xx_mdma_filter,
1414 .udma_filter = hpt3xx_udma_filter,
1415 .cable_detect = hpt3xx_cable_detect,
1416};
1417
1418static const struct ide_dma_ops hpt37x_dma_ops = {
1419 .dma_host_set = ide_dma_host_set,
1420 .dma_setup = ide_dma_setup,
1421 .dma_exec_cmd = ide_dma_exec_cmd,
1422 .dma_start = ide_dma_start,
1423 .dma_end = hpt374_dma_end,
1424 .dma_test_irq = hpt374_dma_test_irq,
1425 .dma_lost_irq = ide_dma_lost_irq,
1426 .dma_timeout = ide_dma_timeout,
1427};
1428
1429static const struct ide_dma_ops hpt370_dma_ops = {
1430 .dma_host_set = ide_dma_host_set,
1431 .dma_setup = ide_dma_setup,
1432 .dma_exec_cmd = ide_dma_exec_cmd,
1433 .dma_start = hpt370_dma_start,
1434 .dma_end = hpt370_dma_end,
1435 .dma_test_irq = ide_dma_test_irq,
1436 .dma_lost_irq = ide_dma_lost_irq,
1437 .dma_timeout = hpt370_dma_timeout,
1438};
1439
1440static const struct ide_dma_ops hpt36x_dma_ops = {
1441 .dma_host_set = ide_dma_host_set,
1442 .dma_setup = ide_dma_setup,
1443 .dma_exec_cmd = ide_dma_exec_cmd,
1444 .dma_start = ide_dma_start,
1445 .dma_end = __ide_dma_end,
1446 .dma_test_irq = ide_dma_test_irq,
1447 .dma_lost_irq = hpt366_dma_lost_irq,
1448 .dma_timeout = ide_dma_timeout,
1449};
1450
1419static const struct ide_port_info hpt366_chipsets[] __devinitdata = { 1451static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1420 { /* 0 */ 1452 { /* 0 */
1421 .name = "HPT36x", 1453 .name = "HPT36x",
@@ -1429,7 +1461,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1429 * Bit 4 is for the primary channel, bit 5 for the secondary. 1461 * Bit 4 is for the primary channel, bit 5 for the secondary.
1430 */ 1462 */
1431 .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, 1463 .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
1432 .extra = 240, 1464 .port_ops = &hpt3xx_port_ops,
1465 .dma_ops = &hpt36x_dma_ops,
1433 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, 1466 .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE,
1434 .pio_mask = ATA_PIO4, 1467 .pio_mask = ATA_PIO4,
1435 .mwdma_mask = ATA_MWDMA2, 1468 .mwdma_mask = ATA_MWDMA2,
@@ -1439,7 +1472,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1439 .init_hwif = init_hwif_hpt366, 1472 .init_hwif = init_hwif_hpt366,
1440 .init_dma = init_dma_hpt366, 1473 .init_dma = init_dma_hpt366,
1441 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1474 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1442 .extra = 240, 1475 .port_ops = &hpt3xx_port_ops,
1476 .dma_ops = &hpt37x_dma_ops,
1443 .host_flags = IDE_HFLAGS_HPT3XX, 1477 .host_flags = IDE_HFLAGS_HPT3XX,
1444 .pio_mask = ATA_PIO4, 1478 .pio_mask = ATA_PIO4,
1445 .mwdma_mask = ATA_MWDMA2, 1479 .mwdma_mask = ATA_MWDMA2,
@@ -1449,7 +1483,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1449 .init_hwif = init_hwif_hpt366, 1483 .init_hwif = init_hwif_hpt366,
1450 .init_dma = init_dma_hpt366, 1484 .init_dma = init_dma_hpt366,
1451 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1485 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1452 .extra = 240, 1486 .port_ops = &hpt3xx_port_ops,
1487 .dma_ops = &hpt37x_dma_ops,
1453 .host_flags = IDE_HFLAGS_HPT3XX, 1488 .host_flags = IDE_HFLAGS_HPT3XX,
1454 .pio_mask = ATA_PIO4, 1489 .pio_mask = ATA_PIO4,
1455 .mwdma_mask = ATA_MWDMA2, 1490 .mwdma_mask = ATA_MWDMA2,
@@ -1459,7 +1494,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1459 .init_hwif = init_hwif_hpt366, 1494 .init_hwif = init_hwif_hpt366,
1460 .init_dma = init_dma_hpt366, 1495 .init_dma = init_dma_hpt366,
1461 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1496 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1462 .extra = 240, 1497 .port_ops = &hpt3xx_port_ops,
1498 .dma_ops = &hpt37x_dma_ops,
1463 .host_flags = IDE_HFLAGS_HPT3XX, 1499 .host_flags = IDE_HFLAGS_HPT3XX,
1464 .pio_mask = ATA_PIO4, 1500 .pio_mask = ATA_PIO4,
1465 .mwdma_mask = ATA_MWDMA2, 1501 .mwdma_mask = ATA_MWDMA2,
@@ -1470,7 +1506,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1470 .init_dma = init_dma_hpt366, 1506 .init_dma = init_dma_hpt366,
1471 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1507 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1472 .udma_mask = ATA_UDMA5, 1508 .udma_mask = ATA_UDMA5,
1473 .extra = 240, 1509 .port_ops = &hpt3xx_port_ops,
1510 .dma_ops = &hpt37x_dma_ops,
1474 .host_flags = IDE_HFLAGS_HPT3XX, 1511 .host_flags = IDE_HFLAGS_HPT3XX,
1475 .pio_mask = ATA_PIO4, 1512 .pio_mask = ATA_PIO4,
1476 .mwdma_mask = ATA_MWDMA2, 1513 .mwdma_mask = ATA_MWDMA2,
@@ -1480,7 +1517,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
1480 .init_hwif = init_hwif_hpt366, 1517 .init_hwif = init_hwif_hpt366,
1481 .init_dma = init_dma_hpt366, 1518 .init_dma = init_dma_hpt366,
1482 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, 1519 .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1483 .extra = 240, 1520 .port_ops = &hpt3xx_port_ops,
1521 .dma_ops = &hpt37x_dma_ops,
1484 .host_flags = IDE_HFLAGS_HPT3XX, 1522 .host_flags = IDE_HFLAGS_HPT3XX,
1485 .pio_mask = ATA_PIO4, 1523 .pio_mask = ATA_PIO4,
1486 .mwdma_mask = ATA_MWDMA2, 1524 .mwdma_mask = ATA_MWDMA2,
@@ -1543,6 +1581,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic
1543 d.name = info->chip_name; 1581 d.name = info->chip_name;
1544 d.udma_mask = info->udma_mask; 1582 d.udma_mask = info->udma_mask;
1545 1583
1584 /* fixup ->dma_ops for HPT370/HPT370A */
1585 if (info == &hpt370 || info == &hpt370a)
1586 d.dma_ops = &hpt370_dma_ops;
1587
1546 pci_set_drvdata(dev, (void *)info); 1588 pci_set_drvdata(dev, (void *)info);
1547 1589
1548 if (info == &hpt36x || info == &hpt374) 1590 if (info == &hpt36x || info == &hpt374)
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 5b5b0cc4b76a..9053c8771e6e 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -149,27 +149,17 @@ static u8 __devinit it8213_cable_detect(ide_hwif_t *hwif)
149 return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 149 return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
150} 150}
151 151
152/** 152static const struct ide_port_ops it8213_port_ops = {
153 * init_hwif_it8213 - set up hwif structs 153 .set_pio_mode = it8213_set_pio_mode,
154 * @hwif: interface to set up 154 .set_dma_mode = it8213_set_dma_mode,
155 * 155 .cable_detect = it8213_cable_detect,
156 * We do the basic set up of the interface structure. 156};
157 */
158
159static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
160{
161 hwif->set_dma_mode = &it8213_set_dma_mode;
162 hwif->set_pio_mode = &it8213_set_pio_mode;
163
164 hwif->cable_detect = it8213_cable_detect;
165}
166
167 157
168#define DECLARE_ITE_DEV(name_str) \ 158#define DECLARE_ITE_DEV(name_str) \
169 { \ 159 { \
170 .name = name_str, \ 160 .name = name_str, \
171 .init_hwif = init_hwif_it8213, \
172 .enablebits = { {0x41, 0x80, 0x80} }, \ 161 .enablebits = { {0x41, 0x80, 0x80} }, \
162 .port_ops = &it8213_port_ops, \
173 .host_flags = IDE_HFLAG_SINGLE, \ 163 .host_flags = IDE_HFLAG_SINGLE, \
174 .pio_mask = ATA_PIO4, \ 164 .pio_mask = ATA_PIO4, \
175 .swdma_mask = ATA_SWDMA2_ONLY, \ 165 .swdma_mask = ATA_SWDMA2_ONLY, \
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index a38ec47423a0..6ab04115286b 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -418,7 +418,7 @@ static void it821x_set_dma_mode(ide_drive_t *drive, const u8 speed)
418} 418}
419 419
420/** 420/**
421 * ata66_it821x - check for 80 pin cable 421 * it821x_cable_detect - cable detection
422 * @hwif: interface to check 422 * @hwif: interface to check
423 * 423 *
424 * Check for the presence of an ATA66 capable cable on the 424 * Check for the presence of an ATA66 capable cable on the
@@ -426,7 +426,7 @@ static void it821x_set_dma_mode(ide_drive_t *drive, const u8 speed)
426 * the needed logic onboard. 426 * the needed logic onboard.
427 */ 427 */
428 428
429static u8 __devinit ata66_it821x(ide_hwif_t *hwif) 429static u8 __devinit it821x_cable_detect(ide_hwif_t *hwif)
430{ 430{
431 /* The reference driver also only does disk side */ 431 /* The reference driver also only does disk side */
432 return ATA_CBL_PATA80; 432 return ATA_CBL_PATA80;
@@ -511,6 +511,11 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive)
511 511
512} 512}
513 513
514static struct ide_dma_ops it821x_pass_through_dma_ops = {
515 .dma_start = it821x_dma_start,
516 .dma_end = it821x_dma_end,
517};
518
514/** 519/**
515 * init_hwif_it821x - set up hwif structs 520 * init_hwif_it821x - set up hwif structs
516 * @hwif: interface to set up 521 * @hwif: interface to set up
@@ -527,8 +532,6 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
527 struct it821x_dev *idev = itdevs[hwif->channel]; 532 struct it821x_dev *idev = itdevs[hwif->channel];
528 u8 conf; 533 u8 conf;
529 534
530 hwif->quirkproc = &it821x_quirkproc;
531
532 ide_set_hwifdata(hwif, idev); 535 ide_set_hwifdata(hwif, idev);
533 536
534 pci_read_config_byte(dev, 0x50, &conf); 537 pci_read_config_byte(dev, 0x50, &conf);
@@ -563,17 +566,11 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
563 } 566 }
564 567
565 if (idev->smart == 0) { 568 if (idev->smart == 0) {
566 hwif->set_pio_mode = &it821x_set_pio_mode;
567 hwif->set_dma_mode = &it821x_set_dma_mode;
568
569 /* MWDMA/PIO clock switching for pass through mode */ 569 /* MWDMA/PIO clock switching for pass through mode */
570 hwif->dma_start = &it821x_dma_start; 570 hwif->dma_ops = &it821x_pass_through_dma_ops;
571 hwif->ide_dma_end = &it821x_dma_end;
572 } else 571 } else
573 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; 572 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
574 573
575 hwif->cable_detect = ata66_it821x;
576
577 if (hwif->dma_base == 0) 574 if (hwif->dma_base == 0)
578 return; 575 return;
579 576
@@ -613,12 +610,20 @@ static unsigned int __devinit init_chipset_it821x(struct pci_dev *dev, const cha
613 return 0; 610 return 0;
614} 611}
615 612
613static const struct ide_port_ops it821x_port_ops = {
614 /* it821x_set_{pio,dma}_mode() are only used in pass-through mode */
615 .set_pio_mode = it821x_set_pio_mode,
616 .set_dma_mode = it821x_set_dma_mode,
617 .quirkproc = it821x_quirkproc,
618 .cable_detect = it821x_cable_detect,
619};
616 620
617#define DECLARE_ITE_DEV(name_str) \ 621#define DECLARE_ITE_DEV(name_str) \
618 { \ 622 { \
619 .name = name_str, \ 623 .name = name_str, \
620 .init_chipset = init_chipset_it821x, \ 624 .init_chipset = init_chipset_it821x, \
621 .init_hwif = init_hwif_it821x, \ 625 .init_hwif = init_hwif_it821x, \
626 .port_ops = &it821x_port_ops, \
622 .pio_mask = ATA_PIO4, \ 627 .pio_mask = ATA_PIO4, \
623 } 628 }
624 629
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 673f7dc8ba65..96ef7394f283 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -19,13 +19,13 @@ typedef enum {
19} port_type; 19} port_type;
20 20
21/** 21/**
22 * ata66_jmicron - Cable check 22 * jmicron_cable_detect - cable detection
23 * @hwif: IDE port 23 * @hwif: IDE port
24 * 24 *
25 * Returns the cable type. 25 * Returns the cable type.
26 */ 26 */
27 27
28static u8 __devinit ata66_jmicron(ide_hwif_t *hwif) 28static u8 __devinit jmicron_cable_detect(ide_hwif_t *hwif)
29{ 29{
30 struct pci_dev *pdev = to_pci_dev(hwif->dev); 30 struct pci_dev *pdev = to_pci_dev(hwif->dev);
31 31
@@ -95,25 +95,16 @@ static void jmicron_set_dma_mode(ide_drive_t *drive, const u8 mode)
95{ 95{
96} 96}
97 97
98/** 98static const struct ide_port_ops jmicron_port_ops = {
99 * init_hwif_jmicron - set up hwif structs 99 .set_pio_mode = jmicron_set_pio_mode,
100 * @hwif: interface to set up 100 .set_dma_mode = jmicron_set_dma_mode,
101 * 101 .cable_detect = jmicron_cable_detect,
102 * Minimal set up is required for the Jmicron hardware. 102};
103 */
104
105static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
106{
107 hwif->set_pio_mode = &jmicron_set_pio_mode;
108 hwif->set_dma_mode = &jmicron_set_dma_mode;
109
110 hwif->cable_detect = ata66_jmicron;
111}
112 103
113static const struct ide_port_info jmicron_chipset __devinitdata = { 104static const struct ide_port_info jmicron_chipset __devinitdata = {
114 .name = "JMB", 105 .name = "JMB",
115 .init_hwif = init_hwif_jmicron,
116 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } }, 106 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
107 .port_ops = &jmicron_port_ops,
117 .pio_mask = ATA_PIO5, 108 .pio_mask = ATA_PIO5,
118 .mwdma_mask = ATA_MWDMA2, 109 .mwdma_mask = ATA_MWDMA2,
119 .udma_mask = ATA_UDMA6, 110 .udma_mask = ATA_UDMA6,
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index 3015d6916d4c..e1b0c9a9ab9c 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -150,7 +150,7 @@ static void ns87415_selectproc (ide_drive_t *drive)
150 ns87415_prepare_drive (drive, drive->using_dma); 150 ns87415_prepare_drive (drive, drive->using_dma);
151} 151}
152 152
153static int ns87415_ide_dma_end (ide_drive_t *drive) 153static int ns87415_dma_end(ide_drive_t *drive)
154{ 154{
155 ide_hwif_t *hwif = HWIF(drive); 155 ide_hwif_t *hwif = HWIF(drive);
156 u8 dma_stat = 0, dma_cmd = 0; 156 u8 dma_stat = 0, dma_cmd = 0;
@@ -170,7 +170,7 @@ static int ns87415_ide_dma_end (ide_drive_t *drive)
170 return (dma_stat & 7) != 4; 170 return (dma_stat & 7) != 4;
171} 171}
172 172
173static int ns87415_ide_dma_setup(ide_drive_t *drive) 173static int ns87415_dma_setup(ide_drive_t *drive)
174{ 174{
175 /* select DMA xfer */ 175 /* select DMA xfer */
176 ns87415_prepare_drive(drive, 1); 176 ns87415_prepare_drive(drive, 1);
@@ -195,8 +195,6 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
195 u8 stat; 195 u8 stat;
196#endif 196#endif
197 197
198 hwif->selectproc = &ns87415_selectproc;
199
200 /* 198 /*
201 * We cannot probe for IRQ: both ports share common IRQ on INTA. 199 * We cannot probe for IRQ: both ports share common IRQ on INTA.
202 * Also, leave IRQ masked during drive probing, to prevent infinite 200 * Also, leave IRQ masked during drive probing, to prevent infinite
@@ -254,16 +252,31 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
254 return; 252 return;
255 253
256 outb(0x60, hwif->dma_status); 254 outb(0x60, hwif->dma_status);
257 hwif->dma_setup = &ns87415_ide_dma_setup;
258 hwif->ide_dma_end = &ns87415_ide_dma_end;
259} 255}
260 256
257static const struct ide_port_ops ns87415_port_ops = {
258 .selectproc = ns87415_selectproc,
259};
260
261static const struct ide_dma_ops ns87415_dma_ops = {
262 .dma_host_set = ide_dma_host_set,
263 .dma_setup = ns87415_dma_setup,
264 .dma_exec_cmd = ide_dma_exec_cmd,
265 .dma_start = ide_dma_start,
266 .dma_end = ns87415_dma_end,
267 .dma_test_irq = ide_dma_test_irq,
268 .dma_lost_irq = ide_dma_lost_irq,
269 .dma_timeout = ide_dma_timeout,
270};
271
261static const struct ide_port_info ns87415_chipset __devinitdata = { 272static const struct ide_port_info ns87415_chipset __devinitdata = {
262 .name = "NS87415", 273 .name = "NS87415",
263#ifdef CONFIG_SUPERIO 274#ifdef CONFIG_SUPERIO
264 .init_iops = init_iops_ns87415, 275 .init_iops = init_iops_ns87415,
265#endif 276#endif
266 .init_hwif = init_hwif_ns87415, 277 .init_hwif = init_hwif_ns87415,
278 .port_ops = &ns87415_port_ops,
279 .dma_ops = &ns87415_dma_ops,
267 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | 280 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
268 IDE_HFLAG_NO_ATAPI_DMA, 281 IDE_HFLAG_NO_ATAPI_DMA,
269}; 282};
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 88a4dd94eeea..9edacba20ffb 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -326,28 +326,24 @@ static void __devinit opti621_port_init_devs(ide_hwif_t *hwif)
326 hwif->drives[1].drive_data = PIO_DONT_KNOW; 326 hwif->drives[1].drive_data = PIO_DONT_KNOW;
327} 327}
328 328
329/* 329static const struct ide_port_ops opti621_port_ops = {
330 * init_hwif_opti621() is called once for each hwif found at boot. 330 .port_init_devs = opti621_port_init_devs,
331 */ 331 .set_pio_mode = opti621_set_pio_mode,
332static void __devinit init_hwif_opti621(ide_hwif_t *hwif) 332};
333{
334 hwif->port_init_devs = opti621_port_init_devs;
335 hwif->set_pio_mode = &opti621_set_pio_mode;
336}
337 333
338static const struct ide_port_info opti621_chipsets[] __devinitdata = { 334static const struct ide_port_info opti621_chipsets[] __devinitdata = {
339 { /* 0 */ 335 { /* 0 */
340 .name = "OPTI621", 336 .name = "OPTI621",
341 .init_hwif = init_hwif_opti621,
342 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, 337 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
338 .port_ops = &opti621_port_ops,
343 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 339 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
344 .pio_mask = ATA_PIO3, 340 .pio_mask = ATA_PIO3,
345 .swdma_mask = ATA_SWDMA2, 341 .swdma_mask = ATA_SWDMA2,
346 .mwdma_mask = ATA_MWDMA2, 342 .mwdma_mask = ATA_MWDMA2,
347 }, { /* 1 */ 343 }, { /* 1 */
348 .name = "OPTI621X", 344 .name = "OPTI621X",
349 .init_hwif = init_hwif_opti621,
350 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, 345 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
346 .port_ops = &opti621_port_ops,
351 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA, 347 .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
352 .pio_mask = ATA_PIO3, 348 .pio_mask = ATA_PIO3,
353 .swdma_mask = ATA_SWDMA2, 349 .swdma_mask = ATA_SWDMA2,
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 1c8cb7797a4a..ec9bd7b352fc 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -34,7 +34,7 @@
34#undef DEBUG 34#undef DEBUG
35 35
36#ifdef DEBUG 36#ifdef DEBUG
37#define DBG(fmt, args...) printk("%s: " fmt, __FUNCTION__, ## args) 37#define DBG(fmt, args...) printk("%s: " fmt, __func__, ## args)
38#else 38#else
39#define DBG(fmt, args...) 39#define DBG(fmt, args...)
40#endif 40#endif
@@ -442,17 +442,6 @@ static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const cha
442 return dev->irq; 442 return dev->irq;
443} 443}
444 444
445static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
446{
447 hwif->set_pio_mode = &pdcnew_set_pio_mode;
448 hwif->set_dma_mode = &pdcnew_set_dma_mode;
449
450 hwif->quirkproc = &pdcnew_quirkproc;
451 hwif->resetproc = &pdcnew_reset;
452
453 hwif->cable_detect = pdcnew_cable_detect;
454}
455
456static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev) 445static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
457{ 446{
458 struct pci_dev *dev2; 447 struct pci_dev *dev2;
@@ -476,11 +465,19 @@ static struct pci_dev * __devinit pdc20270_get_dev2(struct pci_dev *dev)
476 return NULL; 465 return NULL;
477} 466}
478 467
468static const struct ide_port_ops pdcnew_port_ops = {
469 .set_pio_mode = pdcnew_set_pio_mode,
470 .set_dma_mode = pdcnew_set_dma_mode,
471 .quirkproc = pdcnew_quirkproc,
472 .resetproc = pdcnew_reset,
473 .cable_detect = pdcnew_cable_detect,
474};
475
479#define DECLARE_PDCNEW_DEV(name_str, udma) \ 476#define DECLARE_PDCNEW_DEV(name_str, udma) \
480 { \ 477 { \
481 .name = name_str, \ 478 .name = name_str, \
482 .init_chipset = init_chipset_pdcnew, \ 479 .init_chipset = init_chipset_pdcnew, \
483 .init_hwif = init_hwif_pdc202new, \ 480 .port_ops = &pdcnew_port_ops, \
484 .host_flags = IDE_HFLAG_POST_SET_MODE | \ 481 .host_flags = IDE_HFLAG_POST_SET_MODE | \
485 IDE_HFLAG_ERROR_STOPS_FIFO | \ 482 IDE_HFLAG_ERROR_STOPS_FIFO | \
486 IDE_HFLAG_OFF_BOARD, \ 483 IDE_HFLAG_OFF_BOARD, \
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index 150422ec3cfa..fca89eda5c02 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -115,7 +115,7 @@ static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
115 pdc202xx_set_mode(drive, XFER_PIO_0 + pio); 115 pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
116} 116}
117 117
118static u8 __devinit pdc2026x_old_cable_detect(ide_hwif_t *hwif) 118static u8 __devinit pdc2026x_cable_detect(ide_hwif_t *hwif)
119{ 119{
120 struct pci_dev *dev = to_pci_dev(hwif->dev); 120 struct pci_dev *dev = to_pci_dev(hwif->dev);
121 u16 CIS, mask = hwif->channel ? (1 << 11) : (1 << 10); 121 u16 CIS, mask = hwif->channel ? (1 << 11) : (1 << 10);
@@ -163,7 +163,7 @@ static void pdc202xx_quirkproc(ide_drive_t *drive)
163 drive->quirk_list = 0; 163 drive->quirk_list = 0;
164} 164}
165 165
166static void pdc202xx_old_ide_dma_start(ide_drive_t *drive) 166static void pdc202xx_dma_start(ide_drive_t *drive)
167{ 167{
168 if (drive->current_speed > XFER_UDMA_2) 168 if (drive->current_speed > XFER_UDMA_2)
169 pdc_old_enable_66MHz_clock(drive->hwif); 169 pdc_old_enable_66MHz_clock(drive->hwif);
@@ -185,7 +185,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
185 ide_dma_start(drive); 185 ide_dma_start(drive);
186} 186}
187 187
188static int pdc202xx_old_ide_dma_end(ide_drive_t *drive) 188static int pdc202xx_dma_end(ide_drive_t *drive)
189{ 189{
190 if (drive->media != ide_disk || drive->addressing == 1) { 190 if (drive->media != ide_disk || drive->addressing == 1) {
191 ide_hwif_t *hwif = HWIF(drive); 191 ide_hwif_t *hwif = HWIF(drive);
@@ -202,7 +202,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
202 return __ide_dma_end(drive); 202 return __ide_dma_end(drive);
203} 203}
204 204
205static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive) 205static int pdc202xx_dma_test_irq(ide_drive_t *drive)
206{ 206{
207 ide_hwif_t *hwif = HWIF(drive); 207 ide_hwif_t *hwif = HWIF(drive);
208 unsigned long high_16 = hwif->extra_base - 16; 208 unsigned long high_16 = hwif->extra_base - 16;
@@ -226,26 +226,6 @@ somebody_else:
226 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */ 226 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
227} 227}
228 228
229static void pdc202xx_dma_lost_irq(ide_drive_t *drive)
230{
231 ide_hwif_t *hwif = HWIF(drive);
232
233 if (hwif->resetproc != NULL)
234 hwif->resetproc(drive);
235
236 ide_dma_lost_irq(drive);
237}
238
239static void pdc202xx_dma_timeout(ide_drive_t *drive)
240{
241 ide_hwif_t *hwif = HWIF(drive);
242
243 if (hwif->resetproc != NULL)
244 hwif->resetproc(drive);
245
246 ide_dma_timeout(drive);
247}
248
249static void pdc202xx_reset_host (ide_hwif_t *hwif) 229static void pdc202xx_reset_host (ide_hwif_t *hwif)
250{ 230{
251 unsigned long high_16 = hwif->extra_base - 16; 231 unsigned long high_16 = hwif->extra_base - 16;
@@ -271,68 +251,46 @@ static void pdc202xx_reset (ide_drive_t *drive)
271 ide_set_max_pio(drive); 251 ide_set_max_pio(drive);
272} 252}
273 253
274static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, 254static void pdc202xx_dma_lost_irq(ide_drive_t *drive)
275 const char *name)
276{ 255{
277 return dev->irq; 256 pdc202xx_reset(drive);
257 ide_dma_lost_irq(drive);
278} 258}
279 259
280static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) 260static void pdc202xx_dma_timeout(ide_drive_t *drive)
281{ 261{
282 struct pci_dev *dev = to_pci_dev(hwif->dev); 262 pdc202xx_reset(drive);
283 263 ide_dma_timeout(drive);
284 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
285 hwif->set_dma_mode = &pdc202xx_set_mode;
286
287 hwif->quirkproc = &pdc202xx_quirkproc;
288
289 if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
290 hwif->resetproc = &pdc202xx_reset;
291
292 hwif->cable_detect = pdc2026x_old_cable_detect;
293 }
294
295 if (hwif->dma_base == 0)
296 return;
297
298 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
299 hwif->dma_timeout = &pdc202xx_dma_timeout;
300
301 if (dev->device != PCI_DEVICE_ID_PROMISE_20246) {
302 hwif->dma_start = &pdc202xx_old_ide_dma_start;
303 hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
304 }
305 hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq;
306} 264}
307 265
308static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) 266static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
267 const char *name)
309{ 268{
269 unsigned long dmabase = pci_resource_start(dev, 4);
310 u8 udma_speed_flag = 0, primary_mode = 0, secondary_mode = 0; 270 u8 udma_speed_flag = 0, primary_mode = 0, secondary_mode = 0;
311 271
312 if (hwif->channel) { 272 if (dmabase == 0)
313 ide_setup_dma(hwif, dmabase); 273 goto out;
314 return;
315 }
316 274
317 udma_speed_flag = inb(dmabase | 0x1f); 275 udma_speed_flag = inb(dmabase | 0x1f);
318 primary_mode = inb(dmabase | 0x1a); 276 primary_mode = inb(dmabase | 0x1a);
319 secondary_mode = inb(dmabase | 0x1b); 277 secondary_mode = inb(dmabase | 0x1b);
320 printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \ 278 printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \
321 "Primary %s Mode " \ 279 "Primary %s Mode " \
322 "Secondary %s Mode.\n", hwif->cds->name, 280 "Secondary %s Mode.\n", pci_name(dev),
323 (udma_speed_flag & 1) ? "EN" : "DIS", 281 (udma_speed_flag & 1) ? "EN" : "DIS",
324 (primary_mode & 1) ? "MASTER" : "PCI", 282 (primary_mode & 1) ? "MASTER" : "PCI",
325 (secondary_mode & 1) ? "MASTER" : "PCI" ); 283 (secondary_mode & 1) ? "MASTER" : "PCI" );
326 284
327 if (!(udma_speed_flag & 1)) { 285 if (!(udma_speed_flag & 1)) {
328 printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ", 286 printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ",
329 hwif->cds->name, udma_speed_flag, 287 pci_name(dev), udma_speed_flag,
330 (udma_speed_flag|1)); 288 (udma_speed_flag|1));
331 outb(udma_speed_flag | 1, dmabase | 0x1f); 289 outb(udma_speed_flag | 1, dmabase | 0x1f);
332 printk("%sACTIVE\n", (inb(dmabase | 0x1f) & 1) ? "" : "IN"); 290 printk("%sACTIVE\n", (inb(dmabase | 0x1f) & 1) ? "" : "IN");
333 } 291 }
334 292out:
335 ide_setup_dma(hwif, dmabase); 293 return dev->irq;
336} 294}
337 295
338static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, 296static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
@@ -357,13 +315,48 @@ static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev,
357 IDE_HFLAG_ABUSE_SET_DMA_MODE | \ 315 IDE_HFLAG_ABUSE_SET_DMA_MODE | \
358 IDE_HFLAG_OFF_BOARD) 316 IDE_HFLAG_OFF_BOARD)
359 317
318static const struct ide_port_ops pdc20246_port_ops = {
319 .set_pio_mode = pdc202xx_set_pio_mode,
320 .set_dma_mode = pdc202xx_set_mode,
321 .quirkproc = pdc202xx_quirkproc,
322};
323
324static const struct ide_port_ops pdc2026x_port_ops = {
325 .set_pio_mode = pdc202xx_set_pio_mode,
326 .set_dma_mode = pdc202xx_set_mode,
327 .quirkproc = pdc202xx_quirkproc,
328 .resetproc = pdc202xx_reset,
329 .cable_detect = pdc2026x_cable_detect,
330};
331
332static const struct ide_dma_ops pdc20246_dma_ops = {
333 .dma_host_set = ide_dma_host_set,
334 .dma_setup = ide_dma_setup,
335 .dma_exec_cmd = ide_dma_exec_cmd,
336 .dma_start = ide_dma_start,
337 .dma_end = __ide_dma_end,
338 .dma_test_irq = pdc202xx_dma_test_irq,
339 .dma_lost_irq = pdc202xx_dma_lost_irq,
340 .dma_timeout = pdc202xx_dma_timeout,
341};
342
343static const struct ide_dma_ops pdc2026x_dma_ops = {
344 .dma_host_set = ide_dma_host_set,
345 .dma_setup = ide_dma_setup,
346 .dma_exec_cmd = ide_dma_exec_cmd,
347 .dma_start = pdc202xx_dma_start,
348 .dma_end = pdc202xx_dma_end,
349 .dma_test_irq = pdc202xx_dma_test_irq,
350 .dma_lost_irq = pdc202xx_dma_lost_irq,
351 .dma_timeout = pdc202xx_dma_timeout,
352};
353
360#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ 354#define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \
361 { \ 355 { \
362 .name = name_str, \ 356 .name = name_str, \
363 .init_chipset = init_chipset_pdc202xx, \ 357 .init_chipset = init_chipset_pdc202xx, \
364 .init_hwif = init_hwif_pdc202xx, \ 358 .port_ops = &pdc2026x_port_ops, \
365 .init_dma = init_dma_pdc202xx, \ 359 .dma_ops = &pdc2026x_dma_ops, \
366 .extra = 48, \
367 .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \ 360 .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \
368 .pio_mask = ATA_PIO4, \ 361 .pio_mask = ATA_PIO4, \
369 .mwdma_mask = ATA_MWDMA2, \ 362 .mwdma_mask = ATA_MWDMA2, \
@@ -374,9 +367,8 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = {
374 { /* 0 */ 367 { /* 0 */
375 .name = "PDC20246", 368 .name = "PDC20246",
376 .init_chipset = init_chipset_pdc202xx, 369 .init_chipset = init_chipset_pdc202xx,
377 .init_hwif = init_hwif_pdc202xx, 370 .port_ops = &pdc20246_port_ops,
378 .init_dma = init_dma_pdc202xx, 371 .dma_ops = &pdc20246_dma_ops,
379 .extra = 16,
380 .host_flags = IDE_HFLAGS_PDC202XX, 372 .host_flags = IDE_HFLAGS_PDC202XX,
381 .pio_mask = ATA_PIO4, 373 .pio_mask = ATA_PIO4,
382 .mwdma_mask = ATA_MWDMA2, 374 .mwdma_mask = ATA_MWDMA2,
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 89d74ffdb207..21c5dd23f928 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -285,11 +285,6 @@ static u8 __devinit piix_cable_detect(ide_hwif_t *hwif)
285 285
286static void __devinit init_hwif_piix(ide_hwif_t *hwif) 286static void __devinit init_hwif_piix(ide_hwif_t *hwif)
287{ 287{
288 hwif->set_pio_mode = &piix_set_pio_mode;
289 hwif->set_dma_mode = &piix_set_dma_mode;
290
291 hwif->cable_detect = piix_cable_detect;
292
293 if (!hwif->dma_base) 288 if (!hwif->dma_base)
294 return; 289 return;
295 290
@@ -306,6 +301,12 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif)
306 hwif->ide_dma_clear_irq = &piix_dma_clear_irq; 301 hwif->ide_dma_clear_irq = &piix_dma_clear_irq;
307} 302}
308 303
304static const struct ide_port_ops piix_port_ops = {
305 .set_pio_mode = piix_set_pio_mode,
306 .set_dma_mode = piix_set_dma_mode,
307 .cable_detect = piix_cable_detect,
308};
309
309#ifndef CONFIG_IA64 310#ifndef CONFIG_IA64
310 #define IDE_HFLAGS_PIIX IDE_HFLAG_LEGACY_IRQS 311 #define IDE_HFLAGS_PIIX IDE_HFLAG_LEGACY_IRQS
311#else 312#else
@@ -317,6 +318,7 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif)
317 .name = name_str, \ 318 .name = name_str, \
318 .init_hwif = init_hwif_piix, \ 319 .init_hwif = init_hwif_piix, \
319 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 320 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
321 .port_ops = &piix_port_ops, \
320 .host_flags = IDE_HFLAGS_PIIX, \ 322 .host_flags = IDE_HFLAGS_PIIX, \
321 .pio_mask = ATA_PIO4, \ 323 .pio_mask = ATA_PIO4, \
322 .swdma_mask = ATA_SWDMA2_ONLY, \ 324 .swdma_mask = ATA_SWDMA2_ONLY, \
@@ -330,6 +332,7 @@ static void __devinit init_hwif_ich(ide_hwif_t *hwif)
330 .init_chipset = init_chipset_ich, \ 332 .init_chipset = init_chipset_ich, \
331 .init_hwif = init_hwif_ich, \ 333 .init_hwif = init_hwif_ich, \
332 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \ 334 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
335 .port_ops = &piix_port_ops, \
333 .host_flags = IDE_HFLAGS_PIIX, \ 336 .host_flags = IDE_HFLAGS_PIIX, \
334 .pio_mask = ATA_PIO4, \ 337 .pio_mask = ATA_PIO4, \
335 .swdma_mask = ATA_SWDMA2_ONLY, \ 338 .swdma_mask = ATA_SWDMA2_ONLY, \
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 44985c8f36e7..14c787b5d95f 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -165,7 +165,7 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
165 * 165 *
166 * returns 1 on error, 0 otherwise 166 * returns 1 on error, 0 otherwise
167 */ 167 */
168static int sc1200_ide_dma_end (ide_drive_t *drive) 168static int sc1200_dma_end(ide_drive_t *drive)
169{ 169{
170 ide_hwif_t *hwif = HWIF(drive); 170 ide_hwif_t *hwif = HWIF(drive);
171 unsigned long dma_base = hwif->dma_base; 171 unsigned long dma_base = hwif->dma_base;
@@ -214,7 +214,7 @@ static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
214 printk("SC1200: %s: changing (U)DMA mode\n", drive->name); 214 printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
215 ide_dma_off_quietly(drive); 215 ide_dma_off_quietly(drive);
216 if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma) 216 if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma)
217 hwif->dma_host_set(drive, 1); 217 hwif->dma_ops->dma_host_set(drive, 1);
218 return; 218 return;
219 } 219 }
220 220
@@ -286,25 +286,27 @@ static int sc1200_resume (struct pci_dev *dev)
286} 286}
287#endif 287#endif
288 288
289/* 289static const struct ide_port_ops sc1200_port_ops = {
290 * This gets invoked by the IDE driver once for each channel, 290 .set_pio_mode = sc1200_set_pio_mode,
291 * and performs channel-specific pre-initialization before drive probing. 291 .set_dma_mode = sc1200_set_dma_mode,
292 */ 292 .udma_filter = sc1200_udma_filter,
293static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif) 293};
294{
295 hwif->set_pio_mode = &sc1200_set_pio_mode;
296 hwif->set_dma_mode = &sc1200_set_dma_mode;
297
298 if (hwif->dma_base == 0)
299 return;
300 294
301 hwif->udma_filter = sc1200_udma_filter; 295static const struct ide_dma_ops sc1200_dma_ops = {
302 hwif->ide_dma_end = &sc1200_ide_dma_end; 296 .dma_host_set = ide_dma_host_set,
303} 297 .dma_setup = ide_dma_setup,
298 .dma_exec_cmd = ide_dma_exec_cmd,
299 .dma_start = ide_dma_start,
300 .dma_end = sc1200_dma_end,
301 .dma_test_irq = ide_dma_test_irq,
302 .dma_lost_irq = ide_dma_lost_irq,
303 .dma_timeout = ide_dma_timeout,
304};
304 305
305static const struct ide_port_info sc1200_chipset __devinitdata = { 306static const struct ide_port_info sc1200_chipset __devinitdata = {
306 .name = "SC1200", 307 .name = "SC1200",
307 .init_hwif = init_hwif_sc1200, 308 .port_ops = &sc1200_port_ops,
309 .dma_ops = &sc1200_dma_ops,
308 .host_flags = IDE_HFLAG_SERIALIZE | 310 .host_flags = IDE_HFLAG_SERIALIZE |
309 IDE_HFLAG_POST_SET_MODE | 311 IDE_HFLAG_POST_SET_MODE |
310 IDE_HFLAG_ABUSE_DMA_MODES, 312 IDE_HFLAG_ABUSE_DMA_MODES,
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 52145796f12f..17cf86490d59 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -317,14 +317,14 @@ static int scc_dma_setup(ide_drive_t *drive)
317 317
318 318
319/** 319/**
320 * scc_ide_dma_end - Stop DMA 320 * scc_dma_end - Stop DMA
321 * @drive: IDE drive 321 * @drive: IDE drive
322 * 322 *
323 * Check and clear INT Status register. 323 * Check and clear INT Status register.
324 * Then call __ide_dma_end(). 324 * Then call __ide_dma_end().
325 */ 325 */
326 326
327static int scc_ide_dma_end(ide_drive_t * drive) 327static int scc_dma_end(ide_drive_t *drive)
328{ 328{
329 ide_hwif_t *hwif = HWIF(drive); 329 ide_hwif_t *hwif = HWIF(drive);
330 unsigned long intsts_port = hwif->dma_base + 0x014; 330 unsigned long intsts_port = hwif->dma_base + 0x014;
@@ -449,7 +449,7 @@ static int scc_dma_test_irq(ide_drive_t *drive)
449 449
450 if (!drive->waiting_for_dma) 450 if (!drive->waiting_for_dma)
451 printk(KERN_WARNING "%s: (%s) called while not waiting\n", 451 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
452 drive->name, __FUNCTION__); 452 drive->name, __func__);
453 return 0; 453 return 0;
454} 454}
455 455
@@ -483,7 +483,7 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
483 unsigned long dma_size = pci_resource_len(dev, 1); 483 unsigned long dma_size = pci_resource_len(dev, 1);
484 void __iomem *ctl_addr; 484 void __iomem *ctl_addr;
485 void __iomem *dma_addr; 485 void __iomem *dma_addr;
486 int i; 486 int i, ret;
487 487
488 for (i = 0; i < MAX_HWIFS; i++) { 488 for (i = 0; i < MAX_HWIFS; i++) {
489 if (scc_ports[i].ctl == 0) 489 if (scc_ports[i].ctl == 0)
@@ -492,21 +492,17 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
492 if (i >= MAX_HWIFS) 492 if (i >= MAX_HWIFS)
493 return -ENOMEM; 493 return -ENOMEM;
494 494
495 if (!request_mem_region(ctl_base, ctl_size, name)) { 495 ret = pci_request_selected_regions(dev, (1 << 2) - 1, name);
496 printk(KERN_WARNING "%s: IDE controller MMIO ports not available.\n", SCC_PATA_NAME); 496 if (ret < 0) {
497 goto fail_0; 497 printk(KERN_ERR "%s: can't reserve resources\n", name);
498 } 498 return ret;
499
500 if (!request_mem_region(dma_base, dma_size, name)) {
501 printk(KERN_WARNING "%s: IDE controller MMIO ports not available.\n", SCC_PATA_NAME);
502 goto fail_1;
503 } 499 }
504 500
505 if ((ctl_addr = ioremap(ctl_base, ctl_size)) == NULL) 501 if ((ctl_addr = ioremap(ctl_base, ctl_size)) == NULL)
506 goto fail_2; 502 goto fail_0;
507 503
508 if ((dma_addr = ioremap(dma_base, dma_size)) == NULL) 504 if ((dma_addr = ioremap(dma_base, dma_size)) == NULL)
509 goto fail_3; 505 goto fail_1;
510 506
511 pci_set_master(dev); 507 pci_set_master(dev);
512 scc_ports[i].ctl = (unsigned long)ctl_addr; 508 scc_ports[i].ctl = (unsigned long)ctl_addr;
@@ -515,12 +511,8 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
515 511
516 return 1; 512 return 1;
517 513
518 fail_3:
519 iounmap(ctl_addr);
520 fail_2:
521 release_mem_region(dma_base, dma_size);
522 fail_1: 514 fail_1:
523 release_mem_region(ctl_base, ctl_size); 515 iounmap(ctl_addr);
524 fail_0: 516 fail_0:
525 return -ENOMEM; 517 return -ENOMEM;
526} 518}
@@ -549,7 +541,6 @@ static int scc_ide_setup_pci_device(struct pci_dev *dev,
549 hw.chipset = ide_pci; 541 hw.chipset = ide_pci;
550 ide_init_port_hw(hwif, &hw); 542 ide_init_port_hw(hwif, &hw);
551 hwif->dev = &dev->dev; 543 hwif->dev = &dev->dev;
552 hwif->cds = d;
553 544
554 idx[0] = hwif->index; 545 idx[0] = hwif->index;
555 546
@@ -701,26 +692,37 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
701 /* PTERADD */ 692 /* PTERADD */
702 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma); 693 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
703 694
704 hwif->dma_setup = scc_dma_setup;
705 hwif->ide_dma_end = scc_ide_dma_end;
706 hwif->set_pio_mode = scc_set_pio_mode;
707 hwif->set_dma_mode = scc_set_dma_mode;
708 hwif->ide_dma_test_irq = scc_dma_test_irq;
709 hwif->udma_filter = scc_udma_filter;
710
711 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) 695 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN)
712 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */ 696 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */
713 else 697 else
714 hwif->ultra_mask = ATA_UDMA5; /* 100MHz */ 698 hwif->ultra_mask = ATA_UDMA5; /* 100MHz */
715
716 hwif->cable_detect = scc_cable_detect;
717} 699}
718 700
701static const struct ide_port_ops scc_port_ops = {
702 .set_pio_mode = scc_set_pio_mode,
703 .set_dma_mode = scc_set_dma_mode,
704 .udma_filter = scc_udma_filter,
705 .cable_detect = scc_cable_detect,
706};
707
708static const struct ide_dma_ops scc_dma_ops = {
709 .dma_host_set = ide_dma_host_set,
710 .dma_setup = scc_dma_setup,
711 .dma_exec_cmd = ide_dma_exec_cmd,
712 .dma_start = ide_dma_start,
713 .dma_end = scc_dma_end,
714 .dma_test_irq = scc_dma_test_irq,
715 .dma_lost_irq = ide_dma_lost_irq,
716 .dma_timeout = ide_dma_timeout,
717};
718
719#define DECLARE_SCC_DEV(name_str) \ 719#define DECLARE_SCC_DEV(name_str) \
720 { \ 720 { \
721 .name = name_str, \ 721 .name = name_str, \
722 .init_iops = init_iops_scc, \ 722 .init_iops = init_iops_scc, \
723 .init_hwif = init_hwif_scc, \ 723 .init_hwif = init_hwif_scc, \
724 .port_ops = &scc_port_ops, \
725 .dma_ops = &scc_dma_ops, \
724 .host_flags = IDE_HFLAG_SINGLE, \ 726 .host_flags = IDE_HFLAG_SINGLE, \
725 .pio_mask = ATA_PIO4, \ 727 .pio_mask = ATA_PIO4, \
726 } 728 }
@@ -754,10 +756,6 @@ static void __devexit scc_remove(struct pci_dev *dev)
754{ 756{
755 struct scc_ports *ports = pci_get_drvdata(dev); 757 struct scc_ports *ports = pci_get_drvdata(dev);
756 ide_hwif_t *hwif = ports->hwif; 758 ide_hwif_t *hwif = ports->hwif;
757 unsigned long ctl_base = pci_resource_start(dev, 0);
758 unsigned long dma_base = pci_resource_start(dev, 1);
759 unsigned long ctl_size = pci_resource_len(dev, 0);
760 unsigned long dma_size = pci_resource_len(dev, 1);
761 759
762 if (hwif->dmatable_cpu) { 760 if (hwif->dmatable_cpu) {
763 pci_free_consistent(dev, PRD_ENTRIES * PRD_BYTES, 761 pci_free_consistent(dev, PRD_ENTRIES * PRD_BYTES,
@@ -770,8 +768,7 @@ static void __devexit scc_remove(struct pci_dev *dev)
770 hwif->chipset = ide_unknown; 768 hwif->chipset = ide_unknown;
771 iounmap((void*)ports->dma); 769 iounmap((void*)ports->dma);
772 iounmap((void*)ports->ctl); 770 iounmap((void*)ports->ctl);
773 release_mem_region(dma_base, dma_size); 771 pci_release_selected_regions(dev, (1 << 2) - 1);
774 release_mem_region(ctl_base, ctl_size);
775 memset(ports, 0, sizeof(*ports)); 772 memset(ports, 0, sizeof(*ports));
776} 773}
777 774
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index cfe927469793..a1fb20826a5b 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -312,7 +312,7 @@ static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
312 return ATA_CBL_PATA40; 312 return ATA_CBL_PATA40;
313} 313}
314 314
315static u8 __devinit ata66_svwks(ide_hwif_t *hwif) 315static u8 __devinit svwks_cable_detect(ide_hwif_t *hwif)
316{ 316{
317 struct pci_dev *dev = to_pci_dev(hwif->dev); 317 struct pci_dev *dev = to_pci_dev(hwif->dev);
318 318
@@ -336,17 +336,18 @@ static u8 __devinit ata66_svwks(ide_hwif_t *hwif)
336 return ATA_CBL_PATA40; 336 return ATA_CBL_PATA40;
337} 337}
338 338
339static void __devinit init_hwif_svwks (ide_hwif_t *hwif) 339static const struct ide_port_ops osb4_port_ops = {
340{ 340 .set_pio_mode = svwks_set_pio_mode,
341 struct pci_dev *dev = to_pci_dev(hwif->dev); 341 .set_dma_mode = svwks_set_dma_mode,
342 342 .udma_filter = svwks_udma_filter,
343 hwif->set_pio_mode = &svwks_set_pio_mode; 343};
344 hwif->set_dma_mode = &svwks_set_dma_mode;
345 hwif->udma_filter = &svwks_udma_filter;
346 344
347 if (dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) 345static const struct ide_port_ops svwks_port_ops = {
348 hwif->cable_detect = ata66_svwks; 346 .set_pio_mode = svwks_set_pio_mode,
349} 347 .set_dma_mode = svwks_set_dma_mode,
348 .udma_filter = svwks_udma_filter,
349 .cable_detect = svwks_cable_detect,
350};
350 351
351#define IDE_HFLAGS_SVWKS \ 352#define IDE_HFLAGS_SVWKS \
352 (IDE_HFLAG_LEGACY_IRQS | \ 353 (IDE_HFLAG_LEGACY_IRQS | \
@@ -356,7 +357,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
356 { /* 0 */ 357 { /* 0 */
357 .name = "SvrWks OSB4", 358 .name = "SvrWks OSB4",
358 .init_chipset = init_chipset_svwks, 359 .init_chipset = init_chipset_svwks,
359 .init_hwif = init_hwif_svwks, 360 .port_ops = &osb4_port_ops,
360 .host_flags = IDE_HFLAGS_SVWKS, 361 .host_flags = IDE_HFLAGS_SVWKS,
361 .pio_mask = ATA_PIO4, 362 .pio_mask = ATA_PIO4,
362 .mwdma_mask = ATA_MWDMA2, 363 .mwdma_mask = ATA_MWDMA2,
@@ -364,7 +365,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
364 },{ /* 1 */ 365 },{ /* 1 */
365 .name = "SvrWks CSB5", 366 .name = "SvrWks CSB5",
366 .init_chipset = init_chipset_svwks, 367 .init_chipset = init_chipset_svwks,
367 .init_hwif = init_hwif_svwks, 368 .port_ops = &svwks_port_ops,
368 .host_flags = IDE_HFLAGS_SVWKS, 369 .host_flags = IDE_HFLAGS_SVWKS,
369 .pio_mask = ATA_PIO4, 370 .pio_mask = ATA_PIO4,
370 .mwdma_mask = ATA_MWDMA2, 371 .mwdma_mask = ATA_MWDMA2,
@@ -372,7 +373,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
372 },{ /* 2 */ 373 },{ /* 2 */
373 .name = "SvrWks CSB6", 374 .name = "SvrWks CSB6",
374 .init_chipset = init_chipset_svwks, 375 .init_chipset = init_chipset_svwks,
375 .init_hwif = init_hwif_svwks, 376 .port_ops = &svwks_port_ops,
376 .host_flags = IDE_HFLAGS_SVWKS, 377 .host_flags = IDE_HFLAGS_SVWKS,
377 .pio_mask = ATA_PIO4, 378 .pio_mask = ATA_PIO4,
378 .mwdma_mask = ATA_MWDMA2, 379 .mwdma_mask = ATA_MWDMA2,
@@ -380,7 +381,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
380 },{ /* 3 */ 381 },{ /* 3 */
381 .name = "SvrWks CSB6", 382 .name = "SvrWks CSB6",
382 .init_chipset = init_chipset_svwks, 383 .init_chipset = init_chipset_svwks,
383 .init_hwif = init_hwif_svwks, 384 .port_ops = &svwks_port_ops,
384 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 385 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
385 .pio_mask = ATA_PIO4, 386 .pio_mask = ATA_PIO4,
386 .mwdma_mask = ATA_MWDMA2, 387 .mwdma_mask = ATA_MWDMA2,
@@ -388,7 +389,7 @@ static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
388 },{ /* 4 */ 389 },{ /* 4 */
389 .name = "SvrWks HT1000", 390 .name = "SvrWks HT1000",
390 .init_chipset = init_chipset_svwks, 391 .init_chipset = init_chipset_svwks,
391 .init_hwif = init_hwif_svwks, 392 .port_ops = &svwks_port_ops,
392 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 393 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
393 .pio_mask = ATA_PIO4, 394 .pio_mask = ATA_PIO4,
394 .mwdma_mask = ATA_MWDMA2, 395 .mwdma_mask = ATA_MWDMA2,
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 6bd9523cf642..321a4e28ac19 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -170,10 +170,10 @@ sgiioc4_clearirq(ide_drive_t * drive)
170 printk(KERN_ERR 170 printk(KERN_ERR
171 "%s(%s) : PCI Bus Error when doing DMA:" 171 "%s(%s) : PCI Bus Error when doing DMA:"
172 " status-cmd reg is 0x%x\n", 172 " status-cmd reg is 0x%x\n",
173 __FUNCTION__, drive->name, pci_stat_cmd_reg); 173 __func__, drive->name, pci_stat_cmd_reg);
174 printk(KERN_ERR 174 printk(KERN_ERR
175 "%s(%s) : PCI Error Address is 0x%x%x\n", 175 "%s(%s) : PCI Error Address is 0x%x%x\n",
176 __FUNCTION__, drive->name, 176 __func__, drive->name,
177 pci_err_addr_high, pci_err_addr_low); 177 pci_err_addr_high, pci_err_addr_low);
178 /* Clear the PCI Error indicator */ 178 /* Clear the PCI Error indicator */
179 pci_write_config_dword(dev, PCI_COMMAND, 0x00000146); 179 pci_write_config_dword(dev, PCI_COMMAND, 0x00000146);
@@ -188,7 +188,7 @@ sgiioc4_clearirq(ide_drive_t * drive)
188 return intr_reg & 3; 188 return intr_reg & 3;
189} 189}
190 190
191static void sgiioc4_ide_dma_start(ide_drive_t * drive) 191static void sgiioc4_dma_start(ide_drive_t *drive)
192{ 192{
193 ide_hwif_t *hwif = HWIF(drive); 193 ide_hwif_t *hwif = HWIF(drive);
194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4; 194 unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4;
@@ -215,8 +215,7 @@ sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base)
215} 215}
216 216
217/* Stops the IOC4 DMA Engine */ 217/* Stops the IOC4 DMA Engine */
218static int 218static int sgiioc4_dma_end(ide_drive_t *drive)
219sgiioc4_ide_dma_end(ide_drive_t * drive)
220{ 219{
221 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0; 220 u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0;
222 ide_hwif_t *hwif = HWIF(drive); 221 ide_hwif_t *hwif = HWIF(drive);
@@ -232,7 +231,7 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
232 printk(KERN_ERR 231 printk(KERN_ERR
233 "%s(%s): IOC4 DMA STOP bit is still 1 :" 232 "%s(%s): IOC4 DMA STOP bit is still 1 :"
234 "ioc4_dma_reg 0x%x\n", 233 "ioc4_dma_reg 0x%x\n",
235 __FUNCTION__, drive->name, ioc4_dma); 234 __func__, drive->name, ioc4_dma);
236 dma_stat = 1; 235 dma_stat = 1;
237 } 236 }
238 237
@@ -251,7 +250,7 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
251 udelay(1); 250 udelay(1);
252 } 251 }
253 if (!valid) { 252 if (!valid) {
254 printk(KERN_ERR "%s(%s) : DMA incomplete\n", __FUNCTION__, 253 printk(KERN_ERR "%s(%s) : DMA incomplete\n", __func__,
255 drive->name); 254 drive->name);
256 dma_stat = 1; 255 dma_stat = 1;
257 } 256 }
@@ -264,7 +263,7 @@ sgiioc4_ide_dma_end(ide_drive_t * drive)
264 printk(KERN_ERR 263 printk(KERN_ERR
265 "%s(%s): WARNING!! byte_count_dev %d " 264 "%s(%s): WARNING!! byte_count_dev %d "
266 "!= byte_count_mem %d\n", 265 "!= byte_count_mem %d\n",
267 __FUNCTION__, drive->name, bc_dev, bc_mem); 266 __func__, drive->name, bc_dev, bc_mem);
268 } 267 }
269 } 268 }
270 269
@@ -279,8 +278,7 @@ static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
279} 278}
280 279
281/* returns 1 if dma irq issued, 0 otherwise */ 280/* returns 1 if dma irq issued, 0 otherwise */
282static int 281static int sgiioc4_dma_test_irq(ide_drive_t *drive)
283sgiioc4_ide_dma_test_irq(ide_drive_t * drive)
284{ 282{
285 return sgiioc4_checkirq(HWIF(drive)); 283 return sgiioc4_checkirq(HWIF(drive));
286} 284}
@@ -294,7 +292,7 @@ static void sgiioc4_dma_host_set(ide_drive_t *drive, int on)
294static void 292static void
295sgiioc4_resetproc(ide_drive_t * drive) 293sgiioc4_resetproc(ide_drive_t * drive)
296{ 294{
297 sgiioc4_ide_dma_end(drive); 295 sgiioc4_dma_end(drive);
298 sgiioc4_clearirq(drive); 296 sgiioc4_clearirq(drive);
299} 297}
300 298
@@ -329,13 +327,17 @@ sgiioc4_INB(unsigned long port)
329 327
330/* Creates a dma map for the scatter-gather list entries */ 328/* Creates a dma map for the scatter-gather list entries */
331static int __devinit 329static int __devinit
332ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) 330ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d)
333{ 331{
334 struct pci_dev *dev = to_pci_dev(hwif->dev); 332 struct pci_dev *dev = to_pci_dev(hwif->dev);
333 unsigned long dma_base = pci_resource_start(dev, 0) + IOC4_DMA_OFFSET;
335 void __iomem *virt_dma_base; 334 void __iomem *virt_dma_base;
336 int num_ports = sizeof (ioc4_dma_regs_t); 335 int num_ports = sizeof (ioc4_dma_regs_t);
337 void *pad; 336 void *pad;
338 337
338 if (dma_base == 0)
339 return -1;
340
339 printk(KERN_INFO "%s: BM-DMA at 0x%04lx-0x%04lx\n", hwif->name, 341 printk(KERN_INFO "%s: BM-DMA at 0x%04lx-0x%04lx\n", hwif->name,
340 dma_base, dma_base + num_ports - 1); 342 dma_base, dma_base + num_ports - 1);
341 343
@@ -343,7 +345,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
343 printk(KERN_ERR 345 printk(KERN_ERR
344 "%s(%s) -- ERROR, Addresses 0x%p to 0x%p " 346 "%s(%s) -- ERROR, Addresses 0x%p to 0x%p "
345 "ALREADY in use\n", 347 "ALREADY in use\n",
346 __FUNCTION__, hwif->name, (void *) dma_base, 348 __func__, hwif->name, (void *) dma_base,
347 (void *) dma_base + num_ports - 1); 349 (void *) dma_base + num_ports - 1);
348 return -1; 350 return -1;
349 } 351 }
@@ -352,7 +354,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
352 if (virt_dma_base == NULL) { 354 if (virt_dma_base == NULL) {
353 printk(KERN_ERR 355 printk(KERN_ERR
354 "%s(%s) -- ERROR, Unable to map addresses 0x%lx to 0x%lx\n", 356 "%s(%s) -- ERROR, Unable to map addresses 0x%lx to 0x%lx\n",
355 __FUNCTION__, hwif->name, dma_base, dma_base + num_ports - 1); 357 __func__, hwif->name, dma_base, dma_base + num_ports - 1);
356 goto dma_remap_failure; 358 goto dma_remap_failure;
357 } 359 }
358 hwif->dma_base = (unsigned long) virt_dma_base; 360 hwif->dma_base = (unsigned long) virt_dma_base;
@@ -378,7 +380,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
378 hwif->dmatable_cpu, hwif->dmatable_dma); 380 hwif->dmatable_cpu, hwif->dmatable_dma);
379 printk(KERN_INFO 381 printk(KERN_INFO
380 "%s() -- Error! Unable to allocate DMA Maps for drive %s\n", 382 "%s() -- Error! Unable to allocate DMA Maps for drive %s\n",
381 __FUNCTION__, hwif->name); 383 __func__, hwif->name);
382 printk(KERN_INFO 384 printk(KERN_INFO
383 "Changing from DMA to PIO mode for Drive %s\n", hwif->name); 385 "Changing from DMA to PIO mode for Drive %s\n", hwif->name);
384 386
@@ -406,14 +408,14 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
406 if (ioc4_dma & IOC4_S_DMA_ACTIVE) { 408 if (ioc4_dma & IOC4_S_DMA_ACTIVE) {
407 printk(KERN_WARNING 409 printk(KERN_WARNING
408 "%s(%s):Warning!! DMA from previous transfer was still active\n", 410 "%s(%s):Warning!! DMA from previous transfer was still active\n",
409 __FUNCTION__, drive->name); 411 __func__, drive->name);
410 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr); 412 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
411 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base); 413 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
412 414
413 if (ioc4_dma & IOC4_S_DMA_STOP) 415 if (ioc4_dma & IOC4_S_DMA_STOP)
414 printk(KERN_ERR 416 printk(KERN_ERR
415 "%s(%s) : IOC4 Dma STOP bit is still 1\n", 417 "%s(%s) : IOC4 Dma STOP bit is still 1\n",
416 __FUNCTION__, drive->name); 418 __func__, drive->name);
417 } 419 }
418 420
419 ioc4_dma = readl((void __iomem *)ioc4_dma_addr); 421 ioc4_dma = readl((void __iomem *)ioc4_dma_addr);
@@ -421,14 +423,14 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
421 printk(KERN_WARNING 423 printk(KERN_WARNING
422 "%s(%s) : Warning!! - DMA Error during Previous" 424 "%s(%s) : Warning!! - DMA Error during Previous"
423 " transfer | status 0x%x\n", 425 " transfer | status 0x%x\n",
424 __FUNCTION__, drive->name, ioc4_dma); 426 __func__, drive->name, ioc4_dma);
425 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr); 427 writel(IOC4_S_DMA_STOP, (void __iomem *)ioc4_dma_addr);
426 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base); 428 ioc4_dma = sgiioc4_ide_dma_stop(hwif, dma_base);
427 429
428 if (ioc4_dma & IOC4_S_DMA_STOP) 430 if (ioc4_dma & IOC4_S_DMA_STOP)
429 printk(KERN_ERR 431 printk(KERN_ERR
430 "%s(%s) : IOC4 DMA STOP bit is still 1\n", 432 "%s(%s) : IOC4 DMA STOP bit is still 1\n",
431 __FUNCTION__, drive->name); 433 __func__, drive->name);
432 } 434 }
433 435
434 /* Address of the Scatter Gather List */ 436 /* Address of the Scatter Gather List */
@@ -519,7 +521,7 @@ use_pio_instead:
519 return 0; /* revert to PIO for this request */ 521 return 0; /* revert to PIO for this request */
520} 522}
521 523
522static int sgiioc4_ide_dma_setup(ide_drive_t *drive) 524static int sgiioc4_dma_setup(ide_drive_t *drive)
523{ 525{
524 struct request *rq = HWGROUP(drive)->rq; 526 struct request *rq = HWGROUP(drive)->rq;
525 unsigned int count = 0; 527 unsigned int count = 0;
@@ -548,45 +550,37 @@ static int sgiioc4_ide_dma_setup(ide_drive_t *drive)
548 return 0; 550 return 0;
549} 551}
550 552
551static void __devinit 553static const struct ide_port_ops sgiioc4_port_ops = {
552ide_init_sgiioc4(ide_hwif_t * hwif) 554 .set_dma_mode = sgiioc4_set_dma_mode,
553{ 555 /* reset DMA engine, clear IRQs */
554 hwif->mmio = 1; 556 .resetproc = sgiioc4_resetproc,
555 hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */ 557 /* mask on/off NIEN register */
556 hwif->set_dma_mode = &sgiioc4_set_dma_mode; 558 .maskproc = sgiioc4_maskproc,
557 hwif->selectproc = NULL;/* Use the default routine to select drive */ 559};
558 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */
559 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */
560 hwif->resetproc = &sgiioc4_resetproc;/* Reset DMA engine,
561 clear interrupts */
562 hwif->maskproc = &sgiioc4_maskproc; /* Mask on/off NIEN register */
563 hwif->quirkproc = NULL;
564
565 hwif->INB = &sgiioc4_INB;
566
567 if (hwif->dma_base == 0)
568 return;
569 560
570 hwif->dma_host_set = &sgiioc4_dma_host_set; 561static const struct ide_dma_ops sgiioc4_dma_ops = {
571 hwif->dma_setup = &sgiioc4_ide_dma_setup; 562 .dma_host_set = sgiioc4_dma_host_set,
572 hwif->dma_start = &sgiioc4_ide_dma_start; 563 .dma_setup = sgiioc4_dma_setup,
573 hwif->ide_dma_end = &sgiioc4_ide_dma_end; 564 .dma_start = sgiioc4_dma_start,
574 hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; 565 .dma_end = sgiioc4_dma_end,
575 hwif->dma_lost_irq = &sgiioc4_dma_lost_irq; 566 .dma_test_irq = sgiioc4_dma_test_irq,
576 hwif->dma_timeout = &ide_dma_timeout; 567 .dma_lost_irq = sgiioc4_dma_lost_irq,
577} 568 .dma_timeout = ide_dma_timeout,
569};
578 570
579static const struct ide_port_info sgiioc4_port_info __devinitdata = { 571static const struct ide_port_info sgiioc4_port_info __devinitdata = {
580 .chipset = ide_pci, 572 .chipset = ide_pci,
581 .host_flags = IDE_HFLAG_NO_DMA | /* no SFF-style DMA */ 573 .init_dma = ide_dma_sgiioc4,
582 IDE_HFLAG_NO_AUTOTUNE, 574 .port_ops = &sgiioc4_port_ops,
575 .dma_ops = &sgiioc4_dma_ops,
576 .host_flags = IDE_HFLAG_NO_AUTOTUNE,
583 .mwdma_mask = ATA_MWDMA2_ONLY, 577 .mwdma_mask = ATA_MWDMA2_ONLY,
584}; 578};
585 579
586static int __devinit 580static int __devinit
587sgiioc4_ide_setup_pci_device(struct pci_dev *dev) 581sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
588{ 582{
589 unsigned long cmd_base, dma_base, irqport; 583 unsigned long cmd_base, irqport;
590 unsigned long bar0, cmd_phys_base, ctl; 584 unsigned long bar0, cmd_phys_base, ctl;
591 void __iomem *virt_base; 585 void __iomem *virt_base;
592 ide_hwif_t *hwif; 586 ide_hwif_t *hwif;
@@ -612,7 +606,6 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
612 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET; 606 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET;
613 ctl = (unsigned long) virt_base + IOC4_CTRL_OFFSET; 607 ctl = (unsigned long) virt_base + IOC4_CTRL_OFFSET;
614 irqport = (unsigned long) virt_base + IOC4_INTR_OFFSET; 608 irqport = (unsigned long) virt_base + IOC4_INTR_OFFSET;
615 dma_base = pci_resource_start(dev, 0) + IOC4_DMA_OFFSET;
616 609
617 cmd_phys_base = bar0 + IOC4_CMD_OFFSET; 610 cmd_phys_base = bar0 + IOC4_CMD_OFFSET;
618 if (!request_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE, 611 if (!request_mem_region(cmd_phys_base, IOC4_CMD_CTL_BLK_SIZE,
@@ -620,7 +613,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
620 printk(KERN_ERR 613 printk(KERN_ERR
621 "%s : %s -- ERROR, Addresses " 614 "%s : %s -- ERROR, Addresses "
622 "0x%p to 0x%p ALREADY in use\n", 615 "0x%p to 0x%p ALREADY in use\n",
623 __FUNCTION__, hwif->name, (void *) cmd_phys_base, 616 __func__, hwif->name, (void *) cmd_phys_base,
624 (void *) cmd_phys_base + IOC4_CMD_CTL_BLK_SIZE); 617 (void *) cmd_phys_base + IOC4_CMD_CTL_BLK_SIZE);
625 return -ENOMEM; 618 return -ENOMEM;
626 } 619 }
@@ -641,13 +634,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
641 /* Initializing chipset IRQ Registers */ 634 /* Initializing chipset IRQ Registers */
642 writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4)); 635 writel(0x03, (void __iomem *)(irqport + IOC4_INTR_SET * 4));
643 636
644 if (dma_base == 0 || ide_dma_sgiioc4(hwif, dma_base)) { 637 hwif->INB = &sgiioc4_INB;
645 printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n",
646 hwif->name, DRV_NAME);
647 d.mwdma_mask = 0;
648 }
649
650 ide_init_sgiioc4(hwif);
651 638
652 idx[0] = hwif->index; 639 idx[0] = hwif->index;
653 640
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index c9ecab8aeb61..1fffea3211bd 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -301,7 +301,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
301} 301}
302 302
303/* returns 1 if dma irq issued, 0 otherwise */ 303/* returns 1 if dma irq issued, 0 otherwise */
304static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) 304static int siimage_io_dma_test_irq(ide_drive_t *drive)
305{ 305{
306 ide_hwif_t *hwif = HWIF(drive); 306 ide_hwif_t *hwif = HWIF(drive);
307 struct pci_dev *dev = to_pci_dev(hwif->dev); 307 struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -320,14 +320,14 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive)
320} 320}
321 321
322/** 322/**
323 * siimage_mmio_ide_dma_test_irq - check we caused an IRQ 323 * siimage_mmio_dma_test_irq - check we caused an IRQ
324 * @drive: drive we are testing 324 * @drive: drive we are testing
325 * 325 *
326 * Check if we caused an IDE DMA interrupt. We may also have caused 326 * Check if we caused an IDE DMA interrupt. We may also have caused
327 * SATA status interrupts, if so we clean them up and continue. 327 * SATA status interrupts, if so we clean them up and continue.
328 */ 328 */
329 329
330static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) 330static int siimage_mmio_dma_test_irq(ide_drive_t *drive)
331{ 331{
332 ide_hwif_t *hwif = HWIF(drive); 332 ide_hwif_t *hwif = HWIF(drive);
333 unsigned long addr = siimage_selreg(hwif, 0x1); 333 unsigned long addr = siimage_selreg(hwif, 0x1);
@@ -347,7 +347,7 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
347 printk(KERN_WARNING "%s: sata_error = 0x%08x, " 347 printk(KERN_WARNING "%s: sata_error = 0x%08x, "
348 "watchdog = %d, %s\n", 348 "watchdog = %d, %s\n",
349 drive->name, sata_error, watchdog, 349 drive->name, sata_error, watchdog,
350 __FUNCTION__); 350 __func__);
351 351
352 } else { 352 } else {
353 watchdog = (ext_stat & 0x8000) ? 1 : 0; 353 watchdog = (ext_stat & 0x8000) ? 1 : 0;
@@ -369,6 +369,14 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
369 return 0; 369 return 0;
370} 370}
371 371
372static int siimage_dma_test_irq(ide_drive_t *drive)
373{
374 if (drive->hwif->mmio)
375 return siimage_mmio_dma_test_irq(drive);
376 else
377 return siimage_io_dma_test_irq(drive);
378}
379
372/** 380/**
373 * sil_sata_reset_poll - wait for SATA reset 381 * sil_sata_reset_poll - wait for SATA reset
374 * @drive: drive we are resetting 382 * @drive: drive we are resetting
@@ -735,14 +743,14 @@ static void __devinit init_iops_siimage(ide_hwif_t *hwif)
735} 743}
736 744
737/** 745/**
738 * ata66_siimage - check for 80 pin cable 746 * sil_cable_detect - cable detection
739 * @hwif: interface to check 747 * @hwif: interface to check
740 * 748 *
741 * Check for the presence of an ATA66 capable cable on the 749 * Check for the presence of an ATA66 capable cable on the
742 * interface. 750 * interface.
743 */ 751 */
744 752
745static u8 __devinit ata66_siimage(ide_hwif_t *hwif) 753static u8 __devinit sil_cable_detect(ide_hwif_t *hwif)
746{ 754{
747 struct pci_dev *dev = to_pci_dev(hwif->dev); 755 struct pci_dev *dev = to_pci_dev(hwif->dev);
748 unsigned long addr = siimage_selreg(hwif, 0); 756 unsigned long addr = siimage_selreg(hwif, 0);
@@ -756,67 +764,44 @@ static u8 __devinit ata66_siimage(ide_hwif_t *hwif)
756 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; 764 return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
757} 765}
758 766
759/** 767static const struct ide_port_ops sil_pata_port_ops = {
760 * init_hwif_siimage - set up hwif structs 768 .set_pio_mode = sil_set_pio_mode,
761 * @hwif: interface to set up 769 .set_dma_mode = sil_set_dma_mode,
762 * 770 .quirkproc = sil_quirkproc,
763 * We do the basic set up of the interface structure. The SIIMAGE 771 .udma_filter = sil_pata_udma_filter,
764 * requires several custom handlers so we override the default 772 .cable_detect = sil_cable_detect,
765 * ide DMA handlers appropriately 773};
766 */
767
768static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
769{
770 u8 sata = is_sata(hwif);
771
772 hwif->set_pio_mode = &sil_set_pio_mode;
773 hwif->set_dma_mode = &sil_set_dma_mode;
774 hwif->quirkproc = &sil_quirkproc;
775
776 if (sata) {
777 static int first = 1;
778
779 hwif->reset_poll = &sil_sata_reset_poll;
780 hwif->pre_reset = &sil_sata_pre_reset;
781 hwif->udma_filter = &sil_sata_udma_filter;
782
783 if (first) {
784 printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n");
785 first = 0;
786 }
787 } else
788 hwif->udma_filter = &sil_pata_udma_filter;
789
790 hwif->cable_detect = ata66_siimage;
791
792 if (hwif->dma_base == 0)
793 return;
794 774
795 if (sata) 775static const struct ide_port_ops sil_sata_port_ops = {
796 hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; 776 .set_pio_mode = sil_set_pio_mode,
777 .set_dma_mode = sil_set_dma_mode,
778 .reset_poll = sil_sata_reset_poll,
779 .pre_reset = sil_sata_pre_reset,
780 .quirkproc = sil_quirkproc,
781 .udma_filter = sil_sata_udma_filter,
782 .cable_detect = sil_cable_detect,
783};
797 784
798 if (hwif->mmio) { 785static struct ide_dma_ops sil_dma_ops = {
799 hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq; 786 .dma_test_irq = siimage_dma_test_irq,
800 } else { 787};
801 hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
802 }
803}
804 788
805#define DECLARE_SII_DEV(name_str) \ 789#define DECLARE_SII_DEV(name_str, p_ops) \
806 { \ 790 { \
807 .name = name_str, \ 791 .name = name_str, \
808 .init_chipset = init_chipset_siimage, \ 792 .init_chipset = init_chipset_siimage, \
809 .init_iops = init_iops_siimage, \ 793 .init_iops = init_iops_siimage, \
810 .init_hwif = init_hwif_siimage, \ 794 .port_ops = p_ops, \
795 .dma_ops = &sil_dma_ops, \
811 .pio_mask = ATA_PIO4, \ 796 .pio_mask = ATA_PIO4, \
812 .mwdma_mask = ATA_MWDMA2, \ 797 .mwdma_mask = ATA_MWDMA2, \
813 .udma_mask = ATA_UDMA6, \ 798 .udma_mask = ATA_UDMA6, \
814 } 799 }
815 800
816static const struct ide_port_info siimage_chipsets[] __devinitdata = { 801static const struct ide_port_info siimage_chipsets[] __devinitdata = {
817 /* 0 */ DECLARE_SII_DEV("SiI680"), 802 /* 0 */ DECLARE_SII_DEV("SiI680", &sil_pata_port_ops),
818 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA"), 803 /* 1 */ DECLARE_SII_DEV("SiI3112 Serial ATA", &sil_sata_port_ops),
819 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA") 804 /* 2 */ DECLARE_SII_DEV("Adaptec AAR-1210SA", &sil_sata_port_ops)
820}; 805};
821 806
822/** 807/**
@@ -830,7 +815,24 @@ static const struct ide_port_info siimage_chipsets[] __devinitdata = {
830 815
831static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id) 816static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id)
832{ 817{
833 return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]); 818 struct ide_port_info d;
819 u8 idx = id->driver_data;
820
821 d = siimage_chipsets[idx];
822
823 if (idx) {
824 static int first = 1;
825
826 if (first) {
827 printk(KERN_INFO "siimage: For full SATA support you "
828 "should use the libata sata_sil module.\n");
829 first = 0;
830 }
831
832 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
833 }
834
835 return ide_setup_pci_device(dev, &d);
834} 836}
835 837
836static const struct pci_device_id siimage_pci_tbl[] = { 838static const struct pci_device_id siimage_pci_tbl[] = {
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 181b647e5ca9..4b0b85d8faf5 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -347,7 +347,7 @@ static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed)
347 sis_program_timings(drive, speed); 347 sis_program_timings(drive, speed);
348} 348}
349 349
350static u8 sis5513_ata133_udma_filter(ide_drive_t *drive) 350static u8 sis_ata133_udma_filter(ide_drive_t *drive)
351{ 351{
352 struct pci_dev *dev = to_pci_dev(drive->hwif->dev); 352 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
353 u32 regdw = 0; 353 u32 regdw = 0;
@@ -514,7 +514,7 @@ static const struct sis_laptop sis_laptop[] = {
514 { 0, } 514 { 0, }
515}; 515};
516 516
517static u8 __devinit ata66_sis5513(ide_hwif_t *hwif) 517static u8 __devinit sis_cable_detect(ide_hwif_t *hwif)
518{ 518{
519 struct pci_dev *pdev = to_pci_dev(hwif->dev); 519 struct pci_dev *pdev = to_pci_dev(hwif->dev);
520 const struct sis_laptop *lap = &sis_laptop[0]; 520 const struct sis_laptop *lap = &sis_laptop[0];
@@ -543,21 +543,22 @@ static u8 __devinit ata66_sis5513(ide_hwif_t *hwif)
543 return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; 543 return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
544} 544}
545 545
546static void __devinit init_hwif_sis5513(ide_hwif_t *hwif) 546static const struct ide_port_ops sis_port_ops = {
547{ 547 .set_pio_mode = sis_set_pio_mode,
548 hwif->set_pio_mode = &sis_set_pio_mode; 548 .set_dma_mode = sis_set_dma_mode,
549 hwif->set_dma_mode = &sis_set_dma_mode; 549 .cable_detect = sis_cable_detect,
550 550};
551 if (chipset_family >= ATA_133)
552 hwif->udma_filter = sis5513_ata133_udma_filter;
553 551
554 hwif->cable_detect = ata66_sis5513; 552static const struct ide_port_ops sis_ata133_port_ops = {
555} 553 .set_pio_mode = sis_set_pio_mode,
554 .set_dma_mode = sis_set_dma_mode,
555 .udma_filter = sis_ata133_udma_filter,
556 .cable_detect = sis_cable_detect,
557};
556 558
557static const struct ide_port_info sis5513_chipset __devinitdata = { 559static const struct ide_port_info sis5513_chipset __devinitdata = {
558 .name = "SIS5513", 560 .name = "SIS5513",
559 .init_chipset = init_chipset_sis5513, 561 .init_chipset = init_chipset_sis5513,
560 .init_hwif = init_hwif_sis5513,
561 .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} }, 562 .enablebits = { {0x4a, 0x02, 0x02}, {0x4a, 0x04, 0x04} },
562 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA, 563 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_NO_AUTODMA,
563 .pio_mask = ATA_PIO4, 564 .pio_mask = ATA_PIO4,
@@ -572,6 +573,11 @@ static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_devi
572 if (sis_find_family(dev) == 0) 573 if (sis_find_family(dev) == 0)
573 return -ENOTSUPP; 574 return -ENOTSUPP;
574 575
576 if (chipset_family >= ATA_133)
577 d.port_ops = &sis_ata133_port_ops;
578 else
579 d.port_ops = &sis_port_ops;
580
575 d.udma_mask = udma_rates[chipset_family]; 581 d.udma_mask = udma_rates[chipset_family];
576 582
577 return ide_setup_pci_device(dev, &d); 583 return ide_setup_pci_device(dev, &d);
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 40b3eeb2d847..ce84fa045d39 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -179,7 +179,7 @@ static void sl82c105_dma_start(ide_drive_t *drive)
179 struct pci_dev *dev = to_pci_dev(hwif->dev); 179 struct pci_dev *dev = to_pci_dev(hwif->dev);
180 int reg = 0x44 + drive->dn * 4; 180 int reg = 0x44 + drive->dn * 4;
181 181
182 DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name)); 182 DBG(("%s(drive:%s)\n", __func__, drive->name));
183 183
184 pci_write_config_word(dev, reg, drive->drive_data >> 16); 184 pci_write_config_word(dev, reg, drive->drive_data >> 16);
185 185
@@ -203,7 +203,7 @@ static int sl82c105_dma_end(ide_drive_t *drive)
203 int reg = 0x44 + drive->dn * 4; 203 int reg = 0x44 + drive->dn * 4;
204 int ret; 204 int ret;
205 205
206 DBG(("%s(drive:%s)\n", __FUNCTION__, drive->name)); 206 DBG(("%s(drive:%s)\n", __func__, drive->name));
207 207
208 ret = __ide_dma_end(drive); 208 ret = __ide_dma_end(drive);
209 209
@@ -232,7 +232,7 @@ static void sl82c105_resetproc(ide_drive_t *drive)
232 * Return the revision of the Winbond bridge 232 * Return the revision of the Winbond bridge
233 * which this function is part of. 233 * which this function is part of.
234 */ 234 */
235static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) 235static u8 sl82c105_bridge_revision(struct pci_dev *dev)
236{ 236{
237 struct pci_dev *bridge; 237 struct pci_dev *bridge;
238 238
@@ -282,63 +282,59 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
282 return dev->irq; 282 return dev->irq;
283} 283}
284 284
285/* 285static const struct ide_port_ops sl82c105_port_ops = {
286 * Initialise IDE channel 286 .set_pio_mode = sl82c105_set_pio_mode,
287 */ 287 .set_dma_mode = sl82c105_set_dma_mode,
288static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) 288 .resetproc = sl82c105_resetproc,
289{ 289};
290 struct pci_dev *dev = to_pci_dev(hwif->dev);
291 unsigned int rev;
292
293 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
294
295 hwif->set_pio_mode = &sl82c105_set_pio_mode;
296 hwif->set_dma_mode = &sl82c105_set_dma_mode;
297 hwif->resetproc = &sl82c105_resetproc;
298
299 if (!hwif->dma_base)
300 return;
301
302 rev = sl82c105_bridge_revision(dev);
303 if (rev <= 5) {
304 /*
305 * Never ever EVER under any circumstances enable
306 * DMA when the bridge is this old.
307 */
308 printk(" %s: Winbond W83C553 bridge revision %d, "
309 "BM-DMA disabled\n", hwif->name, rev);
310 return;
311 }
312
313 hwif->mwdma_mask = ATA_MWDMA2;
314
315 hwif->dma_lost_irq = &sl82c105_dma_lost_irq;
316 hwif->dma_start = &sl82c105_dma_start;
317 hwif->ide_dma_end = &sl82c105_dma_end;
318 hwif->dma_timeout = &sl82c105_dma_timeout;
319 290
320 if (hwif->mate) 291static const struct ide_dma_ops sl82c105_dma_ops = {
321 hwif->serialized = hwif->mate->serialized = 1; 292 .dma_host_set = ide_dma_host_set,
322} 293 .dma_setup = ide_dma_setup,
294 .dma_exec_cmd = ide_dma_exec_cmd,
295 .dma_start = sl82c105_dma_start,
296 .dma_end = sl82c105_dma_end,
297 .dma_test_irq = ide_dma_test_irq,
298 .dma_lost_irq = sl82c105_dma_lost_irq,
299 .dma_timeout = sl82c105_dma_timeout,
300};
323 301
324static const struct ide_port_info sl82c105_chipset __devinitdata = { 302static const struct ide_port_info sl82c105_chipset __devinitdata = {
325 .name = "W82C105", 303 .name = "W82C105",
326 .init_chipset = init_chipset_sl82c105, 304 .init_chipset = init_chipset_sl82c105,
327 .init_hwif = init_hwif_sl82c105,
328 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, 305 .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
306 .port_ops = &sl82c105_port_ops,
307 .dma_ops = &sl82c105_dma_ops,
329 .host_flags = IDE_HFLAG_IO_32BIT | 308 .host_flags = IDE_HFLAG_IO_32BIT |
330 IDE_HFLAG_UNMASK_IRQS | 309 IDE_HFLAG_UNMASK_IRQS |
331/* FIXME: check for Compatibility mode in generic IDE PCI code */ 310/* FIXME: check for Compatibility mode in generic IDE PCI code */
332#if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT) 311#if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT)
333 IDE_HFLAG_FORCE_LEGACY_IRQS | 312 IDE_HFLAG_FORCE_LEGACY_IRQS |
334#endif 313#endif
314 IDE_HFLAG_SERIALIZE_DMA |
335 IDE_HFLAG_NO_AUTODMA, 315 IDE_HFLAG_NO_AUTODMA,
336 .pio_mask = ATA_PIO5, 316 .pio_mask = ATA_PIO5,
317 .mwdma_mask = ATA_MWDMA2,
337}; 318};
338 319
339static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id) 320static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
340{ 321{
341 return ide_setup_pci_device(dev, &sl82c105_chipset); 322 struct ide_port_info d = sl82c105_chipset;
323 u8 rev = sl82c105_bridge_revision(dev);
324
325 if (rev <= 5) {
326 /*
327 * Never ever EVER under any circumstances enable
328 * DMA when the bridge is this old.
329 */
330 printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge "
331 "revision %d, BM-DMA disabled\n", rev);
332 d.dma_ops = NULL;
333 d.mwdma_mask = 0;
334 d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA;
335 }
336
337 return ide_setup_pci_device(dev, &d);
342} 338}
343 339
344static const struct pci_device_id sl82c105_pci_tbl[] = { 340static const struct pci_device_id sl82c105_pci_tbl[] = {
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index eab557c45d1b..dae6e2c94d86 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -125,18 +125,16 @@ static u8 __devinit slc90e66_cable_detect(ide_hwif_t *hwif)
125 return (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; 125 return (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
126} 126}
127 127
128static void __devinit init_hwif_slc90e66(ide_hwif_t *hwif) 128static const struct ide_port_ops slc90e66_port_ops = {
129{ 129 .set_pio_mode = slc90e66_set_pio_mode,
130 hwif->set_pio_mode = &slc90e66_set_pio_mode; 130 .set_dma_mode = slc90e66_set_dma_mode,
131 hwif->set_dma_mode = &slc90e66_set_dma_mode; 131 .cable_detect = slc90e66_cable_detect,
132 132};
133 hwif->cable_detect = slc90e66_cable_detect;
134}
135 133
136static const struct ide_port_info slc90e66_chipset __devinitdata = { 134static const struct ide_port_info slc90e66_chipset __devinitdata = {
137 .name = "SLC90E66", 135 .name = "SLC90E66",
138 .init_hwif = init_hwif_slc90e66,
139 .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} }, 136 .enablebits = { {0x41, 0x80, 0x80}, {0x43, 0x80, 0x80} },
137 .port_ops = &slc90e66_port_ops,
140 .host_flags = IDE_HFLAG_LEGACY_IRQS, 138 .host_flags = IDE_HFLAG_LEGACY_IRQS,
141 .pio_mask = ATA_PIO4, 139 .pio_mask = ATA_PIO4,
142 .swdma_mask = ATA_SWDMA2_ONLY, 140 .swdma_mask = ATA_SWDMA2_ONLY,
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index c15435182e3c..9b4b27a4c711 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -157,11 +157,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
157 /* Store the system control register base for convenience... */ 157 /* Store the system control register base for convenience... */
158 hwif->config_data = sc_base; 158 hwif->config_data = sc_base;
159 159
160 hwif->set_pio_mode = &tc86c001_set_pio_mode;
161 hwif->set_dma_mode = &tc86c001_set_mode;
162
163 hwif->cable_detect = tc86c001_cable_detect;
164
165 if (!hwif->dma_base) 160 if (!hwif->dma_base)
166 return; 161 return;
167 162
@@ -173,8 +168,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
173 168
174 /* Sector Count Register limit */ 169 /* Sector Count Register limit */
175 hwif->rqsize = 0xffff; 170 hwif->rqsize = 0xffff;
176
177 hwif->dma_start = &tc86c001_dma_start;
178} 171}
179 172
180static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev, 173static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
@@ -187,10 +180,29 @@ static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
187 return err; 180 return err;
188} 181}
189 182
183static const struct ide_port_ops tc86c001_port_ops = {
184 .set_pio_mode = tc86c001_set_pio_mode,
185 .set_dma_mode = tc86c001_set_mode,
186 .cable_detect = tc86c001_cable_detect,
187};
188
189static const struct ide_dma_ops tc86c001_dma_ops = {
190 .dma_host_set = ide_dma_host_set,
191 .dma_setup = ide_dma_setup,
192 .dma_exec_cmd = ide_dma_exec_cmd,
193 .dma_start = tc86c001_dma_start,
194 .dma_end = __ide_dma_end,
195 .dma_test_irq = ide_dma_test_irq,
196 .dma_lost_irq = ide_dma_lost_irq,
197 .dma_timeout = ide_dma_timeout,
198};
199
190static const struct ide_port_info tc86c001_chipset __devinitdata = { 200static const struct ide_port_info tc86c001_chipset __devinitdata = {
191 .name = "TC86C001", 201 .name = "TC86C001",
192 .init_chipset = init_chipset_tc86c001, 202 .init_chipset = init_chipset_tc86c001,
193 .init_hwif = init_hwif_tc86c001, 203 .init_hwif = init_hwif_tc86c001,
204 .port_ops = &tc86c001_port_ops,
205 .dma_ops = &tc86c001_dma_ops,
194 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD | 206 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD |
195 IDE_HFLAG_ABUSE_SET_DMA_MODE, 207 IDE_HFLAG_ABUSE_SET_DMA_MODE,
196 .pio_mask = ATA_PIO4, 208 .pio_mask = ATA_PIO4,
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 3316b197c779..db65a558d4ec 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -87,16 +87,15 @@ static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio)
87 triflex_set_mode(drive, XFER_PIO_0 + pio); 87 triflex_set_mode(drive, XFER_PIO_0 + pio);
88} 88}
89 89
90static void __devinit init_hwif_triflex(ide_hwif_t *hwif) 90static const struct ide_port_ops triflex_port_ops = {
91{ 91 .set_pio_mode = triflex_set_pio_mode,
92 hwif->set_pio_mode = &triflex_set_pio_mode; 92 .set_dma_mode = triflex_set_mode,
93 hwif->set_dma_mode = &triflex_set_mode; 93};
94}
95 94
96static const struct ide_port_info triflex_device __devinitdata = { 95static const struct ide_port_info triflex_device __devinitdata = {
97 .name = "TRIFLEX", 96 .name = "TRIFLEX",
98 .init_hwif = init_hwif_triflex,
99 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}}, 97 .enablebits = {{0x80, 0x01, 0x01}, {0x80, 0x02, 0x02}},
98 .port_ops = &triflex_port_ops,
100 .pio_mask = ATA_PIO4, 99 .pio_mask = ATA_PIO4,
101 .swdma_mask = ATA_SWDMA2, 100 .swdma_mask = ATA_SWDMA2,
102 .mwdma_mask = ATA_MWDMA2, 101 .mwdma_mask = ATA_MWDMA2,
diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c
index 2b8f3a2837d7..15ee38f7ad3f 100644
--- a/drivers/ide/pci/trm290.c
+++ b/drivers/ide/pci/trm290.c
@@ -214,7 +214,7 @@ static void trm290_dma_start(ide_drive_t *drive)
214{ 214{
215} 215}
216 216
217static int trm290_ide_dma_end (ide_drive_t *drive) 217static int trm290_dma_end(ide_drive_t *drive)
218{ 218{
219 u16 status; 219 u16 status;
220 220
@@ -225,7 +225,7 @@ static int trm290_ide_dma_end (ide_drive_t *drive)
225 return status != 0x00ff; 225 return status != 0x00ff;
226} 226}
227 227
228static int trm290_ide_dma_test_irq (ide_drive_t *drive) 228static int trm290_dma_test_irq(ide_drive_t *drive)
229{ 229{
230 u16 status; 230 u16 status;
231 231
@@ -254,22 +254,11 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
254 hwif->config_data = cfg_base; 254 hwif->config_data = cfg_base;
255 hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0); 255 hwif->dma_base = (cfg_base + 4) ^ (hwif->channel ? 0x80 : 0);
256 256
257 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx", 257 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
258 hwif->name, hwif->dma_base, hwif->dma_base + 3); 258 hwif->name, hwif->dma_base, hwif->dma_base + 3);
259 259
260 if (!request_region(hwif->dma_base, 4, hwif->name)) { 260 if (ide_allocate_dma_engine(hwif))
261 printk(KERN_CONT " -- Error, ports in use.\n");
262 return; 261 return;
263 }
264
265 hwif->dmatable_cpu = pci_alloc_consistent(dev, PRD_ENTRIES * PRD_BYTES,
266 &hwif->dmatable_dma);
267 if (!hwif->dmatable_cpu) {
268 printk(KERN_CONT " -- Error, unable to allocate DMA table.\n");
269 release_region(hwif->dma_base, 4);
270 return;
271 }
272 printk(KERN_CONT "\n");
273 262
274 local_irq_save(flags); 263 local_irq_save(flags);
275 /* put config reg into first byte of hwif->select_data */ 264 /* put config reg into first byte of hwif->select_data */
@@ -291,14 +280,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
291 /* sharing IRQ with mate */ 280 /* sharing IRQ with mate */
292 hwif->irq = hwif->mate->irq; 281 hwif->irq = hwif->mate->irq;
293 282
294 hwif->dma_host_set = &trm290_dma_host_set;
295 hwif->dma_setup = &trm290_dma_setup;
296 hwif->dma_exec_cmd = &trm290_dma_exec_cmd;
297 hwif->dma_start = &trm290_dma_start;
298 hwif->ide_dma_end = &trm290_ide_dma_end;
299 hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq;
300
301 hwif->selectproc = &trm290_selectproc;
302#if 1 283#if 1
303 { 284 {
304 /* 285 /*
@@ -328,10 +309,27 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif)
328#endif 309#endif
329} 310}
330 311
312static const struct ide_port_ops trm290_port_ops = {
313 .selectproc = trm290_selectproc,
314};
315
316static struct ide_dma_ops trm290_dma_ops = {
317 .dma_host_set = trm290_dma_host_set,
318 .dma_setup = trm290_dma_setup,
319 .dma_exec_cmd = trm290_dma_exec_cmd,
320 .dma_start = trm290_dma_start,
321 .dma_end = trm290_dma_end,
322 .dma_test_irq = trm290_dma_test_irq,
323 .dma_lost_irq = ide_dma_lost_irq,
324 .dma_timeout = ide_dma_timeout,
325};
326
331static const struct ide_port_info trm290_chipset __devinitdata = { 327static const struct ide_port_info trm290_chipset __devinitdata = {
332 .name = "TRM290", 328 .name = "TRM290",
333 .init_hwif = init_hwif_trm290, 329 .init_hwif = init_hwif_trm290,
334 .chipset = ide_trm290, 330 .chipset = ide_trm290,
331 .port_ops = &trm290_port_ops,
332 .dma_ops = &trm290_dma_ops,
335 .host_flags = IDE_HFLAG_NO_ATAPI_DMA | 333 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
336#if 0 /* play it safe for now */ 334#if 0 /* play it safe for now */
337 IDE_HFLAG_TRUST_BIOS_FOR_DMA | 335 IDE_HFLAG_TRUST_BIOS_FOR_DMA |
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index cff3cafedc47..bbd17bec6ffe 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -415,19 +415,17 @@ static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
415 return ATA_CBL_PATA40; 415 return ATA_CBL_PATA40;
416} 416}
417 417
418static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) 418static const struct ide_port_ops via_port_ops = {
419{ 419 .set_pio_mode = via_set_pio_mode,
420 hwif->set_pio_mode = &via_set_pio_mode; 420 .set_dma_mode = via_set_drive,
421 hwif->set_dma_mode = &via_set_drive; 421 .cable_detect = via82cxxx_cable_detect,
422 422};
423 hwif->cable_detect = via82cxxx_cable_detect;
424}
425 423
426static const struct ide_port_info via82cxxx_chipset __devinitdata = { 424static const struct ide_port_info via82cxxx_chipset __devinitdata = {
427 .name = "VP_IDE", 425 .name = "VP_IDE",
428 .init_chipset = init_chipset_via82cxxx, 426 .init_chipset = init_chipset_via82cxxx,
429 .init_hwif = init_hwif_via82cxxx,
430 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } }, 427 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
428 .port_ops = &via_port_ops,
431 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST | 429 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
432 IDE_HFLAG_ABUSE_SET_DMA_MODE | 430 IDE_HFLAG_ABUSE_SET_DMA_MODE |
433 IDE_HFLAG_POST_SET_MODE | 431 IDE_HFLAG_POST_SET_MODE |
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-19 05:29:27 -0500