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path: root/drivers/ide/pci/via82cxxx.c
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Diffstat (limited to 'drivers/ide/pci/via82cxxx.c')
-rw-r--r--drivers/ide/pci/via82cxxx.c188
1 files changed, 0 insertions, 188 deletions
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index a4d099c937ff..2fbc215988ab 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -105,181 +105,6 @@ static unsigned int via_80w;
105static unsigned int via_clock; 105static unsigned int via_clock;
106static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; 106static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
107 107
108/*
109 * VIA /proc entry.
110 */
111
112#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
113
114#include <linux/stat.h>
115#include <linux/proc_fs.h>
116
117static u8 via_proc = 0;
118static unsigned long via_base;
119static struct pci_dev *bmide_dev, *isa_dev;
120
121static char *via_control3[] = { "No limit", "64", "128", "192" };
122
123#define via_print(format, arg...) p += sprintf(p, format "\n" , ## arg)
124#define via_print_drive(name, format, arg...)\
125 p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n");
126
127
128/**
129 * via_get_info - generate via /proc file
130 * @buffer: buffer for data
131 * @addr: set to start of data to use
132 * @offset: current file offset
133 * @count: size of read
134 *
135 * Fills in buffer with the debugging/configuration information for
136 * the VIA chipset tuning and attached drives
137 */
138
139static int via_get_info(char *buffer, char **addr, off_t offset, int count)
140{
141 int speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
142 uen[4], udma[4], umul[4], active8b[4], recover8b[4];
143 struct pci_dev *dev = bmide_dev;
144 unsigned int v, u, i;
145 int len;
146 u16 c, w;
147 u8 t, x;
148 char *p = buffer;
149
150 via_print("----------VIA BusMastering IDE Configuration"
151 "----------------");
152
153 via_print("Driver Version: 3.38");
154 via_print("South Bridge: VIA %s",
155 via_config->name);
156
157 pci_read_config_byte(isa_dev, PCI_REVISION_ID, &t);
158 pci_read_config_byte(dev, PCI_REVISION_ID, &x);
159 via_print("Revision: ISA %#x IDE %#x", t, x);
160 via_print("Highest DMA rate: %s",
161 via_dma[via_config->flags & VIA_UDMA]);
162
163 via_print("BM-DMA base: %#lx", via_base);
164 via_print("PCI clock: %d.%dMHz",
165 via_clock / 1000, via_clock / 100 % 10);
166
167 pci_read_config_byte(dev, VIA_MISC_1, &t);
168 via_print("Master Read Cycle IRDY: %dws",
169 (t & 64) >> 6);
170 via_print("Master Write Cycle IRDY: %dws",
171 (t & 32) >> 5);
172 via_print("BM IDE Status Register Read Retry: %s",
173 (t & 8) ? "yes" : "no");
174
175 pci_read_config_byte(dev, VIA_MISC_3, &t);
176 via_print("Max DRDY Pulse Width: %s%s",
177 via_control3[(t & 0x03)], (t & 0x03) ? " PCI clocks" : "");
178
179 via_print("-----------------------Primary IDE"
180 "-------Secondary IDE------");
181 via_print("Read DMA FIFO flush: %10s%20s",
182 (t & 0x80) ? "yes" : "no", (t & 0x40) ? "yes" : "no");
183 via_print("End Sector FIFO flush: %10s%20s",
184 (t & 0x20) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
185
186 pci_read_config_byte(dev, VIA_IDE_CONFIG, &t);
187 via_print("Prefetch Buffer: %10s%20s",
188 (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no");
189 via_print("Post Write Buffer: %10s%20s",
190 (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no");
191
192 pci_read_config_byte(dev, VIA_IDE_ENABLE, &t);
193 via_print("Enabled: %10s%20s",
194 (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no");
195
196 c = inb(via_base + 0x02) | (inb(via_base + 0x0a) << 8);
197 via_print("Simplex only: %10s%20s",
198 (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no");
199
200 via_print("Cable Type: %10s%20s",
201 (via_80w & 1) ? "80w" : "40w", (via_80w & 2) ? "80w" : "40w");
202
203 via_print("-------------------drive0----drive1"
204 "----drive2----drive3-----");
205
206 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
207 pci_read_config_dword(dev, VIA_DRIVE_TIMING, &v);
208 pci_read_config_word(dev, VIA_8BIT_TIMING, &w);
209
210 if (via_config->flags & VIA_UDMA)
211 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
212 else u = 0;
213
214 for (i = 0; i < 4; i++) {
215
216 setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1;
217 recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1;
218 active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1;
219 active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1;
220 recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1;
221 udma[i] = ((u >> ((3 - i) << 3)) & 0x7) + 2;
222 umul[i] = ((u >> (((3 - i) & 2) << 3)) & 0x8) ? 1 : 2;
223 uen[i] = ((u >> ((3 - i) << 3)) & 0x20);
224 den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2));
225
226 speed[i] = 2 * via_clock / (active[i] + recover[i]);
227 cycle[i] = 1000000 * (active[i] + recover[i]) / via_clock;
228
229 if (!uen[i] || !den[i])
230 continue;
231
232 switch (via_config->flags & VIA_UDMA) {
233
234 case VIA_UDMA_33:
235 speed[i] = 2 * via_clock / udma[i];
236 cycle[i] = 1000000 * udma[i] / via_clock;
237 break;
238
239 case VIA_UDMA_66:
240 speed[i] = 4 * via_clock / (udma[i] * umul[i]);
241 cycle[i] = 500000 * (udma[i] * umul[i]) / via_clock;
242 break;
243
244 case VIA_UDMA_100:
245 speed[i] = 6 * via_clock / udma[i];
246 cycle[i] = 333333 * udma[i] / via_clock;
247 break;
248
249 case VIA_UDMA_133:
250 speed[i] = 8 * via_clock / udma[i];
251 cycle[i] = 250000 * udma[i] / via_clock;
252 break;
253 }
254 }
255
256 via_print_drive("Transfer Mode: ", "%10s",
257 den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
258
259 via_print_drive("Address Setup: ", "%8dns",
260 1000000 * setup[i] / via_clock);
261 via_print_drive("Cmd Active: ", "%8dns",
262 1000000 * active8b[i] / via_clock);
263 via_print_drive("Cmd Recovery: ", "%8dns",
264 1000000 * recover8b[i] / via_clock);
265 via_print_drive("Data Active: ", "%8dns",
266 1000000 * active[i] / via_clock);
267 via_print_drive("Data Recovery: ", "%8dns",
268 1000000 * recover[i] / via_clock);
269 via_print_drive("Cycle Time: ", "%8dns",
270 cycle[i]);
271 via_print_drive("Transfer Rate: ", "%4d.%dMB/s",
272 speed[i] / 1000, speed[i] / 100 % 10);
273
274 /* hoping it is less than 4K... */
275 len = (p - buffer) - offset;
276 *addr = buffer + offset;
277
278 return len > count ? count : len;
279}
280
281#endif /* DISPLAY_VIA_TIMINGS && CONFIG_PROC_FS */
282
283/** 108/**
284 * via_set_speed - write timing registers 109 * via_set_speed - write timing registers
285 * @dev: PCI device 110 * @dev: PCI device
@@ -560,19 +385,6 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
560 via_dma[via_config->flags & VIA_UDMA], 385 via_dma[via_config->flags & VIA_UDMA],
561 pci_name(dev)); 386 pci_name(dev));
562 387
563 /*
564 * Setup /proc/ide/via entry.
565 */
566
567#if defined(DISPLAY_VIA_TIMINGS) && defined(CONFIG_PROC_FS)
568 if (!via_proc) {
569 via_base = pci_resource_start(dev, 4);
570 bmide_dev = dev;
571 isa_dev = isa;
572 ide_pci_create_host_proc("via", via_get_info);
573 via_proc = 1;
574 }
575#endif /* DISPLAY_VIA_TIMINGS && CONFIG_PROC_FS */
576 return 0; 388 return 0;
577} 389}
578 390