aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ide/pci/via82cxxx.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/ide/pci/via82cxxx.c')
-rw-r--r--drivers/ide/pci/via82cxxx.c83
1 files changed, 36 insertions, 47 deletions
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index b25fb65b240e..a0d3c16b68ec 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * 2 *
3 * Version 3.49 3 * Version 3.50
4 * 4 *
5 * VIA IDE driver for Linux. Supported southbridges: 5 * VIA IDE driver for Linux. Supported southbridges:
6 * 6 *
@@ -422,67 +422,40 @@ static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
422 422
423static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) 423static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
424{ 424{
425 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
426 int i;
427
428 hwif->set_pio_mode = &via_set_pio_mode; 425 hwif->set_pio_mode = &via_set_pio_mode;
429 hwif->set_dma_mode = &via_set_drive; 426 hwif->set_dma_mode = &via_set_drive;
430 427
431#ifdef CONFIG_PPC_CHRP
432 if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
433 hwif->irq = hwif->channel ? 15 : 14;
434 }
435#endif
436
437 for (i = 0; i < 2; i++) {
438 hwif->drives[i].io_32bit = 1;
439 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
440 hwif->drives[i].autotune = 1;
441 }
442
443 if (!hwif->dma_base) 428 if (!hwif->dma_base)
444 return; 429 return;
445 430
446 hwif->atapi_dma = 1;
447
448 hwif->ultra_mask = vdev->via_config->udma_mask;
449 hwif->mwdma_mask = 0x07;
450 hwif->swdma_mask = 0x07;
451
452 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 431 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
453 hwif->cbl = via82cxxx_cable_detect(hwif); 432 hwif->cbl = via82cxxx_cable_detect(hwif);
454} 433}
455 434
456static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { 435static const struct ide_port_info via82cxxx_chipset __devinitdata = {
457 { /* 0 */ 436 .name = "VP_IDE",
458 .name = "VP_IDE", 437 .init_chipset = init_chipset_via82cxxx,
459 .init_chipset = init_chipset_via82cxxx, 438 .init_hwif = init_hwif_via82cxxx,
460 .init_hwif = init_hwif_via82cxxx, 439 .enablebits = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
461 .autodma = NOAUTODMA, 440 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST |
462 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 441 IDE_HFLAG_PIO_NO_DOWNGRADE |
463 .bootable = ON_BOARD, 442 IDE_HFLAG_POST_SET_MODE |
464 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST 443 IDE_HFLAG_IO_32BIT |
465 | IDE_HFLAG_PIO_NO_DOWNGRADE 444 IDE_HFLAG_BOOTABLE,
466 | IDE_HFLAG_POST_SET_MODE, 445 .pio_mask = ATA_PIO5,
467 .pio_mask = ATA_PIO5, 446 .swdma_mask = ATA_SWDMA2,
468 },{ /* 1 */ 447 .mwdma_mask = ATA_MWDMA2,
469 .name = "VP_IDE",
470 .init_chipset = init_chipset_via82cxxx,
471 .init_hwif = init_hwif_via82cxxx,
472 .autodma = AUTODMA,
473 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
474 .bootable = ON_BOARD,
475 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST
476 | IDE_HFLAG_PIO_NO_DOWNGRADE
477 | IDE_HFLAG_POST_SET_MODE,
478 .pio_mask = ATA_PIO5,
479 }
480}; 448};
481 449
482static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id) 450static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
483{ 451{
484 struct pci_dev *isa = NULL; 452 struct pci_dev *isa = NULL;
485 struct via_isa_bridge *via_config; 453 struct via_isa_bridge *via_config;
454 u8 idx = id->driver_data;
455 struct ide_port_info d;
456
457 d = via82cxxx_chipset;
458
486 /* 459 /*
487 * Find the ISA bridge and check we know what it is. 460 * Find the ISA bridge and check we know what it is.
488 */ 461 */
@@ -492,7 +465,23 @@ static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_i
492 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n"); 465 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
493 return -ENODEV; 466 return -ENODEV;
494 } 467 }
495 return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]); 468
469 if (idx == 0)
470 d.host_flags |= IDE_HFLAG_NO_AUTODMA;
471 else
472 d.enablebits[1].reg = d.enablebits[0].reg = 0;
473
474 if ((via_config->flags & VIA_NO_UNMASK) == 0)
475 d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
476
477#ifdef CONFIG_PPC_CHRP
478 if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
479 d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
480#endif
481
482 d.udma_mask = via_config->udma_mask;
483
484 return ide_setup_pci_device(dev, &d);
496} 485}
497 486
498static const struct pci_device_id via_pci_tbl[] = { 487static const struct pci_device_id via_pci_tbl[] = {