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path: root/drivers/ide/pci/slc90e66.c
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Diffstat (limited to 'drivers/ide/pci/slc90e66.c')
-rw-r--r--drivers/ide/pci/slc90e66.c38
1 files changed, 20 insertions, 18 deletions
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index ae7eb58d961c..852ccb36da1d 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -1,8 +1,8 @@
1/* 1/*
2 * linux/drivers/ide/pci/slc90e66.c Version 0.13 December 30, 2006 2 * linux/drivers/ide/pci/slc90e66.c Version 0.14 February 8, 2007
3 * 3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
6 * 6 *
7 * This is a look-alike variation of the ICH0 PIIX4 Ultra-66, 7 * This is a look-alike variation of the ICH0 PIIX4 Ultra-66,
8 * but this keeps the ISA-Bridge and slots alive. 8 * but this keeps the ISA-Bridge and slots alive.
@@ -57,11 +57,7 @@ static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
57 } 57 }
58} 58}
59 59
60/* 60static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)
61 * Based on settings done by AMI BIOS
62 * (might be useful if drive is not registered in CMOS for any reason).
63 */
64static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
65{ 61{
66 ide_hwif_t *hwif = HWIF(drive); 62 ide_hwif_t *hwif = HWIF(drive);
67 struct pci_dev *dev = hwif->pci_dev; 63 struct pci_dev *dev = hwif->pci_dev;
@@ -80,7 +76,6 @@ static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
80 { 2, 1 }, 76 { 2, 1 },
81 { 2, 3 }, }; 77 { 2, 3 }, };
82 78
83 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
84 spin_lock_irqsave(&ide_lock, flags); 79 spin_lock_irqsave(&ide_lock, flags);
85 pci_read_config_word(dev, master_port, &master_data); 80 pci_read_config_word(dev, master_port, &master_data);
86 81
@@ -94,19 +89,20 @@ static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
94 master_data |= 0x4000; 89 master_data |= 0x4000;
95 master_data &= ~0x0070; 90 master_data &= ~0x0070;
96 if (pio > 1) { 91 if (pio > 1) {
97 /* enable PPE, IE and TIME */ 92 /* Set PPE, IE and TIME */
98 master_data = master_data | (control << 4); 93 master_data |= control << 4;
99 } 94 }
100 pci_read_config_byte(dev, slave_port, &slave_data); 95 pci_read_config_byte(dev, slave_port, &slave_data);
101 slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0); 96 slave_data &= hwif->channel ? 0x0f : 0xf0;
102 slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0)); 97 slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
98 (hwif->channel ? 4 : 0);
103 } else { 99 } else {
104 master_data &= ~0x3307; 100 master_data &= ~0x3307;
105 if (pio > 1) { 101 if (pio > 1) {
106 /* enable PPE, IE and TIME */ 102 /* enable PPE, IE and TIME */
107 master_data = master_data | control; 103 master_data |= control;
108 } 104 }
109 master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8); 105 master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
110 } 106 }
111 pci_write_config_word(dev, master_port, master_data); 107 pci_write_config_word(dev, master_port, master_data);
112 if (is_slave) 108 if (is_slave)
@@ -114,6 +110,13 @@ static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
114 spin_unlock_irqrestore(&ide_lock, flags); 110 spin_unlock_irqrestore(&ide_lock, flags);
115} 111}
116 112
113static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio)
114{
115 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
116 slc90e66_tune_pio(drive, pio);
117 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
118}
119
117static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) 120static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
118{ 121{
119 ide_hwif_t *hwif = HWIF(drive); 122 ide_hwif_t *hwif = HWIF(drive);
@@ -162,8 +165,8 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
162 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 165 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
163 } 166 }
164 167
165 slc90e66_tune_drive(drive, slc90e66_dma_2_pio(speed)); 168 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
166 return (ide_config_drive_speed(drive, speed)); 169 return ide_config_drive_speed(drive, speed);
167} 170}
168 171
169static int slc90e66_config_drive_for_dma (ide_drive_t *drive) 172static int slc90e66_config_drive_for_dma (ide_drive_t *drive)
@@ -185,8 +188,7 @@ static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
185 return 0; 188 return 0;
186 189
187 if (ide_use_fast_pio(drive)) 190 if (ide_use_fast_pio(drive))
188 (void)slc90e66_tune_chipset(drive, XFER_PIO_0 + 191 slc90e66_tune_drive(drive, 255);
189 ide_get_best_pio_mode(drive, 255, 4, NULL));
190 192
191 return -1; 193 return -1;
192} 194}