1 files changed, 100 insertions, 147 deletions

diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 3a8a76fc78c7..fe3b4b91f854 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -11,6 +11,8 @@
  * Merge in Russell's HW workarounds, fix various problems
  * with the timing registers setup.
  *  -- Benjamin Herrenschmidt (01/11/03) benh@kernel.crashing.org
+ *
+ * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
  */
 
 #include <linux/types.h>
@@ -47,25 +49,19 @@
 #define CTRL_P0EN       (1 << 0)
 
 /*
- * Convert a PIO mode and cycle time to the required on/off
- * times for the interface.  This has protection against run-away
- * timings.
+ * Convert a PIO mode and cycle time to the required on/off times
+ * for the interface.  This has protection against runaway timings.
  */
-static unsigned int get_timing_sl82c105(ide_pio_data_t *p)
+static unsigned int get_pio_timings(ide_pio_data_t *p)
 {
-        unsigned int cmd_on;
-        unsigned int cmd_off;
+        unsigned int cmd_on, cmd_off;
 
-        cmd_on = (ide_pio_timings[p->pio_mode].active_time + 29) / 30;
+        cmd_on  = (ide_pio_timings[p->pio_mode].active_time + 29) / 30;
         cmd_off = (p->cycle_time - 30 * cmd_on + 29) / 30;
 
-        if (cmd_on > 32)
-                cmd_on = 32;
         if (cmd_on == 0)
                 cmd_on = 1;
 
-        if (cmd_off > 32)
-                cmd_off = 32;
         if (cmd_off == 0)
                 cmd_off = 1;
 
@@ -73,100 +69,59 @@ static unsigned int get_timing_sl82c105(ide_pio_data_t *p)
 }
 
 /*
- * Configure the drive and chipset for PIO
+ * Configure the chipset for PIO mode.
  */
-static void config_for_pio(ide_drive_t *drive, int pio, int report, int chipset_only)
+static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
+        struct pci_dev *dev     = HWIF(drive)->pci_dev;
+        int reg                 = 0x44 + drive->dn * 4;
         ide_pio_data_t p;
-        u16 drv_ctrl = 0x909;
-        unsigned int xfer_mode, reg;
+        u16 drv_ctrl;
 
-        DBG(("config_for_pio(drive:%s, pio:%d, report:%d, chipset_only:%d)\n",
-                drive->name, pio, report, chipset_only));
-                
-        reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
+        DBG(("sl82c105_tune_pio(drive:%s, pio:%u)\n", drive->name, pio));
 
         pio = ide_get_best_pio_mode(drive, pio, 5, &p);
 
-        xfer_mode = XFER_PIO_0 + pio;
-
-        if (chipset_only || ide_config_drive_speed(drive, xfer_mode) == 0) {
-                drv_ctrl = get_timing_sl82c105(&p);
-                drive->pio_speed = xfer_mode;
-        } else
-                drive->pio_speed = XFER_PIO_0;
+        drive->drive_data = drv_ctrl = get_pio_timings(&p);
 
-        if (drive->using_dma == 0) {
+        if (!drive->using_dma) {
                 /*
                  * If we are actually using MW DMA, then we can not
                  * reprogram the interface drive control register.
                  */
-                pci_write_config_word(dev, reg, drv_ctrl);
-                pci_read_config_word(dev, reg, &drv_ctrl);
-
-                if (report) {
-                        printk("%s: selected %s (%dns) (%04X)\n", drive->name,
-                               ide_xfer_verbose(xfer_mode), p.cycle_time, drv_ctrl);
-                }
+                pci_write_config_word(dev, reg,  drv_ctrl);
+                pci_read_config_word (dev, reg, &drv_ctrl);
         }
+
+        printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
+               ide_xfer_verbose(pio + XFER_PIO_0), p.cycle_time, drv_ctrl);
+
+        return pio;
 }
 
 /*
- * Configure the drive and the chipset for DMA
+ * Configure the drive for DMA.
+ * We'll program the chipset only when DMA is actually turned on.
  */
-static int config_for_dma (ide_drive_t *drive)
+static int config_for_dma(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
-        unsigned int reg;
-
         DBG(("config_for_dma(drive:%s)\n", drive->name));
 
-        reg = (hwif->channel ? 0x4c : 0x44) + (drive->select.b.unit ? 4 : 0);
-
         if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0)
-                return 1;
+                return 0;
 
-        pci_write_config_word(dev, reg, 0x0240);
-
-        return 0;
+        return ide_dma_enable(drive);
 }
 
 /*
- * Check to see if the drive and
- * chipset is capable of DMA mode
+ * Check to see if the drive and chipset are capable of DMA mode.
  */
-
-static int sl82c105_check_drive (ide_drive_t *drive)
+static int sl82c105_ide_dma_check(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif        = HWIF(drive);
-
-        DBG(("sl82c105_check_drive(drive:%s)\n", drive->name));
-
-        do {
-                struct hd_driveid *id = drive->id;
-
-                if (!drive->autodma)
-                        break;
-
-                if (!id || !(id->capability & 1))
-                        break;
+        DBG(("sl82c105_ide_dma_check(drive:%s)\n", drive->name));
 
-                /* Consult the list of known "bad" drives */
-                if (__ide_dma_bad_drive(drive))
-                        break;
-
-                if (id->field_valid & 2) {
-                        if ((id->dma_mword & hwif->mwdma_mask) ||
-                            (id->dma_1word & hwif->swdma_mask))
-                                return 0;
-                }
-
-                if (__ide_dma_good_drive(drive) && id->eide_dma_time < 150)
-                        return 0;
-        } while (0);
+        if (ide_use_dma(drive) && config_for_dma(drive))
+                return 0;
 
         return -1;
 }
@@ -195,14 +150,14 @@ static inline void sl82c105_reset_host(struct pci_dev *dev)
  * This function is called when the IDE timer expires, the drive
  * indicates that it is READY, and we were waiting for DMA to complete.
  */
-static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
+static int sl82c105_ide_dma_lostirq(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
-        u32 val, mask = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
-        unsigned long dma_base = hwif->dma_base;
+        ide_hwif_t *hwif        = HWIF(drive);
+        struct pci_dev *dev     = hwif->pci_dev;
+        u32 val, mask           = hwif->channel ? CTRL_IDE_IRQB : CTRL_IDE_IRQA;
+        u8 dma_cmd;
 
-        printk("sl82c105: lost IRQ: resetting host\n");
+        printk("sl82c105: lost IRQ, resetting host\n");
 
         /*
          * Check the raw interrupt from the drive.
@@ -215,15 +170,15 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
          * Was DMA enabled?  If so, disable it - we're resetting the
          * host.  The IDE layer will be handling the drive for us.
          */
-        val = inb(dma_base);
-        if (val & 1) {
-                outb(val & ~1, dma_base);
+        dma_cmd = inb(hwif->dma_command);
+        if (dma_cmd & 1) {
+                outb(dma_cmd & ~1, hwif->dma_command);
                 printk("sl82c105: DMA was enabled\n");
         }
 
         sl82c105_reset_host(dev);
 
-        /* ide_dmaproc would return 1, so we do as well */
+        /* __ide_dma_lostirq would return 1, so we do as well */
         return 1;
 }
 
@@ -235,10 +190,10 @@ static int sl82c105_ide_dma_lost_irq(ide_drive_t *drive)
  * The generic IDE core will have disabled the BMEN bit before this
  * function is called.
  */
-static void sl82c105_ide_dma_start(ide_drive_t *drive)
+static void sl82c105_dma_start(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
+        ide_hwif_t *hwif        = HWIF(drive);
+        struct pci_dev *dev     = hwif->pci_dev;
 
         sl82c105_reset_host(dev);
         ide_dma_start(drive);
@@ -246,8 +201,8 @@ static void sl82c105_ide_dma_start(ide_drive_t *drive)
 
 static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
+        ide_hwif_t *hwif        = HWIF(drive);
+        struct pci_dev *dev     = hwif->pci_dev;
 
         DBG(("sl82c105_ide_dma_timeout(drive:%s)\n", drive->name));
 
@@ -255,26 +210,32 @@ static int sl82c105_ide_dma_timeout(ide_drive_t *drive)
         return __ide_dma_timeout(drive);
 }
 
-static int sl82c105_ide_dma_on (ide_drive_t *drive)
+static int sl82c105_ide_dma_on(ide_drive_t *drive)
 {
+        struct pci_dev *dev     = HWIF(drive)->pci_dev;
+        int rc, reg             = 0x44 + drive->dn * 4;
+
         DBG(("sl82c105_ide_dma_on(drive:%s)\n", drive->name));
 
-        if (config_for_dma(drive))
-                return 1;
-        printk(KERN_INFO "%s: DMA enabled\n", drive->name);
-        return __ide_dma_on(drive);
+        rc = __ide_dma_on(drive);
+        if (rc == 0) {
+                pci_write_config_word(dev, reg, 0x0200);
+
+                printk(KERN_INFO "%s: DMA enabled\n", drive->name);
+        }
+        return rc;
 }
 
 static void sl82c105_dma_off_quietly(ide_drive_t *drive)
 {
-        u8 speed = XFER_PIO_0;
+        struct pci_dev *dev     = HWIF(drive)->pci_dev;
+        int reg                 = 0x44 + drive->dn * 4;
 
         DBG(("sl82c105_dma_off_quietly(drive:%s)\n", drive->name));
 
+        pci_write_config_word(dev, reg, drive->drive_data);
+
         ide_dma_off_quietly(drive);
-        if (drive->pio_speed)
-                speed = drive->pio_speed - XFER_PIO_0;
-        config_for_pio(drive, speed, 0, 1);
 }
 
 /*
@@ -286,8 +247,8 @@ static void sl82c105_dma_off_quietly(ide_drive_t *drive)
  */
 static void sl82c105_selectproc(ide_drive_t *drive)
 {
-        ide_hwif_t *hwif = HWIF(drive);
-        struct pci_dev *dev = hwif->pci_dev;
+        ide_hwif_t *hwif        = HWIF(drive);
+        struct pci_dev *dev     = hwif->pci_dev;
         u32 val, old, mask;
 
         //DBG(("sl82c105_selectproc(drive:%s)\n", drive->name));
@@ -323,18 +284,12 @@ static void sl82c105_resetproc(ide_drive_t *drive)
  * We only deal with PIO mode here - DMA mode 'using_dma' is not
  * initialised at the point that this function is called.
  */
-static void tune_sl82c105(ide_drive_t *drive, u8 pio)
+static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio)
 {
-        DBG(("tune_sl82c105(drive:%s)\n", drive->name));
-
-        config_for_pio(drive, pio, 1, 0);
+        DBG(("sl82c105_tune_drive(drive:%s, pio:%u)\n", drive->name, pio));
 
-        /*
-         * We support 32-bit I/O on this interface, and it
-         * doesn't have problems with interrupts.
-         */
-        drive->io_32bit = 1;
-        drive->unmask = 1;
+        pio = sl82c105_tune_pio(drive, pio);
+        (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 }
 
 /*
@@ -393,7 +348,7 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c
 }
 
 /*
- * Initialise the chip
+ * Initialise IDE channel
  */
 static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
 {
@@ -401,24 +356,22 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
 
         DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
 
-        hwif->tuneproc = tune_sl82c105;
-        hwif->selectproc = sl82c105_selectproc;
-        hwif->resetproc = sl82c105_resetproc;
+        hwif->tuneproc          = &sl82c105_tune_drive;
+        hwif->selectproc        = &sl82c105_selectproc;
+        hwif->resetproc         = &sl82c105_resetproc;
+
+        /*
+         * We support 32-bit I/O on this interface, and
+         * it doesn't have problems with interrupts.
+         */
+        hwif->drives[0].io_32bit = hwif->drives[1].io_32bit = 1;
+        hwif->drives[0].unmask   = hwif->drives[1].unmask   = 1;
 
         /*
-         * Default to PIO 0 for fallback unless tuned otherwise.
          * We always autotune PIO,  this is done before DMA is checked,
          * so there's no risk of accidentally disabling DMA
          */
-        hwif->drives[0].pio_speed = XFER_PIO_0;
-        hwif->drives[0].autotune = 1;
-        hwif->drives[1].pio_speed = XFER_PIO_0;
-        hwif->drives[1].autotune = 1;
-
-        hwif->atapi_dma = 0;
-        hwif->mwdma_mask = 0;
-        hwif->swdma_mask = 0;
-        hwif->autodma = 0;
+        hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
 
         if (!hwif->dma_base)
                 return;
@@ -429,27 +382,27 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
                  * Never ever EVER under any circumstances enable
                  * DMA when the bridge is this old.
                  */
-                printk("    %s: Winbond 553 bridge revision %d, BM-DMA disabled\n",
-                       hwif->name, rev);
-        } else {
-                hwif->atapi_dma = 1;
-                hwif->mwdma_mask = 0x04;
-
-                hwif->ide_dma_check = &sl82c105_check_drive;
-                hwif->ide_dma_on = &sl82c105_ide_dma_on;
-                hwif->dma_off_quietly = &sl82c105_dma_off_quietly;
-                hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq;
-                hwif->dma_start = &sl82c105_ide_dma_start;
-                hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout;
-
-                if (!noautodma)
-                        hwif->autodma = 1;
-                hwif->drives[0].autodma = hwif->autodma;
-                hwif->drives[1].autodma = hwif->autodma;
-
-                if (hwif->mate)
-                        hwif->serialized = hwif->mate->serialized = 1;
+                printk("    %s: Winbond W83C553 bridge revision %d, "
+                       "BM-DMA disabled\n", hwif->name, rev);
+                return;
         }
+
+        hwif->atapi_dma  = 1;
+        hwif->mwdma_mask = 0x04;
+
+        hwif->ide_dma_check             = &sl82c105_ide_dma_check;
+        hwif->ide_dma_on                = &sl82c105_ide_dma_on;
+        hwif->dma_off_quietly           = &sl82c105_dma_off_quietly;
+        hwif->ide_dma_lostirq           = &sl82c105_ide_dma_lostirq;
+        hwif->dma_start                 = &sl82c105_dma_start;
+        hwif->ide_dma_timeout           = &sl82c105_ide_dma_timeout;
+
+        if (!noautodma)
+                hwif->autodma = 1;
+        hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
+
+        if (hwif->mate)
+                hwif->serialized = hwif->mate->serialized = 1;
 }
 
 static ide_pci_device_t sl82c105_chipset __devinitdata = {