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path: root/drivers/ide/pci/siimage.c
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Diffstat (limited to 'drivers/ide/pci/siimage.c')
-rw-r--r--drivers/ide/pci/siimage.c29
1 files changed, 11 insertions, 18 deletions
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 5d1e5e52a044..ce7784996d12 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -165,16 +165,16 @@ out:
165} 165}
166 166
167/** 167/**
168 * sil_tune_pio - tune a drive 168 * sil_set_pio_mode - set host controller for PIO mode
169 * @drive: drive to tune 169 * @drive: drive
170 * @pio: the desired PIO mode 170 * @pio: PIO mode number
171 * 171 *
172 * Load the timing settings for this device mode into the 172 * Load the timing settings for this device mode into the
173 * controller. If we are in PIO mode 3 or 4 turn on IORDY 173 * controller. If we are in PIO mode 3 or 4 turn on IORDY
174 * monitoring (bit 9). The TF timing is bits 31:16 174 * monitoring (bit 9). The TF timing is bits 31:16
175 */ 175 */
176 176
177static void sil_tune_pio(ide_drive_t *drive, u8 pio) 177static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
178{ 178{
179 const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 }; 179 const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };
180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; 180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
@@ -234,21 +234,15 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
234 } 234 }
235} 235}
236 236
237static void sil_set_pio_mode(ide_drive_t *drive, const u8 pio)
238{
239 sil_tune_pio(drive, pio);
240 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
241}
242
243/** 237/**
244 * siimage_tune_chipset - set controller timings 238 * sil_set_dma_mode - set host controller for DMA mode
245 * @drive: Drive to set up 239 * @drive: drive
246 * @speed: speed we want to achieve 240 * @speed: DMA mode
247 * 241 *
248 * Tune the SII chipset for the desired mode. 242 * Tune the SiI chipset for the desired DMA mode.
249 */ 243 */
250 244
251static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed) 245static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
252{ 246{
253 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; 247 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
254 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; 248 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
@@ -303,7 +297,7 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
303 mode |= ((unit) ? 0x30 : 0x03); 297 mode |= ((unit) ? 0x30 : 0x03);
304 break; 298 break;
305 default: 299 default:
306 return 1; 300 return;
307 } 301 }
308 302
309 if (hwif->mmio) { 303 if (hwif->mmio) {
@@ -315,7 +309,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
315 pci_write_config_word(hwif->pci_dev, ma, multi); 309 pci_write_config_word(hwif->pci_dev, ma, multi);
316 pci_write_config_word(hwif->pci_dev, ua, ultra); 310 pci_write_config_word(hwif->pci_dev, ua, ultra);
317 } 311 }
318 return (ide_config_drive_speed(drive, speed));
319} 312}
320 313
321/** 314/**
@@ -904,8 +897,8 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
904 hwif->autodma = 0; 897 hwif->autodma = 0;
905 898
906 hwif->resetproc = &siimage_reset; 899 hwif->resetproc = &siimage_reset;
907 hwif->speedproc = &siimage_tune_chipset;
908 hwif->set_pio_mode = &sil_set_pio_mode; 900 hwif->set_pio_mode = &sil_set_pio_mode;
901 hwif->set_dma_mode = &sil_set_dma_mode;
909 hwif->reset_poll = &siimage_reset_poll; 902 hwif->reset_poll = &siimage_reset_poll;
910 hwif->pre_reset = &siimage_pre_reset; 903 hwif->pre_reset = &siimage_pre_reset;
911 hwif->udma_filter = &sil_udma_filter; 904 hwif->udma_filter = &sil_udma_filter;