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path: root/drivers/ide/pci/serverworks.c
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Diffstat (limited to 'drivers/ide/pci/serverworks.c')
-rw-r--r--drivers/ide/pci/serverworks.c26
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 1106ff44cdee..e26bc8326dbb 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -38,6 +38,8 @@
38 38
39#include <asm/io.h> 39#include <asm/io.h>
40 40
41#define DRV_NAME "serverworks"
42
41#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ 43#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
42#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ 44#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
43 45
@@ -353,40 +355,44 @@ static const struct ide_port_ops svwks_port_ops = {
353#define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS 355#define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS
354 356
355static const struct ide_port_info serverworks_chipsets[] __devinitdata = { 357static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
356 { /* 0 */ 358 { /* 0: OSB4 */
357 .name = "SvrWks OSB4", 359 .name = DRV_NAME,
358 .init_chipset = init_chipset_svwks, 360 .init_chipset = init_chipset_svwks,
359 .port_ops = &osb4_port_ops, 361 .port_ops = &osb4_port_ops,
360 .host_flags = IDE_HFLAGS_SVWKS, 362 .host_flags = IDE_HFLAGS_SVWKS,
361 .pio_mask = ATA_PIO4, 363 .pio_mask = ATA_PIO4,
362 .mwdma_mask = ATA_MWDMA2, 364 .mwdma_mask = ATA_MWDMA2,
363 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */ 365 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */
364 },{ /* 1 */ 366 },
365 .name = "SvrWks CSB5", 367 { /* 1: CSB5 */
368 .name = DRV_NAME,
366 .init_chipset = init_chipset_svwks, 369 .init_chipset = init_chipset_svwks,
367 .port_ops = &svwks_port_ops, 370 .port_ops = &svwks_port_ops,
368 .host_flags = IDE_HFLAGS_SVWKS, 371 .host_flags = IDE_HFLAGS_SVWKS,
369 .pio_mask = ATA_PIO4, 372 .pio_mask = ATA_PIO4,
370 .mwdma_mask = ATA_MWDMA2, 373 .mwdma_mask = ATA_MWDMA2,
371 .udma_mask = ATA_UDMA5, 374 .udma_mask = ATA_UDMA5,
372 },{ /* 2 */ 375 },
373 .name = "SvrWks CSB6", 376 { /* 2: CSB6 */
377 .name = DRV_NAME,
374 .init_chipset = init_chipset_svwks, 378 .init_chipset = init_chipset_svwks,
375 .port_ops = &svwks_port_ops, 379 .port_ops = &svwks_port_ops,
376 .host_flags = IDE_HFLAGS_SVWKS, 380 .host_flags = IDE_HFLAGS_SVWKS,
377 .pio_mask = ATA_PIO4, 381 .pio_mask = ATA_PIO4,
378 .mwdma_mask = ATA_MWDMA2, 382 .mwdma_mask = ATA_MWDMA2,
379 .udma_mask = ATA_UDMA5, 383 .udma_mask = ATA_UDMA5,
380 },{ /* 3 */ 384 },
381 .name = "SvrWks CSB6", 385 { /* 3: CSB6-2 */
386 .name = DRV_NAME,
382 .init_chipset = init_chipset_svwks, 387 .init_chipset = init_chipset_svwks,
383 .port_ops = &svwks_port_ops, 388 .port_ops = &svwks_port_ops,
384 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 389 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
385 .pio_mask = ATA_PIO4, 390 .pio_mask = ATA_PIO4,
386 .mwdma_mask = ATA_MWDMA2, 391 .mwdma_mask = ATA_MWDMA2,
387 .udma_mask = ATA_UDMA5, 392 .udma_mask = ATA_UDMA5,
388 },{ /* 4 */ 393 },
389 .name = "SvrWks HT1000", 394 { /* 4: HT1000 */
395 .name = DRV_NAME,
390 .init_chipset = init_chipset_svwks, 396 .init_chipset = init_chipset_svwks,
391 .port_ops = &svwks_port_ops, 397 .port_ops = &svwks_port_ops,
392 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE, 398 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,