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path: root/drivers/ide/pci/scc_pata.c
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Diffstat (limited to 'drivers/ide/pci/scc_pata.c')
-rw-r--r--drivers/ide/pci/scc_pata.c22
1 files changed, 0 insertions, 22 deletions
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index f839bdeb903b..977b48e95ba4 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -284,27 +284,6 @@ static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed)
284} 284}
285 285
286/** 286/**
287 * scc_configure_drive_for_dma - set up for DMA transfers
288 * @drive: drive we are going to set up
289 *
290 * Set up the drive for DMA, tune the controller and drive as
291 * required.
292 * If the drive isn't suitable for DMA or we hit other problems
293 * then we will drop down to PIO and set up PIO appropriately.
294 * (return -1)
295 */
296
297static int scc_config_drive_for_dma(ide_drive_t *drive)
298{
299 if (ide_tune_dma(drive))
300 return 0;
301
302 ide_set_max_pio(drive);
303
304 return -1;
305}
306
307/**
308 * scc_ide_dma_setup - begin a DMA phase 287 * scc_ide_dma_setup - begin a DMA phase
309 * @drive: target device 288 * @drive: target device
310 * 289 *
@@ -701,7 +680,6 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
701 hwif->ide_dma_end = scc_ide_dma_end; 680 hwif->ide_dma_end = scc_ide_dma_end;
702 hwif->set_pio_mode = scc_set_pio_mode; 681 hwif->set_pio_mode = scc_set_pio_mode;
703 hwif->set_dma_mode = scc_set_dma_mode; 682 hwif->set_dma_mode = scc_set_dma_mode;
704 hwif->ide_dma_check = scc_config_drive_for_dma;
705 hwif->ide_dma_test_irq = scc_dma_test_irq; 683 hwif->ide_dma_test_irq = scc_dma_test_irq;
706 hwif->udma_filter = scc_udma_filter; 684 hwif->udma_filter = scc_udma_filter;
707 685