diff options
Diffstat (limited to 'drivers/ide/pci/piix.c')
-rw-r--r-- | drivers/ide/pci/piix.c | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index edb37f3d558d..52cfc2ac22c1 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/ide/pci/piix.c Version 0.45 May 12, 2006 | 2 | * linux/drivers/ide/pci/piix.c Version 0.46 December 3, 2006 |
3 | * | 3 | * |
4 | * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer | 4 | * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer |
5 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> | 5 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
@@ -163,7 +163,7 @@ static u8 piix_ratemask (ide_drive_t *drive) | |||
163 | * if the drive cannot see an 80pin cable. | 163 | * if the drive cannot see an 80pin cable. |
164 | */ | 164 | */ |
165 | if (!eighty_ninty_three(drive)) | 165 | if (!eighty_ninty_three(drive)) |
166 | mode = min(mode, (u8)1); | 166 | mode = min_t(u8, mode, 1); |
167 | return mode; | 167 | return mode; |
168 | } | 168 | } |
169 | 169 | ||
@@ -216,7 +216,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) | |||
216 | { | 216 | { |
217 | ide_hwif_t *hwif = HWIF(drive); | 217 | ide_hwif_t *hwif = HWIF(drive); |
218 | struct pci_dev *dev = hwif->pci_dev; | 218 | struct pci_dev *dev = hwif->pci_dev; |
219 | int is_slave = (&hwif->drives[1] == drive); | 219 | int is_slave = drive->dn & 1; |
220 | int master_port = hwif->channel ? 0x42 : 0x40; | 220 | int master_port = hwif->channel ? 0x42 : 0x40; |
221 | int slave_port = 0x44; | 221 | int slave_port = 0x44; |
222 | unsigned long flags; | 222 | unsigned long flags; |
@@ -225,7 +225,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) | |||
225 | static DEFINE_SPINLOCK(tune_lock); | 225 | static DEFINE_SPINLOCK(tune_lock); |
226 | int control = 0; | 226 | int control = 0; |
227 | 227 | ||
228 | /* ISP RTC */ | 228 | /* ISP RTC */ |
229 | static const u8 timings[][2]= { | 229 | static const u8 timings[][2]= { |
230 | { 0, 0 }, | 230 | { 0, 0 }, |
231 | { 0, 0 }, | 231 | { 0, 0 }, |
@@ -233,7 +233,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) | |||
233 | { 2, 1 }, | 233 | { 2, 1 }, |
234 | { 2, 3 }, }; | 234 | { 2, 3 }, }; |
235 | 235 | ||
236 | pio = ide_get_best_pio_mode(drive, pio, 5, NULL); | 236 | pio = ide_get_best_pio_mode(drive, pio, 4, NULL); |
237 | 237 | ||
238 | /* | 238 | /* |
239 | * Master vs slave is synchronized above us but the slave register is | 239 | * Master vs slave is synchronized above us but the slave register is |
@@ -243,25 +243,24 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio) | |||
243 | spin_lock_irqsave(&tune_lock, flags); | 243 | spin_lock_irqsave(&tune_lock, flags); |
244 | pci_read_config_word(dev, master_port, &master_data); | 244 | pci_read_config_word(dev, master_port, &master_data); |
245 | 245 | ||
246 | if (pio >= 2) | 246 | if (pio > 1) |
247 | control |= 1; /* Programmable timing on */ | 247 | control |= 1; /* Programmable timing on */ |
248 | if (drive->media == ide_disk) | 248 | if (drive->media == ide_disk) |
249 | control |= 4; /* Prefetch, post write */ | 249 | control |= 4; /* Prefetch, post write */ |
250 | if (pio >= 3) | 250 | if (pio > 2) |
251 | control |= 2; /* IORDY */ | 251 | control |= 2; /* IORDY */ |
252 | if (is_slave) { | 252 | if (is_slave) { |
253 | master_data = master_data | 0x4000; | 253 | master_data |= 0x4000; |
254 | master_data &= ~0x0070; | ||
254 | if (pio > 1) { | 255 | if (pio > 1) { |
255 | /* enable PPE, IE and TIME */ | 256 | /* enable PPE, IE and TIME */ |
256 | master_data = master_data | (control << 4); | 257 | master_data = master_data | (control << 4); |
257 | } else { | ||
258 | master_data &= ~0x0070; | ||
259 | } | 258 | } |
260 | pci_read_config_byte(dev, slave_port, &slave_data); | 259 | pci_read_config_byte(dev, slave_port, &slave_data); |
261 | slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0); | 260 | slave_data = slave_data & (hwif->channel ? 0x0f : 0xf0); |
262 | slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0)); | 261 | slave_data = slave_data | (((timings[pio][0] << 2) | timings[pio][1]) << (hwif->channel ? 4 : 0)); |
263 | } else { | 262 | } else { |
264 | master_data = master_data & 0xccf8; | 263 | master_data &= ~0x3307; |
265 | if (pio > 1) { | 264 | if (pio > 1) { |
266 | /* enable PPE, IE and TIME */ | 265 | /* enable PPE, IE and TIME */ |
267 | master_data = master_data | control; | 266 | master_data = master_data | control; |
@@ -539,13 +538,19 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { | |||
539 | /* 0 */ DECLARE_PIIX_DEV("PIIXa"), | 538 | /* 0 */ DECLARE_PIIX_DEV("PIIXa"), |
540 | /* 1 */ DECLARE_PIIX_DEV("PIIXb"), | 539 | /* 1 */ DECLARE_PIIX_DEV("PIIXb"), |
541 | 540 | ||
542 | { /* 2 */ | 541 | /* 2 */ |
542 | { /* | ||
543 | * MPIIX actually has only a single IDE channel mapped to | ||
544 | * the primary or secondary ports depending on the value | ||
545 | * of the bit 14 of the IDETIM register at offset 0x6c | ||
546 | */ | ||
543 | .name = "MPIIX", | 547 | .name = "MPIIX", |
544 | .init_hwif = init_hwif_piix, | 548 | .init_hwif = init_hwif_piix, |
545 | .channels = 2, | 549 | .channels = 2, |
546 | .autodma = NODMA, | 550 | .autodma = NODMA, |
547 | .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}}, | 551 | .enablebits = {{0x6d,0xc0,0x80}, {0x6d,0xc0,0xc0}}, |
548 | .bootable = ON_BOARD, | 552 | .bootable = ON_BOARD, |
553 | .flags = IDEPCI_FLAG_ISA_PORTS | ||
549 | }, | 554 | }, |
550 | 555 | ||
551 | /* 3 */ DECLARE_PIIX_DEV("PIIX3"), | 556 | /* 3 */ DECLARE_PIIX_DEV("PIIX3"), |