diff options
Diffstat (limited to 'drivers/ide/pci/pdc202xx_old.c')
-rw-r--r-- | drivers/ide/pci/pdc202xx_old.c | 145 |
1 files changed, 50 insertions, 95 deletions
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index e1d2337a9f1d..e09742e2ba59 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/ide/pci/pdc202xx_old.c Version 0.51 Jul 27, 2007 | 2 | * linux/drivers/ide/pci/pdc202xx_old.c Version 0.52 Aug 27, 2007 |
3 | * | 3 | * |
4 | * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> | 4 | * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org> |
5 | * Copyright (C) 2006-2007 MontaVista Software, Inc. | 5 | * Copyright (C) 2006-2007 MontaVista Software, Inc. |
@@ -97,9 +97,6 @@ static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed) | |||
97 | case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break; | 97 | case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break; |
98 | case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break; | 98 | case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break; |
99 | case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break; | 99 | case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break; |
100 | case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break; | ||
101 | case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break; | ||
102 | case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break; | ||
103 | case XFER_PIO_4: TA = 0x01; TB = 0x04; break; | 100 | case XFER_PIO_4: TA = 0x01; TB = 0x04; break; |
104 | case XFER_PIO_3: TA = 0x02; TB = 0x06; break; | 101 | case XFER_PIO_3: TA = 0x02; TB = 0x06; break; |
105 | case XFER_PIO_2: TA = 0x03; TB = 0x08; break; | 102 | case XFER_PIO_2: TA = 0x03; TB = 0x08; break; |
@@ -305,13 +302,6 @@ static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, | |||
305 | 302 | ||
306 | static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) | 303 | static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) |
307 | { | 304 | { |
308 | struct pci_dev *dev = hwif->pci_dev; | ||
309 | |||
310 | /* PDC20265 has problems with large LBA48 requests */ | ||
311 | if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) || | ||
312 | (dev->device == PCI_DEVICE_ID_PROMISE_20265)) | ||
313 | hwif->rqsize = 256; | ||
314 | |||
315 | hwif->set_pio_mode = &pdc202xx_set_pio_mode; | 305 | hwif->set_pio_mode = &pdc202xx_set_pio_mode; |
316 | hwif->set_dma_mode = &pdc202xx_set_mode; | 306 | hwif->set_dma_mode = &pdc202xx_set_mode; |
317 | 307 | ||
@@ -320,18 +310,9 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) | |||
320 | if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) | 310 | if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) |
321 | hwif->resetproc = &pdc202xx_reset; | 311 | hwif->resetproc = &pdc202xx_reset; |
322 | 312 | ||
323 | hwif->err_stops_fifo = 1; | ||
324 | |||
325 | hwif->drives[0].autotune = hwif->drives[1].autotune = 1; | ||
326 | |||
327 | if (hwif->dma_base == 0) | 313 | if (hwif->dma_base == 0) |
328 | return; | 314 | return; |
329 | 315 | ||
330 | hwif->ultra_mask = hwif->cds->udma_mask; | ||
331 | hwif->mwdma_mask = 0x07; | ||
332 | hwif->swdma_mask = 0x07; | ||
333 | hwif->atapi_dma = 1; | ||
334 | |||
335 | hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; | 316 | hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; |
336 | hwif->dma_timeout = &pdc202xx_dma_timeout; | 317 | hwif->dma_timeout = &pdc202xx_dma_timeout; |
337 | 318 | ||
@@ -377,8 +358,8 @@ static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase) | |||
377 | ide_setup_dma(hwif, dmabase, 8); | 358 | ide_setup_dma(hwif, dmabase, 8); |
378 | } | 359 | } |
379 | 360 | ||
380 | static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, | 361 | static void __devinit pdc202ata4_fixup_irq(struct pci_dev *dev, |
381 | ide_pci_device_t *d) | 362 | const char *name) |
382 | { | 363 | { |
383 | if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) { | 364 | if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) { |
384 | u8 irq = 0, irq2 = 0; | 365 | u8 irq = 0, irq2 = 0; |
@@ -388,90 +369,45 @@ static int __devinit init_setup_pdc202ata4(struct pci_dev *dev, | |||
388 | if (irq != irq2) { | 369 | if (irq != irq2) { |
389 | pci_write_config_byte(dev, | 370 | pci_write_config_byte(dev, |
390 | (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */ | 371 | (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */ |
391 | printk(KERN_INFO "%s: pci-config space interrupt " | 372 | printk(KERN_INFO "%s: PCI config space interrupt " |
392 | "mirror fixed.\n", d->name); | 373 | "mirror fixed\n", name); |
393 | } | 374 | } |
394 | } | 375 | } |
395 | return ide_setup_pci_device(dev, d); | ||
396 | } | 376 | } |
397 | 377 | ||
398 | static int __devinit init_setup_pdc20265(struct pci_dev *dev, | 378 | #define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ |
399 | ide_pci_device_t *d) | 379 | { \ |
400 | { | 380 | .name = name_str, \ |
401 | if ((dev->bus->self) && | 381 | .init_chipset = init_chipset_pdc202xx, \ |
402 | (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && | 382 | .init_hwif = init_hwif_pdc202xx, \ |
403 | ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || | 383 | .init_dma = init_dma_pdc202xx, \ |
404 | (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { | 384 | .extra = 48, \ |
405 | printk(KERN_INFO "ide: Skipping Promise PDC20265 " | 385 | .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | \ |
406 | "attached to I2O RAID controller.\n"); | 386 | extra_flags | \ |
407 | return -ENODEV; | 387 | IDE_HFLAG_OFF_BOARD, \ |
388 | .pio_mask = ATA_PIO4, \ | ||
389 | .mwdma_mask = ATA_MWDMA2, \ | ||
390 | .udma_mask = udma, \ | ||
408 | } | 391 | } |
409 | return ide_setup_pci_device(dev, d); | ||
410 | } | ||
411 | 392 | ||
412 | static int __devinit init_setup_pdc202xx(struct pci_dev *dev, | 393 | static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { |
413 | ide_pci_device_t *d) | ||
414 | { | ||
415 | return ide_setup_pci_device(dev, d); | ||
416 | } | ||
417 | |||
418 | static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { | ||
419 | { /* 0 */ | 394 | { /* 0 */ |
420 | .name = "PDC20246", | 395 | .name = "PDC20246", |
421 | .init_setup = init_setup_pdc202ata4, | ||
422 | .init_chipset = init_chipset_pdc202xx, | 396 | .init_chipset = init_chipset_pdc202xx, |
423 | .init_hwif = init_hwif_pdc202xx, | 397 | .init_hwif = init_hwif_pdc202xx, |
424 | .init_dma = init_dma_pdc202xx, | 398 | .init_dma = init_dma_pdc202xx, |
425 | .autodma = AUTODMA, | ||
426 | .bootable = OFF_BOARD, | ||
427 | .extra = 16, | 399 | .extra = 16, |
400 | .host_flags = IDE_HFLAG_ERROR_STOPS_FIFO | | ||
401 | IDE_HFLAG_OFF_BOARD, | ||
428 | .pio_mask = ATA_PIO4, | 402 | .pio_mask = ATA_PIO4, |
429 | .udma_mask = 0x07, /* udma0-2 */ | 403 | .mwdma_mask = ATA_MWDMA2, |
430 | },{ /* 1 */ | 404 | .udma_mask = ATA_UDMA2, |
431 | .name = "PDC20262", | 405 | }, |
432 | .init_setup = init_setup_pdc202ata4, | 406 | |
433 | .init_chipset = init_chipset_pdc202xx, | 407 | /* 1 */ DECLARE_PDC2026X_DEV("PDC20262", ATA_UDMA4, 0), |
434 | .init_hwif = init_hwif_pdc202xx, | 408 | /* 2 */ DECLARE_PDC2026X_DEV("PDC20263", ATA_UDMA4, 0), |
435 | .init_dma = init_dma_pdc202xx, | 409 | /* 3 */ DECLARE_PDC2026X_DEV("PDC20265", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), |
436 | .autodma = AUTODMA, | 410 | /* 4 */ DECLARE_PDC2026X_DEV("PDC20267", ATA_UDMA5, IDE_HFLAG_RQSIZE_256), |
437 | .bootable = OFF_BOARD, | ||
438 | .extra = 48, | ||
439 | .pio_mask = ATA_PIO4, | ||
440 | .udma_mask = 0x1f, /* udma0-4 */ | ||
441 | },{ /* 2 */ | ||
442 | .name = "PDC20263", | ||
443 | .init_setup = init_setup_pdc202ata4, | ||
444 | .init_chipset = init_chipset_pdc202xx, | ||
445 | .init_hwif = init_hwif_pdc202xx, | ||
446 | .init_dma = init_dma_pdc202xx, | ||
447 | .autodma = AUTODMA, | ||
448 | .bootable = OFF_BOARD, | ||
449 | .extra = 48, | ||
450 | .pio_mask = ATA_PIO4, | ||
451 | .udma_mask = 0x1f, /* udma0-4 */ | ||
452 | },{ /* 3 */ | ||
453 | .name = "PDC20265", | ||
454 | .init_setup = init_setup_pdc20265, | ||
455 | .init_chipset = init_chipset_pdc202xx, | ||
456 | .init_hwif = init_hwif_pdc202xx, | ||
457 | .init_dma = init_dma_pdc202xx, | ||
458 | .autodma = AUTODMA, | ||
459 | .bootable = OFF_BOARD, | ||
460 | .extra = 48, | ||
461 | .pio_mask = ATA_PIO4, | ||
462 | .udma_mask = 0x3f, /* udma0-5 */ | ||
463 | },{ /* 4 */ | ||
464 | .name = "PDC20267", | ||
465 | .init_setup = init_setup_pdc202xx, | ||
466 | .init_chipset = init_chipset_pdc202xx, | ||
467 | .init_hwif = init_hwif_pdc202xx, | ||
468 | .init_dma = init_dma_pdc202xx, | ||
469 | .autodma = AUTODMA, | ||
470 | .bootable = OFF_BOARD, | ||
471 | .extra = 48, | ||
472 | .pio_mask = ATA_PIO4, | ||
473 | .udma_mask = 0x3f, /* udma0-5 */ | ||
474 | } | ||
475 | }; | 411 | }; |
476 | 412 | ||
477 | /** | 413 | /** |
@@ -485,9 +421,28 @@ static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = { | |||
485 | 421 | ||
486 | static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 422 | static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
487 | { | 423 | { |
488 | ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data]; | 424 | const struct ide_port_info *d; |
425 | u8 idx = id->driver_data; | ||
426 | |||
427 | d = &pdc202xx_chipsets[idx]; | ||
428 | |||
429 | if (idx < 3) | ||
430 | pdc202ata4_fixup_irq(dev, d->name); | ||
431 | |||
432 | if (idx == 3) { | ||
433 | struct pci_dev *bridge = dev->bus->self; | ||
489 | 434 | ||
490 | return d->init_setup(dev, d); | 435 | if (bridge && |
436 | bridge->vendor == PCI_VENDOR_ID_INTEL && | ||
437 | (bridge->device == PCI_DEVICE_ID_INTEL_I960 || | ||
438 | bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) { | ||
439 | printk(KERN_INFO "ide: Skipping Promise PDC20265 " | ||
440 | "attached to I2O RAID controller\n"); | ||
441 | return -ENODEV; | ||
442 | } | ||
443 | } | ||
444 | |||
445 | return ide_setup_pci_device(dev, d); | ||
491 | } | 446 | } |
492 | 447 | ||
493 | static const struct pci_device_id pdc202xx_pci_tbl[] = { | 448 | static const struct pci_device_id pdc202xx_pci_tbl[] = { |