diff options
Diffstat (limited to 'drivers/ide/pci/hpt366.c')
-rw-r--r-- | drivers/ide/pci/hpt366.c | 132 |
1 files changed, 87 insertions, 45 deletions
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 82d0e318a1fe..c929dadaaaff 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c | |||
@@ -760,7 +760,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask) | |||
760 | } | 760 | } |
761 | } else | 761 | } else |
762 | outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), | 762 | outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), |
763 | hwif->io_ports[IDE_CONTROL_OFFSET]); | 763 | hwif->io_ports.ctl_addr); |
764 | } | 764 | } |
765 | 765 | ||
766 | /* | 766 | /* |
@@ -776,7 +776,7 @@ static void hpt366_dma_lost_irq(ide_drive_t *drive) | |||
776 | pci_read_config_byte(dev, 0x52, &mcr3); | 776 | pci_read_config_byte(dev, 0x52, &mcr3); |
777 | pci_read_config_byte(dev, 0x5a, &scr1); | 777 | pci_read_config_byte(dev, 0x5a, &scr1); |
778 | printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", | 778 | printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", |
779 | drive->name, __FUNCTION__, mcr1, mcr3, scr1); | 779 | drive->name, __func__, mcr1, mcr3, scr1); |
780 | if (scr1 & 0x10) | 780 | if (scr1 & 0x10) |
781 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); | 781 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); |
782 | ide_dma_lost_irq(drive); | 782 | ide_dma_lost_irq(drive); |
@@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive) | |||
808 | hpt370_clear_engine(drive); | 808 | hpt370_clear_engine(drive); |
809 | } | 809 | } |
810 | 810 | ||
811 | static void hpt370_ide_dma_start(ide_drive_t *drive) | 811 | static void hpt370_dma_start(ide_drive_t *drive) |
812 | { | 812 | { |
813 | #ifdef HPT_RESET_STATE_ENGINE | 813 | #ifdef HPT_RESET_STATE_ENGINE |
814 | hpt370_clear_engine(drive); | 814 | hpt370_clear_engine(drive); |
@@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive) | |||
816 | ide_dma_start(drive); | 816 | ide_dma_start(drive); |
817 | } | 817 | } |
818 | 818 | ||
819 | static int hpt370_ide_dma_end(ide_drive_t *drive) | 819 | static int hpt370_dma_end(ide_drive_t *drive) |
820 | { | 820 | { |
821 | ide_hwif_t *hwif = HWIF(drive); | 821 | ide_hwif_t *hwif = HWIF(drive); |
822 | u8 dma_stat = inb(hwif->dma_status); | 822 | u8 dma_stat = inb(hwif->dma_status); |
@@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive) | |||
838 | } | 838 | } |
839 | 839 | ||
840 | /* returns 1 if DMA IRQ issued, 0 otherwise */ | 840 | /* returns 1 if DMA IRQ issued, 0 otherwise */ |
841 | static int hpt374_ide_dma_test_irq(ide_drive_t *drive) | 841 | static int hpt374_dma_test_irq(ide_drive_t *drive) |
842 | { | 842 | { |
843 | ide_hwif_t *hwif = HWIF(drive); | 843 | ide_hwif_t *hwif = HWIF(drive); |
844 | struct pci_dev *dev = to_pci_dev(hwif->dev); | 844 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
@@ -858,11 +858,11 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive) | |||
858 | 858 | ||
859 | if (!drive->waiting_for_dma) | 859 | if (!drive->waiting_for_dma) |
860 | printk(KERN_WARNING "%s: (%s) called while not waiting\n", | 860 | printk(KERN_WARNING "%s: (%s) called while not waiting\n", |
861 | drive->name, __FUNCTION__); | 861 | drive->name, __func__); |
862 | return 0; | 862 | return 0; |
863 | } | 863 | } |
864 | 864 | ||
865 | static int hpt374_ide_dma_end(ide_drive_t *drive) | 865 | static int hpt374_dma_end(ide_drive_t *drive) |
866 | { | 866 | { |
867 | ide_hwif_t *hwif = HWIF(drive); | 867 | ide_hwif_t *hwif = HWIF(drive); |
868 | struct pci_dev *dev = to_pci_dev(hwif->dev); | 868 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
@@ -1271,17 +1271,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) | |||
1271 | /* Cache the channel's MISC. control registers' offset */ | 1271 | /* Cache the channel's MISC. control registers' offset */ |
1272 | hwif->select_data = hwif->channel ? 0x54 : 0x50; | 1272 | hwif->select_data = hwif->channel ? 0x54 : 0x50; |
1273 | 1273 | ||
1274 | hwif->set_pio_mode = &hpt3xx_set_pio_mode; | ||
1275 | hwif->set_dma_mode = &hpt3xx_set_mode; | ||
1276 | |||
1277 | hwif->quirkproc = &hpt3xx_quirkproc; | ||
1278 | hwif->maskproc = &hpt3xx_maskproc; | ||
1279 | |||
1280 | hwif->udma_filter = &hpt3xx_udma_filter; | ||
1281 | hwif->mdma_filter = &hpt3xx_mdma_filter; | ||
1282 | |||
1283 | hwif->cable_detect = hpt3xx_cable_detect; | ||
1284 | |||
1285 | /* | 1274 | /* |
1286 | * HPT3xxN chips have some complications: | 1275 | * HPT3xxN chips have some complications: |
1287 | * | 1276 | * |
@@ -1323,29 +1312,19 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) | |||
1323 | 1312 | ||
1324 | if (new_mcr != old_mcr) | 1313 | if (new_mcr != old_mcr) |
1325 | pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); | 1314 | pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); |
1326 | |||
1327 | if (hwif->dma_base == 0) | ||
1328 | return; | ||
1329 | |||
1330 | if (chip_type >= HPT374) { | ||
1331 | hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; | ||
1332 | hwif->ide_dma_end = &hpt374_ide_dma_end; | ||
1333 | } else if (chip_type >= HPT370) { | ||
1334 | hwif->dma_start = &hpt370_ide_dma_start; | ||
1335 | hwif->ide_dma_end = &hpt370_ide_dma_end; | ||
1336 | hwif->dma_timeout = &hpt370_dma_timeout; | ||
1337 | } else | ||
1338 | hwif->dma_lost_irq = &hpt366_dma_lost_irq; | ||
1339 | } | 1315 | } |
1340 | 1316 | ||
1341 | static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) | 1317 | static int __devinit init_dma_hpt366(ide_hwif_t *hwif, |
1318 | const struct ide_port_info *d) | ||
1342 | { | 1319 | { |
1343 | struct pci_dev *dev = to_pci_dev(hwif->dev); | 1320 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1344 | u8 masterdma = 0, slavedma = 0; | 1321 | unsigned long flags, base = ide_pci_dma_base(hwif, d); |
1345 | u8 dma_new = 0, dma_old = 0; | 1322 | u8 dma_old, dma_new, masterdma = 0, slavedma = 0; |
1346 | unsigned long flags; | ||
1347 | 1323 | ||
1348 | dma_old = inb(dmabase + 2); | 1324 | if (base == 0 || ide_pci_set_master(dev, d->name) < 0) |
1325 | return -1; | ||
1326 | |||
1327 | dma_old = inb(base + 2); | ||
1349 | 1328 | ||
1350 | local_irq_save(flags); | 1329 | local_irq_save(flags); |
1351 | 1330 | ||
@@ -1356,11 +1335,21 @@ static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) | |||
1356 | if (masterdma & 0x30) dma_new |= 0x20; | 1335 | if (masterdma & 0x30) dma_new |= 0x20; |
1357 | if ( slavedma & 0x30) dma_new |= 0x40; | 1336 | if ( slavedma & 0x30) dma_new |= 0x40; |
1358 | if (dma_new != dma_old) | 1337 | if (dma_new != dma_old) |
1359 | outb(dma_new, dmabase + 2); | 1338 | outb(dma_new, base + 2); |
1360 | 1339 | ||
1361 | local_irq_restore(flags); | 1340 | local_irq_restore(flags); |
1362 | 1341 | ||
1363 | ide_setup_dma(hwif, dmabase); | 1342 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", |
1343 | hwif->name, base, base + 7); | ||
1344 | |||
1345 | hwif->extra_base = base + (hwif->channel ? 8 : 16); | ||
1346 | |||
1347 | if (ide_allocate_dma_engine(hwif)) | ||
1348 | return -1; | ||
1349 | |||
1350 | ide_setup_dma(hwif, base); | ||
1351 | |||
1352 | return 0; | ||
1364 | } | 1353 | } |
1365 | 1354 | ||
1366 | static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) | 1355 | static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) |
@@ -1416,6 +1405,49 @@ static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) | |||
1416 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ | 1405 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ |
1417 | IDE_HFLAG_OFF_BOARD) | 1406 | IDE_HFLAG_OFF_BOARD) |
1418 | 1407 | ||
1408 | static const struct ide_port_ops hpt3xx_port_ops = { | ||
1409 | .set_pio_mode = hpt3xx_set_pio_mode, | ||
1410 | .set_dma_mode = hpt3xx_set_mode, | ||
1411 | .quirkproc = hpt3xx_quirkproc, | ||
1412 | .maskproc = hpt3xx_maskproc, | ||
1413 | .mdma_filter = hpt3xx_mdma_filter, | ||
1414 | .udma_filter = hpt3xx_udma_filter, | ||
1415 | .cable_detect = hpt3xx_cable_detect, | ||
1416 | }; | ||
1417 | |||
1418 | static const struct ide_dma_ops hpt37x_dma_ops = { | ||
1419 | .dma_host_set = ide_dma_host_set, | ||
1420 | .dma_setup = ide_dma_setup, | ||
1421 | .dma_exec_cmd = ide_dma_exec_cmd, | ||
1422 | .dma_start = ide_dma_start, | ||
1423 | .dma_end = hpt374_dma_end, | ||
1424 | .dma_test_irq = hpt374_dma_test_irq, | ||
1425 | .dma_lost_irq = ide_dma_lost_irq, | ||
1426 | .dma_timeout = ide_dma_timeout, | ||
1427 | }; | ||
1428 | |||
1429 | static const struct ide_dma_ops hpt370_dma_ops = { | ||
1430 | .dma_host_set = ide_dma_host_set, | ||
1431 | .dma_setup = ide_dma_setup, | ||
1432 | .dma_exec_cmd = ide_dma_exec_cmd, | ||
1433 | .dma_start = hpt370_dma_start, | ||
1434 | .dma_end = hpt370_dma_end, | ||
1435 | .dma_test_irq = ide_dma_test_irq, | ||
1436 | .dma_lost_irq = ide_dma_lost_irq, | ||
1437 | .dma_timeout = hpt370_dma_timeout, | ||
1438 | }; | ||
1439 | |||
1440 | static const struct ide_dma_ops hpt36x_dma_ops = { | ||
1441 | .dma_host_set = ide_dma_host_set, | ||
1442 | .dma_setup = ide_dma_setup, | ||
1443 | .dma_exec_cmd = ide_dma_exec_cmd, | ||
1444 | .dma_start = ide_dma_start, | ||
1445 | .dma_end = __ide_dma_end, | ||
1446 | .dma_test_irq = ide_dma_test_irq, | ||
1447 | .dma_lost_irq = hpt366_dma_lost_irq, | ||
1448 | .dma_timeout = ide_dma_timeout, | ||
1449 | }; | ||
1450 | |||
1419 | static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | 1451 | static const struct ide_port_info hpt366_chipsets[] __devinitdata = { |
1420 | { /* 0 */ | 1452 | { /* 0 */ |
1421 | .name = "HPT36x", | 1453 | .name = "HPT36x", |
@@ -1429,7 +1461,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1429 | * Bit 4 is for the primary channel, bit 5 for the secondary. | 1461 | * Bit 4 is for the primary channel, bit 5 for the secondary. |
1430 | */ | 1462 | */ |
1431 | .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, | 1463 | .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, |
1432 | .extra = 240, | 1464 | .port_ops = &hpt3xx_port_ops, |
1465 | .dma_ops = &hpt36x_dma_ops, | ||
1433 | .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, | 1466 | .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, |
1434 | .pio_mask = ATA_PIO4, | 1467 | .pio_mask = ATA_PIO4, |
1435 | .mwdma_mask = ATA_MWDMA2, | 1468 | .mwdma_mask = ATA_MWDMA2, |
@@ -1439,7 +1472,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1439 | .init_hwif = init_hwif_hpt366, | 1472 | .init_hwif = init_hwif_hpt366, |
1440 | .init_dma = init_dma_hpt366, | 1473 | .init_dma = init_dma_hpt366, |
1441 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1474 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1442 | .extra = 240, | 1475 | .port_ops = &hpt3xx_port_ops, |
1476 | .dma_ops = &hpt37x_dma_ops, | ||
1443 | .host_flags = IDE_HFLAGS_HPT3XX, | 1477 | .host_flags = IDE_HFLAGS_HPT3XX, |
1444 | .pio_mask = ATA_PIO4, | 1478 | .pio_mask = ATA_PIO4, |
1445 | .mwdma_mask = ATA_MWDMA2, | 1479 | .mwdma_mask = ATA_MWDMA2, |
@@ -1449,7 +1483,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1449 | .init_hwif = init_hwif_hpt366, | 1483 | .init_hwif = init_hwif_hpt366, |
1450 | .init_dma = init_dma_hpt366, | 1484 | .init_dma = init_dma_hpt366, |
1451 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1485 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1452 | .extra = 240, | 1486 | .port_ops = &hpt3xx_port_ops, |
1487 | .dma_ops = &hpt37x_dma_ops, | ||
1453 | .host_flags = IDE_HFLAGS_HPT3XX, | 1488 | .host_flags = IDE_HFLAGS_HPT3XX, |
1454 | .pio_mask = ATA_PIO4, | 1489 | .pio_mask = ATA_PIO4, |
1455 | .mwdma_mask = ATA_MWDMA2, | 1490 | .mwdma_mask = ATA_MWDMA2, |
@@ -1459,7 +1494,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1459 | .init_hwif = init_hwif_hpt366, | 1494 | .init_hwif = init_hwif_hpt366, |
1460 | .init_dma = init_dma_hpt366, | 1495 | .init_dma = init_dma_hpt366, |
1461 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1496 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1462 | .extra = 240, | 1497 | .port_ops = &hpt3xx_port_ops, |
1498 | .dma_ops = &hpt37x_dma_ops, | ||
1463 | .host_flags = IDE_HFLAGS_HPT3XX, | 1499 | .host_flags = IDE_HFLAGS_HPT3XX, |
1464 | .pio_mask = ATA_PIO4, | 1500 | .pio_mask = ATA_PIO4, |
1465 | .mwdma_mask = ATA_MWDMA2, | 1501 | .mwdma_mask = ATA_MWDMA2, |
@@ -1470,7 +1506,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1470 | .init_dma = init_dma_hpt366, | 1506 | .init_dma = init_dma_hpt366, |
1471 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1507 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1472 | .udma_mask = ATA_UDMA5, | 1508 | .udma_mask = ATA_UDMA5, |
1473 | .extra = 240, | 1509 | .port_ops = &hpt3xx_port_ops, |
1510 | .dma_ops = &hpt37x_dma_ops, | ||
1474 | .host_flags = IDE_HFLAGS_HPT3XX, | 1511 | .host_flags = IDE_HFLAGS_HPT3XX, |
1475 | .pio_mask = ATA_PIO4, | 1512 | .pio_mask = ATA_PIO4, |
1476 | .mwdma_mask = ATA_MWDMA2, | 1513 | .mwdma_mask = ATA_MWDMA2, |
@@ -1480,7 +1517,8 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { | |||
1480 | .init_hwif = init_hwif_hpt366, | 1517 | .init_hwif = init_hwif_hpt366, |
1481 | .init_dma = init_dma_hpt366, | 1518 | .init_dma = init_dma_hpt366, |
1482 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, | 1519 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
1483 | .extra = 240, | 1520 | .port_ops = &hpt3xx_port_ops, |
1521 | .dma_ops = &hpt37x_dma_ops, | ||
1484 | .host_flags = IDE_HFLAGS_HPT3XX, | 1522 | .host_flags = IDE_HFLAGS_HPT3XX, |
1485 | .pio_mask = ATA_PIO4, | 1523 | .pio_mask = ATA_PIO4, |
1486 | .mwdma_mask = ATA_MWDMA2, | 1524 | .mwdma_mask = ATA_MWDMA2, |
@@ -1543,6 +1581,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic | |||
1543 | d.name = info->chip_name; | 1581 | d.name = info->chip_name; |
1544 | d.udma_mask = info->udma_mask; | 1582 | d.udma_mask = info->udma_mask; |
1545 | 1583 | ||
1584 | /* fixup ->dma_ops for HPT370/HPT370A */ | ||
1585 | if (info == &hpt370 || info == &hpt370a) | ||
1586 | d.dma_ops = &hpt370_dma_ops; | ||
1587 | |||
1546 | pci_set_drvdata(dev, (void *)info); | 1588 | pci_set_drvdata(dev, (void *)info); |
1547 | 1589 | ||
1548 | if (info == &hpt36x || info == &hpt374) | 1590 | if (info == &hpt36x || info == &hpt374) |
@@ -1557,7 +1599,7 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic | |||
1557 | hpt374_init(dev, dev2); | 1599 | hpt374_init(dev, dev2); |
1558 | else { | 1600 | else { |
1559 | if (hpt36x_init(dev, dev2)) | 1601 | if (hpt36x_init(dev, dev2)) |
1560 | d.host_flags |= IDE_HFLAG_BOOTABLE; | 1602 | d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE; |
1561 | } | 1603 | } |
1562 | 1604 | ||
1563 | ret = ide_setup_pci_devices(dev, dev2, &d); | 1605 | ret = ide_setup_pci_devices(dev, dev2, &d); |