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path: root/drivers/ide/pci/hpt34x.c
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Diffstat (limited to 'drivers/ide/pci/hpt34x.c')
-rw-r--r--drivers/ide/pci/hpt34x.c11
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index 2c24c3de8846..64f19743b127 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -120,17 +120,10 @@ static unsigned int __devinit init_chipset_hpt34x(struct pci_dev *dev, const cha
120 pci_write_config_byte(dev, HPT34X_PCI_INIT_REG, 0x00); 120 pci_write_config_byte(dev, HPT34X_PCI_INIT_REG, 0x00);
121 pci_read_config_word(dev, PCI_COMMAND, &cmd); 121 pci_read_config_word(dev, PCI_COMMAND, &cmd);
122 122
123 if (cmd & PCI_COMMAND_MEMORY) { 123 if (cmd & PCI_COMMAND_MEMORY)
124 if (pci_resource_start(dev, PCI_ROM_RESOURCE)) {
125 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
126 dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
127 printk(KERN_INFO "HPT345: ROM enabled at 0x%08lx\n",
128 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
129 }
130 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0); 124 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
131 } else { 125 else
132 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20); 126 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
133 }
134 127
135 /* 128 /*
136 * Since 20-23 can be assigned and are R/W, we correct them. 129 * Since 20-23 can be assigned and are R/W, we correct them.