1 files changed, 27 insertions, 63 deletions

diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 77f51ab6d439..61ea96b5555c 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -74,7 +74,7 @@
 #define UDIDETCR1       0x7B
 #define DTPR1           0x7C
 
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS)
+#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
 #include <linux/stat.h>
 #include <linux/proc_fs.h>
 
@@ -165,7 +165,7 @@ static int cmd64x_get_info (char *buffer, char **addr, off_t offset, int count)
         return p-buffer;        /* => must be less than 4k! */
 }
 
-#endif  /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS) */
+#endif  /* defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
 
 static u8 quantize_timing(int timing, int quant)
 {
@@ -292,55 +292,6 @@ static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio)
         (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 }
 
-static u8 cmd64x_ratemask (ide_drive_t *drive)
-{
-        struct pci_dev *dev     = HWIF(drive)->pci_dev;
-        u8 mode = 0;
-
-        switch(dev->device) {
-                case PCI_DEVICE_ID_CMD_649:
-                        mode = 3;
-                        break;
-                case PCI_DEVICE_ID_CMD_648:
-                        mode = 2;
-                        break;
-                case PCI_DEVICE_ID_CMD_643:
-                        return 0;
-
-                case PCI_DEVICE_ID_CMD_646:
-                {
-                        unsigned int class_rev  = 0;
-                        pci_read_config_dword(dev,
-                                PCI_CLASS_REVISION, &class_rev);
-                        class_rev &= 0xff;
-                /*
-                 * UltraDMA only supported on PCI646U and PCI646U2, which
-                 * correspond to revisions 0x03, 0x05 and 0x07 respectively.
-                 * Actually, although the CMD tech support people won't
-                 * tell me the details, the 0x03 revision cannot support
-                 * UDMA correctly without hardware modifications, and even
-                 * then it only works with Quantum disks due to some
-                 * hold time assumptions in the 646U part which are fixed
-                 * in the 646U2.
-                 *
-                 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
-                 */
-                        switch(class_rev) {
-                                case 0x07:
-                                case 0x05:
-                                        return 1;
-                                case 0x03:
-                                case 0x01:
-                                default:
-                                        return 0;
-                        }
-                }
-        }
-        if (!eighty_ninty_three(drive))
-                mode = min(mode, (u8)1);
-        return mode;
-}
-
 static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
 {
         ide_hwif_t *hwif        = HWIF(drive);
@@ -348,7 +299,7 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
         u8 unit                 = drive->dn & 0x01;
         u8 regU = 0, pciU       = hwif->channel ? UDIDETCR1 : UDIDETCR0;
 
-        speed = ide_rate_filter(cmd64x_ratemask(drive), speed);
+        speed = ide_rate_filter(drive, speed);
 
         if (speed >= XFER_SW_DMA_0) {
                 (void) pci_read_config_byte(dev, pciU, &regU);
@@ -403,7 +354,7 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
 
 static int config_chipset_for_dma (ide_drive_t *drive)
 {
-        u8 speed        = ide_dma_speed(drive, cmd64x_ratemask(drive));
+        u8 speed = ide_max_dma_mode(drive);
 
         if (!speed)
                 return 0;
@@ -597,7 +548,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
         (void) pci_write_config_byte(dev, UDIDETCR0, 0xf0);
 #endif /* CONFIG_PPC */
 
-#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS)
+#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS)
 
         cmd_devs[n_cmd_devs++] = dev;
 
@@ -605,7 +556,7 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
                 cmd64x_proc = 1;
                 ide_pci_create_host_proc("cmd64x", cmd64x_get_info);
         }
-#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_PROC_FS */
+#endif /* DISPLAY_CMD64X_TIMINGS && CONFIG_IDE_PROC_FS */
 
         return 0;
 }
@@ -644,15 +595,24 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
 
         hwif->atapi_dma = 1;
 
-        hwif->ultra_mask = 0x3f;
-        hwif->mwdma_mask = 0x07;
+        hwif->ultra_mask = hwif->cds->udma_mask;
+
+        /*
+         * UltraDMA only supported on PCI646U and PCI646U2, which
+         * correspond to revisions 0x03, 0x05 and 0x07 respectively.
+         * Actually, although the CMD tech support people won't
+         * tell me the details, the 0x03 revision cannot support
+         * UDMA correctly without hardware modifications, and even
+         * then it only works with Quantum disks due to some
+         * hold time assumptions in the 646U part which are fixed
+         * in the 646U2.
+         *
+         * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
+         */
+        if (dev->device == PCI_DEVICE_ID_CMD_646 && class_rev < 5)
+                hwif->ultra_mask = 0x00;
 
-        if (dev->device == PCI_DEVICE_ID_CMD_643)
-                hwif->ultra_mask = 0x80;
-        if (dev->device == PCI_DEVICE_ID_CMD_646)
-                hwif->ultra_mask = (class_rev > 0x04) ? 0x07 : 0x80;
-        if (dev->device == PCI_DEVICE_ID_CMD_648)
-                hwif->ultra_mask = 0x1f;
+        hwif->mwdma_mask = 0x07;
 
         hwif->ide_dma_check = &cmd64x_config_drive_for_dma;
         if (!(hwif->udma_four))
@@ -716,6 +676,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
                 .autodma        = AUTODMA,
                 .enablebits     = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
                 .bootable       = ON_BOARD,
+                .udma_mask      = 0x00, /* no udma */
         },{     /* 1 */
                 .name           = "CMD646",
                 .init_setup     = init_setup_cmd646,
@@ -725,6 +686,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
                 .autodma        = AUTODMA,
                 .enablebits     = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
                 .bootable       = ON_BOARD,
+                .udma_mask      = 0x07, /* udma0-2 */
         },{     /* 2 */
                 .name           = "CMD648",
                 .init_setup     = init_setup_cmd64x,
@@ -734,6 +696,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
                 .autodma        = AUTODMA,
                 .enablebits     = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
                 .bootable       = ON_BOARD,
+                .udma_mask      = 0x1f, /* udma0-4 */
         },{     /* 3 */
                 .name           = "CMD649",
                 .init_setup     = init_setup_cmd64x,
@@ -743,6 +706,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
                 .autodma        = AUTODMA,
                 .enablebits     = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
                 .bootable       = ON_BOARD,
+                .udma_mask      = 0x3f, /* udma0-5 */
         }
 };