diff options
Diffstat (limited to 'drivers/ide/pci/cmd64x.c')
-rw-r--r-- | drivers/ide/pci/cmd64x.c | 85 |
1 files changed, 27 insertions, 58 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index f3d3bde8daba..adee2ef6fd71 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c | |||
@@ -439,11 +439,8 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha | |||
439 | u8 mrdmode = 0; | 439 | u8 mrdmode = 0; |
440 | 440 | ||
441 | if (dev->device == PCI_DEVICE_ID_CMD_646) { | 441 | if (dev->device == PCI_DEVICE_ID_CMD_646) { |
442 | u8 rev = 0; | ||
443 | 442 | ||
444 | pci_read_config_byte(dev, PCI_REVISION_ID, &rev); | 443 | switch (dev->revision) { |
445 | |||
446 | switch (rev) { | ||
447 | case 0x07: | 444 | case 0x07: |
448 | case 0x05: | 445 | case 0x05: |
449 | printk("%s: UltraDMA capable\n", name); | 446 | printk("%s: UltraDMA capable\n", name); |
@@ -505,22 +502,13 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) | |||
505 | static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) | 502 | static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) |
506 | { | 503 | { |
507 | struct pci_dev *dev = hwif->pci_dev; | 504 | struct pci_dev *dev = hwif->pci_dev; |
508 | u8 rev = 0; | ||
509 | |||
510 | pci_read_config_byte(dev, PCI_REVISION_ID, &rev); | ||
511 | 505 | ||
512 | hwif->set_pio_mode = &cmd64x_set_pio_mode; | 506 | hwif->set_pio_mode = &cmd64x_set_pio_mode; |
513 | hwif->set_dma_mode = &cmd64x_set_dma_mode; | 507 | hwif->set_dma_mode = &cmd64x_set_dma_mode; |
514 | 508 | ||
515 | hwif->drives[0].autotune = hwif->drives[1].autotune = 1; | ||
516 | |||
517 | if (!hwif->dma_base) | 509 | if (!hwif->dma_base) |
518 | return; | 510 | return; |
519 | 511 | ||
520 | hwif->atapi_dma = 1; | ||
521 | hwif->mwdma_mask = 0x07; | ||
522 | hwif->ultra_mask = hwif->cds->udma_mask; | ||
523 | |||
524 | /* | 512 | /* |
525 | * UltraDMA only supported on PCI646U and PCI646U2, which | 513 | * UltraDMA only supported on PCI646U and PCI646U2, which |
526 | * correspond to revisions 0x03, 0x05 and 0x07 respectively. | 514 | * correspond to revisions 0x03, 0x05 and 0x07 respectively. |
@@ -533,7 +521,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) | |||
533 | * | 521 | * |
534 | * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. | 522 | * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. |
535 | */ | 523 | */ |
536 | if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) | 524 | if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5) |
537 | hwif->ultra_mask = 0x00; | 525 | hwif->ultra_mask = 0x00; |
538 | 526 | ||
539 | if (hwif->cbl != ATA_CBL_PATA40_SHORT) | 527 | if (hwif->cbl != ATA_CBL_PATA40_SHORT) |
@@ -548,10 +536,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) | |||
548 | break; | 536 | break; |
549 | case PCI_DEVICE_ID_CMD_646: | 537 | case PCI_DEVICE_ID_CMD_646: |
550 | hwif->chipset = ide_cmd646; | 538 | hwif->chipset = ide_cmd646; |
551 | if (rev == 0x01) { | 539 | if (dev->revision == 0x01) { |
552 | hwif->ide_dma_end = &cmd646_1_ide_dma_end; | 540 | hwif->ide_dma_end = &cmd646_1_ide_dma_end; |
553 | break; | 541 | break; |
554 | } else if (rev >= 0x03) | 542 | } else if (dev->revision >= 0x03) |
555 | goto alt_irq_bits; | 543 | goto alt_irq_bits; |
556 | /* fall thru */ | 544 | /* fall thru */ |
557 | default: | 545 | default: |
@@ -561,80 +549,61 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) | |||
561 | } | 549 | } |
562 | } | 550 | } |
563 | 551 | ||
564 | static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) | ||
565 | { | ||
566 | return ide_setup_pci_device(dev, d); | ||
567 | } | ||
568 | |||
569 | static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) | ||
570 | { | ||
571 | /* | ||
572 | * The original PCI0646 didn't have the primary channel enable bit, | ||
573 | * it appeared starting with PCI0646U (i.e. revision ID 3). | ||
574 | */ | ||
575 | if (dev->revision < 3) | ||
576 | d->enablebits[0].reg = 0; | ||
577 | |||
578 | return ide_setup_pci_device(dev, d); | ||
579 | } | ||
580 | |||
581 | static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { | 552 | static ide_pci_device_t cmd64x_chipsets[] __devinitdata = { |
582 | { /* 0 */ | 553 | { /* 0 */ |
583 | .name = "CMD643", | 554 | .name = "CMD643", |
584 | .init_setup = init_setup_cmd64x, | ||
585 | .init_chipset = init_chipset_cmd64x, | 555 | .init_chipset = init_chipset_cmd64x, |
586 | .init_hwif = init_hwif_cmd64x, | 556 | .init_hwif = init_hwif_cmd64x, |
587 | .autodma = AUTODMA, | ||
588 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, | 557 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, |
589 | .bootable = ON_BOARD, | 558 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, |
590 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, | ||
591 | .pio_mask = ATA_PIO5, | 559 | .pio_mask = ATA_PIO5, |
560 | .mwdma_mask = ATA_MWDMA2, | ||
592 | .udma_mask = 0x00, /* no udma */ | 561 | .udma_mask = 0x00, /* no udma */ |
593 | },{ /* 1 */ | 562 | },{ /* 1 */ |
594 | .name = "CMD646", | 563 | .name = "CMD646", |
595 | .init_setup = init_setup_cmd646, | ||
596 | .init_chipset = init_chipset_cmd64x, | 564 | .init_chipset = init_chipset_cmd64x, |
597 | .init_hwif = init_hwif_cmd64x, | 565 | .init_hwif = init_hwif_cmd64x, |
598 | .autodma = AUTODMA, | ||
599 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 566 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
600 | .bootable = ON_BOARD, | 567 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, |
601 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, | ||
602 | .pio_mask = ATA_PIO5, | 568 | .pio_mask = ATA_PIO5, |
603 | .udma_mask = 0x07, /* udma0-2 */ | 569 | .mwdma_mask = ATA_MWDMA2, |
570 | .udma_mask = ATA_UDMA2, | ||
604 | },{ /* 2 */ | 571 | },{ /* 2 */ |
605 | .name = "CMD648", | 572 | .name = "CMD648", |
606 | .init_setup = init_setup_cmd64x, | ||
607 | .init_chipset = init_chipset_cmd64x, | 573 | .init_chipset = init_chipset_cmd64x, |
608 | .init_hwif = init_hwif_cmd64x, | 574 | .init_hwif = init_hwif_cmd64x, |
609 | .autodma = AUTODMA, | ||
610 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 575 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
611 | .bootable = ON_BOARD, | 576 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, |
612 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, | ||
613 | .pio_mask = ATA_PIO5, | 577 | .pio_mask = ATA_PIO5, |
614 | .udma_mask = 0x1f, /* udma0-4 */ | 578 | .mwdma_mask = ATA_MWDMA2, |
579 | .udma_mask = ATA_UDMA4, | ||
615 | },{ /* 3 */ | 580 | },{ /* 3 */ |
616 | .name = "CMD649", | 581 | .name = "CMD649", |
617 | .init_setup = init_setup_cmd64x, | ||
618 | .init_chipset = init_chipset_cmd64x, | 582 | .init_chipset = init_chipset_cmd64x, |
619 | .init_hwif = init_hwif_cmd64x, | 583 | .init_hwif = init_hwif_cmd64x, |
620 | .autodma = AUTODMA, | ||
621 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 584 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
622 | .bootable = ON_BOARD, | 585 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | IDE_HFLAG_BOOTABLE, |
623 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, | ||
624 | .pio_mask = ATA_PIO5, | 586 | .pio_mask = ATA_PIO5, |
625 | .udma_mask = 0x3f, /* udma0-5 */ | 587 | .mwdma_mask = ATA_MWDMA2, |
588 | .udma_mask = ATA_UDMA5, | ||
626 | } | 589 | } |
627 | }; | 590 | }; |
628 | 591 | ||
629 | /* | ||
630 | * We may have to modify enablebits for PCI0646, so we'd better pass | ||
631 | * a local copy of the ide_pci_device_t structure down the call chain... | ||
632 | */ | ||
633 | static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) | 592 | static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
634 | { | 593 | { |
635 | ide_pci_device_t d = cmd64x_chipsets[id->driver_data]; | 594 | ide_pci_device_t d; |
595 | u8 idx = id->driver_data; | ||
596 | |||
597 | d = cmd64x_chipsets[idx]; | ||
598 | |||
599 | /* | ||
600 | * The original PCI0646 didn't have the primary channel enable bit, | ||
601 | * it appeared starting with PCI0646U (i.e. revision ID 3). | ||
602 | */ | ||
603 | if (idx == 1 && dev->revision < 3) | ||
604 | d.enablebits[0].reg = 0; | ||
636 | 605 | ||
637 | return d.init_setup(dev, &d); | 606 | return ide_setup_pci_device(dev, &d); |
638 | } | 607 | } |
639 | 608 | ||
640 | static const struct pci_device_id cmd64x_pci_tbl[] = { | 609 | static const struct pci_device_id cmd64x_pci_tbl[] = { |