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path: root/drivers/ide/pci/amd74xx.c
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Diffstat (limited to 'drivers/ide/pci/amd74xx.c')
-rw-r--r--drivers/ide/pci/amd74xx.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 71d2c670e97e..6ff4089a2379 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -229,20 +229,16 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
229} 229}
230 230
231/* 231/*
232 * amd_set_drive() computes timing values configures the drive and 232 * amd_set_drive() computes timing values and configures the chipset
233 * the chipset to a desired transfer mode. It also can be called 233 * to a desired transfer mode. It also can be called by upper layers.
234 * by upper layers.
235 */ 234 */
236 235
237static int amd_set_drive(ide_drive_t *drive, const u8 speed) 236static void amd_set_drive(ide_drive_t *drive, const u8 speed)
238{ 237{
239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 238 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
240 struct ide_timing t, p; 239 struct ide_timing t, p;
241 int T, UT; 240 int T, UT;
242 241
243 if (ide_config_drive_speed(drive, speed))
244 return 1;
245
246 T = 1000000000 / amd_clock; 242 T = 1000000000 / amd_clock;
247 UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2); 243 UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2);
248 244
@@ -257,8 +253,6 @@ static int amd_set_drive(ide_drive_t *drive, const u8 speed)
257 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15; 253 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
258 254
259 amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t); 255 amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
260
261 return 0;
262} 256}
263 257
264/* 258/*
@@ -395,7 +389,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
395 hwif->autodma = 0; 389 hwif->autodma = 0;
396 390
397 hwif->set_pio_mode = &amd_set_pio_mode; 391 hwif->set_pio_mode = &amd_set_pio_mode;
398 hwif->speedproc = &amd_set_drive; 392 hwif->set_dma_mode = &amd_set_drive;
399 393
400 for (i = 0; i < 2; i++) { 394 for (i = 0; i < 2; i++) {
401 hwif->drives[i].io_32bit = 1; 395 hwif->drives[i].io_32bit = 1;
@@ -437,7 +431,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
437 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 431 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
438 .bootable = ON_BOARD, \ 432 .bootable = ON_BOARD, \
439 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 433 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \
440 | IDE_HFLAG_PIO_NO_DOWNGRADE, \ 434 | IDE_HFLAG_PIO_NO_DOWNGRADE \
435 | IDE_HFLAG_POST_SET_MODE, \
441 .pio_mask = ATA_PIO5, \ 436 .pio_mask = ATA_PIO5, \
442 } 437 }
443 438
@@ -450,7 +445,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
450 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 445 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
451 .bootable = ON_BOARD, \ 446 .bootable = ON_BOARD, \
452 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 447 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \
453 | IDE_HFLAG_PIO_NO_DOWNGRADE, \ 448 | IDE_HFLAG_PIO_NO_DOWNGRADE \
449 | IDE_HFLAG_POST_SET_MODE, \
454 .pio_mask = ATA_PIO5, \ 450 .pio_mask = ATA_PIO5, \
455 } 451 }
456 452