diff options
Diffstat (limited to 'drivers/ide/pci/amd74xx.c')
-rw-r--r-- | drivers/ide/pci/amd74xx.c | 197 |
1 files changed, 25 insertions, 172 deletions
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index 6ff4089a2379..3bf3d931eea1 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Version 2.23 | 2 | * Version 2.24 |
3 | * | 3 | * |
4 | * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 | 4 | * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 |
5 | * IDE driver for Linux. | 5 | * IDE driver for Linux. |
@@ -28,9 +28,6 @@ | |||
28 | 28 | ||
29 | #include "ide-timing.h" | 29 | #include "ide-timing.h" |
30 | 30 | ||
31 | #define DISPLAY_AMD_TIMINGS | ||
32 | |||
33 | #define AMD_IDE_ENABLE (0x00 + amd_config->base) | ||
34 | #define AMD_IDE_CONFIG (0x01 + amd_config->base) | 31 | #define AMD_IDE_CONFIG (0x01 + amd_config->base) |
35 | #define AMD_CABLE_DETECT (0x02 + amd_config->base) | 32 | #define AMD_CABLE_DETECT (0x02 + amd_config->base) |
36 | #define AMD_DRIVE_TIMING (0x08 + amd_config->base) | 33 | #define AMD_DRIVE_TIMING (0x08 + amd_config->base) |
@@ -88,118 +85,6 @@ static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; | |||
88 | static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; | 85 | static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; |
89 | 86 | ||
90 | /* | 87 | /* |
91 | * AMD /proc entry. | ||
92 | */ | ||
93 | |||
94 | #ifdef CONFIG_IDE_PROC_FS | ||
95 | |||
96 | #include <linux/stat.h> | ||
97 | #include <linux/proc_fs.h> | ||
98 | |||
99 | static u8 amd74xx_proc; | ||
100 | |||
101 | static unsigned char amd_udma2cyc[] = { 4, 6, 8, 10, 3, 2, 1, 15 }; | ||
102 | static unsigned long amd_base; | ||
103 | static struct pci_dev *bmide_dev; | ||
104 | extern int (*amd74xx_display_info)(char *, char **, off_t, int); /* ide-proc.c */ | ||
105 | |||
106 | #define amd_print(format, arg...) p += sprintf(p, format "\n" , ## arg) | ||
107 | #define amd_print_drive(name, format, arg...)\ | ||
108 | p += sprintf(p, name); for (i = 0; i < 4; i++) p += sprintf(p, format, ## arg); p += sprintf(p, "\n"); | ||
109 | |||
110 | static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) | ||
111 | { | ||
112 | int speed[4], cycle[4], setup[4], active[4], recover[4], den[4], | ||
113 | uen[4], udma[4], active8b[4], recover8b[4]; | ||
114 | struct pci_dev *dev = bmide_dev; | ||
115 | unsigned int v, u, i; | ||
116 | unsigned short c, w; | ||
117 | unsigned char t; | ||
118 | int len; | ||
119 | char *p = buffer; | ||
120 | |||
121 | amd_print("----------AMD BusMastering IDE Configuration----------------"); | ||
122 | |||
123 | amd_print("Driver Version: 2.13"); | ||
124 | amd_print("South Bridge: %s", pci_name(bmide_dev)); | ||
125 | |||
126 | amd_print("Revision: IDE %#x", dev->revision); | ||
127 | amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]); | ||
128 | |||
129 | amd_print("BM-DMA base: %#lx", amd_base); | ||
130 | amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); | ||
131 | |||
132 | amd_print("-----------------------Primary IDE-------Secondary IDE------"); | ||
133 | |||
134 | pci_read_config_byte(dev, AMD_IDE_CONFIG, &t); | ||
135 | amd_print("Prefetch Buffer: %10s%20s", (t & 0x80) ? "yes" : "no", (t & 0x20) ? "yes" : "no"); | ||
136 | amd_print("Post Write Buffer: %10s%20s", (t & 0x40) ? "yes" : "no", (t & 0x10) ? "yes" : "no"); | ||
137 | |||
138 | pci_read_config_byte(dev, AMD_IDE_ENABLE, &t); | ||
139 | amd_print("Enabled: %10s%20s", (t & 0x02) ? "yes" : "no", (t & 0x01) ? "yes" : "no"); | ||
140 | |||
141 | c = inb(amd_base + 0x02) | (inb(amd_base + 0x0a) << 8); | ||
142 | amd_print("Simplex only: %10s%20s", (c & 0x80) ? "yes" : "no", (c & 0x8000) ? "yes" : "no"); | ||
143 | |||
144 | amd_print("Cable Type: %10s%20s", (amd_80w & 1) ? "80w" : "40w", (amd_80w & 2) ? "80w" : "40w"); | ||
145 | |||
146 | if (!amd_clock) | ||
147 | return p - buffer; | ||
148 | |||
149 | amd_print("-------------------drive0----drive1----drive2----drive3-----"); | ||
150 | |||
151 | pci_read_config_byte(dev, AMD_ADDRESS_SETUP, &t); | ||
152 | pci_read_config_dword(dev, AMD_DRIVE_TIMING, &v); | ||
153 | pci_read_config_word(dev, AMD_8BIT_TIMING, &w); | ||
154 | pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); | ||
155 | |||
156 | for (i = 0; i < 4; i++) { | ||
157 | setup[i] = ((t >> ((3 - i) << 1)) & 0x3) + 1; | ||
158 | recover8b[i] = ((w >> ((1 - (i >> 1)) << 3)) & 0xf) + 1; | ||
159 | active8b[i] = ((w >> (((1 - (i >> 1)) << 3) + 4)) & 0xf) + 1; | ||
160 | active[i] = ((v >> (((3 - i) << 3) + 4)) & 0xf) + 1; | ||
161 | recover[i] = ((v >> ((3 - i) << 3)) & 0xf) + 1; | ||
162 | |||
163 | udma[i] = amd_udma2cyc[((u >> ((3 - i) << 3)) & 0x7)]; | ||
164 | uen[i] = ((u >> ((3 - i) << 3)) & 0x40) ? 1 : 0; | ||
165 | den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2)); | ||
166 | |||
167 | if (den[i] && uen[i] && udma[i] == 1) { | ||
168 | speed[i] = amd_clock * 3; | ||
169 | cycle[i] = 666666 / amd_clock; | ||
170 | continue; | ||
171 | } | ||
172 | |||
173 | if (den[i] && uen[i] && udma[i] == 15) { | ||
174 | speed[i] = amd_clock * 4; | ||
175 | cycle[i] = 500000 / amd_clock; | ||
176 | continue; | ||
177 | } | ||
178 | |||
179 | speed[i] = 4 * amd_clock / ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2); | ||
180 | cycle[i] = 1000000 * ((den[i] && uen[i]) ? udma[i] : (active[i] + recover[i]) * 2) / amd_clock / 2; | ||
181 | } | ||
182 | |||
183 | amd_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO"); | ||
184 | |||
185 | amd_print_drive("Address Setup: ", "%8dns", 1000000 * setup[i] / amd_clock); | ||
186 | amd_print_drive("Cmd Active: ", "%8dns", 1000000 * active8b[i] / amd_clock); | ||
187 | amd_print_drive("Cmd Recovery: ", "%8dns", 1000000 * recover8b[i] / amd_clock); | ||
188 | amd_print_drive("Data Active: ", "%8dns", 1000000 * active[i] / amd_clock); | ||
189 | amd_print_drive("Data Recovery: ", "%8dns", 1000000 * recover[i] / amd_clock); | ||
190 | amd_print_drive("Cycle Time: ", "%8dns", cycle[i]); | ||
191 | amd_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 1000, speed[i] / 100 % 10); | ||
192 | |||
193 | /* hoping p - buffer is less than 4K... */ | ||
194 | len = (p - buffer) - offset; | ||
195 | *addr = buffer + offset; | ||
196 | |||
197 | return len > count ? count : len; | ||
198 | } | ||
199 | |||
200 | #endif | ||
201 | |||
202 | /* | ||
203 | * amd_set_speed() writes timing values to the chipset registers | 88 | * amd_set_speed() writes timing values to the chipset registers |
204 | */ | 89 | */ |
205 | 90 | ||
@@ -264,16 +149,6 @@ static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio) | |||
264 | amd_set_drive(drive, XFER_PIO_0 + pio); | 149 | amd_set_drive(drive, XFER_PIO_0 + pio); |
265 | } | 150 | } |
266 | 151 | ||
267 | static int amd74xx_ide_dma_check(ide_drive_t *drive) | ||
268 | { | ||
269 | if (ide_tune_dma(drive)) | ||
270 | return 0; | ||
271 | |||
272 | ide_set_max_pio(drive); | ||
273 | |||
274 | return -1; | ||
275 | } | ||
276 | |||
277 | /* | 152 | /* |
278 | * The initialization callback. Here we determine the IDE chip type | 153 | * The initialization callback. Here we determine the IDE chip type |
279 | * and initialize its drive independent registers. | 154 | * and initialize its drive independent registers. |
@@ -363,19 +238,6 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch | |||
363 | amd_chipset->name, pci_name(dev), dev->revision, | 238 | amd_chipset->name, pci_name(dev), dev->revision, |
364 | amd_dma[fls(amd_config->udma_mask) - 1]); | 239 | amd_dma[fls(amd_config->udma_mask) - 1]); |
365 | 240 | ||
366 | /* | ||
367 | * Register /proc/ide/amd74xx entry | ||
368 | */ | ||
369 | |||
370 | #if defined(DISPLAY_AMD_TIMINGS) && defined(CONFIG_IDE_PROC_FS) | ||
371 | if (!amd74xx_proc) { | ||
372 | amd_base = pci_resource_start(dev, 4); | ||
373 | bmide_dev = dev; | ||
374 | ide_pci_create_host_proc("amd74xx", amd74xx_get_info); | ||
375 | amd74xx_proc = 1; | ||
376 | } | ||
377 | #endif /* DISPLAY_AMD_TIMINGS && CONFIG_IDE_PROC_FS */ | ||
378 | |||
379 | return dev->irq; | 241 | return dev->irq; |
380 | } | 242 | } |
381 | 243 | ||
@@ -386,8 +248,6 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
386 | if (hwif->irq == 0) /* 0 is bogus but will do for now */ | 248 | if (hwif->irq == 0) /* 0 is bogus but will do for now */ |
387 | hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); | 249 | hwif->irq = pci_get_legacy_ide_irq(hwif->pci_dev, hwif->channel); |
388 | 250 | ||
389 | hwif->autodma = 0; | ||
390 | |||
391 | hwif->set_pio_mode = &amd_set_pio_mode; | 251 | hwif->set_pio_mode = &amd_set_pio_mode; |
392 | hwif->set_dma_mode = &amd_set_drive; | 252 | hwif->set_dma_mode = &amd_set_drive; |
393 | 253 | ||
@@ -395,7 +255,6 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
395 | hwif->drives[i].io_32bit = 1; | 255 | hwif->drives[i].io_32bit = 1; |
396 | hwif->drives[i].unmask = 1; | 256 | hwif->drives[i].unmask = 1; |
397 | hwif->drives[i].autotune = 1; | 257 | hwif->drives[i].autotune = 1; |
398 | hwif->drives[i].dn = hwif->channel * 2 + i; | ||
399 | } | 258 | } |
400 | 259 | ||
401 | if (!hwif->dma_base) | 260 | if (!hwif->dma_base) |
@@ -414,12 +273,6 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) | |||
414 | else | 273 | else |
415 | hwif->cbl = ATA_CBL_PATA40; | 274 | hwif->cbl = ATA_CBL_PATA40; |
416 | } | 275 | } |
417 | |||
418 | hwif->ide_dma_check = &amd74xx_ide_dma_check; | ||
419 | if (!noautodma) | ||
420 | hwif->autodma = 1; | ||
421 | hwif->drives[0].autodma = hwif->autodma; | ||
422 | hwif->drives[1].autodma = hwif->autodma; | ||
423 | } | 276 | } |
424 | 277 | ||
425 | #define DECLARE_AMD_DEV(name_str) \ | 278 | #define DECLARE_AMD_DEV(name_str) \ |
@@ -489,34 +342,34 @@ static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_ | |||
489 | return ide_setup_pci_device(dev, amd_chipset); | 342 | return ide_setup_pci_device(dev, amd_chipset); |
490 | } | 343 | } |
491 | 344 | ||
492 | static struct pci_device_id amd74xx_pci_tbl[] = { | 345 | static const struct pci_device_id amd74xx_pci_tbl[] = { |
493 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_COBRA_7401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, | 346 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 }, |
494 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7409, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, | 347 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 }, |
495 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7411, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, | 348 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 }, |
496 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, | 349 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 3 }, |
497 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, | 350 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 4 }, |
498 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }, | 351 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 5 }, |
499 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 }, | 352 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 6 }, |
500 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, | 353 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 7 }, |
501 | #ifdef CONFIG_BLK_DEV_IDE_SATA | 354 | #ifdef CONFIG_BLK_DEV_IDE_SATA |
502 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, | 355 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 8 }, |
503 | #endif | 356 | #endif |
504 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, | 357 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 9 }, |
505 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 }, | 358 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 10 }, |
506 | #ifdef CONFIG_BLK_DEV_IDE_SATA | 359 | #ifdef CONFIG_BLK_DEV_IDE_SATA |
507 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 }, | 360 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 11 }, |
508 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 }, | 361 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 12 }, |
509 | #endif | 362 | #endif |
510 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13 }, | 363 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 13 }, |
511 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14 }, | 364 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 14 }, |
512 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15 }, | 365 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 15 }, |
513 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16 }, | 366 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 16 }, |
514 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 }, | 367 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 17 }, |
515 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 }, | 368 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 18 }, |
516 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19 }, | 369 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 19 }, |
517 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20 }, | 370 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 20 }, |
518 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21 }, | 371 | { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 21 }, |
519 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22 }, | 372 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 22 }, |
520 | { 0, }, | 373 | { 0, }, |
521 | }; | 374 | }; |
522 | MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); | 375 | MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); |