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path: root/drivers/ide/pci/aec62xx.c
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Diffstat (limited to 'drivers/ide/pci/aec62xx.c')
-rw-r--r--drivers/ide/pci/aec62xx.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index e5d09367627e..74432830abf7 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -142,7 +142,7 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
142 142
143static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) 143static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio)
144{ 144{
145 pio = ide_get_best_pio_mode(drive, pio, 4, NULL); 145 pio = ide_get_best_pio_mode(drive, pio, 4);
146 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); 146 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0);
147} 147}
148 148
@@ -174,12 +174,6 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch
174{ 174{
175 int bus_speed = system_bus_clock(); 175 int bus_speed = system_bus_clock();
176 176
177 if (dev->resource[PCI_ROM_RESOURCE].start) {
178 pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
179 printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
180 (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
181 }
182
183 if (bus_speed <= 33) 177 if (bus_speed <= 33)
184 pci_set_drvdata(dev, (void *) aec6xxx_33_base); 178 pci_set_drvdata(dev, (void *) aec6xxx_33_base);
185 else 179 else
@@ -271,48 +265,48 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
271 .init_setup = init_setup_aec62xx, 265 .init_setup = init_setup_aec62xx,
272 .init_chipset = init_chipset_aec62xx, 266 .init_chipset = init_chipset_aec62xx,
273 .init_hwif = init_hwif_aec62xx, 267 .init_hwif = init_hwif_aec62xx,
274 .channels = 2,
275 .autodma = AUTODMA, 268 .autodma = AUTODMA,
276 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 269 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
277 .bootable = OFF_BOARD, 270 .bootable = OFF_BOARD,
271 .pio_mask = ATA_PIO4,
278 .udma_mask = 0x07, /* udma0-2 */ 272 .udma_mask = 0x07, /* udma0-2 */
279 },{ /* 1 */ 273 },{ /* 1 */
280 .name = "AEC6260", 274 .name = "AEC6260",
281 .init_setup = init_setup_aec62xx, 275 .init_setup = init_setup_aec62xx,
282 .init_chipset = init_chipset_aec62xx, 276 .init_chipset = init_chipset_aec62xx,
283 .init_hwif = init_hwif_aec62xx, 277 .init_hwif = init_hwif_aec62xx,
284 .channels = 2,
285 .autodma = NOAUTODMA, 278 .autodma = NOAUTODMA,
286 .bootable = OFF_BOARD, 279 .bootable = OFF_BOARD,
280 .pio_mask = ATA_PIO4,
287 .udma_mask = 0x1f, /* udma0-4 */ 281 .udma_mask = 0x1f, /* udma0-4 */
288 },{ /* 2 */ 282 },{ /* 2 */
289 .name = "AEC6260R", 283 .name = "AEC6260R",
290 .init_setup = init_setup_aec62xx, 284 .init_setup = init_setup_aec62xx,
291 .init_chipset = init_chipset_aec62xx, 285 .init_chipset = init_chipset_aec62xx,
292 .init_hwif = init_hwif_aec62xx, 286 .init_hwif = init_hwif_aec62xx,
293 .channels = 2,
294 .autodma = AUTODMA, 287 .autodma = AUTODMA,
295 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 288 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
296 .bootable = NEVER_BOARD, 289 .bootable = NEVER_BOARD,
290 .pio_mask = ATA_PIO4,
297 .udma_mask = 0x1f, /* udma0-4 */ 291 .udma_mask = 0x1f, /* udma0-4 */
298 },{ /* 3 */ 292 },{ /* 3 */
299 .name = "AEC6280", 293 .name = "AEC6280",
300 .init_setup = init_setup_aec6x80, 294 .init_setup = init_setup_aec6x80,
301 .init_chipset = init_chipset_aec62xx, 295 .init_chipset = init_chipset_aec62xx,
302 .init_hwif = init_hwif_aec62xx, 296 .init_hwif = init_hwif_aec62xx,
303 .channels = 2,
304 .autodma = AUTODMA, 297 .autodma = AUTODMA,
305 .bootable = OFF_BOARD, 298 .bootable = OFF_BOARD,
299 .pio_mask = ATA_PIO4,
306 .udma_mask = 0x3f, /* udma0-5 */ 300 .udma_mask = 0x3f, /* udma0-5 */
307 },{ /* 4 */ 301 },{ /* 4 */
308 .name = "AEC6280R", 302 .name = "AEC6280R",
309 .init_setup = init_setup_aec6x80, 303 .init_setup = init_setup_aec6x80,
310 .init_chipset = init_chipset_aec62xx, 304 .init_chipset = init_chipset_aec62xx,
311 .init_hwif = init_hwif_aec62xx, 305 .init_hwif = init_hwif_aec62xx,
312 .channels = 2,
313 .autodma = AUTODMA, 306 .autodma = AUTODMA,
314 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, 307 .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
315 .bootable = OFF_BOARD, 308 .bootable = OFF_BOARD,
309 .pio_mask = ATA_PIO4,
316 .udma_mask = 0x3f, /* udma0-5 */ 310 .udma_mask = 0x3f, /* udma0-5 */
317 } 311 }
318}; 312};